swaits
4cccb65124
The wire protocol is re-specified as DongLoRa Protocol v2 (see PROTOCOL.md). Every type_id, tag-correlation rule, and field layout is incompatible with 0.1.0. * Add PROTOCOL.md as the normative spec for the v2 wire format. * Replace framing.rs with a streaming FrameDecoder that emits (type_id, tag, payload) triples on each COBS-delimited, CRC-checked frame. * Split the single-file lib.rs into dedicated modules: frame, commands, events, errors, modulation, info, crc, chip_id. Re-exports preserve convenience imports at the crate root. * Replace RadioConfig / Bandwidth with a Modulation enum covering LoRa, FSK/GFSK, LR-FHSS, and FLRC, each with its own typed parameter struct. * Add TxFlags, RxOrigin, SetConfigResult, OkPayload to model v2 response shapes, and RadioChipId for GET_INFO. * Rewrite fuzz corpus: replace the 4 cobs_* / command_roundtrip targets with decoder_feed, frame_roundtrip, lora_config_roundtrip, and parse_device_message; drop parse_radio_config. * Expand proptest and mutation-killer coverage for the new wire shape. * Rewrite canonical-byte test vectors against the v2 spec.
51 lines
1.3 KiB
Rust
51 lines
1.3 KiB
Rust
//! `LoRaConfig` round-trips through its wire encoding for every
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//! construction derived via `Arbitrary`.
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#![no_main]
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use arbitrary::Arbitrary;
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use donglora_protocol::{LoRaBandwidth, LoRaCodingRate, LoRaConfig, LoRaHeaderMode};
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use libfuzzer_sys::fuzz_target;
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#[derive(Debug, Arbitrary)]
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struct Input {
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freq_hz: u32,
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sf: u8,
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bw_raw: u8,
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cr_raw: u8,
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preamble_len: u16,
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sync_word: u16,
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tx_power_dbm: i8,
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header_raw: u8,
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payload_crc: bool,
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iq_invert: bool,
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}
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fuzz_target!(|input: Input| {
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let Some(bw) = LoRaBandwidth::from_u8(input.bw_raw & 0x0F) else {
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return;
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};
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let Some(cr) = LoRaCodingRate::from_u8(input.cr_raw & 0x03) else {
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return;
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};
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let Some(header_mode) = LoRaHeaderMode::from_u8(input.header_raw & 0x01) else {
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return;
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};
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let cfg = LoRaConfig {
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freq_hz: input.freq_hz,
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sf: input.sf,
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bw,
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cr,
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preamble_len: input.preamble_len,
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sync_word: input.sync_word,
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tx_power_dbm: input.tx_power_dbm,
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header_mode,
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payload_crc: input.payload_crc,
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iq_invert: input.iq_invert,
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};
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let mut buf = [0u8; 32];
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let n = cfg.encode(&mut buf).unwrap();
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assert_eq!(LoRaConfig::decode(&buf[..n]).unwrap(), cfg);
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});
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