feat: add display UI with splash screen, dashboard, and RSSI sparkline
Implement full SSD1306 OLED display support: - Splash screen on boot (1.5s) with project name, version, board - Dashboard showing radio state, config, counters, RSSI/SNR - RSSI history sparkline (64-sample ring buffer, 2px-wide bars) - DisplayOn/DisplayOff host commands routed via dedicated channel - Pure render functions against generic DrawTarget (no hardware coupling) - Display on/off control bypasses radio task entirely Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
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//! Instrumentation Trace Macrocell
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//!
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//! **NOTE** This module is only available on ARMv7-M and newer.
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use core::{fmt, ptr, slice};
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use crate::peripheral::itm::Stim;
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// NOTE assumes that `bytes` is 32-bit aligned
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unsafe fn write_words(stim: &mut Stim, bytes: &[u32]) {
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let mut p = bytes.as_ptr();
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for _ in 0..bytes.len() {
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while !stim.is_fifo_ready() {}
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stim.write_u32(ptr::read(p));
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p = p.offset(1);
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}
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}
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/// Writes an aligned byte slice to the ITM.
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///
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/// `buffer` must be 4-byte aligned.
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unsafe fn write_aligned_impl(port: &mut Stim, buffer: &[u8]) {
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let len = buffer.len();
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if len == 0 {
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return;
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}
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let split = len & !0b11;
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#[allow(clippy::cast_ptr_alignment)]
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write_words(
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port,
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slice::from_raw_parts(buffer.as_ptr() as *const u32, split >> 2),
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);
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// 3 bytes or less left
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let mut left = len & 0b11;
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let mut ptr = buffer.as_ptr().add(split);
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// at least 2 bytes left
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if left > 1 {
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while !port.is_fifo_ready() {}
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#[allow(clippy::cast_ptr_alignment)]
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port.write_u16(ptr::read(ptr as *const u16));
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ptr = ptr.offset(2);
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left -= 2;
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}
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// final byte
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if left == 1 {
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while !port.is_fifo_ready() {}
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port.write_u8(*ptr);
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}
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}
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struct Port<'p>(&'p mut Stim);
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impl<'p> fmt::Write for Port<'p> {
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#[inline]
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fn write_str(&mut self, s: &str) -> fmt::Result {
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write_all(self.0, s.as_bytes());
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Ok(())
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}
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}
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/// A wrapper type that aligns its contents on a 4-Byte boundary.
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///
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/// ITM transfers are most efficient when the data is 4-Byte-aligned. This type provides an easy
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/// way to accomplish and enforce such an alignment.
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#[repr(align(4))]
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pub struct Aligned<T: ?Sized>(pub T);
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/// Writes `buffer` to an ITM port.
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#[allow(clippy::missing_inline_in_public_items)]
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pub fn write_all(port: &mut Stim, buffer: &[u8]) {
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unsafe {
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let mut len = buffer.len();
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let mut ptr = buffer.as_ptr();
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if len == 0 {
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return;
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}
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// 0x01 OR 0x03
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if ptr as usize % 2 == 1 {
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while !port.is_fifo_ready() {}
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port.write_u8(*ptr);
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// 0x02 OR 0x04
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ptr = ptr.offset(1);
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len -= 1;
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}
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// 0x02
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if ptr as usize % 4 == 2 {
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if len > 1 {
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// at least 2 bytes
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while !port.is_fifo_ready() {}
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// We checked the alignment above, so this is safe
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#[allow(clippy::cast_ptr_alignment)]
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port.write_u16(ptr::read(ptr as *const u16));
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// 0x04
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ptr = ptr.offset(2);
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len -= 2;
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} else {
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if len == 1 {
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// last byte
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while !port.is_fifo_ready() {}
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port.write_u8(*ptr);
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}
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return;
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}
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}
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// The remaining data is 4-byte aligned, but might not be a multiple of 4 bytes
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write_aligned_impl(port, slice::from_raw_parts(ptr, len));
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}
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}
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/// Writes a 4-byte aligned `buffer` to an ITM port.
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///
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/// # Examples
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///
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/// ```no_run
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/// # use cortex_m::{itm::{self, Aligned}, peripheral::ITM};
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/// # let port = unsafe { &mut (*ITM::PTR).stim[0] };
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/// let mut buffer = Aligned([0; 14]);
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///
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/// buffer.0.copy_from_slice(b"Hello, world!\n");
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///
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/// itm::write_aligned(port, &buffer);
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///
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/// // Or equivalently
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/// itm::write_aligned(port, &Aligned(*b"Hello, world!\n"));
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/// ```
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#[allow(clippy::missing_inline_in_public_items)]
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pub fn write_aligned(port: &mut Stim, buffer: &Aligned<[u8]>) {
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unsafe { write_aligned_impl(port, &buffer.0) }
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}
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/// Writes `fmt::Arguments` to the ITM `port`
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#[inline]
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pub fn write_fmt(port: &mut Stim, args: fmt::Arguments) {
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use core::fmt::Write;
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Port(port).write_fmt(args).ok();
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}
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/// Writes a string to the ITM `port`
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#[inline]
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pub fn write_str(port: &mut Stim, string: &str) {
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write_all(port, string.as_bytes())
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}
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