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feat: add display UI with splash screen, dashboard, and RSSI sparkline

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Implement full SSD1306 OLED display support:
- Splash screen on boot (1.5s) with project name, version, board
- Dashboard showing radio state, config, counters, RSSI/SNR
- RSSI history sparkline (64-sample ring buffer, 2px-wide bars)
- DisplayOn/DisplayOff host commands routed via dedicated channel
- Pure render functions against generic DrawTarget (no hardware coupling)
- Display on/off control bypasses radio task entirely

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
This commit is contained in:
swaitsandClaude Opus 4.6 committed 2026-03-29 20:42:54 -06:00
1 parent 7064110293
commit 3102fc747a
17624 files changed
+4564928 -38
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vendor/esp-hal/ld/esp32c2/esp32c2.x
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ENTRY(_start)
PROVIDE(_stext = ORIGIN(ROTEXT));
PROVIDE(_max_hart_id = 0);
PROVIDE(UserSoft = DefaultHandler);
PROVIDE(SupervisorSoft = DefaultHandler);
PROVIDE(MachineSoft = DefaultHandler);
PROVIDE(UserTimer = DefaultHandler);
PROVIDE(SupervisorTimer = DefaultHandler);
PROVIDE(MachineTimer = DefaultHandler);
PROVIDE(UserExternal = DefaultHandler);
PROVIDE(SupervisorExternal = DefaultHandler);
PROVIDE(MachineExternal = DefaultHandler);
PROVIDE(ExceptionHandler = DefaultExceptionHandler);
PROVIDE(__post_init = default_post_init);
/* A PAC/HAL defined routine that should initialize custom interrupt controller if needed. */
PROVIDE(_setup_interrupts = default_setup_interrupts);
/* # Multi-processing hook function
fn _mp_hook() -> bool;
This function is called from all the harts and must return true only for one hart,
which will perform memory initialization. For other harts it must return false
and implement wake-up in platform-dependent way (e.g. after waiting for a user interrupt).
*/
PROVIDE(_mp_hook = default_mp_hook);
/* # Start trap function override
By default uses the riscv crates default trap handler
but by providing the `_start_trap` symbol external crates can override.
*/
PROVIDE(_start_trap = default_start_trap);
/* esp32c2 fixups */
SECTIONS {
.trap : ALIGN(4)
{
KEEP(*(.trap));
*(.trap.*);
} > RWTEXT
}
INSERT BEFORE .rwtext;
SECTIONS {
/**
* This dummy section represents the .text section but in rodata.
* Thus, it must have its alignement and (at least) its size.
*/
.text_dummy (NOLOAD):
{
/* Start at the same alignement constraint than .text */
. = ALIGN(4);
/* Create an empty gap as big as .text section */
. = . + SIZEOF(.text);
/* Prepare the alignement of the section above. Few bytes (0x20) must be
* added for the mapping header. */
. = ALIGN(0x10000) + 0x20;
} > RODATA
}
INSERT BEFORE .rodata;
SECTIONS {
/* similar as text_dummy */
.rwdata_dummy (NOLOAD) : {
. = ALIGN(ALIGNOF(.rwtext));
. = . + SIZEOF(.rwtext);
. = . + SIZEOF(.rwtext.wifi);
. = . + SIZEOF(.trap);
} > RWDATA
}
INSERT BEFORE .data;
/* Must be called __global_pointer$ for linker relaxations to work. */
PROVIDE(__global_pointer$ = _data_start + 0x800);
/* end of esp32c2 fixups */
/* Shared sections - ordering matters */
INCLUDE "rwtext.x"
INCLUDE "text.x"
INCLUDE "rwdata.x"
INCLUDE "rodata.x"
INCLUDE "stack.x"
INCLUDE "dram2.x"
/* End of Shared sections */
INCLUDE "debug.x"
vendor/esp-hal/ld/esp32c2/linkall.x
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INCLUDE "memory.x"
REGION_ALIAS("ROTEXT", IROM);
REGION_ALIAS("RODATA", DROM);
REGION_ALIAS("RWDATA", DRAM);
REGION_ALIAS("RWTEXT", IRAM);
INCLUDE "esp32c2.x"
INCLUDE "hal-defaults.x"
INCLUDE "rom-functions.x"
vendor/esp-hal/ld/esp32c2/memory.x
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MEMORY
{
/*
https://github.com/espressif/esptool/blob/10828527038d143e049790d330ac4de76ce987d6/esptool/targets/esp32c2.py#L53-L62
MEMORY_MAP = [[0x00000000, 0x00010000, "PADDING"],
[0x3C000000, 0x3C400000, "DROM"],
[0x3FCA0000, 0x3FCE0000, "DRAM"],
[0x3FC88000, 0x3FD00000, "BYTE_ACCESSIBLE"],
[0x3FF00000, 0x3FF50000, "DROM_MASK"],
[0x40000000, 0x40090000, "IROM_MASK"],
[0x42000000, 0x42400000, "IROM"],
[0x4037C000, 0x403C0000, "IRAM"]]
*/
ICACHE : ORIGIN = 0x4037C000, LENGTH = 16K
/* Instruction RAM */
IRAM : ORIGIN = 0x4037C000 + LENGTH(ICACHE), LENGTH = 186k
/* Data RAM */
DRAM : ORIGIN = 0x3FCA0000, LENGTH = 186k
/* memory available after the 2nd stage bootloader is finished */
dram2_seg ( RW ) : ORIGIN = ORIGIN(DRAM) + LENGTH(DRAM), len = 0x3fcdeb70 - (ORIGIN(DRAM) + LENGTH(DRAM))
/* External flash */
/* Instruction ROM */
IROM : ORIGIN = 0x42000000 + 0x20, LENGTH = 0x200000 - 0x20
/* Data ROM */
DROM : ORIGIN = 0x3C000000, LENGTH = 0x200000
}
vendor/esp-hal/ld/esp32c2/rom-functions.x
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INCLUDE "rom/esp32c2.rom.api.ld"
INCLUDE "rom/esp32c2.rom.heap.ld"
INCLUDE "rom/esp32c2.rom.ld"
INCLUDE "rom/esp32c2.rom.libgcc.ld"
INCLUDE "rom/esp32c2.rom.rvfp.ld"
INCLUDE "rom/esp32c2.rom.version.ld"
INCLUDE "rom/additional.ld"
vendor/esp-hal/ld/esp32c2/rom/additional.ld
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memset = 0x40000488;
memcpy = 0x4000048c;
memmove = 0x40000490;
memcmp = 0x40000494;
strcpy = 0x40000498;
strncpy = 0x4000049c;
strncmp = 0x400004a4;
PROVIDE ( strcat = 0x4000050c );
PROVIDE ( strcmp = 0x400004a0 );
PROVIDE ( strchr = 0x40000514 );
PROVIDE ( strlcpy = 0x40000524 );
PROVIDE ( strstr = 0x400004ac );
PROVIDE ( strcasecmp = 0x40000504 );
PROVIDE ( strdup = 0x40000510 );
PROVIDE ( atoi = 0x40000580 );
vendor/esp-hal/ld/esp32c2/rom/esp32c2.rom.api.ld
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/*
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
/** ROM APIs
*/
PROVIDE ( esp_rom_crc32_le = crc32_le );
PROVIDE ( esp_rom_crc16_le = crc16_le );
PROVIDE ( esp_rom_crc8_le = crc8_le );
PROVIDE ( esp_rom_crc32_be = crc32_be );
PROVIDE ( esp_rom_crc16_be = crc16_be );
PROVIDE ( esp_rom_crc8_be = crc8_be );
PROVIDE ( esp_rom_gpio_pad_select_gpio = gpio_pad_select_gpio );
PROVIDE ( esp_rom_gpio_pad_pullup_only = gpio_pad_pullup );
PROVIDE ( esp_rom_gpio_pad_set_drv = gpio_pad_set_drv );
PROVIDE ( esp_rom_gpio_pad_unhold = gpio_pad_unhold );
PROVIDE ( esp_rom_gpio_connect_in_signal = gpio_matrix_in );
PROVIDE ( esp_rom_gpio_connect_out_signal = gpio_matrix_out );
PROVIDE ( esp_rom_efuse_mac_address_crc8 = esp_crc8 );
PROVIDE ( esp_rom_efuse_is_secure_boot_enabled = ets_efuse_secure_boot_enabled );
PROVIDE ( esp_rom_uart_flush_tx = uart_tx_flush );
PROVIDE ( esp_rom_uart_tx_one_char = uart_tx_one_char );
PROVIDE ( esp_rom_uart_tx_wait_idle = uart_tx_wait_idle );
PROVIDE ( esp_rom_uart_rx_one_char = uart_rx_one_char );
PROVIDE ( esp_rom_uart_rx_string = UartRxString );
PROVIDE ( esp_rom_uart_set_as_console = uart_tx_switch );
PROVIDE ( esp_rom_uart_putc = ets_write_char_uart );
PROVIDE ( esp_rom_output_flush_tx = uart_tx_flush );
PROVIDE ( esp_rom_output_tx_one_char = uart_tx_one_char );
PROVIDE ( esp_rom_output_tx_wait_idle = uart_tx_wait_idle );
PROVIDE ( esp_rom_output_rx_one_char = uart_rx_one_char );
PROVIDE ( esp_rom_output_rx_string = UartRxString );
PROVIDE ( esp_rom_output_set_as_console = uart_tx_switch );
PROVIDE ( esp_rom_output_putc = ets_write_char_uart );
PROVIDE ( esp_rom_mbedtls_md5_starts_ret = mbedtls_md5_starts_ret );
PROVIDE ( esp_rom_mbedtls_md5_update_ret = mbedtls_md5_update_ret );
PROVIDE ( esp_rom_mbedtls_md5_finish_ret = mbedtls_md5_finish_ret );
PROVIDE ( esp_rom_software_reset_system = software_reset );
PROVIDE ( esp_rom_software_reset_cpu = software_reset_cpu );
PROVIDE ( esp_rom_printf = ets_printf );
PROVIDE ( esp_rom_install_uart_printf = ets_install_uart_printf );
PROVIDE ( esp_rom_delay_us = ets_delay_us );
PROVIDE ( esp_rom_get_reset_reason = rtc_get_reset_reason );
PROVIDE ( esp_rom_route_intr_matrix = intr_matrix_set );
PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency );
PROVIDE ( esp_rom_set_cpu_ticks_per_us = ets_update_cpu_frequency );
PROVIDE ( esp_rom_spiflash_attach = spi_flash_attach );
PROVIDE ( esp_rom_spiflash_clear_bp = esp_rom_spiflash_unlock );
PROVIDE ( esp_rom_spiflash_write_enable = SPI_write_enable);
PROVIDE ( esp_rom_spiflash_erase_area = SPIEraseArea );
PROVIDE ( esp_rom_spiflash_fix_dummylen = spi_dummy_len_fix );
PROVIDE ( esp_rom_spiflash_set_drvs = SetSpiDrvs);
PROVIDE ( esp_rom_spiflash_select_padsfunc = SelectSpiFunction );
PROVIDE ( esp_rom_spiflash_common_cmd = SPI_Common_Command );
PROVIDE ( esp_rom_regi2c_read = rom_i2c_readReg );
PROVIDE ( esp_rom_regi2c_read_mask = rom_i2c_readReg_Mask );
PROVIDE ( esp_rom_regi2c_write = rom_i2c_writeReg );
PROVIDE ( esp_rom_regi2c_write_mask = rom_i2c_writeReg_Mask );
vendor/esp-hal/ld/esp32c2/rom/esp32c2.rom.heap.ld
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/*
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
/***************************************
Group heap
***************************************/
/* Functions */
PROVIDE( tlsf_create = 0x400002dc );
PROVIDE( tlsf_create_with_pool = 0x400002e0 );
PROVIDE( tlsf_get_pool = 0x400002e4 );
PROVIDE( tlsf_add_pool = 0x400002e8 );
PROVIDE( tlsf_remove_pool = 0x400002ec );
PROVIDE( tlsf_malloc = 0x400002f0 );
PROVIDE( tlsf_memalign = 0x400002f4 );
PROVIDE( tlsf_memalign_offs = 0x400002f8 );
PROVIDE( tlsf_realloc = 0x400002fc );
PROVIDE( tlsf_free = 0x40000300 );
PROVIDE( tlsf_block_size = 0x40000304 );
PROVIDE( tlsf_size = 0x40000308 );
PROVIDE( tlsf_align_size = 0x4000030c );
PROVIDE( tlsf_block_size_min = 0x40000310 );
PROVIDE( tlsf_block_size_max = 0x40000314 );
PROVIDE( tlsf_pool_overhead = 0x40000318 );
PROVIDE( tlsf_alloc_overhead = 0x4000031c );
PROVIDE( tlsf_walk_pool = 0x40000320 );
PROVIDE( tlsf_check = 0x40000324 );
PROVIDE( tlsf_check_pool = 0x40000328 );
PROVIDE( tlsf_poison_fill_pfunc_set = 0x4000032c );
PROVIDE( multi_heap_get_block_address_impl = 0x40000330 );
PROVIDE( multi_heap_get_allocated_size_impl = 0x40000334 );
PROVIDE( multi_heap_register_impl = 0x40000338 );
PROVIDE( multi_heap_set_lock = 0x4000033c );
PROVIDE( multi_heap_os_funcs_init = 0x40000340 );
PROVIDE( multi_heap_internal_lock = 0x40000344 );
PROVIDE( multi_heap_internal_unlock = 0x40000348 );
PROVIDE( multi_heap_get_first_block = 0x4000034c );
PROVIDE( multi_heap_get_next_block = 0x40000350 );
PROVIDE( multi_heap_is_free = 0x40000354 );
PROVIDE( multi_heap_malloc_impl = 0x40000358 );
PROVIDE( multi_heap_free_impl = 0x4000035c );
PROVIDE( multi_heap_realloc_impl = 0x40000360 );
PROVIDE( multi_heap_aligned_alloc_impl_offs = 0x40000364 );
PROVIDE( multi_heap_aligned_alloc_impl = 0x40000368 );
PROVIDE( multi_heap_check = 0x4000036c );
PROVIDE( multi_heap_dump = 0x40000370 );
PROVIDE( multi_heap_free_size_impl = 0x40000374 );
PROVIDE( multi_heap_minimum_free_size_impl = 0x40000378 );
PROVIDE( multi_heap_get_info_impl = 0x4000037c );
/* Data (.data, .bss, .rodata) */
PROVIDE( heap_tlsf_table_ptr = 0x3fcdffec );
/**
* Multi heap function
*/
PROVIDE (multi_heap_malloc = multi_heap_malloc_impl);
PROVIDE (multi_heap_free = multi_heap_free_impl);
PROVIDE (multi_heap_realloc = multi_heap_realloc_impl);
PROVIDE (multi_heap_get_allocated_size = multi_heap_get_allocated_size_impl);
PROVIDE (multi_heap_register = multi_heap_register_impl);
PROVIDE (multi_heap_get_info = multi_heap_get_info_impl);
PROVIDE (multi_heap_free_size = multi_heap_free_size_impl);
PROVIDE (multi_heap_minimum_free_size = multi_heap_minimum_free_size_impl);
PROVIDE (multi_heap_get_block_address = multi_heap_get_block_address_impl);
PROVIDE (multi_heap_aligned_alloc = multi_heap_aligned_alloc_impl);
PROVIDE (multi_heap_aligned_free = multi_heap_aligned_free_impl);
PROVIDE (multi_heap_check = multi_heap_check);
PROVIDE (multi_heap_set_lock = multi_heap_set_lock);
PROVIDE (multi_heap_internal_lock = multi_heap_internal_lock);
PROVIDE (multi_heap_internal_unlock = multi_heap_internal_unlock);
vendor/esp-hal/ld/esp32c2/rom/esp32c2.rom.ld
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vendor/esp-hal/ld/esp32c2/rom/esp32c2.rom.libgcc.ld
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/*
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
/* ROM function interface esp32c2.rom.libgcc.ld for esp32c2
*
*
* Generated from ./interface-esp32c2.yml md5sum c679b6ed5e9f0a9c3e7b93e5e0f2a1a3
*
* Compatible with ROM where ECO version equal or greater to 1.
*
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
*/
/***************************************
Group libgcc
***************************************/
/* Functions */
__absvdi2 = 0x400008a8;
__absvsi2 = 0x400008ac;
__adddf3 = 0x400008b0;
__addsf3 = 0x400008b4;
__addvdi3 = 0x400008b8;
__addvsi3 = 0x400008bc;
__ashldi3 = 0x400008c0;
__ashrdi3 = 0x400008c4;
__bswapdi2 = 0x400008c8;
__bswapsi2 = 0x400008cc;
__clear_cache = 0x400008d0;
__clrsbdi2 = 0x400008d4;
__clrsbsi2 = 0x400008d8;
__clzdi2 = 0x400008dc;
__clzsi2 = 0x400008e0;
__cmpdi2 = 0x400008e4;
__ctzdi2 = 0x400008e8;
__ctzsi2 = 0x400008ec;
__divdc3 = 0x400008f0;
__divdf3 = 0x400008f4;
__divdi3 = 0x400008f8;
__divsc3 = 0x400008fc;
__divsf3 = 0x40000900;
__divsi3 = 0x40000904;
__eqdf2 = 0x40000908;
__eqsf2 = 0x4000090c;
__extendsfdf2 = 0x40000910;
__ffsdi2 = 0x40000914;
__ffssi2 = 0x40000918;
__fixdfdi = 0x4000091c;
__fixdfsi = 0x40000920;
__fixsfdi = 0x40000924;
__fixsfsi = 0x40000928;
__fixunsdfsi = 0x4000092c;
__fixunssfdi = 0x40000930;
__fixunssfsi = 0x40000934;
__floatdidf = 0x40000938;
__floatdisf = 0x4000093c;
__floatsidf = 0x40000940;
__floatsisf = 0x40000944;
__floatundidf = 0x40000948;
__floatundisf = 0x4000094c;
__floatunsidf = 0x40000950;
__floatunsisf = 0x40000954;
__gcc_bcmp = 0x40000958;
__gedf2 = 0x4000095c;
__gesf2 = 0x40000960;
__gtdf2 = 0x40000964;
__gtsf2 = 0x40000968;
__ledf2 = 0x4000096c;
__lesf2 = 0x40000970;
__lshrdi3 = 0x40000974;
__ltdf2 = 0x40000978;
__ltsf2 = 0x4000097c;
__moddi3 = 0x40000980;
__modsi3 = 0x40000984;
__muldc3 = 0x40000988;
__muldf3 = 0x4000098c;
__muldi3 = 0x40000990;
__mulsc3 = 0x40000994;
__mulsf3 = 0x40000998;
__mulsi3 = 0x4000099c;
__mulvdi3 = 0x400009a0;
__mulvsi3 = 0x400009a4;
__nedf2 = 0x400009a8;
__negdf2 = 0x400009ac;
__negdi2 = 0x400009b0;
__negsf2 = 0x400009b4;
__negvdi2 = 0x400009b8;
__negvsi2 = 0x400009bc;
__nesf2 = 0x400009c0;
__paritysi2 = 0x400009c4;
__popcountdi2 = 0x400009c8;
__popcountsi2 = 0x400009cc;
__powidf2 = 0x400009d0;
__powisf2 = 0x400009d4;
__subdf3 = 0x400009d8;
__subsf3 = 0x400009dc;
__subvdi3 = 0x400009e0;
__subvsi3 = 0x400009e4;
__truncdfsf2 = 0x400009e8;
__ucmpdi2 = 0x400009ec;
__udivdi3 = 0x400009f0;
__udivmoddi4 = 0x400009f4;
__udivsi3 = 0x400009f8;
__udiv_w_sdiv = 0x400009fc;
__umoddi3 = 0x40000a00;
__umodsi3 = 0x40000a04;
__unorddf2 = 0x40000a08;
__unordsf2 = 0x40000a0c;
__extenddftf2 = 0x40000a10;
__trunctfdf2 = 0x40000a14;
vendor/esp-hal/ld/esp32c2/rom/esp32c2.rom.rvfp.ld
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/*
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
/* ROM function interface esp32c2.rom.rvfp.ld esp32c2
*
*
* Generated from ./interface-esp32c2.yml md5sum c679b6ed5e9f0a9c3e7b93e5e0f2a1a3
*
* Compatible with ROM where ECO version equal or greater to 1.
*
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
*/
/***************************************
Group rvfplib
***************************************/
/* Functions */
__adddf3 = 0x40000a18;
__addsf3 = 0x40000a1c;
__divsf3 = 0x40000a20;
__eqdf2 = 0x40000a24;
__eqsf2 = 0x40000a28;
__extendsfdf2 = 0x40000a2c;
__fixdfdi = 0x40000a30;
__fixdfsi = 0x40000a34;
__fixsfdi = 0x40000a38;
__fixsfsi = 0x40000a3c;
__fixunsdfsi = 0x40000a40;
__fixunssfdi = 0x40000a44;
__fixunssfsi = 0x40000a48;
__floatdidf = 0x40000a4c;
__floatdisf = 0x40000a50;
__floatsidf = 0x40000a54;
__floatsisf = 0x40000a58;
__floatundidf = 0x40000a5c;
__floatundisf = 0x40000a60;
__floatunsidf = 0x40000a64;
__floatunsisf = 0x40000a68;
__gedf2 = 0x40000a6c;
__gesf2 = 0x40000a70;
__gtdf2 = 0x40000a74;
__gtsf2 = 0x40000a78;
__ledf2 = 0x40000a7c;
__lesf2 = 0x40000a80;
__ltdf2 = 0x40000a84;
__ltsf2 = 0x40000a88;
__muldf3 = 0x40000a8c;
__mulsf3 = 0x40000a90;
__nedf2 = 0x40000a94;
__nesf2 = 0x40000a98;
__subdf3 = 0x40000a9c;
__subsf3 = 0x40000aa0;
__truncdfsf2 = 0x40000aa4;
/***************************************
Group libgcc
***************************************/
/* Functions */
__absvdi2 = 0x400008a8;
__absvsi2 = 0x400008ac;
__addvdi3 = 0x400008b8;
__addvsi3 = 0x400008bc;
__ashldi3 = 0x400008c0;
__ashrdi3 = 0x400008c4;
__bswapdi2 = 0x400008c8;
__bswapsi2 = 0x400008cc;
__clear_cache = 0x400008d0;
__clrsbdi2 = 0x400008d4;
__clrsbsi2 = 0x400008d8;
__clzdi2 = 0x400008dc;
__clzsi2 = 0x400008e0;
__cmpdi2 = 0x400008e4;
__ctzdi2 = 0x400008e8;
__ctzsi2 = 0x400008ec;
__divdc3 = 0x400008f0;
__divdf3 = 0x400008f4;
__divdi3 = 0x400008f8;
__divsc3 = 0x400008fc;
__divsi3 = 0x40000904;
__ffsdi2 = 0x40000914;
__ffssi2 = 0x40000918;
__gcc_bcmp = 0x40000958;
__lshrdi3 = 0x40000974;
__moddi3 = 0x40000980;
__modsi3 = 0x40000984;
__muldc3 = 0x40000988;
__muldi3 = 0x40000990;
__mulsc3 = 0x40000994;
__mulsi3 = 0x4000099c;
__mulvdi3 = 0x400009a0;
__mulvsi3 = 0x400009a4;
__negdf2 = 0x400009ac;
__negdi2 = 0x400009b0;
__negsf2 = 0x400009b4;
__negvdi2 = 0x400009b8;
__negvsi2 = 0x400009bc;
__paritysi2 = 0x400009c4;
__popcountdi2 = 0x400009c8;
__popcountsi2 = 0x400009cc;
__powidf2 = 0x400009d0;
__powisf2 = 0x400009d4;
__subvdi3 = 0x400009e0;
__subvsi3 = 0x400009e4;
__ucmpdi2 = 0x400009ec;
__udivdi3 = 0x400009f0;
__udivmoddi4 = 0x400009f4;
__udivsi3 = 0x400009f8;
__udiv_w_sdiv = 0x400009fc;
__umoddi3 = 0x40000a00;
__umodsi3 = 0x40000a04;
__unorddf2 = 0x40000a08;
__unordsf2 = 0x40000a0c;
__extenddftf2 = 0x40000a10;
__trunctfdf2 = 0x40000a14;
vendor/esp-hal/ld/esp32c2/rom/esp32c2.rom.version.ld
Vendored
+14
View File
@@ -0,0 +1,14 @@
/*
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
/* ROM version variables for esp32c2
*
* These addresses should be compatible with any ROM version for this chip.
*
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
*/
_rom_chip_id = 0x40000010;
_rom_eco_version = 0x40000014;