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feat: add display UI with splash screen, dashboard, and RSSI sparkline

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Implement full SSD1306 OLED display support:
- Splash screen on boot (1.5s) with project name, version, board
- Dashboard showing radio state, config, counters, RSSI/SNR
- RSSI history sparkline (64-sample ring buffer, 2px-wide bars)
- DisplayOn/DisplayOff host commands routed via dedicated channel
- Pure render functions against generic DrawTarget (no hardware coupling)
- Display on/off control bypasses radio task entirely

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
This commit is contained in:
swaitsandClaude Opus 4.6 committed 2026-03-29 20:42:54 -06:00
1 parent 7064110293
commit 3102fc747a
17624 files changed
+4564928 -38
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vendor/esp-hal/ld/esp32c3/esp32c3.x
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ENTRY(_start)
PROVIDE(_stext = ORIGIN(ROTEXT));
PROVIDE(_max_hart_id = 0);
PROVIDE(UserSoft = DefaultHandler);
PROVIDE(SupervisorSoft = DefaultHandler);
PROVIDE(MachineSoft = DefaultHandler);
PROVIDE(UserTimer = DefaultHandler);
PROVIDE(SupervisorTimer = DefaultHandler);
PROVIDE(MachineTimer = DefaultHandler);
PROVIDE(UserExternal = DefaultHandler);
PROVIDE(SupervisorExternal = DefaultHandler);
PROVIDE(MachineExternal = DefaultHandler);
PROVIDE(ExceptionHandler = DefaultExceptionHandler);
PROVIDE(__post_init = default_post_init);
/* A PAC/HAL defined routine that should initialize custom interrupt controller if needed. */
PROVIDE(_setup_interrupts = default_setup_interrupts);
/* # Multi-processing hook function
fn _mp_hook() -> bool;
This function is called from all the harts and must return true only for one hart,
which will perform memory initialization. For other harts it must return false
and implement wake-up in platform-dependent way (e.g. after waiting for a user interrupt).
*/
PROVIDE(_mp_hook = default_mp_hook);
/* # Start trap function override
By default uses the riscv crates default trap handler
but by providing the `_start_trap` symbol external crates can override.
*/
PROVIDE(_start_trap = default_start_trap);
/* esp32c3 fixups */
SECTIONS {
.trap : ALIGN(4)
{
KEEP(*(.trap));
*(.trap.*);
} > RWTEXT
}
INSERT BEFORE .rwtext;
SECTIONS {
/**
* This dummy section represents the .text section but in rodata.
* Thus, it must have its alignement and (at least) its size.
*/
.text_dummy (NOLOAD):
{
/* Start at the same alignement constraint than .text */
. = ALIGN(4);
/* Create an empty gap as big as .text section */
. = . + SIZEOF(.text);
/* Prepare the alignement of the section above. Few bytes (0x20) must be
* added for the mapping header. */
. = ALIGN(0x10000) + 0x20;
} > RODATA
}
INSERT BEFORE .rodata;
SECTIONS {
/* similar as text_dummy */
.rwdata_dummy (NOLOAD) : {
. = ALIGN(ALIGNOF(.rwtext));
. = . + SIZEOF(.rwtext);
. = . + SIZEOF(.rwtext.wifi);
. = . + SIZEOF(.trap);
} > RWDATA
}
INSERT BEFORE .data;
/* Must be called __global_pointer$ for linker relaxations to work. */
PROVIDE(__global_pointer$ = _data_start + 0x800);
/* end of esp32c3 fixups */
/* Shared sections - ordering matters */
INCLUDE "rwtext.x"
INCLUDE "text.x"
INCLUDE "rwdata.x"
INCLUDE "rodata.x"
INCLUDE "rtc_fast.x"
INCLUDE "stack.x"
INCLUDE "dram2.x"
/* End of Shared sections */
INCLUDE "debug.x"
vendor/esp-hal/ld/esp32c3/linkall.x
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INCLUDE "memory.x"
REGION_ALIAS("ROTEXT", IROM);
REGION_ALIAS("RODATA", DROM);
REGION_ALIAS("RWDATA", DRAM);
REGION_ALIAS("RWTEXT", IRAM);
REGION_ALIAS("RTC_FAST_RWTEXT", RTC_FAST);
REGION_ALIAS("RTC_FAST_RWDATA", RTC_FAST);
INCLUDE "esp32c3.x"
INCLUDE "hal-defaults.x"
INCLUDE "rom-functions.x"
vendor/esp-hal/ld/esp32c3/memory.x
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MEMORY
{
/*
https://github.com/espressif/esptool/blob/ed64d20b051d05f3f522bacc6a786098b562d4b8/esptool/targets/esp32c3.py#L78-L90
MEMORY_MAP = [[0x00000000, 0x00010000, "PADDING"],
[0x3C000000, 0x3C800000, "DROM"],
[0x3FC80000, 0x3FCE0000, "DRAM"],
[0x3FC88000, 0x3FD00000, "BYTE_ACCESSIBLE"],
[0x3FF00000, 0x3FF20000, "DROM_MASK"],
[0x40000000, 0x40060000, "IROM_MASK"],
[0x42000000, 0x42800000, "IROM"],
[0x4037C000, 0x403E0000, "IRAM"],
[0x50000000, 0x50002000, "RTC_IRAM"],
[0x50000000, 0x50002000, "RTC_DRAM"],
[0x600FE000, 0x60100000, "MEM_INTERNAL2"]]
ICACHE : ORIGIN = 0x4037C000, LENGTH = 0x4000
/* Instruction RAM */
IRAM : ORIGIN = 0x4037C000 + 0x4000, LENGTH = 313K - 0x4000
/* Data RAM */
DRAM : ORIGIN = 0x3FC80000, LENGTH = 313K
/* memory available after the 2nd stage bootloader is finished */
dram2_seg ( RW ) : ORIGIN = ORIGIN(DRAM) + LENGTH(DRAM), len = 0x3fcde710 - (ORIGIN(DRAM) + LENGTH(DRAM))
/* External flash */
/* Instruction ROM */
IROM : ORIGIN = 0x42000000 + 0x20, LENGTH = 0x400000 - 0x20
/* Data ROM */
DROM : ORIGIN = 0x3C000000, LENGTH = 0x400000
/* RTC fast memory (executable). Persists over deep sleep. */
RTC_FAST : ORIGIN = 0x50000000, LENGTH = 0x2000 /*- ESP_BOOTLOADER_RESERVE_RTC*/
}
vendor/esp-hal/ld/esp32c3/rom-functions.x
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INCLUDE "rom/esp32c3.rom.api.ld"
INCLUDE "rom/esp32c3.rom.eco3.ld"
/* TODO
INCLUDE "rom/esp32c3.rom.eco7.ld"
*/
INCLUDE "rom/esp32c3.rom.ld"
INCLUDE "rom/esp32c3.rom.libgcc.ld"
INCLUDE "rom/esp32c3.rom.version.ld"
INCLUDE "rom/additional.ld"
vendor/esp-hal/ld/esp32c3/rom/additional.ld
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memset = 0x40000354;
memcpy = 0x40000358;
memmove = 0x4000035c;
memcmp = 0x40000360;
strncmp = 0x40000370;
strncpy = 0x40000368;
strcpy = 0x40000364;
abs = 0x40000424;
PROVIDE(cache_dbus_mmu_set = 0x40000564);
PROVIDE( strcat = 0x400003d8 );
PROVIDE( strcmp = 0x4000036c );
PROVIDE( strchr = 0x400003e0 );
PROVIDE( strlcpy = 0x400003f0 );
PROVIDE( strstr = 0x40000378 );
PROVIDE( strcasecmp = 0x400003d0 );
PROVIDE( strdup = 0x400003dc );
PROVIDE( atoi = 0x4000044c );
vendor/esp-hal/ld/esp32c3/rom/esp32c3.rom.api.ld
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/**
* ROM APIs
*/
PROVIDE ( esp_rom_crc32_le = crc32_le );
PROVIDE ( esp_rom_crc16_le = crc16_le );
PROVIDE ( esp_rom_crc8_le = crc8_le );
PROVIDE ( esp_rom_crc32_be = crc32_be );
PROVIDE ( esp_rom_crc16_be = crc16_be );
PROVIDE ( esp_rom_crc8_be = crc8_be );
PROVIDE ( esp_rom_gpio_pad_select_gpio = gpio_pad_select_gpio );
PROVIDE ( esp_rom_gpio_pad_pullup_only = gpio_pad_pullup );
PROVIDE ( esp_rom_gpio_pad_set_drv = gpio_pad_set_drv );
PROVIDE ( esp_rom_gpio_pad_unhold = gpio_pad_unhold );
PROVIDE ( esp_rom_gpio_connect_in_signal = gpio_matrix_in );
PROVIDE ( esp_rom_gpio_connect_out_signal = gpio_matrix_out );
PROVIDE ( esp_rom_efuse_mac_address_crc8 = esp_crc8 );
PROVIDE ( esp_rom_efuse_get_flash_gpio_info = ets_efuse_get_spiconfig );
PROVIDE ( esp_rom_efuse_is_secure_boot_enabled = ets_efuse_secure_boot_enabled );
PROVIDE ( esp_rom_efuse_get_flash_wp_gpio = ets_efuse_get_wp_pad );
PROVIDE ( esp_rom_uart_flush_tx = uart_tx_flush );
PROVIDE ( esp_rom_uart_tx_one_char = uart_tx_one_char );
PROVIDE ( esp_rom_uart_tx_wait_idle = uart_tx_wait_idle );
PROVIDE ( esp_rom_uart_rx_one_char = uart_rx_one_char );
PROVIDE ( esp_rom_uart_rx_string = UartRxString );
PROVIDE ( esp_rom_output_flush_tx = uart_tx_flush );
PROVIDE ( esp_rom_output_tx_one_char = uart_tx_one_char );
PROVIDE ( esp_rom_output_tx_wait_idle = uart_tx_wait_idle );
PROVIDE ( esp_rom_output_rx_one_char = uart_rx_one_char );
PROVIDE ( esp_rom_output_rx_string = UartRxString );
PROVIDE ( esp_rom_md5_init = MD5Init );
PROVIDE ( esp_rom_md5_update = MD5Update );
PROVIDE ( esp_rom_md5_final = MD5Final );
PROVIDE ( esp_rom_software_reset_system = software_reset );
PROVIDE ( esp_rom_software_reset_cpu = software_reset_cpu );
PROVIDE ( esp_rom_printf = ets_printf );
PROVIDE ( esp_rom_delay_us = ets_delay_us );
PROVIDE ( esp_rom_get_reset_reason = rtc_get_reset_reason );
PROVIDE ( esp_rom_route_intr_matrix = intr_matrix_set );
PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency );
PROVIDE ( esp_rom_set_cpu_ticks_per_us = ets_update_cpu_frequency );
PROVIDE ( esp_rom_spiflash_clear_bp = esp_rom_spiflash_unlock );
PROVIDE ( esp_rom_spiflash_write_enable = SPI_write_enable );
PROVIDE ( esp_rom_spiflash_erase_area = SPIEraseArea );
PROVIDE ( esp_rom_spiflash_fix_dummylen = spi_dummy_len_fix );
PROVIDE ( esp_rom_spiflash_set_drvs = SetSpiDrvs);
PROVIDE ( esp_rom_spiflash_select_padsfunc = SelectSpiFunction );
PROVIDE ( esp_rom_spiflash_common_cmd = SPI_Common_Command );
PROVIDE ( esp_rom_regi2c_read = rom_i2c_readReg );
PROVIDE ( esp_rom_regi2c_read_mask = rom_i2c_readReg_Mask );
PROVIDE ( esp_rom_regi2c_write = rom_i2c_writeReg );
PROVIDE ( esp_rom_regi2c_write_mask = rom_i2c_writeReg_Mask );
vendor/esp-hal/ld/esp32c3/rom/esp32c3.rom.eco3.ld
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/*
ESP32C3 ECO3 ROM address table
Version 3 API's imported from the ROM
*/
/*esf_buf_alloc_dynamic = 0x400015c0;*/
/*esf_buf_recycle = 0x400015c4;*/
/*lmacTxDone = 0x4000162c;*/
/*ppMapTxQueue = 0x400016d8;*/
/*rcGetSched = 0x40001764;*/
wDevCheckBlockError = 0x400017b4;
/*ppProcTxDone = 0x40001804;*/
/*sta_input = rom_sta_input;*/
/***************************************
Group rom_phy
***************************************/
/* Functions */
rom_index_to_txbbgain = 0x40001964;
rom_pbus_xpd_tx_on = 0x400019b0;
rom_set_tx_dig_gain = 0x400019f0;
rom_set_txcap_reg = 0x400019f4;
rom_txbbgain_to_index = 0x40001a0c;
rom_agc_reg_init = 0x40001a54;
rom_bb_reg_init = 0x40001a58;
rom_set_pbus_reg = 0x40001a70;
rom_phy_xpd_rf = 0x40001a78;
rom_write_txrate_power_offset = 0x40001a8c;
rom_temp_to_power = 0x40001ab4;
rom_open_i2c_xpd = 0x40001af8;
rom_tsens_read_init = 0x40001b00;
rom_tsens_code_read = 0x40001b04;
rom_tsens_dac_cal = 0x40001b10;
rom_pll_vol_cal = 0x40001b28;
/***************************************
Group eco3_wifi
***************************************/
/* Functions */
wdev_is_data_in_rxlist = 0x40001b2c;
ppProcTxCallback = 0x40001b30;
ieee80211_gettid = 0x40001b34;
/***************************************
Group eco3_bluetooth
***************************************/
/* Functions */
r_lld_legacy_adv_dynamic_pti_get = 0x40001b38;
r_lld_legacy_adv_dynamic_pti_process = 0x40001b3c;
r_lld_ext_adv_dynamic_pti_get = 0x40001b40;
r_lld_ext_adv_dynamic_aux_pti_process = 0x40001b44;
r_lld_ext_adv_dynamic_pti_process = 0x40001b48;
r_lld_adv_ext_pkt_prepare_set = 0x40001b4c;
r_lld_adv_ext_chain_connectable_construct = 0x40001b54;
r_lld_adv_pkt_rx_connect_post = 0x40001b5c;
r_lld_adv_start_init_evt_param = 0x40001b60;
r_lld_adv_start_set_cs = 0x40001b64;
/* r_lld_adv_start_update_filter_policy = 0x40001b68; */
r_lld_adv_start_schedule_asap = 0x40001b6c;
r_lld_con_tx_prog_new_packet_coex = 0x40001b70;
r_lld_per_adv_dynamic_pti_get = 0x40001b78;
r_lld_per_adv_evt_start_chm_upd = 0x40001b7c;
r_lld_ext_scan_dynamic_pti_get = 0x40001b80;
r_lld_sync_insert = 0x40001b88;
r_sch_prog_ble_push = 0x40001b8c;
r_sch_prog_bt_push = 0x40001b90;
r_lld_init_evt_end_type_set = 0x40001b94;
r_lld_init_evt_end_type_get = 0x40001b98;
r_lld_adv_direct_adv_use_rpa_addr_state_set = 0x40001b9c;
r_lld_adv_direct_adv_use_rpa_addr_state_get = 0x40001ba0;
r_lld_init_evt_end_type_check_state_set = 0x40001ba4;
r_lld_init_evt_end_type_check_state_get = 0x40001ba8;
/***************************************
Group eco3_phy
***************************************/
/* Functions */
rom_wrtie_pll_cap = 0x40001bac;
rom_set_tx_gain_mem = 0x40001bb0;
rom_bt_tx_dig_gain = 0x40001bb4;
rom_bt_get_tx_gain = 0x40001bb8;
rom_get_chan_target_power = 0x40001bbc;
rom_get_tx_gain_value = 0x40001bc0;
rom_wifi_tx_dig_gain = 0x40001bc4;
rom_wifi_get_tx_gain = 0x40001bc8;
rom_fe_i2c_reg_renew = 0x40001bcc;
rom_wifi_agc_sat_gain = 0x40001bd0;
rom_i2c_master_reset = 0x40001bd4;
rom_bt_filter_reg = 0x40001bd8;
rom_phy_bbpll_cal = 0x40001bdc;
rom_i2c_sar2_init_code = 0x40001be0;
rom_phy_param_addr = 0x40001be4;
rom_phy_reg_init = 0x40001be8;
rom_set_chan_reg = 0x40001bec;
rom_phy_wakeup_init = 0x40001bf0;
rom_phy_i2c_init1 = 0x40001bf4;
rom_tsens_temp_read = 0x40001bf8;
rom_bt_track_pll_cap = 0x40001bfc;
rom_wifi_track_pll_cap = 0x40001c00;
rom_wifi_set_tx_gain = 0x40001c04;
rom_txpwr_cal_track = 0x40001c08;
rom_tx_pwctrl_background = 0x40001c0c;
rom_bt_set_tx_gain = 0x40001c10;
rom_noise_check_loop = 0x40001c14;
rom_phy_close_rf = 0x40001c18;
rom_phy_xpd_tsens = 0x40001c1c;
rom_phy_freq_mem_backup = 0x40001c20;
rom_phy_ant_init = 0x40001c24;
rom_bt_track_tx_power = 0x40001c28;
rom_wifi_track_tx_power = 0x40001c2c;
rom_phy_dig_reg_backup = 0x40001c30;
chip726_phyrom_version_num = 0x40001c34;
/* Data (.data, .bss, .rodata) */
phy_param_rom = 0x3fcdf830;
/***************************************
Group eco3_esp_flash
***************************************/
/* Functions */
PROVIDE( esp_flash_read_chip_id = 0x40001c38 );
PROVIDE( detect_spi_flash_chip = 0x40001c3c );
PROVIDE( esp_rom_spiflash_write_disable = 0x40001c40 );
vendor/esp-hal/ld/esp32c3/rom/esp32c3.rom.eco7.ld
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/*
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
esf_buf_alloc = 0x400015bc;
esf_buf_alloc_dynamic = 0x400015c0;
esf_buf_recycle = 0x400015c4;
/*hal_mac_tx_set_ppdu = 0x400015d4;*/
ic_mac_deinit = 0x400015dc;
lmacDiscardMSDU = 0x400015f4;
/*lmacSetTxFrame = 0x40001628;*/
lmacTxDone = 0x4000162c;
lmacTxFrame = 0x40001630;
mac_tx_set_htsig = 0x40001638;
mac_tx_set_plcp1 = 0x40001640;
pm_check_state = 0x40001648;
/*pm_on_beacon_rx = 0x4000167c;*/
/*pm_parse_beacon = 0x40001688;*/
pm_process_tim = 0x4000168c;
pm_rx_beacon_process = 0x40001690;
pm_rx_data_process = 0x40001694;
/* pm_sleep = 0x40001698;*/
/* pm_tbtt_process = 0x400016a0;*/
ppMapTxQueue = 0x400016d8;
ppProcTxSecFrame = 0x400016dc;
/*ppRxFragmentProc = 0x40001704;*/
/* rcGetSched = 0x40001764;*/
rcTxUpdatePer = 0x40001770;
rcUpdateTxDone = 0x4000177c;
wDevCheckBlockError = 0x400017b4;
/* wDev_IndicateFrame = 0x400017c8;*/
wDev_ProcessFiq = 0x400017f0;
/*wDev_ProcessRxSucData = 0x400017f4;*/
/*ppProcTxDone = 0x40001804;*/
/*pm_tx_data_done_process = 0x40001808;*/
ppMapWaitTxq = 0x40001810;
/*ieee80211_encap_esfbuf = 0x4000185c;*/
/*sta_input = 0x40001870;*/
ieee80211_crypto_decap = 0x4000189c;
ieee80211_decap = 0x400018a0;
/*coex_core_timer_idx_get = 0x400018d0;*/
rom1_chip_i2c_readReg = 0x40001924;
rom1_chip_i2c_writeReg = 0x40001928;
rom_index_to_txbbgain = 0x40001964;
rom_pbus_xpd_tx_on = 0x400019b0;
rom1_set_noise_floor = 0x400019e8;
rom_set_tx_dig_gain = 0x400019f0;
rom_set_txcap_reg = 0x400019f4;
rom_txbbgain_to_index = 0x40001a0c;
rom1_disable_wifi_agc = 0x40001a1c;
rom1_enable_wifi_agc = 0x40001a20;
rom1_tx_paon_set = 0x40001a44;
rom_agc_reg_init = 0x40001a54;
rom_bb_reg_init = 0x40001a58;
rom1_set_pbus_reg = 0x40001a70;
rom_phy_xpd_rf = 0x40001a78;
rom_write_txrate_power_offset = 0x40001a8c;
rom1_get_rate_fcc_index = 0x40001a90;
rom1_read_sar2_code = 0x40001aa4;
rom2_temp_to_power1 = 0x40001ab4;
rom1_get_i2c_hostid = 0x40001ac8;
rom_open_i2c_xpd = 0x40001af8;
rom2_tsens_read_init1 = 0x40001b00;
rom_tsens_code_read = 0x40001b04;
rom_tsens_dac_cal = 0x40001b10;
rom1_phy_en_hw_set_freq = 0x40001b20;
rom1_phy_dis_hw_set_freq = 0x40001b24;
rom_pll_vol_cal = 0x40001b28;
rom1_bt_get_tx_gain = 0x40001bb8;
rom1_get_chan_target_power = 0x40001bbc;
rom2_get_tx_gain_value1 = 0x40001bc0;
rom1_wifi_tx_dig_gain = 0x40001bc4;
rom1_wifi_get_tx_gain = 0x40001bc8;
rom1_fe_i2c_reg_renew = 0x40001bcc;
rom1_i2c_master_reset = 0x40001bd4;
rom1_phy_wakeup_init = 0x40001bf0;
rom1_phy_i2c_init1 = 0x40001bf4;
rom1_tsens_temp_read = 0x40001bf8;
rom1_bt_track_pll_cap = 0x40001bfc;
rom1_wifi_set_tx_gain = 0x40001c04;
rom1_txpwr_cal_track = 0x40001c08;
rom1_bt_set_tx_gain = 0x40001c10;
rom1_phy_close_rf = 0x40001c18;
/***************************************
Group eco7_uart
***************************************/
/* Functions */
uart_tx_switch = 0x40001c44;
/***************************************
Group eco7_bluetooth
***************************************/
/* Functions */
r_lld_con_count_get = 0x40001c48;
r_lld_update_con_offset = 0x40001c4c;
r_lld_con_update_last_clock = 0x40001c50;
r_lld_con_llcp_ind_info_clear = 0x40001c54;
r_lld_con_update_terminte_info_init = 0x40001c58;
r_lld_con_terminate_max_evt_update = 0x40001c5c;
r_llc_pref_param_compute_eco = 0x40001ce8;
r_llc_hci_con_upd_info_send_eco = 0x40001cec;
r_llc_rem_encrypt_proc_continue_eco = 0x40001cf0;
r_llc_start_eco = 0x40001cf8;
r_lld_ext_adv_dynamic_aux_pti_process_eco = 0x40001cfc;
r_lld_adv_start_eco = 0x40001d04;
r_lld_con_evt_canceled_cbk_eco = 0x40001d08;
r_lld_con_evt_time_update_eco = 0x40001d0c;
r_lld_con_start_eco = 0x40001d10;
r_lld_con_frm_isr_eco = 0x40001d14;
r_lld_con_tx_eco = 0x40001d18;
r_lld_ext_scan_dynamic_pti_process_eco = 0x40001d28;
r_lld_scan_frm_eof_isr_eco = 0x40001d2c;
r_lld_sync_start_eco = 0x40001d30;
r_lld_sync_insert_eco = 0x40001d34;
r_llm_adv_rep_flow_control_update_eco = 0x40001d38;
r_llm_env_adv_dup_filt_init_eco = 0x40001d3c;
r_llm_env_adv_dup_filt_deinit_eco = 0x40001d40;
r_llm_adv_rep_flow_control_check_eco = 0x40001d44;
r_llm_scan_start_eco = 0x40001d48;
r_llm_update_duplicate_scan_count = 0x40001d4c;
r_llc_hci_command_handler_pre = 0x40001d50;
r_llc_hci_command_handler_get = 0x40001d54;
r_llc_hci_command_handler_search = 0x40001d58;
r_llc_llcp_pdu_handler_get_overwrite = 0x40001d5c;
r_llc_llcp_pdu_handler_pre = 0x40001d60;
r_llc_llcp_pdu_handler_end = 0x40001d64;
r_llc_con_conflict_check = 0x40001d6c;
r_sch_prog_hw_reset_try = 0x40001d70;
r_sch_prog_et_state_reset = 0x40001d74;
r_sch_prog_end_isr_handler = 0x40001d78;
r_sch_plan_conflict_check = 0x40001d7c;
r_rwble_isr_hw_fixed = 0x40001d80;
r_bt_bb_recorrect_is_dead = 0x40001d84;
r_bt_bb_restart_hw_recorrect = 0x40001d88;
r_ke_task_handler_pre = 0x40001da0;
r_ke_task_handler_end = 0x40001da4;
r_lld_scan_frm_skip_isr_eco = 0x40001db0;
r_lld_ext_scan_dynamic_pti_reset = 0x40001db4;
r_llc_rem_phy_upd_proc_continue_eco = 0x40001db8;
r_llm_get_preferred_phys = 0x40001dbc;
r_lld_hw_cca_isr_eco = 0x40001dc0;
r_lld_sw_cca_isr_eco = 0x40001dc4;
r_lld_cca_chan_prn_e = 0x40001dc8;
r_lld_cca_chan_prn_s = 0x40001dcc;
r_lld_cca_chan_sel_remap = 0x40001dd0;
r_lld_cca_chan_sel_1 = 0x40001dd4;
r_lld_cca_chan_sel_2 = 0x40001dd8;
r_lld_cca_set_thresh = 0x40001ddc;
r_lld_cca_con_start = 0x40001de0;
r_lld_cca_con_end = 0x40001de4;
r_lld_cca_chm_restore = 0x40001de8;
r_lld_cca_chan_unused_check = 0x40001dec;
r_lld_cca_chm_update_check = 0x40001df0;
r_lld_cca_busy_mode_handle = 0x40001df4;
r_lld_cca_lbt_handle = 0x40001df8;
r_lld_cca_scst_timeout_check = 0x40001dfc;
r_lld_cca_chan_avl_timeout_check = 0x40001e00;
r_lld_con_start_hook = 0x40001ca8;
/* ble Functions eco */
r_bt_bb_isr = 0x40000b9c;
r_bt_rf_coex_conn_phy_coded_data_time_limit_en_get = 0x40000ba8;
r_bt_rtp_get_txpwr_idx_by_act = 0x40000c00;
r_btdm_task_post = 0x40000c14;
r_btdm_task_post_from_isr = 0x40000c18;
r_btdm_task_recycle = 0x40000c1c;
r_hci_register_vendor_desc_tab = 0x40000d9c;
r_ke_task_schedule = 0x40000e80;
r_llc_hci_command_handler = 0x40000ef0;
r_llc_loc_con_upd_proc_continue = 0x40000f60;
r_llc_loc_phy_upd_proc_continue = 0x40000f78;
r_llc_rem_con_upd_proc_continue = 0x40000fb4;
r_lld_con_sched = 0x40001118;
r_lld_con_stop = 0x40001124;
r_lld_llcp_rx_ind_handler = 0x400011b0;
r_lld_per_adv_sched = 0x400011f8;
r_lld_scan_process_pkt_rx_adv_rep = 0x40001284;
r_register_esp_vendor_cmd_handler = 0x40001400;
r_rf_txpwr_cs_get = 0x40001428;
r_rf_txpwr_dbm_get = 0x4000142c;
r_sch_arb_event_start_isr = 0x400014f8;
r_sch_plan_set = 0x40001534;
r_sch_prog_end_isr = 0x40001538;
r_lld_adv_ext_chain_scannable_construct = 0x40001b58;
r_lld_scan_process_pkt_rx = 0x40001280;
r_llm_le_features_get = 0x400013b0;
/* ble functions rename */
r_lld_init_start_hack = 0x400011a4;
/* ble functions disable */
/*
r_lld_adv_frm_isr_eco = 0x40001d00;
r_lld_res_list_clear = 0x40004638;
r_lld_res_list_rem = 0x40004680;
r_lld_adv_start_hook = 0x40001c80;
r_lld_con_evt_start_cbk_eco = 0x40001d1c;
r_lld_con_tx_prog_new_packet = 0x40001b74;
r_lld_adv_ext_chain_none_construct = 0x40001b50;
r_llc_llcp_send_eco = 0x40001cf4;
r_llc_llcp_channel_map_ind_ack = 0x40001d68;
r_rwble_isr = 0x40001464;
r_lld_scan_start_eco = 0x40001d24;
r_lld_scan_try_sched_eco = 0x40001dac;
r_lld_scan_start_hook = 0x40001c74;
r_lld_init_start_hook = 0x40001cb8;
r_lld_scan_evt_start_cbk_eco = 0x40001d20;
r_ke_task_handler_get_overwrite = 0x40001da8;
*/
/***************************************
Group eco7_phy
***************************************/
/* Functions */
rom2_pll_cap_mem_update = 0x40001e04;
rom2_phy_i2c_enter_critical = 0x40001e08;
rom2_phy_i2c_exit_critical = 0x40001e0c;
rom2_rfpll_cap_correct = 0x40001e10;
rom2_write_pll_cap = 0x40001e14;
rom2_read_pll_cap = 0x40001e18;
rom2_tester_wifi_cali = 0x40001e1c;
rom2_wait_hw_freq_busy = 0x40001e20;
rom2_rfpll_cap_track = 0x40001e24;
rom2_ulp_code_track = 0x40001e28;
rom2_ulp_ext_code_set = 0x40001e2c;
rom2_phy_set_tsens_power = 0x40001e30;
rom2_phy_get_tsens_value = 0x40001e34;
rom_mac_tx_chan_offset = 0x40001e38;
rom_rx_gain_force = 0x40001e3c;
vendor/esp-hal/ld/esp32c3/rom/esp32c3.rom.ld
Vendored
+1932
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File diff suppressed because it is too large. Load diff
vendor/esp-hal/ld/esp32c3/rom/esp32c3.rom.libgcc.ld
Vendored
+105
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@@ -0,0 +1,105 @@
/* ROM function interface esp32c3.rom.libgcc.ld for esp32c3
*
*
* Generated from ./interface-esp32c3.yml md5sum 93b28a9e1fe42d212018eb4336849208
*
* Compatible with ROM where ECO version equal or greater to 0.
*
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
*/
/***************************************
Group libgcc
***************************************/
/* Functions */
__absvdi2 = 0x40000764;
__absvsi2 = 0x40000768;
__adddf3 = 0x4000076c;
__addsf3 = 0x40000770;
__addvdi3 = 0x40000774;
__addvsi3 = 0x40000778;
__ashldi3 = 0x4000077c;
__ashrdi3 = 0x40000780;
__bswapdi2 = 0x40000784;
__bswapsi2 = 0x40000788;
__clear_cache = 0x4000078c;
__clrsbdi2 = 0x40000790;
__clrsbsi2 = 0x40000794;
__clzdi2 = 0x40000798;
__clzsi2 = 0x4000079c;
__cmpdi2 = 0x400007a0;
__ctzdi2 = 0x400007a4;
__ctzsi2 = 0x400007a8;
__divdc3 = 0x400007ac;
__divdf3 = 0x400007b0;
__divdi3 = 0x400007b4;
__divsc3 = 0x400007b8;
__divsf3 = 0x400007bc;
__divsi3 = 0x400007c0;
__eqdf2 = 0x400007c4;
__eqsf2 = 0x400007c8;
__extendsfdf2 = 0x400007cc;
__ffsdi2 = 0x400007d0;
__ffssi2 = 0x400007d4;
__fixdfdi = 0x400007d8;
__fixdfsi = 0x400007dc;
__fixsfdi = 0x400007e0;
__fixsfsi = 0x400007e4;
__fixunsdfsi = 0x400007e8;
__fixunssfdi = 0x400007ec;
__fixunssfsi = 0x400007f0;
__floatdidf = 0x400007f4;
__floatdisf = 0x400007f8;
__floatsidf = 0x400007fc;
__floatsisf = 0x40000800;
__floatundidf = 0x40000804;
__floatundisf = 0x40000808;
__floatunsidf = 0x4000080c;
__floatunsisf = 0x40000810;
__gcc_bcmp = 0x40000814;
__gedf2 = 0x40000818;
__gesf2 = 0x4000081c;
__gtdf2 = 0x40000820;
__gtsf2 = 0x40000824;
__ledf2 = 0x40000828;
__lesf2 = 0x4000082c;
__lshrdi3 = 0x40000830;
__ltdf2 = 0x40000834;
__ltsf2 = 0x40000838;
__moddi3 = 0x4000083c;
__modsi3 = 0x40000840;
__muldc3 = 0x40000844;
__muldf3 = 0x40000848;
__muldi3 = 0x4000084c;
__mulsc3 = 0x40000850;
__mulsf3 = 0x40000854;
__mulsi3 = 0x40000858;
__mulvdi3 = 0x4000085c;
__mulvsi3 = 0x40000860;
__nedf2 = 0x40000864;
__negdf2 = 0x40000868;
__negdi2 = 0x4000086c;
__negsf2 = 0x40000870;
__negvdi2 = 0x40000874;
__negvsi2 = 0x40000878;
__nesf2 = 0x4000087c;
__paritysi2 = 0x40000880;
__popcountdi2 = 0x40000884;
__popcountsi2 = 0x40000888;
__powidf2 = 0x4000088c;
__powisf2 = 0x40000890;
__subdf3 = 0x40000894;
__subsf3 = 0x40000898;
__subvdi3 = 0x4000089c;
__subvsi3 = 0x400008a0;
__truncdfsf2 = 0x400008a4;
__ucmpdi2 = 0x400008a8;
__udivdi3 = 0x400008ac;
__udivmoddi4 = 0x400008b0;
__udivsi3 = 0x400008b4;
__udiv_w_sdiv = 0x400008b8;
__umoddi3 = 0x400008bc;
__umodsi3 = 0x400008c0;
__unorddf2 = 0x400008c4;
__unordsf2 = 0x400008c8;
vendor/esp-hal/ld/esp32c3/rom/esp32c3.rom.version.ld
Vendored
+8
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/* ROM version variables for esp32c3
*
* These addresses should be compatible with any ROM version for this chip.
*
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
*/
_rom_chip_id = 0x40000010;
_rom_eco_version = 0x40000014;