feat: add display UI with splash screen, dashboard, and RSSI sparkline

Implement full SSD1306 OLED display support:
- Splash screen on boot (1.5s) with project name, version, board
- Dashboard showing radio state, config, counters, RSSI/SNR
- RSSI history sparkline (64-sample ring buffer, 2px-wide bars)
- DisplayOn/DisplayOff host commands routed via dedicated channel
- Pure render functions against generic DrawTarget (no hardware coupling)
- Display on/off control bypasses radio task entirely

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
This commit is contained in:
swaitsandClaude Opus 4.6 committed 2026-03-29 20:42:54 -06:00
1 parent 7064110293
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#![allow(unused)]
pub mod otg_fs_device_f401_f405_f407_f411_f427_f429;
pub mod otg_fs_global_f401_f405_f407_f411_f427_f429;
pub mod otg_fs_host;
pub mod otg_hs_device;
pub mod otg_hs_global;
pub mod otg_hs_host;
pub mod otg_s_pwrclk;
@@ -0,0 +1,83 @@
#![allow(non_snake_case, non_upper_case_globals)]
#![allow(non_camel_case_types)]
//! USB on the go full speed
//!
//! Used by: stm32f401, stm32f405, stm32f407, stm32f411, stm32f427, stm32f429
#[cfg(not(feature = "nosync"))]
pub use super::super::peripherals::otg_fs_device_v1::Instance;
pub use super::super::peripherals::otg_fs_device_v1::{RegisterBlock, ResetValues};
pub use super::super::peripherals::otg_fs_device_v1::{
DAINT, DAINTMSK, DCFG, DCTL, DIEPCTL0, DIEPCTL1, DIEPCTL2, DIEPCTL3, DIEPEMPMSK, DIEPINT0,
DIEPINT1, DIEPINT2, DIEPINT3, DIEPMSK, DIEPTSIZ0, DIEPTSIZ1, DIEPTSIZ2, DIEPTSIZ3, DOEPCTL0,
DOEPCTL1, DOEPCTL2, DOEPCTL3, DOEPINT0, DOEPINT1, DOEPINT2, DOEPINT3, DOEPMSK, DOEPTSIZ0,
DOEPTSIZ1, DOEPTSIZ2, DOEPTSIZ3, DSTS, DTXFSTS0, DTXFSTS1, DTXFSTS2, DTXFSTS3, DVBUSDIS,
DVBUSPULSE,
};
/// Access functions for the OTG_FS_DEVICE peripheral instance
pub mod OTG_FS_DEVICE {
use super::ResetValues;
#[cfg(not(feature = "nosync"))]
use super::Instance;
#[cfg(not(feature = "nosync"))]
const INSTANCE: Instance = Instance {
addr: 0x50000800,
_marker: ::core::marker::PhantomData,
};
/// Reset values for each field in OTG_FS_DEVICE
pub const reset: ResetValues = ResetValues {
DCFG: 0x02200000,
DCTL: 0x00000000,
DSTS: 0x00000010,
DIEPMSK: 0x00000000,
DOEPMSK: 0x00000000,
DAINT: 0x00000000,
DAINTMSK: 0x00000000,
DVBUSDIS: 0x000017D7,
DVBUSPULSE: 0x000005B8,
DIEPEMPMSK: 0x00000000,
DIEPCTL0: 0x00000000,
DIEPCTL1: 0x00000000,
DIEPCTL2: 0x00000000,
DIEPCTL3: 0x00000000,
DOEPCTL0: 0x00008000,
DOEPCTL1: 0x00000000,
DOEPCTL2: 0x00000000,
DOEPCTL3: 0x00000000,
DIEPINT0: 0x00000080,
DIEPINT1: 0x00000080,
DIEPINT2: 0x00000080,
DIEPINT3: 0x00000080,
DOEPINT0: 0x00000080,
DOEPINT1: 0x00000080,
DOEPINT2: 0x00000080,
DOEPINT3: 0x00000080,
DIEPTSIZ0: 0x00000000,
DOEPTSIZ0: 0x00000000,
DIEPTSIZ1: 0x00000000,
DIEPTSIZ2: 0x00000000,
DIEPTSIZ3: 0x00000000,
DTXFSTS0: 0x00000000,
DTXFSTS1: 0x00000000,
DTXFSTS2: 0x00000000,
DTXFSTS3: 0x00000000,
DOEPTSIZ1: 0x00000000,
DOEPTSIZ2: 0x00000000,
DOEPTSIZ3: 0x00000000,
};
}
/// Raw pointer to OTG_FS_DEVICE
///
/// Dereferencing this is unsafe because you are not ensured unique
/// access to the peripheral, so you may encounter data races with
/// other users of this peripheral. It is up to you to ensure you
/// will not cause data races.
///
/// This constant is provided for ease of use in unsafe code: you can
/// simply call for example `write_reg!(gpio, GPIOA, ODR, 1);`.
pub const OTG_FS_DEVICE: *const RegisterBlock = 0x50000800 as *const _;
@@ -0,0 +1,60 @@
#![allow(non_snake_case, non_upper_case_globals)]
#![allow(non_camel_case_types)]
//! USB on the go full speed
//!
//! Used by: stm32f401, stm32f405, stm32f407, stm32f411, stm32f427, stm32f429
#[cfg(not(feature = "nosync"))]
pub use super::super::peripherals::otg_fs_global_v1::Instance;
pub use super::super::peripherals::otg_fs_global_v1::{RegisterBlock, ResetValues};
pub use super::super::peripherals::otg_fs_global_v1::{
CID, DIEPTXF0, DIEPTXF1, DIEPTXF2, DIEPTXF3, GAHBCFG, GCCFG, GINTMSK, GINTSTS, GNPTXSTS,
GOTGCTL, GOTGINT, GRSTCTL, GRXFSIZ, GRXSTSP, GRXSTSR, GUSBCFG, HPTXFSIZ,
};
/// Access functions for the OTG_FS_GLOBAL peripheral instance
pub mod OTG_FS_GLOBAL {
use super::ResetValues;
#[cfg(not(feature = "nosync"))]
use super::Instance;
#[cfg(not(feature = "nosync"))]
const INSTANCE: Instance = Instance {
addr: 0x50000000,
_marker: ::core::marker::PhantomData,
};
/// Reset values for each field in OTG_FS_GLOBAL
pub const reset: ResetValues = ResetValues {
GOTGCTL: 0x00000800,
GOTGINT: 0x00000000,
GAHBCFG: 0x00000000,
GUSBCFG: 0x00000A00,
GRSTCTL: 0x20000000,
GINTSTS: 0x04000020,
GINTMSK: 0x00000000,
GRXSTSR: 0x00000000,
GRXFSIZ: 0x00000200,
DIEPTXF0: 0x00000200,
GNPTXSTS: 0x00080200,
GCCFG: 0x00000000,
CID: 0x00001000,
HPTXFSIZ: 0x02000600,
DIEPTXF1: 0x02000400,
DIEPTXF2: 0x02000400,
DIEPTXF3: 0x02000400,
GRXSTSP: 0x00000000,
};
}
/// Raw pointer to OTG_FS_GLOBAL
///
/// Dereferencing this is unsafe because you are not ensured unique
/// access to the peripheral, so you may encounter data races with
/// other users of this peripheral. It is up to you to ensure you
/// will not cause data races.
///
/// This constant is provided for ease of use in unsafe code: you can
/// simply call for example `write_reg!(gpio, GPIOA, ODR, 1);`.
pub const OTG_FS_GLOBAL: *const RegisterBlock = 0x50000000 as *const _;
@@ -0,0 +1,83 @@
#![allow(non_snake_case, non_upper_case_globals)]
#![allow(non_camel_case_types)]
//! USB on the go full speed
//!
//! Used by: stm32f401, stm32f405, stm32f407, stm32f411, stm32f412, stm32f413, stm32f427, stm32f429, stm32f446, stm32f469
#[cfg(not(feature = "nosync"))]
pub use super::super::peripherals::otg_fs_host::Instance;
pub use super::super::peripherals::otg_fs_host::{RegisterBlock, ResetValues};
pub use super::super::peripherals::otg_fs_host::{
HAINT, HAINTMSK, HCCHAR0, HCCHAR1, HCCHAR2, HCCHAR3, HCCHAR4, HCCHAR5, HCCHAR6, HCCHAR7, HCFG,
HCINT0, HCINT1, HCINT2, HCINT3, HCINT4, HCINT5, HCINT6, HCINT7, HCINTMSK0, HCINTMSK1,
HCINTMSK2, HCINTMSK3, HCINTMSK4, HCINTMSK5, HCINTMSK6, HCINTMSK7, HCTSIZ0, HCTSIZ1, HCTSIZ2,
HCTSIZ3, HCTSIZ4, HCTSIZ5, HCTSIZ6, HCTSIZ7, HFIR, HFNUM, HPRT, HPTXSTS,
};
/// Access functions for the OTG_FS_HOST peripheral instance
pub mod OTG_FS_HOST {
use super::ResetValues;
#[cfg(not(feature = "nosync"))]
use super::Instance;
#[cfg(not(feature = "nosync"))]
const INSTANCE: Instance = Instance {
addr: 0x50000400,
_marker: ::core::marker::PhantomData,
};
/// Reset values for each field in OTG_FS_HOST
pub const reset: ResetValues = ResetValues {
HCFG: 0x00000000,
HFIR: 0x0000EA60,
HFNUM: 0x00003FFF,
HPTXSTS: 0x00080100,
HAINT: 0x00000000,
HAINTMSK: 0x00000000,
HPRT: 0x00000000,
HCCHAR0: 0x00000000,
HCCHAR1: 0x00000000,
HCCHAR2: 0x00000000,
HCCHAR3: 0x00000000,
HCCHAR4: 0x00000000,
HCCHAR5: 0x00000000,
HCCHAR6: 0x00000000,
HCCHAR7: 0x00000000,
HCINT0: 0x00000000,
HCINT1: 0x00000000,
HCINT2: 0x00000000,
HCINT3: 0x00000000,
HCINT4: 0x00000000,
HCINT5: 0x00000000,
HCINT6: 0x00000000,
HCINT7: 0x00000000,
HCINTMSK0: 0x00000000,
HCINTMSK1: 0x00000000,
HCINTMSK2: 0x00000000,
HCINTMSK3: 0x00000000,
HCINTMSK4: 0x00000000,
HCINTMSK5: 0x00000000,
HCINTMSK6: 0x00000000,
HCINTMSK7: 0x00000000,
HCTSIZ0: 0x00000000,
HCTSIZ1: 0x00000000,
HCTSIZ2: 0x00000000,
HCTSIZ3: 0x00000000,
HCTSIZ4: 0x00000000,
HCTSIZ5: 0x00000000,
HCTSIZ6: 0x00000000,
HCTSIZ7: 0x00000000,
};
}
/// Raw pointer to OTG_FS_HOST
///
/// Dereferencing this is unsafe because you are not ensured unique
/// access to the peripheral, so you may encounter data races with
/// other users of this peripheral. It is up to you to ensure you
/// will not cause data races.
///
/// This constant is provided for ease of use in unsafe code: you can
/// simply call for example `write_reg!(gpio, GPIOA, ODR, 1);`.
pub const OTG_FS_HOST: *const RegisterBlock = 0x50000400 as *const _;
@@ -0,0 +1,109 @@
#![allow(non_snake_case, non_upper_case_globals)]
#![allow(non_camel_case_types)]
//! USB on the go high speed
//!
//! Used by: stm32f405, stm32f407, stm32f427, stm32f429, stm32f446
#[cfg(not(feature = "nosync"))]
pub use super::super::peripherals::otg_hs_device::Instance;
pub use super::super::peripherals::otg_hs_device::{RegisterBlock, ResetValues};
pub use super::super::peripherals::otg_hs_device::{
DAINT, DAINTMSK, DCFG, DCTL, DEACHINT, DEACHINTMSK, DIEPCTL0, DIEPCTL1, DIEPCTL2, DIEPCTL3,
DIEPCTL4, DIEPCTL5, DIEPDMA1, DIEPDMA2, DIEPDMA3, DIEPDMA4, DIEPDMA5, DIEPEACHMSK1, DIEPEMPMSK,
DIEPINT0, DIEPINT1, DIEPINT2, DIEPINT3, DIEPINT4, DIEPINT5, DIEPMSK, DIEPTSIZ0, DIEPTSIZ1,
DIEPTSIZ2, DIEPTSIZ3, DIEPTSIZ4, DIEPTSIZ5, DOEPCTL0, DOEPCTL1, DOEPCTL2, DOEPCTL3, DOEPCTL4,
DOEPCTL5, DOEPEACHMSK1, DOEPINT0, DOEPINT1, DOEPINT2, DOEPINT3, DOEPINT4, DOEPINT5, DOEPMSK,
DOEPTSIZ0, DOEPTSIZ1, DOEPTSIZ2, DOEPTSIZ3, DOEPTSIZ4, DOEPTSIZ5, DSTS, DTHRCTL, DTXFSTS0,
DTXFSTS1, DTXFSTS2, DTXFSTS3, DTXFSTS4, DTXFSTS5, DVBUSDIS, DVBUSPULSE,
};
/// Access functions for the OTG_HS_DEVICE peripheral instance
pub mod OTG_HS_DEVICE {
use super::ResetValues;
#[cfg(not(feature = "nosync"))]
use super::Instance;
#[cfg(not(feature = "nosync"))]
const INSTANCE: Instance = Instance {
addr: 0x40040800,
_marker: ::core::marker::PhantomData,
};
/// Reset values for each field in OTG_HS_DEVICE
pub const reset: ResetValues = ResetValues {
DCFG: 0x02200000,
DCTL: 0x00000000,
DSTS: 0x00000010,
DIEPMSK: 0x00000000,
DOEPMSK: 0x00000000,
DAINT: 0x00000000,
DAINTMSK: 0x00000000,
DVBUSDIS: 0x000017D7,
DVBUSPULSE: 0x000005B8,
DTHRCTL: 0x00000000,
DIEPEMPMSK: 0x00000000,
DEACHINT: 0x00000000,
DEACHINTMSK: 0x00000000,
DIEPEACHMSK1: 0x00000000,
DOEPEACHMSK1: 0x00000000,
DIEPCTL0: 0x00000000,
DIEPCTL1: 0x00000000,
DIEPCTL2: 0x00000000,
DIEPCTL3: 0x00000000,
DIEPCTL4: 0x00000000,
DIEPCTL5: 0x00000000,
DIEPINT0: 0x00000080,
DIEPINT1: 0x00000080,
DIEPINT2: 0x00000080,
DIEPINT3: 0x00000080,
DIEPINT4: 0x00000080,
DIEPINT5: 0x00000080,
DIEPTSIZ0: 0x00000000,
DIEPDMA1: 0x00000000,
DIEPDMA2: 0x00000000,
DIEPDMA3: 0x00000000,
DIEPDMA4: 0x00000000,
DIEPDMA5: 0x00000000,
DTXFSTS0: 0x00000000,
DTXFSTS1: 0x00000000,
DTXFSTS2: 0x00000000,
DTXFSTS3: 0x00000000,
DTXFSTS4: 0x00000000,
DTXFSTS5: 0x00000000,
DIEPTSIZ1: 0x00000000,
DIEPTSIZ2: 0x00000000,
DIEPTSIZ3: 0x00000000,
DIEPTSIZ4: 0x00000000,
DIEPTSIZ5: 0x00000000,
DOEPCTL0: 0x00008000,
DOEPCTL1: 0x00000000,
DOEPCTL2: 0x00000000,
DOEPCTL3: 0x00000000,
DOEPCTL4: 0x00000000,
DOEPCTL5: 0x00000000,
DOEPINT0: 0x00000080,
DOEPINT1: 0x00000080,
DOEPINT2: 0x00000080,
DOEPINT3: 0x00000080,
DOEPINT4: 0x00000080,
DOEPINT5: 0x00000080,
DOEPTSIZ0: 0x00000000,
DOEPTSIZ1: 0x00000000,
DOEPTSIZ2: 0x00000000,
DOEPTSIZ3: 0x00000000,
DOEPTSIZ4: 0x00000000,
DOEPTSIZ5: 0x00000000,
};
}
/// Raw pointer to OTG_HS_DEVICE
///
/// Dereferencing this is unsafe because you are not ensured unique
/// access to the peripheral, so you may encounter data races with
/// other users of this peripheral. It is up to you to ensure you
/// will not cause data races.
///
/// This constant is provided for ease of use in unsafe code: you can
/// simply call for example `write_reg!(gpio, GPIOA, ODR, 1);`.
pub const OTG_HS_DEVICE: *const RegisterBlock = 0x40040800 as *const _;
@@ -0,0 +1,64 @@
#![allow(non_snake_case, non_upper_case_globals)]
#![allow(non_camel_case_types)]
//! USB on the go high speed
//!
//! Used by: stm32f405, stm32f407, stm32f427, stm32f429, stm32f446
#[cfg(not(feature = "nosync"))]
pub use super::super::peripherals::otg_hs_global::Instance;
pub use super::super::peripherals::otg_hs_global::{RegisterBlock, ResetValues};
pub use super::super::peripherals::otg_hs_global::{
CID, DIEPTXF1, DIEPTXF2, DIEPTXF3, DIEPTXF4, DIEPTXF5, GAHBCFG, GCCFG, GINTMSK, GINTSTS,
GNPTXFSIZ, GNPTXSTS, GOTGCTL, GOTGINT, GRSTCTL, GRXFSIZ, GRXSTSP, GRXSTSR, GUSBCFG, HPTXFSIZ,
PHYCR,
};
/// Access functions for the OTG_HS_GLOBAL peripheral instance
pub mod OTG_HS_GLOBAL {
use super::ResetValues;
#[cfg(not(feature = "nosync"))]
use super::Instance;
#[cfg(not(feature = "nosync"))]
const INSTANCE: Instance = Instance {
addr: 0x40040000,
_marker: ::core::marker::PhantomData,
};
/// Reset values for each field in OTG_HS_GLOBAL
pub const reset: ResetValues = ResetValues {
GOTGCTL: 0x00000800,
GOTGINT: 0x00000000,
GAHBCFG: 0x00000000,
GUSBCFG: 0x00000A00,
GRSTCTL: 0x20000000,
GINTSTS: 0x04000020,
GINTMSK: 0x00000000,
GRXSTSR: 0x00000000,
GRXSTSP: 0x00000000,
GRXFSIZ: 0x00000200,
GNPTXFSIZ: 0x00000200,
GNPTXSTS: 0x00080200,
PHYCR: 0x00000000,
GCCFG: 0x00000000,
CID: 0x00001200,
HPTXFSIZ: 0x02000600,
DIEPTXF1: 0x02000400,
DIEPTXF2: 0x02000400,
DIEPTXF3: 0x02000400,
DIEPTXF4: 0x02000400,
DIEPTXF5: 0x02000400,
};
}
/// Raw pointer to OTG_HS_GLOBAL
///
/// Dereferencing this is unsafe because you are not ensured unique
/// access to the peripheral, so you may encounter data races with
/// other users of this peripheral. It is up to you to ensure you
/// will not cause data races.
///
/// This constant is provided for ease of use in unsafe code: you can
/// simply call for example `write_reg!(gpio, GPIOA, ODR, 1);`.
pub const OTG_HS_GLOBAL: *const RegisterBlock = 0x40040000 as *const _;
@@ -0,0 +1,127 @@
#![allow(non_snake_case, non_upper_case_globals)]
#![allow(non_camel_case_types)]
//! USB on the go high speed
//!
//! Used by: stm32f405, stm32f407, stm32f427, stm32f429, stm32f446, stm32f469
#[cfg(not(feature = "nosync"))]
pub use super::super::peripherals::otg_hs_host::Instance;
pub use super::super::peripherals::otg_hs_host::{RegisterBlock, ResetValues};
pub use super::super::peripherals::otg_hs_host::{
HAINT, HAINTMSK, HCCHAR0, HCCHAR1, HCCHAR10, HCCHAR11, HCCHAR2, HCCHAR3, HCCHAR4, HCCHAR5,
HCCHAR6, HCCHAR7, HCCHAR8, HCCHAR9, HCDMA0, HCDMA1, HCDMA10, HCDMA11, HCDMA2, HCDMA3, HCDMA4,
HCDMA5, HCDMA6, HCDMA7, HCDMA8, HCDMA9, HCFG, HCINT0, HCINT1, HCINT10, HCINT11, HCINT2, HCINT3,
HCINT4, HCINT5, HCINT6, HCINT7, HCINT8, HCINT9, HCINTMSK0, HCINTMSK1, HCINTMSK10, HCINTMSK11,
HCINTMSK2, HCINTMSK3, HCINTMSK4, HCINTMSK5, HCINTMSK6, HCINTMSK7, HCINTMSK8, HCINTMSK9,
HCSPLT0, HCSPLT1, HCSPLT10, HCSPLT11, HCSPLT2, HCSPLT3, HCSPLT4, HCSPLT5, HCSPLT6, HCSPLT7,
HCSPLT8, HCSPLT9, HCTSIZ0, HCTSIZ1, HCTSIZ10, HCTSIZ11, HCTSIZ2, HCTSIZ3, HCTSIZ4, HCTSIZ5,
HCTSIZ6, HCTSIZ7, HCTSIZ8, HCTSIZ9, HFIR, HFNUM, HPRT, HPTXSTS,
};
/// Access functions for the OTG_HS_HOST peripheral instance
pub mod OTG_HS_HOST {
use super::ResetValues;
#[cfg(not(feature = "nosync"))]
use super::Instance;
#[cfg(not(feature = "nosync"))]
const INSTANCE: Instance = Instance {
addr: 0x40040400,
_marker: ::core::marker::PhantomData,
};
/// Reset values for each field in OTG_HS_HOST
pub const reset: ResetValues = ResetValues {
HCFG: 0x00000000,
HFIR: 0x0000EA60,
HFNUM: 0x00003FFF,
HPTXSTS: 0x00080100,
HAINT: 0x00000000,
HAINTMSK: 0x00000000,
HPRT: 0x00000000,
HCCHAR0: 0x00000000,
HCCHAR1: 0x00000000,
HCCHAR2: 0x00000000,
HCCHAR3: 0x00000000,
HCCHAR4: 0x00000000,
HCCHAR5: 0x00000000,
HCCHAR6: 0x00000000,
HCCHAR7: 0x00000000,
HCCHAR8: 0x00000000,
HCCHAR9: 0x00000000,
HCCHAR10: 0x00000000,
HCCHAR11: 0x00000000,
HCSPLT0: 0x00000000,
HCSPLT1: 0x00000000,
HCSPLT2: 0x00000000,
HCSPLT3: 0x00000000,
HCSPLT4: 0x00000000,
HCSPLT5: 0x00000000,
HCSPLT6: 0x00000000,
HCSPLT7: 0x00000000,
HCSPLT8: 0x00000000,
HCSPLT9: 0x00000000,
HCSPLT10: 0x00000000,
HCSPLT11: 0x00000000,
HCINT0: 0x00000000,
HCINT1: 0x00000000,
HCINT2: 0x00000000,
HCINT3: 0x00000000,
HCINT4: 0x00000000,
HCINT5: 0x00000000,
HCINT6: 0x00000000,
HCINT7: 0x00000000,
HCINT8: 0x00000000,
HCINT9: 0x00000000,
HCINT10: 0x00000000,
HCINT11: 0x00000000,
HCINTMSK0: 0x00000000,
HCINTMSK1: 0x00000000,
HCINTMSK2: 0x00000000,
HCINTMSK3: 0x00000000,
HCINTMSK4: 0x00000000,
HCINTMSK5: 0x00000000,
HCINTMSK6: 0x00000000,
HCINTMSK7: 0x00000000,
HCINTMSK8: 0x00000000,
HCINTMSK9: 0x00000000,
HCINTMSK10: 0x00000000,
HCINTMSK11: 0x00000000,
HCTSIZ0: 0x00000000,
HCTSIZ1: 0x00000000,
HCTSIZ2: 0x00000000,
HCTSIZ3: 0x00000000,
HCTSIZ4: 0x00000000,
HCTSIZ5: 0x00000000,
HCTSIZ6: 0x00000000,
HCTSIZ7: 0x00000000,
HCTSIZ8: 0x00000000,
HCTSIZ9: 0x00000000,
HCTSIZ10: 0x00000000,
HCTSIZ11: 0x00000000,
HCDMA0: 0x00000000,
HCDMA1: 0x00000000,
HCDMA2: 0x00000000,
HCDMA3: 0x00000000,
HCDMA4: 0x00000000,
HCDMA5: 0x00000000,
HCDMA6: 0x00000000,
HCDMA7: 0x00000000,
HCDMA8: 0x00000000,
HCDMA9: 0x00000000,
HCDMA10: 0x00000000,
HCDMA11: 0x00000000,
};
}
/// Raw pointer to OTG_HS_HOST
///
/// Dereferencing this is unsafe because you are not ensured unique
/// access to the peripheral, so you may encounter data races with
/// other users of this peripheral. It is up to you to ensure you
/// will not cause data races.
///
/// This constant is provided for ease of use in unsafe code: you can
/// simply call for example `write_reg!(gpio, GPIOA, ODR, 1);`.
pub const OTG_HS_HOST: *const RegisterBlock = 0x40040400 as *const _;
@@ -0,0 +1,70 @@
#![allow(non_snake_case, non_upper_case_globals)]
#![allow(non_camel_case_types)]
//! USB on the go full speed
//!
//! Used by: stm32f405, stm32f407, stm32f427, stm32f429, stm32f446
#[cfg(not(feature = "nosync"))]
pub use super::super::peripherals::otg_fs_pwrclk::Instance;
pub use super::super::peripherals::otg_fs_pwrclk::PCGCCTL;
pub use super::super::peripherals::otg_fs_pwrclk::{RegisterBlock, ResetValues};
/// Access functions for the OTG_FS_PWRCLK peripheral instance
pub mod OTG_FS_PWRCLK {
use super::ResetValues;
#[cfg(not(feature = "nosync"))]
use super::Instance;
#[cfg(not(feature = "nosync"))]
const INSTANCE: Instance = Instance {
addr: 0x50000e00,
_marker: ::core::marker::PhantomData,
};
/// Reset values for each field in OTG_FS_PWRCLK
pub const reset: ResetValues = ResetValues {
PCGCCTL: 0x00000000,
};
}
/// Raw pointer to OTG_FS_PWRCLK
///
/// Dereferencing this is unsafe because you are not ensured unique
/// access to the peripheral, so you may encounter data races with
/// other users of this peripheral. It is up to you to ensure you
/// will not cause data races.
///
/// This constant is provided for ease of use in unsafe code: you can
/// simply call for example `write_reg!(gpio, GPIOA, ODR, 1);`.
pub const OTG_FS_PWRCLK: *const RegisterBlock = 0x50000e00 as *const _;
/// Access functions for the OTG_HS_PWRCLK peripheral instance
pub mod OTG_HS_PWRCLK {
use super::ResetValues;
#[cfg(not(feature = "nosync"))]
use super::Instance;
#[cfg(not(feature = "nosync"))]
const INSTANCE: Instance = Instance {
addr: 0x40040e00,
_marker: ::core::marker::PhantomData,
};
/// Reset values for each field in OTG_HS_PWRCLK
pub const reset: ResetValues = ResetValues {
PCGCCTL: 0x00000000,
};
}
/// Raw pointer to OTG_HS_PWRCLK
///
/// Dereferencing this is unsafe because you are not ensured unique
/// access to the peripheral, so you may encounter data races with
/// other users of this peripheral. It is up to you to ensure you
/// will not cause data races.
///
/// This constant is provided for ease of use in unsafe code: you can
/// simply call for example `write_reg!(gpio, GPIOA, ODR, 1);`.
pub const OTG_HS_PWRCLK: *const RegisterBlock = 0x40040e00 as *const _;
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#![allow(non_snake_case)]
pub mod instances;
pub mod peripherals;
pub mod stm32f429;
pub use ral_registers as register;
pub use ral_registers::{modify_reg, read_reg, write_reg};
pub mod otg_global {
#[cfg(feature = "fs")]
pub use super::stm32f429::otg_fs_global::OTG_FS_GLOBAL as OTG_GLOBAL;
#[cfg(feature = "fs")]
pub use super::stm32f429::otg_fs_global::*;
#[cfg(feature = "hs")]
pub use super::stm32f429::otg_hs_global::OTG_HS_GLOBAL as OTG_GLOBAL;
#[cfg(feature = "hs")]
pub use super::stm32f429::otg_hs_global::*;
}
pub mod otg_device {
#[cfg(feature = "fs")]
pub use super::stm32f429::otg_fs_device::OTG_FS_DEVICE as OTG_DEVICE;
#[cfg(feature = "fs")]
pub use super::stm32f429::otg_fs_device::*;
#[cfg(feature = "hs")]
pub use super::stm32f429::otg_hs_device::OTG_HS_DEVICE as OTG_DEVICE;
#[cfg(feature = "hs")]
pub use super::stm32f429::otg_hs_device::*;
}
pub mod otg_pwrclk {
#[cfg(feature = "fs")]
pub use super::stm32f429::otg_s_pwrclk::OTG_FS_PWRCLK as OTG_PWRCLK;
#[cfg(feature = "hs")]
pub use super::stm32f429::otg_s_pwrclk::OTG_HS_PWRCLK as OTG_PWRCLK;
pub use super::stm32f429::otg_s_pwrclk::*;
}
pub mod otg_global_dieptxfx {
use super::register::RWRegister;
#[cfg(feature = "fs")]
pub use super::stm32f429::otg_fs_global::DIEPTXF1 as DIEPTXFx;
#[cfg(feature = "hs")]
pub use super::stm32f429::otg_fs_global::DIEPTXF1 as DIEPTXFx;
pub struct RegisterBlock {
pub DIEPTXFx: RWRegister<u32>,
}
}
pub mod endpoint_in {
use super::register::RWRegister;
#[cfg(feature = "fs")]
pub use super::stm32f429::otg_fs_device::{
DIEPCTL1 as DIEPCTL, DIEPINT1 as DIEPINT, DIEPTSIZ1 as DIEPTSIZ, DTXFSTS1 as DTXFSTS,
};
#[cfg(feature = "hs")]
pub use super::stm32f429::otg_hs_device::{
DIEPCTL1 as DIEPCTL, DIEPINT1 as DIEPINT, DIEPTSIZ1 as DIEPTSIZ, DTXFSTS1 as DTXFSTS,
};
pub struct RegisterBlock {
pub DIEPCTL: RWRegister<u32>,
_reserved0: u32,
pub DIEPINT: RWRegister<u32>,
_reserved1: u32,
pub DIEPTSIZ: RWRegister<u32>,
_reserved2: u32,
pub DTXFSTS: RWRegister<u32>,
_reserved3: u32,
}
}
pub mod endpoint0_out {
use super::register::RWRegister;
#[cfg(feature = "fs")]
pub use super::stm32f429::otg_fs_device::{DOEPCTL0, DOEPINT0, DOEPTSIZ0};
#[cfg(feature = "hs")]
pub use super::stm32f429::otg_hs_device::{DOEPCTL0, DOEPINT0, DOEPTSIZ0};
pub struct RegisterBlock {
pub DOEPCTL0: RWRegister<u32>,
_reserved0: u32,
pub DOEPINT0: RWRegister<u32>,
_reserved1: u32,
pub DOEPTSIZ0: RWRegister<u32>,
_reserved2: [u32; 3],
}
}
pub mod endpoint_out {
use super::register::RWRegister;
#[cfg(feature = "fs")]
pub use super::stm32f429::otg_fs_device::{
DOEPCTL1 as DOEPCTL, DOEPINT1 as DOEPINT, DOEPTSIZ1 as DOEPTSIZ,
};
#[cfg(feature = "hs")]
pub use super::stm32f429::otg_hs_device::{
DOEPCTL1 as DOEPCTL, DOEPINT1 as DOEPINT, DOEPTSIZ1 as DOEPTSIZ,
};
pub struct RegisterBlock {
pub DOEPCTL: RWRegister<u32>,
_reserved0: u32,
pub DOEPINT: RWRegister<u32>,
_reserved1: u32,
pub DOEPTSIZ: RWRegister<u32>,
_reserved2: [u32; 3],
}
}
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#![allow(unused)]
pub mod otg_fs_device_v1;
pub mod otg_fs_global_v1;
pub mod otg_fs_host;
pub mod otg_fs_pwrclk;
pub mod otg_hs_device;
pub mod otg_hs_global;
pub mod otg_hs_host;
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#![allow(non_snake_case, non_upper_case_globals)]
#![allow(non_camel_case_types)]
//! USB on the go full speed
//!
//! Used by: stm32f401, stm32f405, stm32f407, stm32f411, stm32f412, stm32f413, stm32f427, stm32f429, stm32f446, stm32f469
use super::super::register::RWRegister;
#[cfg(not(feature = "nosync"))]
use core::marker::PhantomData;
/// OTG_FS power and clock gating control register
pub mod PCGCCTL {
/// Stop PHY clock
pub mod STPPCLK {
/// Offset (0 bits)
pub const offset: u32 = 0;
/// Mask (1 bit: 1 << 0)
pub const mask: u32 = 1 << offset;
/// Read-only values (empty)
pub mod R {}
/// Write-only values (empty)
pub mod W {}
/// Read-write values (empty)
pub mod RW {}
}
/// Gate HCLK
pub mod GATEHCLK {
/// Offset (1 bits)
pub const offset: u32 = 1;
/// Mask (1 bit: 1 << 1)
pub const mask: u32 = 1 << offset;
/// Read-only values (empty)
pub mod R {}
/// Write-only values (empty)
pub mod W {}
/// Read-write values (empty)
pub mod RW {}
}
/// PHY Suspended
pub mod PHYSUSP {
/// Offset (4 bits)
pub const offset: u32 = 4;
/// Mask (1 bit: 1 << 4)
pub const mask: u32 = 1 << offset;
/// Read-only values (empty)
pub mod R {}
/// Write-only values (empty)
pub mod W {}
/// Read-write values (empty)
pub mod RW {}
}
}
#[repr(C)]
pub struct RegisterBlock {
/// OTG_FS power and clock gating control register
pub PCGCCTL: RWRegister<u32>,
}
pub struct ResetValues {
pub PCGCCTL: u32,
}
#[cfg(not(feature = "nosync"))]
pub struct Instance {
pub(crate) addr: u32,
pub(crate) _marker: PhantomData<*const RegisterBlock>,
}
#[cfg(not(feature = "nosync"))]
impl ::core::ops::Deref for Instance {
type Target = RegisterBlock;
#[inline(always)]
fn deref(&self) -> &RegisterBlock {
unsafe { &*(self.addr as *const _) }
}
}
#[cfg(feature = "rtfm")]
unsafe impl Send for Instance {}
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pub use super::instances::otg_fs_device_f401_f405_f407_f411_f427_f429 as otg_fs_device;
pub use super::instances::otg_fs_global_f401_f405_f407_f411_f427_f429 as otg_fs_global;
pub use super::instances::otg_fs_host;
pub use super::instances::otg_hs_device;
pub use super::instances::otg_hs_global;
pub use super::instances::otg_hs_host;
pub use super::instances::otg_s_pwrclk;