feat: add display UI with splash screen, dashboard, and RSSI sparkline

Implement full SSD1306 OLED display support:
- Splash screen on boot (1.5s) with project name, version, board
- Dashboard showing radio state, config, counters, RSSI/SNR
- RSSI history sparkline (64-sample ring buffer, 2px-wide bars)
- DisplayOn/DisplayOff host commands routed via dedicated channel
- Pure render functions against generic DrawTarget (no hardware coupling)
- Display on/off control bypasses radio task entirely

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>

vendor/esp32s3/src/efuse/clk.rs

@@ -0,0 +1,92 @@
+#[doc = "Register `CLK` reader"]
+pub type R = crate::R<CLK_SPEC>;
+#[doc = "Register `CLK` writer"]
+pub type W = crate::W<CLK_SPEC>;
+#[doc = "Field `EFUSE_MEM_FORCE_PD` reader - Set this bit to force eFuse SRAM into power-saving mode."]
+pub type EFUSE_MEM_FORCE_PD_R = crate::BitReader;
+#[doc = "Field `EFUSE_MEM_FORCE_PD` writer - Set this bit to force eFuse SRAM into power-saving mode."]
+pub type EFUSE_MEM_FORCE_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `MEM_CLK_FORCE_ON` reader - Set this bit and force to activate clock signal of eFuse SRAM."]
+pub type MEM_CLK_FORCE_ON_R = crate::BitReader;
+#[doc = "Field `MEM_CLK_FORCE_ON` writer - Set this bit and force to activate clock signal of eFuse SRAM."]
+pub type MEM_CLK_FORCE_ON_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `EFUSE_MEM_FORCE_PU` reader - Set this bit to force eFuse SRAM into working mode."]
+pub type EFUSE_MEM_FORCE_PU_R = crate::BitReader;
+#[doc = "Field `EFUSE_MEM_FORCE_PU` writer - Set this bit to force eFuse SRAM into working mode."]
+pub type EFUSE_MEM_FORCE_PU_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `EN` reader - Set this bit and force to enable clock signal of eFuse memory."]
+pub type EN_R = crate::BitReader;
+#[doc = "Field `EN` writer - Set this bit and force to enable clock signal of eFuse memory."]
+pub type EN_W<'a, REG> = crate::BitWriter<'a, REG>;
+impl R {
+    #[doc = "Bit 0 - Set this bit to force eFuse SRAM into power-saving mode."]
+    #[inline(always)]
+    pub fn efuse_mem_force_pd(&self) -> EFUSE_MEM_FORCE_PD_R {
+        EFUSE_MEM_FORCE_PD_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Set this bit and force to activate clock signal of eFuse SRAM."]
+    #[inline(always)]
+    pub fn mem_clk_force_on(&self) -> MEM_CLK_FORCE_ON_R {
+        MEM_CLK_FORCE_ON_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - Set this bit to force eFuse SRAM into working mode."]
+    #[inline(always)]
+    pub fn efuse_mem_force_pu(&self) -> EFUSE_MEM_FORCE_PU_R {
+        EFUSE_MEM_FORCE_PU_R::new(((self.bits >> 2) & 1) != 0)
+    }
+    #[doc = "Bit 16 - Set this bit and force to enable clock signal of eFuse memory."]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 16) & 1) != 0)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("CLK")
+            .field("efuse_mem_force_pd", &self.efuse_mem_force_pd())
+            .field("mem_clk_force_on", &self.mem_clk_force_on())
+            .field("efuse_mem_force_pu", &self.efuse_mem_force_pu())
+            .field("en", &self.en())
+            .finish()
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Set this bit to force eFuse SRAM into power-saving mode."]
+    #[inline(always)]
+    pub fn efuse_mem_force_pd(&mut self) -> EFUSE_MEM_FORCE_PD_W<CLK_SPEC> {
+        EFUSE_MEM_FORCE_PD_W::new(self, 0)
+    }
+    #[doc = "Bit 1 - Set this bit and force to activate clock signal of eFuse SRAM."]
+    #[inline(always)]
+    pub fn mem_clk_force_on(&mut self) -> MEM_CLK_FORCE_ON_W<CLK_SPEC> {
+        MEM_CLK_FORCE_ON_W::new(self, 1)
+    }
+    #[doc = "Bit 2 - Set this bit to force eFuse SRAM into working mode."]
+    #[inline(always)]
+    pub fn efuse_mem_force_pu(&mut self) -> EFUSE_MEM_FORCE_PU_W<CLK_SPEC> {
+        EFUSE_MEM_FORCE_PU_W::new(self, 2)
+    }
+    #[doc = "Bit 16 - Set this bit and force to enable clock signal of eFuse memory."]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<CLK_SPEC> {
+        EN_W::new(self, 16)
+    }
+}
+#[doc = "eFuse clcok configuration register.\n\nYou can [`read`](crate::Reg::read) this register and get [`clk::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clk::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct CLK_SPEC;
+impl crate::RegisterSpec for CLK_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`clk::R`](R) reader structure"]
+impl crate::Readable for CLK_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`clk::W`](W) writer structure"]
+impl crate::Writable for CLK_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets CLK to value 0x02"]
+impl crate::Resettable for CLK_SPEC {
+    const RESET_VALUE: u32 = 0x02;
+}

vendor/esp32s3/src/efuse/cmd.rs

@@ -0,0 +1,77 @@
+#[doc = "Register `CMD` reader"]
+pub type R = crate::R<CMD_SPEC>;
+#[doc = "Register `CMD` writer"]
+pub type W = crate::W<CMD_SPEC>;
+#[doc = "Field `READ_CMD` reader - Set this bit to send read command."]
+pub type READ_CMD_R = crate::BitReader;
+#[doc = "Field `READ_CMD` writer - Set this bit to send read command."]
+pub type READ_CMD_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `PGM_CMD` reader - Set this bit to send programming command."]
+pub type PGM_CMD_R = crate::BitReader;
+#[doc = "Field `PGM_CMD` writer - Set this bit to send programming command."]
+pub type PGM_CMD_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `BLK_NUM` reader - The serial number of the block to be programmed. Value 0-10 corresponds to block number 0-10, respectively."]
+pub type BLK_NUM_R = crate::FieldReader;
+#[doc = "Field `BLK_NUM` writer - The serial number of the block to be programmed. Value 0-10 corresponds to block number 0-10, respectively."]
+pub type BLK_NUM_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
+impl R {
+    #[doc = "Bit 0 - Set this bit to send read command."]
+    #[inline(always)]
+    pub fn read_cmd(&self) -> READ_CMD_R {
+        READ_CMD_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Set this bit to send programming command."]
+    #[inline(always)]
+    pub fn pgm_cmd(&self) -> PGM_CMD_R {
+        PGM_CMD_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bits 2:5 - The serial number of the block to be programmed. Value 0-10 corresponds to block number 0-10, respectively."]
+    #[inline(always)]
+    pub fn blk_num(&self) -> BLK_NUM_R {
+        BLK_NUM_R::new(((self.bits >> 2) & 0x0f) as u8)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("CMD")
+            .field("read_cmd", &self.read_cmd())
+            .field("pgm_cmd", &self.pgm_cmd())
+            .field("blk_num", &self.blk_num())
+            .finish()
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Set this bit to send read command."]
+    #[inline(always)]
+    pub fn read_cmd(&mut self) -> READ_CMD_W<CMD_SPEC> {
+        READ_CMD_W::new(self, 0)
+    }
+    #[doc = "Bit 1 - Set this bit to send programming command."]
+    #[inline(always)]
+    pub fn pgm_cmd(&mut self) -> PGM_CMD_W<CMD_SPEC> {
+        PGM_CMD_W::new(self, 1)
+    }
+    #[doc = "Bits 2:5 - The serial number of the block to be programmed. Value 0-10 corresponds to block number 0-10, respectively."]
+    #[inline(always)]
+    pub fn blk_num(&mut self) -> BLK_NUM_W<CMD_SPEC> {
+        BLK_NUM_W::new(self, 2)
+    }
+}
+#[doc = "eFuse command register.\n\nYou can [`read`](crate::Reg::read) this register and get [`cmd::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct CMD_SPEC;
+impl crate::RegisterSpec for CMD_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`cmd::R`](R) reader structure"]
+impl crate::Readable for CMD_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`cmd::W`](W) writer structure"]
+impl crate::Writable for CMD_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets CMD to value 0"]
+impl crate::Resettable for CMD_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/conf.rs

@@ -0,0 +1,47 @@
+#[doc = "Register `CONF` reader"]
+pub type R = crate::R<CONF_SPEC>;
+#[doc = "Register `CONF` writer"]
+pub type W = crate::W<CONF_SPEC>;
+#[doc = "Field `OP_CODE` reader - 0x5A5A: Operate programming command 0x5AA5: Operate read command."]
+pub type OP_CODE_R = crate::FieldReader<u16>;
+#[doc = "Field `OP_CODE` writer - 0x5A5A: Operate programming command 0x5AA5: Operate read command."]
+pub type OP_CODE_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>;
+impl R {
+    #[doc = "Bits 0:15 - 0x5A5A: Operate programming command 0x5AA5: Operate read command."]
+    #[inline(always)]
+    pub fn op_code(&self) -> OP_CODE_R {
+        OP_CODE_R::new((self.bits & 0xffff) as u16)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("CONF")
+            .field("op_code", &self.op_code())
+            .finish()
+    }
+}
+impl W {
+    #[doc = "Bits 0:15 - 0x5A5A: Operate programming command 0x5AA5: Operate read command."]
+    #[inline(always)]
+    pub fn op_code(&mut self) -> OP_CODE_W<CONF_SPEC> {
+        OP_CODE_W::new(self, 0)
+    }
+}
+#[doc = "eFuse operation mode configuraiton register\n\nYou can [`read`](crate::Reg::read) this register and get [`conf::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`conf::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct CONF_SPEC;
+impl crate::RegisterSpec for CONF_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`conf::R`](R) reader structure"]
+impl crate::Readable for CONF_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`conf::W`](W) writer structure"]
+impl crate::Writable for CONF_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets CONF to value 0"]
+impl crate::Resettable for CONF_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/dac_conf.rs

@@ -0,0 +1,92 @@
+#[doc = "Register `DAC_CONF` reader"]
+pub type R = crate::R<DAC_CONF_SPEC>;
+#[doc = "Register `DAC_CONF` writer"]
+pub type W = crate::W<DAC_CONF_SPEC>;
+#[doc = "Field `DAC_CLK_DIV` reader - Controls the division factor of the rising clock of the programming voltage."]
+pub type DAC_CLK_DIV_R = crate::FieldReader;
+#[doc = "Field `DAC_CLK_DIV` writer - Controls the division factor of the rising clock of the programming voltage."]
+pub type DAC_CLK_DIV_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
+#[doc = "Field `DAC_CLK_PAD_SEL` reader - Don't care."]
+pub type DAC_CLK_PAD_SEL_R = crate::BitReader;
+#[doc = "Field `DAC_CLK_PAD_SEL` writer - Don't care."]
+pub type DAC_CLK_PAD_SEL_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `DAC_NUM` reader - Controls the rising period of the programming voltage."]
+pub type DAC_NUM_R = crate::FieldReader;
+#[doc = "Field `DAC_NUM` writer - Controls the rising period of the programming voltage."]
+pub type DAC_NUM_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
+#[doc = "Field `OE_CLR` reader - Reduces the power supply of the programming voltage."]
+pub type OE_CLR_R = crate::BitReader;
+#[doc = "Field `OE_CLR` writer - Reduces the power supply of the programming voltage."]
+pub type OE_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
+impl R {
+    #[doc = "Bits 0:7 - Controls the division factor of the rising clock of the programming voltage."]
+    #[inline(always)]
+    pub fn dac_clk_div(&self) -> DAC_CLK_DIV_R {
+        DAC_CLK_DIV_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 8 - Don't care."]
+    #[inline(always)]
+    pub fn dac_clk_pad_sel(&self) -> DAC_CLK_PAD_SEL_R {
+        DAC_CLK_PAD_SEL_R::new(((self.bits >> 8) & 1) != 0)
+    }
+    #[doc = "Bits 9:16 - Controls the rising period of the programming voltage."]
+    #[inline(always)]
+    pub fn dac_num(&self) -> DAC_NUM_R {
+        DAC_NUM_R::new(((self.bits >> 9) & 0xff) as u8)
+    }
+    #[doc = "Bit 17 - Reduces the power supply of the programming voltage."]
+    #[inline(always)]
+    pub fn oe_clr(&self) -> OE_CLR_R {
+        OE_CLR_R::new(((self.bits >> 17) & 1) != 0)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("DAC_CONF")
+            .field("dac_clk_div", &self.dac_clk_div())
+            .field("dac_clk_pad_sel", &self.dac_clk_pad_sel())
+            .field("dac_num", &self.dac_num())
+            .field("oe_clr", &self.oe_clr())
+            .finish()
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - Controls the division factor of the rising clock of the programming voltage."]
+    #[inline(always)]
+    pub fn dac_clk_div(&mut self) -> DAC_CLK_DIV_W<DAC_CONF_SPEC> {
+        DAC_CLK_DIV_W::new(self, 0)
+    }
+    #[doc = "Bit 8 - Don't care."]
+    #[inline(always)]
+    pub fn dac_clk_pad_sel(&mut self) -> DAC_CLK_PAD_SEL_W<DAC_CONF_SPEC> {
+        DAC_CLK_PAD_SEL_W::new(self, 8)
+    }
+    #[doc = "Bits 9:16 - Controls the rising period of the programming voltage."]
+    #[inline(always)]
+    pub fn dac_num(&mut self) -> DAC_NUM_W<DAC_CONF_SPEC> {
+        DAC_NUM_W::new(self, 9)
+    }
+    #[doc = "Bit 17 - Reduces the power supply of the programming voltage."]
+    #[inline(always)]
+    pub fn oe_clr(&mut self) -> OE_CLR_W<DAC_CONF_SPEC> {
+        OE_CLR_W::new(self, 17)
+    }
+}
+#[doc = "Controls the eFuse programming voltage.\n\nYou can [`read`](crate::Reg::read) this register and get [`dac_conf::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dac_conf::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct DAC_CONF_SPEC;
+impl crate::RegisterSpec for DAC_CONF_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`dac_conf::R`](R) reader structure"]
+impl crate::Readable for DAC_CONF_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`dac_conf::W`](W) writer structure"]
+impl crate::Writable for DAC_CONF_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets DAC_CONF to value 0x0001_fe1c"]
+impl crate::Resettable for DAC_CONF_SPEC {
+    const RESET_VALUE: u32 = 0x0001_fe1c;
+}

vendor/esp32s3/src/efuse/date.rs

@@ -0,0 +1,45 @@
+#[doc = "Register `DATE` reader"]
+pub type R = crate::R<DATE_SPEC>;
+#[doc = "Register `DATE` writer"]
+pub type W = crate::W<DATE_SPEC>;
+#[doc = "Field `DATE` reader - Stores eFuse version."]
+pub type DATE_R = crate::FieldReader<u32>;
+#[doc = "Field `DATE` writer - Stores eFuse version."]
+pub type DATE_W<'a, REG> = crate::FieldWriter<'a, REG, 28, u32>;
+impl R {
+    #[doc = "Bits 0:27 - Stores eFuse version."]
+    #[inline(always)]
+    pub fn date(&self) -> DATE_R {
+        DATE_R::new(self.bits & 0x0fff_ffff)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("DATE").field("date", &self.date()).finish()
+    }
+}
+impl W {
+    #[doc = "Bits 0:27 - Stores eFuse version."]
+    #[inline(always)]
+    pub fn date(&mut self) -> DATE_W<DATE_SPEC> {
+        DATE_W::new(self, 0)
+    }
+}
+#[doc = "eFuse version register.\n\nYou can [`read`](crate::Reg::read) this register and get [`date::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`date::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct DATE_SPEC;
+impl crate::RegisterSpec for DATE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`date::R`](R) reader structure"]
+impl crate::Readable for DATE_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`date::W`](W) writer structure"]
+impl crate::Writable for DATE_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets DATE to value 0x0210_1290"]
+impl crate::Resettable for DATE_SPEC {
+    const RESET_VALUE: u32 = 0x0210_1290;
+}

vendor/esp32s3/src/efuse/int_clr.rs

@@ -0,0 +1,39 @@
+#[doc = "Register `INT_CLR` writer"]
+pub type W = crate::W<INT_CLR_SPEC>;
+#[doc = "Field `READ_DONE` writer - The clear signal for read_done interrupt."]
+pub type READ_DONE_W<'a, REG> = crate::BitWriter1C<'a, REG>;
+#[doc = "Field `PGM_DONE` writer - The clear signal for pgm_done interrupt."]
+pub type PGM_DONE_W<'a, REG> = crate::BitWriter1C<'a, REG>;
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for crate::generic::Reg<INT_CLR_SPEC> {
+    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
+        write!(f, "(not readable)")
+    }
+}
+impl W {
+    #[doc = "Bit 0 - The clear signal for read_done interrupt."]
+    #[inline(always)]
+    pub fn read_done(&mut self) -> READ_DONE_W<INT_CLR_SPEC> {
+        READ_DONE_W::new(self, 0)
+    }
+    #[doc = "Bit 1 - The clear signal for pgm_done interrupt."]
+    #[inline(always)]
+    pub fn pgm_done(&mut self) -> PGM_DONE_W<INT_CLR_SPEC> {
+        PGM_DONE_W::new(self, 1)
+    }
+}
+#[doc = "eFuse interrupt clear register.\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct INT_CLR_SPEC;
+impl crate::RegisterSpec for INT_CLR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [`int_clr::W`](W) writer structure"]
+impl crate::Writable for INT_CLR_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0x03;
+}
+#[doc = "`reset()` method sets INT_CLR to value 0"]
+impl crate::Resettable for INT_CLR_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/int_ena.rs

@@ -0,0 +1,62 @@
+#[doc = "Register `INT_ENA` reader"]
+pub type R = crate::R<INT_ENA_SPEC>;
+#[doc = "Register `INT_ENA` writer"]
+pub type W = crate::W<INT_ENA_SPEC>;
+#[doc = "Field `READ_DONE` reader - The enable signal for read_done interrupt."]
+pub type READ_DONE_R = crate::BitReader;
+#[doc = "Field `READ_DONE` writer - The enable signal for read_done interrupt."]
+pub type READ_DONE_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `PGM_DONE` reader - The enable signal for pgm_done interrupt."]
+pub type PGM_DONE_R = crate::BitReader;
+#[doc = "Field `PGM_DONE` writer - The enable signal for pgm_done interrupt."]
+pub type PGM_DONE_W<'a, REG> = crate::BitWriter<'a, REG>;
+impl R {
+    #[doc = "Bit 0 - The enable signal for read_done interrupt."]
+    #[inline(always)]
+    pub fn read_done(&self) -> READ_DONE_R {
+        READ_DONE_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - The enable signal for pgm_done interrupt."]
+    #[inline(always)]
+    pub fn pgm_done(&self) -> PGM_DONE_R {
+        PGM_DONE_R::new(((self.bits >> 1) & 1) != 0)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("INT_ENA")
+            .field("read_done", &self.read_done())
+            .field("pgm_done", &self.pgm_done())
+            .finish()
+    }
+}
+impl W {
+    #[doc = "Bit 0 - The enable signal for read_done interrupt."]
+    #[inline(always)]
+    pub fn read_done(&mut self) -> READ_DONE_W<INT_ENA_SPEC> {
+        READ_DONE_W::new(self, 0)
+    }
+    #[doc = "Bit 1 - The enable signal for pgm_done interrupt."]
+    #[inline(always)]
+    pub fn pgm_done(&mut self) -> PGM_DONE_W<INT_ENA_SPEC> {
+        PGM_DONE_W::new(self, 1)
+    }
+}
+#[doc = "eFuse interrupt enable register.\n\nYou can [`read`](crate::Reg::read) this register and get [`int_ena::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_ena::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct INT_ENA_SPEC;
+impl crate::RegisterSpec for INT_ENA_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`int_ena::R`](R) reader structure"]
+impl crate::Readable for INT_ENA_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`int_ena::W`](W) writer structure"]
+impl crate::Writable for INT_ENA_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets INT_ENA to value 0"]
+impl crate::Resettable for INT_ENA_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/int_raw.rs

@@ -0,0 +1,62 @@
+#[doc = "Register `INT_RAW` reader"]
+pub type R = crate::R<INT_RAW_SPEC>;
+#[doc = "Register `INT_RAW` writer"]
+pub type W = crate::W<INT_RAW_SPEC>;
+#[doc = "Field `READ_DONE` reader - The raw bit signal for read_done interrupt."]
+pub type READ_DONE_R = crate::BitReader;
+#[doc = "Field `READ_DONE` writer - The raw bit signal for read_done interrupt."]
+pub type READ_DONE_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `PGM_DONE` reader - The raw bit signal for pgm_done interrupt."]
+pub type PGM_DONE_R = crate::BitReader;
+#[doc = "Field `PGM_DONE` writer - The raw bit signal for pgm_done interrupt."]
+pub type PGM_DONE_W<'a, REG> = crate::BitWriter<'a, REG>;
+impl R {
+    #[doc = "Bit 0 - The raw bit signal for read_done interrupt."]
+    #[inline(always)]
+    pub fn read_done(&self) -> READ_DONE_R {
+        READ_DONE_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - The raw bit signal for pgm_done interrupt."]
+    #[inline(always)]
+    pub fn pgm_done(&self) -> PGM_DONE_R {
+        PGM_DONE_R::new(((self.bits >> 1) & 1) != 0)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("INT_RAW")
+            .field("read_done", &self.read_done())
+            .field("pgm_done", &self.pgm_done())
+            .finish()
+    }
+}
+impl W {
+    #[doc = "Bit 0 - The raw bit signal for read_done interrupt."]
+    #[inline(always)]
+    pub fn read_done(&mut self) -> READ_DONE_W<INT_RAW_SPEC> {
+        READ_DONE_W::new(self, 0)
+    }
+    #[doc = "Bit 1 - The raw bit signal for pgm_done interrupt."]
+    #[inline(always)]
+    pub fn pgm_done(&mut self) -> PGM_DONE_W<INT_RAW_SPEC> {
+        PGM_DONE_W::new(self, 1)
+    }
+}
+#[doc = "eFuse raw interrupt register.\n\nYou can [`read`](crate::Reg::read) this register and get [`int_raw::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_raw::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct INT_RAW_SPEC;
+impl crate::RegisterSpec for INT_RAW_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`int_raw::R`](R) reader structure"]
+impl crate::Readable for INT_RAW_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`int_raw::W`](W) writer structure"]
+impl crate::Writable for INT_RAW_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets INT_RAW to value 0"]
+impl crate::Resettable for INT_RAW_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/int_st.rs

@@ -0,0 +1,38 @@
+#[doc = "Register `INT_ST` reader"]
+pub type R = crate::R<INT_ST_SPEC>;
+#[doc = "Field `READ_DONE` reader - The status signal for read_done interrupt."]
+pub type READ_DONE_R = crate::BitReader;
+#[doc = "Field `PGM_DONE` reader - The status signal for pgm_done interrupt."]
+pub type PGM_DONE_R = crate::BitReader;
+impl R {
+    #[doc = "Bit 0 - The status signal for read_done interrupt."]
+    #[inline(always)]
+    pub fn read_done(&self) -> READ_DONE_R {
+        READ_DONE_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - The status signal for pgm_done interrupt."]
+    #[inline(always)]
+    pub fn pgm_done(&self) -> PGM_DONE_R {
+        PGM_DONE_R::new(((self.bits >> 1) & 1) != 0)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("INT_ST")
+            .field("read_done", &self.read_done())
+            .field("pgm_done", &self.pgm_done())
+            .finish()
+    }
+}
+#[doc = "eFuse interrupt status register.\n\nYou can [`read`](crate::Reg::read) this register and get [`int_st::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct INT_ST_SPEC;
+impl crate::RegisterSpec for INT_ST_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`int_st::R`](R) reader structure"]
+impl crate::Readable for INT_ST_SPEC {}
+#[doc = "`reset()` method sets INT_ST to value 0"]
+impl crate::Resettable for INT_ST_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/pgm_check_value0.rs

@@ -0,0 +1,47 @@
+#[doc = "Register `PGM_CHECK_VALUE0` reader"]
+pub type R = crate::R<PGM_CHECK_VALUE0_SPEC>;
+#[doc = "Register `PGM_CHECK_VALUE0` writer"]
+pub type W = crate::W<PGM_CHECK_VALUE0_SPEC>;
+#[doc = "Field `PGM_RS_DATA_0` reader - The content of the 0th 32-bit RS code to be programmed."]
+pub type PGM_RS_DATA_0_R = crate::FieldReader<u32>;
+#[doc = "Field `PGM_RS_DATA_0` writer - The content of the 0th 32-bit RS code to be programmed."]
+pub type PGM_RS_DATA_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
+impl R {
+    #[doc = "Bits 0:31 - The content of the 0th 32-bit RS code to be programmed."]
+    #[inline(always)]
+    pub fn pgm_rs_data_0(&self) -> PGM_RS_DATA_0_R {
+        PGM_RS_DATA_0_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("PGM_CHECK_VALUE0")
+            .field("pgm_rs_data_0", &self.pgm_rs_data_0())
+            .finish()
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - The content of the 0th 32-bit RS code to be programmed."]
+    #[inline(always)]
+    pub fn pgm_rs_data_0(&mut self) -> PGM_RS_DATA_0_W<PGM_CHECK_VALUE0_SPEC> {
+        PGM_RS_DATA_0_W::new(self, 0)
+    }
+}
+#[doc = "Register 0 that stores the RS code to be programmed.\n\nYou can [`read`](crate::Reg::read) this register and get [`pgm_check_value0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pgm_check_value0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct PGM_CHECK_VALUE0_SPEC;
+impl crate::RegisterSpec for PGM_CHECK_VALUE0_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`pgm_check_value0::R`](R) reader structure"]
+impl crate::Readable for PGM_CHECK_VALUE0_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`pgm_check_value0::W`](W) writer structure"]
+impl crate::Writable for PGM_CHECK_VALUE0_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets PGM_CHECK_VALUE0 to value 0"]
+impl crate::Resettable for PGM_CHECK_VALUE0_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/pgm_check_value1.rs

@@ -0,0 +1,47 @@
+#[doc = "Register `PGM_CHECK_VALUE1` reader"]
+pub type R = crate::R<PGM_CHECK_VALUE1_SPEC>;
+#[doc = "Register `PGM_CHECK_VALUE1` writer"]
+pub type W = crate::W<PGM_CHECK_VALUE1_SPEC>;
+#[doc = "Field `PGM_RS_DATA_1` reader - The content of the 1st 32-bit RS code to be programmed."]
+pub type PGM_RS_DATA_1_R = crate::FieldReader<u32>;
+#[doc = "Field `PGM_RS_DATA_1` writer - The content of the 1st 32-bit RS code to be programmed."]
+pub type PGM_RS_DATA_1_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
+impl R {
+    #[doc = "Bits 0:31 - The content of the 1st 32-bit RS code to be programmed."]
+    #[inline(always)]
+    pub fn pgm_rs_data_1(&self) -> PGM_RS_DATA_1_R {
+        PGM_RS_DATA_1_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("PGM_CHECK_VALUE1")
+            .field("pgm_rs_data_1", &self.pgm_rs_data_1())
+            .finish()
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - The content of the 1st 32-bit RS code to be programmed."]
+    #[inline(always)]
+    pub fn pgm_rs_data_1(&mut self) -> PGM_RS_DATA_1_W<PGM_CHECK_VALUE1_SPEC> {
+        PGM_RS_DATA_1_W::new(self, 0)
+    }
+}
+#[doc = "Register 1 that stores the RS code to be programmed.\n\nYou can [`read`](crate::Reg::read) this register and get [`pgm_check_value1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pgm_check_value1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct PGM_CHECK_VALUE1_SPEC;
+impl crate::RegisterSpec for PGM_CHECK_VALUE1_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`pgm_check_value1::R`](R) reader structure"]
+impl crate::Readable for PGM_CHECK_VALUE1_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`pgm_check_value1::W`](W) writer structure"]
+impl crate::Writable for PGM_CHECK_VALUE1_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets PGM_CHECK_VALUE1 to value 0"]
+impl crate::Resettable for PGM_CHECK_VALUE1_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/pgm_check_value2.rs

@@ -0,0 +1,47 @@
+#[doc = "Register `PGM_CHECK_VALUE2` reader"]
+pub type R = crate::R<PGM_CHECK_VALUE2_SPEC>;
+#[doc = "Register `PGM_CHECK_VALUE2` writer"]
+pub type W = crate::W<PGM_CHECK_VALUE2_SPEC>;
+#[doc = "Field `PGM_RS_DATA_2` reader - The content of the 2nd 32-bit RS code to be programmed."]
+pub type PGM_RS_DATA_2_R = crate::FieldReader<u32>;
+#[doc = "Field `PGM_RS_DATA_2` writer - The content of the 2nd 32-bit RS code to be programmed."]
+pub type PGM_RS_DATA_2_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
+impl R {
+    #[doc = "Bits 0:31 - The content of the 2nd 32-bit RS code to be programmed."]
+    #[inline(always)]
+    pub fn pgm_rs_data_2(&self) -> PGM_RS_DATA_2_R {
+        PGM_RS_DATA_2_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("PGM_CHECK_VALUE2")
+            .field("pgm_rs_data_2", &self.pgm_rs_data_2())
+            .finish()
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - The content of the 2nd 32-bit RS code to be programmed."]
+    #[inline(always)]
+    pub fn pgm_rs_data_2(&mut self) -> PGM_RS_DATA_2_W<PGM_CHECK_VALUE2_SPEC> {
+        PGM_RS_DATA_2_W::new(self, 0)
+    }
+}
+#[doc = "Register 2 that stores the RS code to be programmed.\n\nYou can [`read`](crate::Reg::read) this register and get [`pgm_check_value2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pgm_check_value2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct PGM_CHECK_VALUE2_SPEC;
+impl crate::RegisterSpec for PGM_CHECK_VALUE2_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`pgm_check_value2::R`](R) reader structure"]
+impl crate::Readable for PGM_CHECK_VALUE2_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`pgm_check_value2::W`](W) writer structure"]
+impl crate::Writable for PGM_CHECK_VALUE2_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets PGM_CHECK_VALUE2 to value 0"]
+impl crate::Resettable for PGM_CHECK_VALUE2_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/pgm_data0.rs

@@ -0,0 +1,47 @@
+#[doc = "Register `PGM_DATA0` reader"]
+pub type R = crate::R<PGM_DATA0_SPEC>;
+#[doc = "Register `PGM_DATA0` writer"]
+pub type W = crate::W<PGM_DATA0_SPEC>;
+#[doc = "Field `PGM_DATA_0` reader - The content of the 0th 32-bit data to be programmed."]
+pub type PGM_DATA_0_R = crate::FieldReader<u32>;
+#[doc = "Field `PGM_DATA_0` writer - The content of the 0th 32-bit data to be programmed."]
+pub type PGM_DATA_0_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
+impl R {
+    #[doc = "Bits 0:31 - The content of the 0th 32-bit data to be programmed."]
+    #[inline(always)]
+    pub fn pgm_data_0(&self) -> PGM_DATA_0_R {
+        PGM_DATA_0_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("PGM_DATA0")
+            .field("pgm_data_0", &self.pgm_data_0())
+            .finish()
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - The content of the 0th 32-bit data to be programmed."]
+    #[inline(always)]
+    pub fn pgm_data_0(&mut self) -> PGM_DATA_0_W<PGM_DATA0_SPEC> {
+        PGM_DATA_0_W::new(self, 0)
+    }
+}
+#[doc = "Register 0 that stores data to be programmed.\n\nYou can [`read`](crate::Reg::read) this register and get [`pgm_data0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pgm_data0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct PGM_DATA0_SPEC;
+impl crate::RegisterSpec for PGM_DATA0_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`pgm_data0::R`](R) reader structure"]
+impl crate::Readable for PGM_DATA0_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`pgm_data0::W`](W) writer structure"]
+impl crate::Writable for PGM_DATA0_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets PGM_DATA0 to value 0"]
+impl crate::Resettable for PGM_DATA0_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/pgm_data1.rs

@@ -0,0 +1,47 @@
+#[doc = "Register `PGM_DATA1` reader"]
+pub type R = crate::R<PGM_DATA1_SPEC>;
+#[doc = "Register `PGM_DATA1` writer"]
+pub type W = crate::W<PGM_DATA1_SPEC>;
+#[doc = "Field `PGM_DATA_1` reader - The content of the 1st 32-bit data to be programmed."]
+pub type PGM_DATA_1_R = crate::FieldReader<u32>;
+#[doc = "Field `PGM_DATA_1` writer - The content of the 1st 32-bit data to be programmed."]
+pub type PGM_DATA_1_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
+impl R {
+    #[doc = "Bits 0:31 - The content of the 1st 32-bit data to be programmed."]
+    #[inline(always)]
+    pub fn pgm_data_1(&self) -> PGM_DATA_1_R {
+        PGM_DATA_1_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("PGM_DATA1")
+            .field("pgm_data_1", &self.pgm_data_1())
+            .finish()
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - The content of the 1st 32-bit data to be programmed."]
+    #[inline(always)]
+    pub fn pgm_data_1(&mut self) -> PGM_DATA_1_W<PGM_DATA1_SPEC> {
+        PGM_DATA_1_W::new(self, 0)
+    }
+}
+#[doc = "Register 1 that stores data to be programmed.\n\nYou can [`read`](crate::Reg::read) this register and get [`pgm_data1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pgm_data1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct PGM_DATA1_SPEC;
+impl crate::RegisterSpec for PGM_DATA1_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`pgm_data1::R`](R) reader structure"]
+impl crate::Readable for PGM_DATA1_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`pgm_data1::W`](W) writer structure"]
+impl crate::Writable for PGM_DATA1_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets PGM_DATA1 to value 0"]
+impl crate::Resettable for PGM_DATA1_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/pgm_data2.rs

@@ -0,0 +1,47 @@
+#[doc = "Register `PGM_DATA2` reader"]
+pub type R = crate::R<PGM_DATA2_SPEC>;
+#[doc = "Register `PGM_DATA2` writer"]
+pub type W = crate::W<PGM_DATA2_SPEC>;
+#[doc = "Field `PGM_DATA_2` reader - The content of the 2nd 32-bit data to be programmed."]
+pub type PGM_DATA_2_R = crate::FieldReader<u32>;
+#[doc = "Field `PGM_DATA_2` writer - The content of the 2nd 32-bit data to be programmed."]
+pub type PGM_DATA_2_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
+impl R {
+    #[doc = "Bits 0:31 - The content of the 2nd 32-bit data to be programmed."]
+    #[inline(always)]
+    pub fn pgm_data_2(&self) -> PGM_DATA_2_R {
+        PGM_DATA_2_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("PGM_DATA2")
+            .field("pgm_data_2", &self.pgm_data_2())
+            .finish()
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - The content of the 2nd 32-bit data to be programmed."]
+    #[inline(always)]
+    pub fn pgm_data_2(&mut self) -> PGM_DATA_2_W<PGM_DATA2_SPEC> {
+        PGM_DATA_2_W::new(self, 0)
+    }
+}
+#[doc = "Register 2 that stores data to be programmed.\n\nYou can [`read`](crate::Reg::read) this register and get [`pgm_data2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pgm_data2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct PGM_DATA2_SPEC;
+impl crate::RegisterSpec for PGM_DATA2_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`pgm_data2::R`](R) reader structure"]
+impl crate::Readable for PGM_DATA2_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`pgm_data2::W`](W) writer structure"]
+impl crate::Writable for PGM_DATA2_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets PGM_DATA2 to value 0"]
+impl crate::Resettable for PGM_DATA2_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/pgm_data3.rs

@@ -0,0 +1,47 @@
+#[doc = "Register `PGM_DATA3` reader"]
+pub type R = crate::R<PGM_DATA3_SPEC>;
+#[doc = "Register `PGM_DATA3` writer"]
+pub type W = crate::W<PGM_DATA3_SPEC>;
+#[doc = "Field `PGM_DATA_3` reader - The content of the 3rd 32-bit data to be programmed."]
+pub type PGM_DATA_3_R = crate::FieldReader<u32>;
+#[doc = "Field `PGM_DATA_3` writer - The content of the 3rd 32-bit data to be programmed."]
+pub type PGM_DATA_3_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
+impl R {
+    #[doc = "Bits 0:31 - The content of the 3rd 32-bit data to be programmed."]
+    #[inline(always)]
+    pub fn pgm_data_3(&self) -> PGM_DATA_3_R {
+        PGM_DATA_3_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("PGM_DATA3")
+            .field("pgm_data_3", &self.pgm_data_3())
+            .finish()
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - The content of the 3rd 32-bit data to be programmed."]
+    #[inline(always)]
+    pub fn pgm_data_3(&mut self) -> PGM_DATA_3_W<PGM_DATA3_SPEC> {
+        PGM_DATA_3_W::new(self, 0)
+    }
+}
+#[doc = "Register 3 that stores data to be programmed.\n\nYou can [`read`](crate::Reg::read) this register and get [`pgm_data3::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pgm_data3::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct PGM_DATA3_SPEC;
+impl crate::RegisterSpec for PGM_DATA3_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`pgm_data3::R`](R) reader structure"]
+impl crate::Readable for PGM_DATA3_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`pgm_data3::W`](W) writer structure"]
+impl crate::Writable for PGM_DATA3_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets PGM_DATA3 to value 0"]
+impl crate::Resettable for PGM_DATA3_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/pgm_data4.rs

@@ -0,0 +1,47 @@
+#[doc = "Register `PGM_DATA4` reader"]
+pub type R = crate::R<PGM_DATA4_SPEC>;
+#[doc = "Register `PGM_DATA4` writer"]
+pub type W = crate::W<PGM_DATA4_SPEC>;
+#[doc = "Field `PGM_DATA_4` reader - The content of the 4th 32-bit data to be programmed."]
+pub type PGM_DATA_4_R = crate::FieldReader<u32>;
+#[doc = "Field `PGM_DATA_4` writer - The content of the 4th 32-bit data to be programmed."]
+pub type PGM_DATA_4_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
+impl R {
+    #[doc = "Bits 0:31 - The content of the 4th 32-bit data to be programmed."]
+    #[inline(always)]
+    pub fn pgm_data_4(&self) -> PGM_DATA_4_R {
+        PGM_DATA_4_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("PGM_DATA4")
+            .field("pgm_data_4", &self.pgm_data_4())
+            .finish()
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - The content of the 4th 32-bit data to be programmed."]
+    #[inline(always)]
+    pub fn pgm_data_4(&mut self) -> PGM_DATA_4_W<PGM_DATA4_SPEC> {
+        PGM_DATA_4_W::new(self, 0)
+    }
+}
+#[doc = "Register 4 that stores data to be programmed.\n\nYou can [`read`](crate::Reg::read) this register and get [`pgm_data4::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pgm_data4::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct PGM_DATA4_SPEC;
+impl crate::RegisterSpec for PGM_DATA4_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`pgm_data4::R`](R) reader structure"]
+impl crate::Readable for PGM_DATA4_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`pgm_data4::W`](W) writer structure"]
+impl crate::Writable for PGM_DATA4_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets PGM_DATA4 to value 0"]
+impl crate::Resettable for PGM_DATA4_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/pgm_data5.rs

@@ -0,0 +1,47 @@
+#[doc = "Register `PGM_DATA5` reader"]
+pub type R = crate::R<PGM_DATA5_SPEC>;
+#[doc = "Register `PGM_DATA5` writer"]
+pub type W = crate::W<PGM_DATA5_SPEC>;
+#[doc = "Field `PGM_DATA_5` reader - The content of the 5th 32-bit data to be programmed."]
+pub type PGM_DATA_5_R = crate::FieldReader<u32>;
+#[doc = "Field `PGM_DATA_5` writer - The content of the 5th 32-bit data to be programmed."]
+pub type PGM_DATA_5_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
+impl R {
+    #[doc = "Bits 0:31 - The content of the 5th 32-bit data to be programmed."]
+    #[inline(always)]
+    pub fn pgm_data_5(&self) -> PGM_DATA_5_R {
+        PGM_DATA_5_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("PGM_DATA5")
+            .field("pgm_data_5", &self.pgm_data_5())
+            .finish()
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - The content of the 5th 32-bit data to be programmed."]
+    #[inline(always)]
+    pub fn pgm_data_5(&mut self) -> PGM_DATA_5_W<PGM_DATA5_SPEC> {
+        PGM_DATA_5_W::new(self, 0)
+    }
+}
+#[doc = "Register 5 that stores data to be programmed.\n\nYou can [`read`](crate::Reg::read) this register and get [`pgm_data5::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pgm_data5::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct PGM_DATA5_SPEC;
+impl crate::RegisterSpec for PGM_DATA5_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`pgm_data5::R`](R) reader structure"]
+impl crate::Readable for PGM_DATA5_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`pgm_data5::W`](W) writer structure"]
+impl crate::Writable for PGM_DATA5_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets PGM_DATA5 to value 0"]
+impl crate::Resettable for PGM_DATA5_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/pgm_data6.rs

@@ -0,0 +1,47 @@
+#[doc = "Register `PGM_DATA6` reader"]
+pub type R = crate::R<PGM_DATA6_SPEC>;
+#[doc = "Register `PGM_DATA6` writer"]
+pub type W = crate::W<PGM_DATA6_SPEC>;
+#[doc = "Field `PGM_DATA_6` reader - The content of the 6th 32-bit data to be programmed."]
+pub type PGM_DATA_6_R = crate::FieldReader<u32>;
+#[doc = "Field `PGM_DATA_6` writer - The content of the 6th 32-bit data to be programmed."]
+pub type PGM_DATA_6_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
+impl R {
+    #[doc = "Bits 0:31 - The content of the 6th 32-bit data to be programmed."]
+    #[inline(always)]
+    pub fn pgm_data_6(&self) -> PGM_DATA_6_R {
+        PGM_DATA_6_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("PGM_DATA6")
+            .field("pgm_data_6", &self.pgm_data_6())
+            .finish()
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - The content of the 6th 32-bit data to be programmed."]
+    #[inline(always)]
+    pub fn pgm_data_6(&mut self) -> PGM_DATA_6_W<PGM_DATA6_SPEC> {
+        PGM_DATA_6_W::new(self, 0)
+    }
+}
+#[doc = "Register 6 that stores data to be programmed.\n\nYou can [`read`](crate::Reg::read) this register and get [`pgm_data6::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pgm_data6::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct PGM_DATA6_SPEC;
+impl crate::RegisterSpec for PGM_DATA6_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`pgm_data6::R`](R) reader structure"]
+impl crate::Readable for PGM_DATA6_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`pgm_data6::W`](W) writer structure"]
+impl crate::Writable for PGM_DATA6_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets PGM_DATA6 to value 0"]
+impl crate::Resettable for PGM_DATA6_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/pgm_data7.rs

@@ -0,0 +1,47 @@
+#[doc = "Register `PGM_DATA7` reader"]
+pub type R = crate::R<PGM_DATA7_SPEC>;
+#[doc = "Register `PGM_DATA7` writer"]
+pub type W = crate::W<PGM_DATA7_SPEC>;
+#[doc = "Field `PGM_DATA_7` reader - The content of the 7th 32-bit data to be programmed."]
+pub type PGM_DATA_7_R = crate::FieldReader<u32>;
+#[doc = "Field `PGM_DATA_7` writer - The content of the 7th 32-bit data to be programmed."]
+pub type PGM_DATA_7_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
+impl R {
+    #[doc = "Bits 0:31 - The content of the 7th 32-bit data to be programmed."]
+    #[inline(always)]
+    pub fn pgm_data_7(&self) -> PGM_DATA_7_R {
+        PGM_DATA_7_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("PGM_DATA7")
+            .field("pgm_data_7", &self.pgm_data_7())
+            .finish()
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - The content of the 7th 32-bit data to be programmed."]
+    #[inline(always)]
+    pub fn pgm_data_7(&mut self) -> PGM_DATA_7_W<PGM_DATA7_SPEC> {
+        PGM_DATA_7_W::new(self, 0)
+    }
+}
+#[doc = "Register 7 that stores data to be programmed.\n\nYou can [`read`](crate::Reg::read) this register and get [`pgm_data7::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pgm_data7::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct PGM_DATA7_SPEC;
+impl crate::RegisterSpec for PGM_DATA7_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`pgm_data7::R`](R) reader structure"]
+impl crate::Readable for PGM_DATA7_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`pgm_data7::W`](W) writer structure"]
+impl crate::Writable for PGM_DATA7_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets PGM_DATA7 to value 0"]
+impl crate::Resettable for PGM_DATA7_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key0_data0.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY0_DATA0` reader"]
+pub type R = crate::R<RD_KEY0_DATA0_SPEC>;
+#[doc = "Field `KEY0_DATA0` reader - Stores the zeroth 32 bits of KEY0."]
+pub type KEY0_DATA0_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the zeroth 32 bits of KEY0."]
+    #[inline(always)]
+    pub fn key0_data0(&self) -> KEY0_DATA0_R {
+        KEY0_DATA0_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY0_DATA0")
+            .field("key0_data0", &self.key0_data0())
+            .finish()
+    }
+}
+#[doc = "Register 0 of BLOCK4 (KEY0).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key0_data0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY0_DATA0_SPEC;
+impl crate::RegisterSpec for RD_KEY0_DATA0_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key0_data0::R`](R) reader structure"]
+impl crate::Readable for RD_KEY0_DATA0_SPEC {}
+#[doc = "`reset()` method sets RD_KEY0_DATA0 to value 0"]
+impl crate::Resettable for RD_KEY0_DATA0_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key0_data1.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY0_DATA1` reader"]
+pub type R = crate::R<RD_KEY0_DATA1_SPEC>;
+#[doc = "Field `KEY0_DATA1` reader - Stores the first 32 bits of KEY0."]
+pub type KEY0_DATA1_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the first 32 bits of KEY0."]
+    #[inline(always)]
+    pub fn key0_data1(&self) -> KEY0_DATA1_R {
+        KEY0_DATA1_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY0_DATA1")
+            .field("key0_data1", &self.key0_data1())
+            .finish()
+    }
+}
+#[doc = "Register 1 of BLOCK4 (KEY0).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key0_data1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY0_DATA1_SPEC;
+impl crate::RegisterSpec for RD_KEY0_DATA1_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key0_data1::R`](R) reader structure"]
+impl crate::Readable for RD_KEY0_DATA1_SPEC {}
+#[doc = "`reset()` method sets RD_KEY0_DATA1 to value 0"]
+impl crate::Resettable for RD_KEY0_DATA1_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key0_data2.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY0_DATA2` reader"]
+pub type R = crate::R<RD_KEY0_DATA2_SPEC>;
+#[doc = "Field `KEY0_DATA2` reader - Stores the second 32 bits of KEY0."]
+pub type KEY0_DATA2_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the second 32 bits of KEY0."]
+    #[inline(always)]
+    pub fn key0_data2(&self) -> KEY0_DATA2_R {
+        KEY0_DATA2_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY0_DATA2")
+            .field("key0_data2", &self.key0_data2())
+            .finish()
+    }
+}
+#[doc = "Register 2 of BLOCK4 (KEY0).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key0_data2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY0_DATA2_SPEC;
+impl crate::RegisterSpec for RD_KEY0_DATA2_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key0_data2::R`](R) reader structure"]
+impl crate::Readable for RD_KEY0_DATA2_SPEC {}
+#[doc = "`reset()` method sets RD_KEY0_DATA2 to value 0"]
+impl crate::Resettable for RD_KEY0_DATA2_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key0_data3.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY0_DATA3` reader"]
+pub type R = crate::R<RD_KEY0_DATA3_SPEC>;
+#[doc = "Field `KEY0_DATA3` reader - Stores the third 32 bits of KEY0."]
+pub type KEY0_DATA3_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the third 32 bits of KEY0."]
+    #[inline(always)]
+    pub fn key0_data3(&self) -> KEY0_DATA3_R {
+        KEY0_DATA3_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY0_DATA3")
+            .field("key0_data3", &self.key0_data3())
+            .finish()
+    }
+}
+#[doc = "Register 3 of BLOCK4 (KEY0).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key0_data3::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY0_DATA3_SPEC;
+impl crate::RegisterSpec for RD_KEY0_DATA3_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key0_data3::R`](R) reader structure"]
+impl crate::Readable for RD_KEY0_DATA3_SPEC {}
+#[doc = "`reset()` method sets RD_KEY0_DATA3 to value 0"]
+impl crate::Resettable for RD_KEY0_DATA3_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key0_data4.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY0_DATA4` reader"]
+pub type R = crate::R<RD_KEY0_DATA4_SPEC>;
+#[doc = "Field `KEY0_DATA4` reader - Stores the fourth 32 bits of KEY0."]
+pub type KEY0_DATA4_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the fourth 32 bits of KEY0."]
+    #[inline(always)]
+    pub fn key0_data4(&self) -> KEY0_DATA4_R {
+        KEY0_DATA4_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY0_DATA4")
+            .field("key0_data4", &self.key0_data4())
+            .finish()
+    }
+}
+#[doc = "Register 4 of BLOCK4 (KEY0).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key0_data4::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY0_DATA4_SPEC;
+impl crate::RegisterSpec for RD_KEY0_DATA4_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key0_data4::R`](R) reader structure"]
+impl crate::Readable for RD_KEY0_DATA4_SPEC {}
+#[doc = "`reset()` method sets RD_KEY0_DATA4 to value 0"]
+impl crate::Resettable for RD_KEY0_DATA4_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key0_data5.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY0_DATA5` reader"]
+pub type R = crate::R<RD_KEY0_DATA5_SPEC>;
+#[doc = "Field `KEY0_DATA5` reader - Stores the fifth 32 bits of KEY0."]
+pub type KEY0_DATA5_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the fifth 32 bits of KEY0."]
+    #[inline(always)]
+    pub fn key0_data5(&self) -> KEY0_DATA5_R {
+        KEY0_DATA5_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY0_DATA5")
+            .field("key0_data5", &self.key0_data5())
+            .finish()
+    }
+}
+#[doc = "Register 5 of BLOCK4 (KEY0).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key0_data5::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY0_DATA5_SPEC;
+impl crate::RegisterSpec for RD_KEY0_DATA5_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key0_data5::R`](R) reader structure"]
+impl crate::Readable for RD_KEY0_DATA5_SPEC {}
+#[doc = "`reset()` method sets RD_KEY0_DATA5 to value 0"]
+impl crate::Resettable for RD_KEY0_DATA5_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key0_data6.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY0_DATA6` reader"]
+pub type R = crate::R<RD_KEY0_DATA6_SPEC>;
+#[doc = "Field `KEY0_DATA6` reader - Stores the sixth 32 bits of KEY0."]
+pub type KEY0_DATA6_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the sixth 32 bits of KEY0."]
+    #[inline(always)]
+    pub fn key0_data6(&self) -> KEY0_DATA6_R {
+        KEY0_DATA6_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY0_DATA6")
+            .field("key0_data6", &self.key0_data6())
+            .finish()
+    }
+}
+#[doc = "Register 6 of BLOCK4 (KEY0).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key0_data6::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY0_DATA6_SPEC;
+impl crate::RegisterSpec for RD_KEY0_DATA6_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key0_data6::R`](R) reader structure"]
+impl crate::Readable for RD_KEY0_DATA6_SPEC {}
+#[doc = "`reset()` method sets RD_KEY0_DATA6 to value 0"]
+impl crate::Resettable for RD_KEY0_DATA6_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key0_data7.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY0_DATA7` reader"]
+pub type R = crate::R<RD_KEY0_DATA7_SPEC>;
+#[doc = "Field `KEY0_DATA7` reader - Stores the seventh 32 bits of KEY0."]
+pub type KEY0_DATA7_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the seventh 32 bits of KEY0."]
+    #[inline(always)]
+    pub fn key0_data7(&self) -> KEY0_DATA7_R {
+        KEY0_DATA7_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY0_DATA7")
+            .field("key0_data7", &self.key0_data7())
+            .finish()
+    }
+}
+#[doc = "Register 7 of BLOCK4 (KEY0).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key0_data7::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY0_DATA7_SPEC;
+impl crate::RegisterSpec for RD_KEY0_DATA7_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key0_data7::R`](R) reader structure"]
+impl crate::Readable for RD_KEY0_DATA7_SPEC {}
+#[doc = "`reset()` method sets RD_KEY0_DATA7 to value 0"]
+impl crate::Resettable for RD_KEY0_DATA7_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key1_data0.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY1_DATA0` reader"]
+pub type R = crate::R<RD_KEY1_DATA0_SPEC>;
+#[doc = "Field `KEY1_DATA0` reader - Stores the zeroth 32 bits of KEY1."]
+pub type KEY1_DATA0_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the zeroth 32 bits of KEY1."]
+    #[inline(always)]
+    pub fn key1_data0(&self) -> KEY1_DATA0_R {
+        KEY1_DATA0_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY1_DATA0")
+            .field("key1_data0", &self.key1_data0())
+            .finish()
+    }
+}
+#[doc = "Register 0 of BLOCK5 (KEY1).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key1_data0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY1_DATA0_SPEC;
+impl crate::RegisterSpec for RD_KEY1_DATA0_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key1_data0::R`](R) reader structure"]
+impl crate::Readable for RD_KEY1_DATA0_SPEC {}
+#[doc = "`reset()` method sets RD_KEY1_DATA0 to value 0"]
+impl crate::Resettable for RD_KEY1_DATA0_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key1_data1.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY1_DATA1` reader"]
+pub type R = crate::R<RD_KEY1_DATA1_SPEC>;
+#[doc = "Field `KEY1_DATA1` reader - Stores the first 32 bits of KEY1."]
+pub type KEY1_DATA1_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the first 32 bits of KEY1."]
+    #[inline(always)]
+    pub fn key1_data1(&self) -> KEY1_DATA1_R {
+        KEY1_DATA1_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY1_DATA1")
+            .field("key1_data1", &self.key1_data1())
+            .finish()
+    }
+}
+#[doc = "Register 1 of BLOCK5 (KEY1).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key1_data1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY1_DATA1_SPEC;
+impl crate::RegisterSpec for RD_KEY1_DATA1_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key1_data1::R`](R) reader structure"]
+impl crate::Readable for RD_KEY1_DATA1_SPEC {}
+#[doc = "`reset()` method sets RD_KEY1_DATA1 to value 0"]
+impl crate::Resettable for RD_KEY1_DATA1_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key1_data2.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY1_DATA2` reader"]
+pub type R = crate::R<RD_KEY1_DATA2_SPEC>;
+#[doc = "Field `KEY1_DATA2` reader - Stores the second 32 bits of KEY1."]
+pub type KEY1_DATA2_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the second 32 bits of KEY1."]
+    #[inline(always)]
+    pub fn key1_data2(&self) -> KEY1_DATA2_R {
+        KEY1_DATA2_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY1_DATA2")
+            .field("key1_data2", &self.key1_data2())
+            .finish()
+    }
+}
+#[doc = "Register 2 of BLOCK5 (KEY1).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key1_data2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY1_DATA2_SPEC;
+impl crate::RegisterSpec for RD_KEY1_DATA2_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key1_data2::R`](R) reader structure"]
+impl crate::Readable for RD_KEY1_DATA2_SPEC {}
+#[doc = "`reset()` method sets RD_KEY1_DATA2 to value 0"]
+impl crate::Resettable for RD_KEY1_DATA2_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key1_data3.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY1_DATA3` reader"]
+pub type R = crate::R<RD_KEY1_DATA3_SPEC>;
+#[doc = "Field `KEY1_DATA3` reader - Stores the third 32 bits of KEY1."]
+pub type KEY1_DATA3_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the third 32 bits of KEY1."]
+    #[inline(always)]
+    pub fn key1_data3(&self) -> KEY1_DATA3_R {
+        KEY1_DATA3_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY1_DATA3")
+            .field("key1_data3", &self.key1_data3())
+            .finish()
+    }
+}
+#[doc = "Register 3 of BLOCK5 (KEY1).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key1_data3::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY1_DATA3_SPEC;
+impl crate::RegisterSpec for RD_KEY1_DATA3_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key1_data3::R`](R) reader structure"]
+impl crate::Readable for RD_KEY1_DATA3_SPEC {}
+#[doc = "`reset()` method sets RD_KEY1_DATA3 to value 0"]
+impl crate::Resettable for RD_KEY1_DATA3_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key1_data4.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY1_DATA4` reader"]
+pub type R = crate::R<RD_KEY1_DATA4_SPEC>;
+#[doc = "Field `KEY1_DATA4` reader - Stores the fourth 32 bits of KEY1."]
+pub type KEY1_DATA4_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the fourth 32 bits of KEY1."]
+    #[inline(always)]
+    pub fn key1_data4(&self) -> KEY1_DATA4_R {
+        KEY1_DATA4_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY1_DATA4")
+            .field("key1_data4", &self.key1_data4())
+            .finish()
+    }
+}
+#[doc = "Register 4 of BLOCK5 (KEY1).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key1_data4::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY1_DATA4_SPEC;
+impl crate::RegisterSpec for RD_KEY1_DATA4_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key1_data4::R`](R) reader structure"]
+impl crate::Readable for RD_KEY1_DATA4_SPEC {}
+#[doc = "`reset()` method sets RD_KEY1_DATA4 to value 0"]
+impl crate::Resettable for RD_KEY1_DATA4_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key1_data5.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY1_DATA5` reader"]
+pub type R = crate::R<RD_KEY1_DATA5_SPEC>;
+#[doc = "Field `KEY1_DATA5` reader - Stores the fifth 32 bits of KEY1."]
+pub type KEY1_DATA5_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the fifth 32 bits of KEY1."]
+    #[inline(always)]
+    pub fn key1_data5(&self) -> KEY1_DATA5_R {
+        KEY1_DATA5_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY1_DATA5")
+            .field("key1_data5", &self.key1_data5())
+            .finish()
+    }
+}
+#[doc = "Register 5 of BLOCK5 (KEY1).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key1_data5::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY1_DATA5_SPEC;
+impl crate::RegisterSpec for RD_KEY1_DATA5_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key1_data5::R`](R) reader structure"]
+impl crate::Readable for RD_KEY1_DATA5_SPEC {}
+#[doc = "`reset()` method sets RD_KEY1_DATA5 to value 0"]
+impl crate::Resettable for RD_KEY1_DATA5_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key1_data6.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY1_DATA6` reader"]
+pub type R = crate::R<RD_KEY1_DATA6_SPEC>;
+#[doc = "Field `KEY1_DATA6` reader - Stores the sixth 32 bits of KEY1."]
+pub type KEY1_DATA6_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the sixth 32 bits of KEY1."]
+    #[inline(always)]
+    pub fn key1_data6(&self) -> KEY1_DATA6_R {
+        KEY1_DATA6_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY1_DATA6")
+            .field("key1_data6", &self.key1_data6())
+            .finish()
+    }
+}
+#[doc = "Register 6 of BLOCK5 (KEY1).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key1_data6::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY1_DATA6_SPEC;
+impl crate::RegisterSpec for RD_KEY1_DATA6_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key1_data6::R`](R) reader structure"]
+impl crate::Readable for RD_KEY1_DATA6_SPEC {}
+#[doc = "`reset()` method sets RD_KEY1_DATA6 to value 0"]
+impl crate::Resettable for RD_KEY1_DATA6_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key1_data7.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY1_DATA7` reader"]
+pub type R = crate::R<RD_KEY1_DATA7_SPEC>;
+#[doc = "Field `KEY1_DATA7` reader - Stores the seventh 32 bits of KEY1."]
+pub type KEY1_DATA7_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the seventh 32 bits of KEY1."]
+    #[inline(always)]
+    pub fn key1_data7(&self) -> KEY1_DATA7_R {
+        KEY1_DATA7_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY1_DATA7")
+            .field("key1_data7", &self.key1_data7())
+            .finish()
+    }
+}
+#[doc = "Register 7 of BLOCK5 (KEY1).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key1_data7::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY1_DATA7_SPEC;
+impl crate::RegisterSpec for RD_KEY1_DATA7_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key1_data7::R`](R) reader structure"]
+impl crate::Readable for RD_KEY1_DATA7_SPEC {}
+#[doc = "`reset()` method sets RD_KEY1_DATA7 to value 0"]
+impl crate::Resettable for RD_KEY1_DATA7_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key2_data0.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY2_DATA0` reader"]
+pub type R = crate::R<RD_KEY2_DATA0_SPEC>;
+#[doc = "Field `KEY2_DATA0` reader - Stores the zeroth 32 bits of KEY2."]
+pub type KEY2_DATA0_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the zeroth 32 bits of KEY2."]
+    #[inline(always)]
+    pub fn key2_data0(&self) -> KEY2_DATA0_R {
+        KEY2_DATA0_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY2_DATA0")
+            .field("key2_data0", &self.key2_data0())
+            .finish()
+    }
+}
+#[doc = "Register 0 of BLOCK6 (KEY2).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key2_data0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY2_DATA0_SPEC;
+impl crate::RegisterSpec for RD_KEY2_DATA0_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key2_data0::R`](R) reader structure"]
+impl crate::Readable for RD_KEY2_DATA0_SPEC {}
+#[doc = "`reset()` method sets RD_KEY2_DATA0 to value 0"]
+impl crate::Resettable for RD_KEY2_DATA0_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key2_data1.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY2_DATA1` reader"]
+pub type R = crate::R<RD_KEY2_DATA1_SPEC>;
+#[doc = "Field `KEY2_DATA1` reader - Stores the first 32 bits of KEY2."]
+pub type KEY2_DATA1_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the first 32 bits of KEY2."]
+    #[inline(always)]
+    pub fn key2_data1(&self) -> KEY2_DATA1_R {
+        KEY2_DATA1_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY2_DATA1")
+            .field("key2_data1", &self.key2_data1())
+            .finish()
+    }
+}
+#[doc = "Register 1 of BLOCK6 (KEY2).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key2_data1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY2_DATA1_SPEC;
+impl crate::RegisterSpec for RD_KEY2_DATA1_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key2_data1::R`](R) reader structure"]
+impl crate::Readable for RD_KEY2_DATA1_SPEC {}
+#[doc = "`reset()` method sets RD_KEY2_DATA1 to value 0"]
+impl crate::Resettable for RD_KEY2_DATA1_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key2_data2.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY2_DATA2` reader"]
+pub type R = crate::R<RD_KEY2_DATA2_SPEC>;
+#[doc = "Field `KEY2_DATA2` reader - Stores the second 32 bits of KEY2."]
+pub type KEY2_DATA2_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the second 32 bits of KEY2."]
+    #[inline(always)]
+    pub fn key2_data2(&self) -> KEY2_DATA2_R {
+        KEY2_DATA2_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY2_DATA2")
+            .field("key2_data2", &self.key2_data2())
+            .finish()
+    }
+}
+#[doc = "Register 2 of BLOCK6 (KEY2).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key2_data2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY2_DATA2_SPEC;
+impl crate::RegisterSpec for RD_KEY2_DATA2_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key2_data2::R`](R) reader structure"]
+impl crate::Readable for RD_KEY2_DATA2_SPEC {}
+#[doc = "`reset()` method sets RD_KEY2_DATA2 to value 0"]
+impl crate::Resettable for RD_KEY2_DATA2_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key2_data3.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY2_DATA3` reader"]
+pub type R = crate::R<RD_KEY2_DATA3_SPEC>;
+#[doc = "Field `KEY2_DATA3` reader - Stores the third 32 bits of KEY2."]
+pub type KEY2_DATA3_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the third 32 bits of KEY2."]
+    #[inline(always)]
+    pub fn key2_data3(&self) -> KEY2_DATA3_R {
+        KEY2_DATA3_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY2_DATA3")
+            .field("key2_data3", &self.key2_data3())
+            .finish()
+    }
+}
+#[doc = "Register 3 of BLOCK6 (KEY2).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key2_data3::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY2_DATA3_SPEC;
+impl crate::RegisterSpec for RD_KEY2_DATA3_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key2_data3::R`](R) reader structure"]
+impl crate::Readable for RD_KEY2_DATA3_SPEC {}
+#[doc = "`reset()` method sets RD_KEY2_DATA3 to value 0"]
+impl crate::Resettable for RD_KEY2_DATA3_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key2_data4.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY2_DATA4` reader"]
+pub type R = crate::R<RD_KEY2_DATA4_SPEC>;
+#[doc = "Field `KEY2_DATA4` reader - Stores the fourth 32 bits of KEY2."]
+pub type KEY2_DATA4_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the fourth 32 bits of KEY2."]
+    #[inline(always)]
+    pub fn key2_data4(&self) -> KEY2_DATA4_R {
+        KEY2_DATA4_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY2_DATA4")
+            .field("key2_data4", &self.key2_data4())
+            .finish()
+    }
+}
+#[doc = "Register 4 of BLOCK6 (KEY2).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key2_data4::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY2_DATA4_SPEC;
+impl crate::RegisterSpec for RD_KEY2_DATA4_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key2_data4::R`](R) reader structure"]
+impl crate::Readable for RD_KEY2_DATA4_SPEC {}
+#[doc = "`reset()` method sets RD_KEY2_DATA4 to value 0"]
+impl crate::Resettable for RD_KEY2_DATA4_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key2_data5.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY2_DATA5` reader"]
+pub type R = crate::R<RD_KEY2_DATA5_SPEC>;
+#[doc = "Field `KEY2_DATA5` reader - Stores the fifth 32 bits of KEY2."]
+pub type KEY2_DATA5_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the fifth 32 bits of KEY2."]
+    #[inline(always)]
+    pub fn key2_data5(&self) -> KEY2_DATA5_R {
+        KEY2_DATA5_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY2_DATA5")
+            .field("key2_data5", &self.key2_data5())
+            .finish()
+    }
+}
+#[doc = "Register 5 of BLOCK6 (KEY2).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key2_data5::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY2_DATA5_SPEC;
+impl crate::RegisterSpec for RD_KEY2_DATA5_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key2_data5::R`](R) reader structure"]
+impl crate::Readable for RD_KEY2_DATA5_SPEC {}
+#[doc = "`reset()` method sets RD_KEY2_DATA5 to value 0"]
+impl crate::Resettable for RD_KEY2_DATA5_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key2_data6.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY2_DATA6` reader"]
+pub type R = crate::R<RD_KEY2_DATA6_SPEC>;
+#[doc = "Field `KEY2_DATA6` reader - Stores the sixth 32 bits of KEY2."]
+pub type KEY2_DATA6_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the sixth 32 bits of KEY2."]
+    #[inline(always)]
+    pub fn key2_data6(&self) -> KEY2_DATA6_R {
+        KEY2_DATA6_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY2_DATA6")
+            .field("key2_data6", &self.key2_data6())
+            .finish()
+    }
+}
+#[doc = "Register 6 of BLOCK6 (KEY2).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key2_data6::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY2_DATA6_SPEC;
+impl crate::RegisterSpec for RD_KEY2_DATA6_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key2_data6::R`](R) reader structure"]
+impl crate::Readable for RD_KEY2_DATA6_SPEC {}
+#[doc = "`reset()` method sets RD_KEY2_DATA6 to value 0"]
+impl crate::Resettable for RD_KEY2_DATA6_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key2_data7.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY2_DATA7` reader"]
+pub type R = crate::R<RD_KEY2_DATA7_SPEC>;
+#[doc = "Field `KEY2_DATA7` reader - Stores the seventh 32 bits of KEY2."]
+pub type KEY2_DATA7_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the seventh 32 bits of KEY2."]
+    #[inline(always)]
+    pub fn key2_data7(&self) -> KEY2_DATA7_R {
+        KEY2_DATA7_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY2_DATA7")
+            .field("key2_data7", &self.key2_data7())
+            .finish()
+    }
+}
+#[doc = "Register 7 of BLOCK6 (KEY2).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key2_data7::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY2_DATA7_SPEC;
+impl crate::RegisterSpec for RD_KEY2_DATA7_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key2_data7::R`](R) reader structure"]
+impl crate::Readable for RD_KEY2_DATA7_SPEC {}
+#[doc = "`reset()` method sets RD_KEY2_DATA7 to value 0"]
+impl crate::Resettable for RD_KEY2_DATA7_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key3_data0.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY3_DATA0` reader"]
+pub type R = crate::R<RD_KEY3_DATA0_SPEC>;
+#[doc = "Field `KEY3_DATA0` reader - Stores the zeroth 32 bits of KEY3."]
+pub type KEY3_DATA0_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the zeroth 32 bits of KEY3."]
+    #[inline(always)]
+    pub fn key3_data0(&self) -> KEY3_DATA0_R {
+        KEY3_DATA0_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY3_DATA0")
+            .field("key3_data0", &self.key3_data0())
+            .finish()
+    }
+}
+#[doc = "Register 0 of BLOCK7 (KEY3).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key3_data0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY3_DATA0_SPEC;
+impl crate::RegisterSpec for RD_KEY3_DATA0_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key3_data0::R`](R) reader structure"]
+impl crate::Readable for RD_KEY3_DATA0_SPEC {}
+#[doc = "`reset()` method sets RD_KEY3_DATA0 to value 0"]
+impl crate::Resettable for RD_KEY3_DATA0_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key3_data1.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY3_DATA1` reader"]
+pub type R = crate::R<RD_KEY3_DATA1_SPEC>;
+#[doc = "Field `KEY3_DATA1` reader - Stores the first 32 bits of KEY3."]
+pub type KEY3_DATA1_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the first 32 bits of KEY3."]
+    #[inline(always)]
+    pub fn key3_data1(&self) -> KEY3_DATA1_R {
+        KEY3_DATA1_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY3_DATA1")
+            .field("key3_data1", &self.key3_data1())
+            .finish()
+    }
+}
+#[doc = "Register 1 of BLOCK7 (KEY3).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key3_data1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY3_DATA1_SPEC;
+impl crate::RegisterSpec for RD_KEY3_DATA1_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key3_data1::R`](R) reader structure"]
+impl crate::Readable for RD_KEY3_DATA1_SPEC {}
+#[doc = "`reset()` method sets RD_KEY3_DATA1 to value 0"]
+impl crate::Resettable for RD_KEY3_DATA1_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key3_data2.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY3_DATA2` reader"]
+pub type R = crate::R<RD_KEY3_DATA2_SPEC>;
+#[doc = "Field `KEY3_DATA2` reader - Stores the second 32 bits of KEY3."]
+pub type KEY3_DATA2_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the second 32 bits of KEY3."]
+    #[inline(always)]
+    pub fn key3_data2(&self) -> KEY3_DATA2_R {
+        KEY3_DATA2_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY3_DATA2")
+            .field("key3_data2", &self.key3_data2())
+            .finish()
+    }
+}
+#[doc = "Register 2 of BLOCK7 (KEY3).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key3_data2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY3_DATA2_SPEC;
+impl crate::RegisterSpec for RD_KEY3_DATA2_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key3_data2::R`](R) reader structure"]
+impl crate::Readable for RD_KEY3_DATA2_SPEC {}
+#[doc = "`reset()` method sets RD_KEY3_DATA2 to value 0"]
+impl crate::Resettable for RD_KEY3_DATA2_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key3_data3.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY3_DATA3` reader"]
+pub type R = crate::R<RD_KEY3_DATA3_SPEC>;
+#[doc = "Field `KEY3_DATA3` reader - Stores the third 32 bits of KEY3."]
+pub type KEY3_DATA3_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the third 32 bits of KEY3."]
+    #[inline(always)]
+    pub fn key3_data3(&self) -> KEY3_DATA3_R {
+        KEY3_DATA3_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY3_DATA3")
+            .field("key3_data3", &self.key3_data3())
+            .finish()
+    }
+}
+#[doc = "Register 3 of BLOCK7 (KEY3).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key3_data3::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY3_DATA3_SPEC;
+impl crate::RegisterSpec for RD_KEY3_DATA3_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key3_data3::R`](R) reader structure"]
+impl crate::Readable for RD_KEY3_DATA3_SPEC {}
+#[doc = "`reset()` method sets RD_KEY3_DATA3 to value 0"]
+impl crate::Resettable for RD_KEY3_DATA3_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key3_data4.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY3_DATA4` reader"]
+pub type R = crate::R<RD_KEY3_DATA4_SPEC>;
+#[doc = "Field `KEY3_DATA4` reader - Stores the fourth 32 bits of KEY3."]
+pub type KEY3_DATA4_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the fourth 32 bits of KEY3."]
+    #[inline(always)]
+    pub fn key3_data4(&self) -> KEY3_DATA4_R {
+        KEY3_DATA4_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY3_DATA4")
+            .field("key3_data4", &self.key3_data4())
+            .finish()
+    }
+}
+#[doc = "Register 4 of BLOCK7 (KEY3).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key3_data4::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY3_DATA4_SPEC;
+impl crate::RegisterSpec for RD_KEY3_DATA4_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key3_data4::R`](R) reader structure"]
+impl crate::Readable for RD_KEY3_DATA4_SPEC {}
+#[doc = "`reset()` method sets RD_KEY3_DATA4 to value 0"]
+impl crate::Resettable for RD_KEY3_DATA4_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key3_data5.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY3_DATA5` reader"]
+pub type R = crate::R<RD_KEY3_DATA5_SPEC>;
+#[doc = "Field `KEY3_DATA5` reader - Stores the fifth 32 bits of KEY3."]
+pub type KEY3_DATA5_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the fifth 32 bits of KEY3."]
+    #[inline(always)]
+    pub fn key3_data5(&self) -> KEY3_DATA5_R {
+        KEY3_DATA5_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY3_DATA5")
+            .field("key3_data5", &self.key3_data5())
+            .finish()
+    }
+}
+#[doc = "Register 5 of BLOCK7 (KEY3).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key3_data5::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY3_DATA5_SPEC;
+impl crate::RegisterSpec for RD_KEY3_DATA5_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key3_data5::R`](R) reader structure"]
+impl crate::Readable for RD_KEY3_DATA5_SPEC {}
+#[doc = "`reset()` method sets RD_KEY3_DATA5 to value 0"]
+impl crate::Resettable for RD_KEY3_DATA5_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key3_data6.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY3_DATA6` reader"]
+pub type R = crate::R<RD_KEY3_DATA6_SPEC>;
+#[doc = "Field `KEY3_DATA6` reader - Stores the sixth 32 bits of KEY3."]
+pub type KEY3_DATA6_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the sixth 32 bits of KEY3."]
+    #[inline(always)]
+    pub fn key3_data6(&self) -> KEY3_DATA6_R {
+        KEY3_DATA6_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY3_DATA6")
+            .field("key3_data6", &self.key3_data6())
+            .finish()
+    }
+}
+#[doc = "Register 6 of BLOCK7 (KEY3).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key3_data6::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY3_DATA6_SPEC;
+impl crate::RegisterSpec for RD_KEY3_DATA6_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key3_data6::R`](R) reader structure"]
+impl crate::Readable for RD_KEY3_DATA6_SPEC {}
+#[doc = "`reset()` method sets RD_KEY3_DATA6 to value 0"]
+impl crate::Resettable for RD_KEY3_DATA6_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key3_data7.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY3_DATA7` reader"]
+pub type R = crate::R<RD_KEY3_DATA7_SPEC>;
+#[doc = "Field `KEY3_DATA7` reader - Stores the seventh 32 bits of KEY3."]
+pub type KEY3_DATA7_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the seventh 32 bits of KEY3."]
+    #[inline(always)]
+    pub fn key3_data7(&self) -> KEY3_DATA7_R {
+        KEY3_DATA7_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY3_DATA7")
+            .field("key3_data7", &self.key3_data7())
+            .finish()
+    }
+}
+#[doc = "Register 7 of BLOCK7 (KEY3).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key3_data7::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY3_DATA7_SPEC;
+impl crate::RegisterSpec for RD_KEY3_DATA7_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key3_data7::R`](R) reader structure"]
+impl crate::Readable for RD_KEY3_DATA7_SPEC {}
+#[doc = "`reset()` method sets RD_KEY3_DATA7 to value 0"]
+impl crate::Resettable for RD_KEY3_DATA7_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key4_data0.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY4_DATA0` reader"]
+pub type R = crate::R<RD_KEY4_DATA0_SPEC>;
+#[doc = "Field `KEY4_DATA0` reader - Stores the zeroth 32 bits of KEY4."]
+pub type KEY4_DATA0_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the zeroth 32 bits of KEY4."]
+    #[inline(always)]
+    pub fn key4_data0(&self) -> KEY4_DATA0_R {
+        KEY4_DATA0_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY4_DATA0")
+            .field("key4_data0", &self.key4_data0())
+            .finish()
+    }
+}
+#[doc = "Register 0 of BLOCK8 (KEY4).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key4_data0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY4_DATA0_SPEC;
+impl crate::RegisterSpec for RD_KEY4_DATA0_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key4_data0::R`](R) reader structure"]
+impl crate::Readable for RD_KEY4_DATA0_SPEC {}
+#[doc = "`reset()` method sets RD_KEY4_DATA0 to value 0"]
+impl crate::Resettable for RD_KEY4_DATA0_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key4_data1.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY4_DATA1` reader"]
+pub type R = crate::R<RD_KEY4_DATA1_SPEC>;
+#[doc = "Field `KEY4_DATA1` reader - Stores the first 32 bits of KEY4."]
+pub type KEY4_DATA1_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the first 32 bits of KEY4."]
+    #[inline(always)]
+    pub fn key4_data1(&self) -> KEY4_DATA1_R {
+        KEY4_DATA1_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY4_DATA1")
+            .field("key4_data1", &self.key4_data1())
+            .finish()
+    }
+}
+#[doc = "Register 1 of BLOCK8 (KEY4).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key4_data1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY4_DATA1_SPEC;
+impl crate::RegisterSpec for RD_KEY4_DATA1_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key4_data1::R`](R) reader structure"]
+impl crate::Readable for RD_KEY4_DATA1_SPEC {}
+#[doc = "`reset()` method sets RD_KEY4_DATA1 to value 0"]
+impl crate::Resettable for RD_KEY4_DATA1_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key4_data2.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY4_DATA2` reader"]
+pub type R = crate::R<RD_KEY4_DATA2_SPEC>;
+#[doc = "Field `KEY4_DATA2` reader - Stores the second 32 bits of KEY4."]
+pub type KEY4_DATA2_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the second 32 bits of KEY4."]
+    #[inline(always)]
+    pub fn key4_data2(&self) -> KEY4_DATA2_R {
+        KEY4_DATA2_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY4_DATA2")
+            .field("key4_data2", &self.key4_data2())
+            .finish()
+    }
+}
+#[doc = "Register 2 of BLOCK8 (KEY4).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key4_data2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY4_DATA2_SPEC;
+impl crate::RegisterSpec for RD_KEY4_DATA2_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key4_data2::R`](R) reader structure"]
+impl crate::Readable for RD_KEY4_DATA2_SPEC {}
+#[doc = "`reset()` method sets RD_KEY4_DATA2 to value 0"]
+impl crate::Resettable for RD_KEY4_DATA2_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key4_data3.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY4_DATA3` reader"]
+pub type R = crate::R<RD_KEY4_DATA3_SPEC>;
+#[doc = "Field `KEY4_DATA3` reader - Stores the third 32 bits of KEY4."]
+pub type KEY4_DATA3_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the third 32 bits of KEY4."]
+    #[inline(always)]
+    pub fn key4_data3(&self) -> KEY4_DATA3_R {
+        KEY4_DATA3_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY4_DATA3")
+            .field("key4_data3", &self.key4_data3())
+            .finish()
+    }
+}
+#[doc = "Register 3 of BLOCK8 (KEY4).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key4_data3::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY4_DATA3_SPEC;
+impl crate::RegisterSpec for RD_KEY4_DATA3_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key4_data3::R`](R) reader structure"]
+impl crate::Readable for RD_KEY4_DATA3_SPEC {}
+#[doc = "`reset()` method sets RD_KEY4_DATA3 to value 0"]
+impl crate::Resettable for RD_KEY4_DATA3_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key4_data4.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY4_DATA4` reader"]
+pub type R = crate::R<RD_KEY4_DATA4_SPEC>;
+#[doc = "Field `KEY4_DATA4` reader - Stores the fourth 32 bits of KEY4."]
+pub type KEY4_DATA4_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the fourth 32 bits of KEY4."]
+    #[inline(always)]
+    pub fn key4_data4(&self) -> KEY4_DATA4_R {
+        KEY4_DATA4_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY4_DATA4")
+            .field("key4_data4", &self.key4_data4())
+            .finish()
+    }
+}
+#[doc = "Register 4 of BLOCK8 (KEY4).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key4_data4::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY4_DATA4_SPEC;
+impl crate::RegisterSpec for RD_KEY4_DATA4_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key4_data4::R`](R) reader structure"]
+impl crate::Readable for RD_KEY4_DATA4_SPEC {}
+#[doc = "`reset()` method sets RD_KEY4_DATA4 to value 0"]
+impl crate::Resettable for RD_KEY4_DATA4_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key4_data5.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY4_DATA5` reader"]
+pub type R = crate::R<RD_KEY4_DATA5_SPEC>;
+#[doc = "Field `KEY4_DATA5` reader - Stores the fifth 32 bits of KEY4."]
+pub type KEY4_DATA5_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the fifth 32 bits of KEY4."]
+    #[inline(always)]
+    pub fn key4_data5(&self) -> KEY4_DATA5_R {
+        KEY4_DATA5_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY4_DATA5")
+            .field("key4_data5", &self.key4_data5())
+            .finish()
+    }
+}
+#[doc = "Register 5 of BLOCK8 (KEY4).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key4_data5::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY4_DATA5_SPEC;
+impl crate::RegisterSpec for RD_KEY4_DATA5_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key4_data5::R`](R) reader structure"]
+impl crate::Readable for RD_KEY4_DATA5_SPEC {}
+#[doc = "`reset()` method sets RD_KEY4_DATA5 to value 0"]
+impl crate::Resettable for RD_KEY4_DATA5_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key4_data6.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY4_DATA6` reader"]
+pub type R = crate::R<RD_KEY4_DATA6_SPEC>;
+#[doc = "Field `KEY4_DATA6` reader - Stores the sixth 32 bits of KEY4."]
+pub type KEY4_DATA6_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the sixth 32 bits of KEY4."]
+    #[inline(always)]
+    pub fn key4_data6(&self) -> KEY4_DATA6_R {
+        KEY4_DATA6_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY4_DATA6")
+            .field("key4_data6", &self.key4_data6())
+            .finish()
+    }
+}
+#[doc = "Register 6 of BLOCK8 (KEY4).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key4_data6::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY4_DATA6_SPEC;
+impl crate::RegisterSpec for RD_KEY4_DATA6_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key4_data6::R`](R) reader structure"]
+impl crate::Readable for RD_KEY4_DATA6_SPEC {}
+#[doc = "`reset()` method sets RD_KEY4_DATA6 to value 0"]
+impl crate::Resettable for RD_KEY4_DATA6_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key4_data7.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY4_DATA7` reader"]
+pub type R = crate::R<RD_KEY4_DATA7_SPEC>;
+#[doc = "Field `KEY4_DATA7` reader - Stores the seventh 32 bits of KEY4."]
+pub type KEY4_DATA7_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the seventh 32 bits of KEY4."]
+    #[inline(always)]
+    pub fn key4_data7(&self) -> KEY4_DATA7_R {
+        KEY4_DATA7_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY4_DATA7")
+            .field("key4_data7", &self.key4_data7())
+            .finish()
+    }
+}
+#[doc = "Register 7 of BLOCK8 (KEY4).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key4_data7::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY4_DATA7_SPEC;
+impl crate::RegisterSpec for RD_KEY4_DATA7_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key4_data7::R`](R) reader structure"]
+impl crate::Readable for RD_KEY4_DATA7_SPEC {}
+#[doc = "`reset()` method sets RD_KEY4_DATA7 to value 0"]
+impl crate::Resettable for RD_KEY4_DATA7_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key5_data0.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY5_DATA0` reader"]
+pub type R = crate::R<RD_KEY5_DATA0_SPEC>;
+#[doc = "Field `KEY5_DATA0` reader - Stores the zeroth 32 bits of KEY5."]
+pub type KEY5_DATA0_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the zeroth 32 bits of KEY5."]
+    #[inline(always)]
+    pub fn key5_data0(&self) -> KEY5_DATA0_R {
+        KEY5_DATA0_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY5_DATA0")
+            .field("key5_data0", &self.key5_data0())
+            .finish()
+    }
+}
+#[doc = "Register 0 of BLOCK9 (KEY5).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key5_data0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY5_DATA0_SPEC;
+impl crate::RegisterSpec for RD_KEY5_DATA0_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key5_data0::R`](R) reader structure"]
+impl crate::Readable for RD_KEY5_DATA0_SPEC {}
+#[doc = "`reset()` method sets RD_KEY5_DATA0 to value 0"]
+impl crate::Resettable for RD_KEY5_DATA0_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key5_data1.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY5_DATA1` reader"]
+pub type R = crate::R<RD_KEY5_DATA1_SPEC>;
+#[doc = "Field `KEY5_DATA1` reader - Stores the first 32 bits of KEY5."]
+pub type KEY5_DATA1_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the first 32 bits of KEY5."]
+    #[inline(always)]
+    pub fn key5_data1(&self) -> KEY5_DATA1_R {
+        KEY5_DATA1_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY5_DATA1")
+            .field("key5_data1", &self.key5_data1())
+            .finish()
+    }
+}
+#[doc = "Register 1 of BLOCK9 (KEY5).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key5_data1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY5_DATA1_SPEC;
+impl crate::RegisterSpec for RD_KEY5_DATA1_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key5_data1::R`](R) reader structure"]
+impl crate::Readable for RD_KEY5_DATA1_SPEC {}
+#[doc = "`reset()` method sets RD_KEY5_DATA1 to value 0"]
+impl crate::Resettable for RD_KEY5_DATA1_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key5_data2.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY5_DATA2` reader"]
+pub type R = crate::R<RD_KEY5_DATA2_SPEC>;
+#[doc = "Field `KEY5_DATA2` reader - Stores the second 32 bits of KEY5."]
+pub type KEY5_DATA2_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the second 32 bits of KEY5."]
+    #[inline(always)]
+    pub fn key5_data2(&self) -> KEY5_DATA2_R {
+        KEY5_DATA2_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY5_DATA2")
+            .field("key5_data2", &self.key5_data2())
+            .finish()
+    }
+}
+#[doc = "Register 2 of BLOCK9 (KEY5).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key5_data2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY5_DATA2_SPEC;
+impl crate::RegisterSpec for RD_KEY5_DATA2_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key5_data2::R`](R) reader structure"]
+impl crate::Readable for RD_KEY5_DATA2_SPEC {}
+#[doc = "`reset()` method sets RD_KEY5_DATA2 to value 0"]
+impl crate::Resettable for RD_KEY5_DATA2_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key5_data3.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY5_DATA3` reader"]
+pub type R = crate::R<RD_KEY5_DATA3_SPEC>;
+#[doc = "Field `KEY5_DATA3` reader - Stores the third 32 bits of KEY5."]
+pub type KEY5_DATA3_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the third 32 bits of KEY5."]
+    #[inline(always)]
+    pub fn key5_data3(&self) -> KEY5_DATA3_R {
+        KEY5_DATA3_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY5_DATA3")
+            .field("key5_data3", &self.key5_data3())
+            .finish()
+    }
+}
+#[doc = "Register 3 of BLOCK9 (KEY5).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key5_data3::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY5_DATA3_SPEC;
+impl crate::RegisterSpec for RD_KEY5_DATA3_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key5_data3::R`](R) reader structure"]
+impl crate::Readable for RD_KEY5_DATA3_SPEC {}
+#[doc = "`reset()` method sets RD_KEY5_DATA3 to value 0"]
+impl crate::Resettable for RD_KEY5_DATA3_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key5_data4.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY5_DATA4` reader"]
+pub type R = crate::R<RD_KEY5_DATA4_SPEC>;
+#[doc = "Field `KEY5_DATA4` reader - Stores the fourth 32 bits of KEY5."]
+pub type KEY5_DATA4_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the fourth 32 bits of KEY5."]
+    #[inline(always)]
+    pub fn key5_data4(&self) -> KEY5_DATA4_R {
+        KEY5_DATA4_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY5_DATA4")
+            .field("key5_data4", &self.key5_data4())
+            .finish()
+    }
+}
+#[doc = "Register 4 of BLOCK9 (KEY5).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key5_data4::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY5_DATA4_SPEC;
+impl crate::RegisterSpec for RD_KEY5_DATA4_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key5_data4::R`](R) reader structure"]
+impl crate::Readable for RD_KEY5_DATA4_SPEC {}
+#[doc = "`reset()` method sets RD_KEY5_DATA4 to value 0"]
+impl crate::Resettable for RD_KEY5_DATA4_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key5_data5.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY5_DATA5` reader"]
+pub type R = crate::R<RD_KEY5_DATA5_SPEC>;
+#[doc = "Field `KEY5_DATA5` reader - Stores the fifth 32 bits of KEY5."]
+pub type KEY5_DATA5_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the fifth 32 bits of KEY5."]
+    #[inline(always)]
+    pub fn key5_data5(&self) -> KEY5_DATA5_R {
+        KEY5_DATA5_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY5_DATA5")
+            .field("key5_data5", &self.key5_data5())
+            .finish()
+    }
+}
+#[doc = "Register 5 of BLOCK9 (KEY5).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key5_data5::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY5_DATA5_SPEC;
+impl crate::RegisterSpec for RD_KEY5_DATA5_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key5_data5::R`](R) reader structure"]
+impl crate::Readable for RD_KEY5_DATA5_SPEC {}
+#[doc = "`reset()` method sets RD_KEY5_DATA5 to value 0"]
+impl crate::Resettable for RD_KEY5_DATA5_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key5_data6.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY5_DATA6` reader"]
+pub type R = crate::R<RD_KEY5_DATA6_SPEC>;
+#[doc = "Field `KEY5_DATA6` reader - Stores the sixth 32 bits of KEY5."]
+pub type KEY5_DATA6_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the sixth 32 bits of KEY5."]
+    #[inline(always)]
+    pub fn key5_data6(&self) -> KEY5_DATA6_R {
+        KEY5_DATA6_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY5_DATA6")
+            .field("key5_data6", &self.key5_data6())
+            .finish()
+    }
+}
+#[doc = "Register 6 of BLOCK9 (KEY5).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key5_data6::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY5_DATA6_SPEC;
+impl crate::RegisterSpec for RD_KEY5_DATA6_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key5_data6::R`](R) reader structure"]
+impl crate::Readable for RD_KEY5_DATA6_SPEC {}
+#[doc = "`reset()` method sets RD_KEY5_DATA6 to value 0"]
+impl crate::Resettable for RD_KEY5_DATA6_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_key5_data7.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_KEY5_DATA7` reader"]
+pub type R = crate::R<RD_KEY5_DATA7_SPEC>;
+#[doc = "Field `KEY5_DATA7` reader - Stores the seventh 32 bits of KEY5."]
+pub type KEY5_DATA7_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the seventh 32 bits of KEY5."]
+    #[inline(always)]
+    pub fn key5_data7(&self) -> KEY5_DATA7_R {
+        KEY5_DATA7_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_KEY5_DATA7")
+            .field("key5_data7", &self.key5_data7())
+            .finish()
+    }
+}
+#[doc = "Register 7 of BLOCK9 (KEY5).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_key5_data7::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_KEY5_DATA7_SPEC;
+impl crate::RegisterSpec for RD_KEY5_DATA7_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_key5_data7::R`](R) reader structure"]
+impl crate::Readable for RD_KEY5_DATA7_SPEC {}
+#[doc = "`reset()` method sets RD_KEY5_DATA7 to value 0"]
+impl crate::Resettable for RD_KEY5_DATA7_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_mac_spi_sys_0.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_MAC_SPI_SYS_0` reader"]
+pub type R = crate::R<RD_MAC_SPI_SYS_0_SPEC>;
+#[doc = "Field `MAC_0` reader - Stores the low 32 bits of MAC address."]
+pub type MAC_0_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the low 32 bits of MAC address."]
+    #[inline(always)]
+    pub fn mac_0(&self) -> MAC_0_R {
+        MAC_0_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_MAC_SPI_SYS_0")
+            .field("mac_0", &self.mac_0())
+            .finish()
+    }
+}
+#[doc = "BLOCK1 data register 0.\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_mac_spi_sys_0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_MAC_SPI_SYS_0_SPEC;
+impl crate::RegisterSpec for RD_MAC_SPI_SYS_0_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_mac_spi_sys_0::R`](R) reader structure"]
+impl crate::Readable for RD_MAC_SPI_SYS_0_SPEC {}
+#[doc = "`reset()` method sets RD_MAC_SPI_SYS_0 to value 0"]
+impl crate::Resettable for RD_MAC_SPI_SYS_0_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_mac_spi_sys_1.rs

@@ -0,0 +1,38 @@
+#[doc = "Register `RD_MAC_SPI_SYS_1` reader"]
+pub type R = crate::R<RD_MAC_SPI_SYS_1_SPEC>;
+#[doc = "Field `MAC_1` reader - Stores the high 16 bits of MAC address."]
+pub type MAC_1_R = crate::FieldReader<u16>;
+#[doc = "Field `SPI_PAD_CONF_0` reader - Stores the zeroth part of SPI_PAD_CONF."]
+pub type SPI_PAD_CONF_0_R = crate::FieldReader<u16>;
+impl R {
+    #[doc = "Bits 0:15 - Stores the high 16 bits of MAC address."]
+    #[inline(always)]
+    pub fn mac_1(&self) -> MAC_1_R {
+        MAC_1_R::new((self.bits & 0xffff) as u16)
+    }
+    #[doc = "Bits 16:31 - Stores the zeroth part of SPI_PAD_CONF."]
+    #[inline(always)]
+    pub fn spi_pad_conf_0(&self) -> SPI_PAD_CONF_0_R {
+        SPI_PAD_CONF_0_R::new(((self.bits >> 16) & 0xffff) as u16)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_MAC_SPI_SYS_1")
+            .field("mac_1", &self.mac_1())
+            .field("spi_pad_conf_0", &self.spi_pad_conf_0())
+            .finish()
+    }
+}
+#[doc = "BLOCK1 data register 1.\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_mac_spi_sys_1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_MAC_SPI_SYS_1_SPEC;
+impl crate::RegisterSpec for RD_MAC_SPI_SYS_1_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_mac_spi_sys_1::R`](R) reader structure"]
+impl crate::Readable for RD_MAC_SPI_SYS_1_SPEC {}
+#[doc = "`reset()` method sets RD_MAC_SPI_SYS_1 to value 0"]
+impl crate::Resettable for RD_MAC_SPI_SYS_1_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_mac_spi_sys_2.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_MAC_SPI_SYS_2` reader"]
+pub type R = crate::R<RD_MAC_SPI_SYS_2_SPEC>;
+#[doc = "Field `SPI_PAD_CONF_1` reader - Stores the first part of SPI_PAD_CONF."]
+pub type SPI_PAD_CONF_1_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the first part of SPI_PAD_CONF."]
+    #[inline(always)]
+    pub fn spi_pad_conf_1(&self) -> SPI_PAD_CONF_1_R {
+        SPI_PAD_CONF_1_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_MAC_SPI_SYS_2")
+            .field("spi_pad_conf_1", &self.spi_pad_conf_1())
+            .finish()
+    }
+}
+#[doc = "BLOCK1 data register 2.\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_mac_spi_sys_2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_MAC_SPI_SYS_2_SPEC;
+impl crate::RegisterSpec for RD_MAC_SPI_SYS_2_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_mac_spi_sys_2::R`](R) reader structure"]
+impl crate::Readable for RD_MAC_SPI_SYS_2_SPEC {}
+#[doc = "`reset()` method sets RD_MAC_SPI_SYS_2 to value 0"]
+impl crate::Resettable for RD_MAC_SPI_SYS_2_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_mac_spi_sys_3.rs

@@ -0,0 +1,38 @@
+#[doc = "Register `RD_MAC_SPI_SYS_3` reader"]
+pub type R = crate::R<RD_MAC_SPI_SYS_3_SPEC>;
+#[doc = "Field `SPI_PAD_CONF_2` reader - Stores the second part of SPI_PAD_CONF."]
+pub type SPI_PAD_CONF_2_R = crate::FieldReader<u32>;
+#[doc = "Field `SYS_DATA_PART0_0` reader - Stores the fist 14 bits of the zeroth part of system data."]
+pub type SYS_DATA_PART0_0_R = crate::FieldReader<u16>;
+impl R {
+    #[doc = "Bits 0:17 - Stores the second part of SPI_PAD_CONF."]
+    #[inline(always)]
+    pub fn spi_pad_conf_2(&self) -> SPI_PAD_CONF_2_R {
+        SPI_PAD_CONF_2_R::new(self.bits & 0x0003_ffff)
+    }
+    #[doc = "Bits 18:31 - Stores the fist 14 bits of the zeroth part of system data."]
+    #[inline(always)]
+    pub fn sys_data_part0_0(&self) -> SYS_DATA_PART0_0_R {
+        SYS_DATA_PART0_0_R::new(((self.bits >> 18) & 0x3fff) as u16)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_MAC_SPI_SYS_3")
+            .field("spi_pad_conf_2", &self.spi_pad_conf_2())
+            .field("sys_data_part0_0", &self.sys_data_part0_0())
+            .finish()
+    }
+}
+#[doc = "BLOCK1 data register 3.\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_mac_spi_sys_3::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_MAC_SPI_SYS_3_SPEC;
+impl crate::RegisterSpec for RD_MAC_SPI_SYS_3_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_mac_spi_sys_3::R`](R) reader structure"]
+impl crate::Readable for RD_MAC_SPI_SYS_3_SPEC {}
+#[doc = "`reset()` method sets RD_MAC_SPI_SYS_3 to value 0"]
+impl crate::Resettable for RD_MAC_SPI_SYS_3_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_mac_spi_sys_4.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_MAC_SPI_SYS_4` reader"]
+pub type R = crate::R<RD_MAC_SPI_SYS_4_SPEC>;
+#[doc = "Field `SYS_DATA_PART0_1` reader - Stores the fist 32 bits of the zeroth part of system data."]
+pub type SYS_DATA_PART0_1_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the fist 32 bits of the zeroth part of system data."]
+    #[inline(always)]
+    pub fn sys_data_part0_1(&self) -> SYS_DATA_PART0_1_R {
+        SYS_DATA_PART0_1_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_MAC_SPI_SYS_4")
+            .field("sys_data_part0_1", &self.sys_data_part0_1())
+            .finish()
+    }
+}
+#[doc = "BLOCK1 data register 4.\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_mac_spi_sys_4::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_MAC_SPI_SYS_4_SPEC;
+impl crate::RegisterSpec for RD_MAC_SPI_SYS_4_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_mac_spi_sys_4::R`](R) reader structure"]
+impl crate::Readable for RD_MAC_SPI_SYS_4_SPEC {}
+#[doc = "`reset()` method sets RD_MAC_SPI_SYS_4 to value 0"]
+impl crate::Resettable for RD_MAC_SPI_SYS_4_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_mac_spi_sys_5.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_MAC_SPI_SYS_5` reader"]
+pub type R = crate::R<RD_MAC_SPI_SYS_5_SPEC>;
+#[doc = "Field `SYS_DATA_PART0_2` reader - Stores the second 32 bits of the zeroth part of system data."]
+pub type SYS_DATA_PART0_2_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the second 32 bits of the zeroth part of system data."]
+    #[inline(always)]
+    pub fn sys_data_part0_2(&self) -> SYS_DATA_PART0_2_R {
+        SYS_DATA_PART0_2_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_MAC_SPI_SYS_5")
+            .field("sys_data_part0_2", &self.sys_data_part0_2())
+            .finish()
+    }
+}
+#[doc = "BLOCK1 data register 5.\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_mac_spi_sys_5::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_MAC_SPI_SYS_5_SPEC;
+impl crate::RegisterSpec for RD_MAC_SPI_SYS_5_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_mac_spi_sys_5::R`](R) reader structure"]
+impl crate::Readable for RD_MAC_SPI_SYS_5_SPEC {}
+#[doc = "`reset()` method sets RD_MAC_SPI_SYS_5 to value 0"]
+impl crate::Resettable for RD_MAC_SPI_SYS_5_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_repeat_data0.rs

@@ -0,0 +1,185 @@
+#[doc = "Register `RD_REPEAT_DATA0` reader"]
+pub type R = crate::R<RD_REPEAT_DATA0_SPEC>;
+#[doc = "Field `RD_DIS` reader - Set this bit to disable reading from BlOCK4-10."]
+pub type RD_DIS_R = crate::FieldReader;
+#[doc = "Field `DIS_RTC_RAM_BOOT` reader - Set this bit to disable boot from RTC RAM."]
+pub type DIS_RTC_RAM_BOOT_R = crate::BitReader;
+#[doc = "Field `DIS_ICACHE` reader - Set this bit to disable Icache."]
+pub type DIS_ICACHE_R = crate::BitReader;
+#[doc = "Field `DIS_DCACHE` reader - Set this bit to disable Dcache."]
+pub type DIS_DCACHE_R = crate::BitReader;
+#[doc = "Field `DIS_DOWNLOAD_ICACHE` reader - Set this bit to disable Icache in download mode (boot_mode\\[3:0\\] is 0, 1, 2, 3, 6, 7)."]
+pub type DIS_DOWNLOAD_ICACHE_R = crate::BitReader;
+#[doc = "Field `DIS_DOWNLOAD_DCACHE` reader - Set this bit to disable Dcache in download mode ( boot_mode\\[3:0\\] is 0, 1, 2, 3, 6, 7)."]
+pub type DIS_DOWNLOAD_DCACHE_R = crate::BitReader;
+#[doc = "Field `DIS_FORCE_DOWNLOAD` reader - Set this bit to disable the function that forces chip into download mode."]
+pub type DIS_FORCE_DOWNLOAD_R = crate::BitReader;
+#[doc = "Field `DIS_USB` reader - Set this bit to disable USB function."]
+pub type DIS_USB_R = crate::BitReader;
+#[doc = "Field `DIS_CAN` reader - Set this bit to disable CAN function."]
+pub type DIS_CAN_R = crate::BitReader;
+#[doc = "Field `DIS_APP_CPU` reader - Disable app cpu."]
+pub type DIS_APP_CPU_R = crate::BitReader;
+#[doc = "Field `SOFT_DIS_JTAG` reader - Set these bits to disable JTAG in the soft way (odd number 1 means disable ). JTAG can be enabled in HMAC module."]
+pub type SOFT_DIS_JTAG_R = crate::FieldReader;
+#[doc = "Field `DIS_PAD_JTAG` reader - Set this bit to disable JTAG in the hard way. JTAG is disabled permanently."]
+pub type DIS_PAD_JTAG_R = crate::BitReader;
+#[doc = "Field `DIS_DOWNLOAD_MANUAL_ENCRYPT` reader - Set this bit to disable flash encryption when in download boot modes."]
+pub type DIS_DOWNLOAD_MANUAL_ENCRYPT_R = crate::BitReader;
+#[doc = "Field `USB_DREFH` reader - Controls single-end input threshold vrefh, 1.76 V to 2 V with step of 80 mV, stored in eFuse."]
+pub type USB_DREFH_R = crate::FieldReader;
+#[doc = "Field `USB_DREFL` reader - Controls single-end input threshold vrefl, 0.8 V to 1.04 V with step of 80 mV, stored in eFuse."]
+pub type USB_DREFL_R = crate::FieldReader;
+#[doc = "Field `USB_EXCHG_PINS` reader - Set this bit to exchange USB D+ and D- pins."]
+pub type USB_EXCHG_PINS_R = crate::BitReader;
+#[doc = "Field `EXT_PHY_ENABLE` reader - Set this bit to enable external PHY."]
+pub type EXT_PHY_ENABLE_R = crate::BitReader;
+#[doc = "Field `BTLC_GPIO_ENABLE` reader - Bluetooth GPIO signal output security level control."]
+pub type BTLC_GPIO_ENABLE_R = crate::FieldReader;
+#[doc = "Field `VDD_SPI_MODECURLIM` reader - SPI regulator switches current limit mode."]
+pub type VDD_SPI_MODECURLIM_R = crate::BitReader;
+#[doc = "Field `VDD_SPI_DREFH` reader - SPI regulator high voltage reference."]
+pub type VDD_SPI_DREFH_R = crate::FieldReader;
+impl R {
+    #[doc = "Bits 0:6 - Set this bit to disable reading from BlOCK4-10."]
+    #[inline(always)]
+    pub fn rd_dis(&self) -> RD_DIS_R {
+        RD_DIS_R::new((self.bits & 0x7f) as u8)
+    }
+    #[doc = "Bit 7 - Set this bit to disable boot from RTC RAM."]
+    #[inline(always)]
+    pub fn dis_rtc_ram_boot(&self) -> DIS_RTC_RAM_BOOT_R {
+        DIS_RTC_RAM_BOOT_R::new(((self.bits >> 7) & 1) != 0)
+    }
+    #[doc = "Bit 8 - Set this bit to disable Icache."]
+    #[inline(always)]
+    pub fn dis_icache(&self) -> DIS_ICACHE_R {
+        DIS_ICACHE_R::new(((self.bits >> 8) & 1) != 0)
+    }
+    #[doc = "Bit 9 - Set this bit to disable Dcache."]
+    #[inline(always)]
+    pub fn dis_dcache(&self) -> DIS_DCACHE_R {
+        DIS_DCACHE_R::new(((self.bits >> 9) & 1) != 0)
+    }
+    #[doc = "Bit 10 - Set this bit to disable Icache in download mode (boot_mode\\[3:0\\] is 0, 1, 2, 3, 6, 7)."]
+    #[inline(always)]
+    pub fn dis_download_icache(&self) -> DIS_DOWNLOAD_ICACHE_R {
+        DIS_DOWNLOAD_ICACHE_R::new(((self.bits >> 10) & 1) != 0)
+    }
+    #[doc = "Bit 11 - Set this bit to disable Dcache in download mode ( boot_mode\\[3:0\\] is 0, 1, 2, 3, 6, 7)."]
+    #[inline(always)]
+    pub fn dis_download_dcache(&self) -> DIS_DOWNLOAD_DCACHE_R {
+        DIS_DOWNLOAD_DCACHE_R::new(((self.bits >> 11) & 1) != 0)
+    }
+    #[doc = "Bit 12 - Set this bit to disable the function that forces chip into download mode."]
+    #[inline(always)]
+    pub fn dis_force_download(&self) -> DIS_FORCE_DOWNLOAD_R {
+        DIS_FORCE_DOWNLOAD_R::new(((self.bits >> 12) & 1) != 0)
+    }
+    #[doc = "Bit 13 - Set this bit to disable USB function."]
+    #[inline(always)]
+    pub fn dis_usb(&self) -> DIS_USB_R {
+        DIS_USB_R::new(((self.bits >> 13) & 1) != 0)
+    }
+    #[doc = "Bit 14 - Set this bit to disable CAN function."]
+    #[inline(always)]
+    pub fn dis_can(&self) -> DIS_CAN_R {
+        DIS_CAN_R::new(((self.bits >> 14) & 1) != 0)
+    }
+    #[doc = "Bit 15 - Disable app cpu."]
+    #[inline(always)]
+    pub fn dis_app_cpu(&self) -> DIS_APP_CPU_R {
+        DIS_APP_CPU_R::new(((self.bits >> 15) & 1) != 0)
+    }
+    #[doc = "Bits 16:18 - Set these bits to disable JTAG in the soft way (odd number 1 means disable ). JTAG can be enabled in HMAC module."]
+    #[inline(always)]
+    pub fn soft_dis_jtag(&self) -> SOFT_DIS_JTAG_R {
+        SOFT_DIS_JTAG_R::new(((self.bits >> 16) & 7) as u8)
+    }
+    #[doc = "Bit 19 - Set this bit to disable JTAG in the hard way. JTAG is disabled permanently."]
+    #[inline(always)]
+    pub fn dis_pad_jtag(&self) -> DIS_PAD_JTAG_R {
+        DIS_PAD_JTAG_R::new(((self.bits >> 19) & 1) != 0)
+    }
+    #[doc = "Bit 20 - Set this bit to disable flash encryption when in download boot modes."]
+    #[inline(always)]
+    pub fn dis_download_manual_encrypt(&self) -> DIS_DOWNLOAD_MANUAL_ENCRYPT_R {
+        DIS_DOWNLOAD_MANUAL_ENCRYPT_R::new(((self.bits >> 20) & 1) != 0)
+    }
+    #[doc = "Bits 21:22 - Controls single-end input threshold vrefh, 1.76 V to 2 V with step of 80 mV, stored in eFuse."]
+    #[inline(always)]
+    pub fn usb_drefh(&self) -> USB_DREFH_R {
+        USB_DREFH_R::new(((self.bits >> 21) & 3) as u8)
+    }
+    #[doc = "Bits 23:24 - Controls single-end input threshold vrefl, 0.8 V to 1.04 V with step of 80 mV, stored in eFuse."]
+    #[inline(always)]
+    pub fn usb_drefl(&self) -> USB_DREFL_R {
+        USB_DREFL_R::new(((self.bits >> 23) & 3) as u8)
+    }
+    #[doc = "Bit 25 - Set this bit to exchange USB D+ and D- pins."]
+    #[inline(always)]
+    pub fn usb_exchg_pins(&self) -> USB_EXCHG_PINS_R {
+        USB_EXCHG_PINS_R::new(((self.bits >> 25) & 1) != 0)
+    }
+    #[doc = "Bit 26 - Set this bit to enable external PHY."]
+    #[inline(always)]
+    pub fn ext_phy_enable(&self) -> EXT_PHY_ENABLE_R {
+        EXT_PHY_ENABLE_R::new(((self.bits >> 26) & 1) != 0)
+    }
+    #[doc = "Bits 27:28 - Bluetooth GPIO signal output security level control."]
+    #[inline(always)]
+    pub fn btlc_gpio_enable(&self) -> BTLC_GPIO_ENABLE_R {
+        BTLC_GPIO_ENABLE_R::new(((self.bits >> 27) & 3) as u8)
+    }
+    #[doc = "Bit 29 - SPI regulator switches current limit mode."]
+    #[inline(always)]
+    pub fn vdd_spi_modecurlim(&self) -> VDD_SPI_MODECURLIM_R {
+        VDD_SPI_MODECURLIM_R::new(((self.bits >> 29) & 1) != 0)
+    }
+    #[doc = "Bits 30:31 - SPI regulator high voltage reference."]
+    #[inline(always)]
+    pub fn vdd_spi_drefh(&self) -> VDD_SPI_DREFH_R {
+        VDD_SPI_DREFH_R::new(((self.bits >> 30) & 3) as u8)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_REPEAT_DATA0")
+            .field("rd_dis", &self.rd_dis())
+            .field("dis_rtc_ram_boot", &self.dis_rtc_ram_boot())
+            .field("dis_icache", &self.dis_icache())
+            .field("dis_dcache", &self.dis_dcache())
+            .field("dis_download_icache", &self.dis_download_icache())
+            .field("dis_download_dcache", &self.dis_download_dcache())
+            .field("dis_force_download", &self.dis_force_download())
+            .field("dis_usb", &self.dis_usb())
+            .field("dis_can", &self.dis_can())
+            .field("dis_app_cpu", &self.dis_app_cpu())
+            .field("soft_dis_jtag", &self.soft_dis_jtag())
+            .field("dis_pad_jtag", &self.dis_pad_jtag())
+            .field(
+                "dis_download_manual_encrypt",
+                &self.dis_download_manual_encrypt(),
+            )
+            .field("usb_drefh", &self.usb_drefh())
+            .field("usb_drefl", &self.usb_drefl())
+            .field("usb_exchg_pins", &self.usb_exchg_pins())
+            .field("ext_phy_enable", &self.ext_phy_enable())
+            .field("btlc_gpio_enable", &self.btlc_gpio_enable())
+            .field("vdd_spi_modecurlim", &self.vdd_spi_modecurlim())
+            .field("vdd_spi_drefh", &self.vdd_spi_drefh())
+            .finish()
+    }
+}
+#[doc = "BLOCK0 data register 1.\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_repeat_data0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_REPEAT_DATA0_SPEC;
+impl crate::RegisterSpec for RD_REPEAT_DATA0_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_repeat_data0::R`](R) reader structure"]
+impl crate::Readable for RD_REPEAT_DATA0_SPEC {}
+#[doc = "`reset()` method sets RD_REPEAT_DATA0 to value 0"]
+impl crate::Resettable for RD_REPEAT_DATA0_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_repeat_data1.rs

@@ -0,0 +1,158 @@
+#[doc = "Register `RD_REPEAT_DATA1` reader"]
+pub type R = crate::R<RD_REPEAT_DATA1_SPEC>;
+#[doc = "Field `VDD_SPI_DREFM` reader - SPI regulator medium voltage reference."]
+pub type VDD_SPI_DREFM_R = crate::FieldReader;
+#[doc = "Field `VDD_SPI_DREFL` reader - SPI regulator low voltage reference."]
+pub type VDD_SPI_DREFL_R = crate::FieldReader;
+#[doc = "Field `VDD_SPI_XPD` reader - SPI regulator power up signal."]
+pub type VDD_SPI_XPD_R = crate::BitReader;
+#[doc = "Field `VDD_SPI_TIEH` reader - SPI regulator output is short connected to VDD3P3_RTC_IO."]
+pub type VDD_SPI_TIEH_R = crate::BitReader;
+#[doc = "Field `VDD_SPI_FORCE` reader - Set this bit and force to use the configuration of eFuse to configure VDD_SPI."]
+pub type VDD_SPI_FORCE_R = crate::BitReader;
+#[doc = "Field `VDD_SPI_EN_INIT` reader - Set SPI regulator to 0 to configure init\\[1:0\\]=0."]
+pub type VDD_SPI_EN_INIT_R = crate::BitReader;
+#[doc = "Field `VDD_SPI_ENCURLIM` reader - Set SPI regulator to 1 to enable output current limit."]
+pub type VDD_SPI_ENCURLIM_R = crate::BitReader;
+#[doc = "Field `VDD_SPI_DCURLIM` reader - Tunes the current limit threshold of SPI regulator when tieh=0, about 800 mA/(8+d)."]
+pub type VDD_SPI_DCURLIM_R = crate::FieldReader;
+#[doc = "Field `VDD_SPI_INIT` reader - Adds resistor from LDO output to ground. 0: no resistance 1: 6 K 2: 4 K 3: 2 K."]
+pub type VDD_SPI_INIT_R = crate::FieldReader;
+#[doc = "Field `VDD_SPI_DCAP` reader - Prevents SPI regulator from overshoot."]
+pub type VDD_SPI_DCAP_R = crate::FieldReader;
+#[doc = "Field `WDT_DELAY_SEL` reader - Selects RTC watchdog timeout threshold, in unit of slow clock cycle. 0: 40000. 1: 80000. 2: 160000. 3:320000."]
+pub type WDT_DELAY_SEL_R = crate::FieldReader;
+#[doc = "Field `SPI_BOOT_CRYPT_CNT` reader - Set this bit to enable SPI boot encrypt/decrypt. Odd number of 1: enable. even number of 1: disable."]
+pub type SPI_BOOT_CRYPT_CNT_R = crate::FieldReader;
+#[doc = "Field `SECURE_BOOT_KEY_REVOKE0` reader - Set this bit to enable revoking first secure boot key."]
+pub type SECURE_BOOT_KEY_REVOKE0_R = crate::BitReader;
+#[doc = "Field `SECURE_BOOT_KEY_REVOKE1` reader - Set this bit to enable revoking second secure boot key."]
+pub type SECURE_BOOT_KEY_REVOKE1_R = crate::BitReader;
+#[doc = "Field `SECURE_BOOT_KEY_REVOKE2` reader - Set this bit to enable revoking third secure boot key."]
+pub type SECURE_BOOT_KEY_REVOKE2_R = crate::BitReader;
+#[doc = "Field `KEY_PURPOSE_0` reader - Purpose of Key0."]
+pub type KEY_PURPOSE_0_R = crate::FieldReader;
+#[doc = "Field `KEY_PURPOSE_1` reader - Purpose of Key1."]
+pub type KEY_PURPOSE_1_R = crate::FieldReader;
+impl R {
+    #[doc = "Bits 0:1 - SPI regulator medium voltage reference."]
+    #[inline(always)]
+    pub fn vdd_spi_drefm(&self) -> VDD_SPI_DREFM_R {
+        VDD_SPI_DREFM_R::new((self.bits & 3) as u8)
+    }
+    #[doc = "Bits 2:3 - SPI regulator low voltage reference."]
+    #[inline(always)]
+    pub fn vdd_spi_drefl(&self) -> VDD_SPI_DREFL_R {
+        VDD_SPI_DREFL_R::new(((self.bits >> 2) & 3) as u8)
+    }
+    #[doc = "Bit 4 - SPI regulator power up signal."]
+    #[inline(always)]
+    pub fn vdd_spi_xpd(&self) -> VDD_SPI_XPD_R {
+        VDD_SPI_XPD_R::new(((self.bits >> 4) & 1) != 0)
+    }
+    #[doc = "Bit 5 - SPI regulator output is short connected to VDD3P3_RTC_IO."]
+    #[inline(always)]
+    pub fn vdd_spi_tieh(&self) -> VDD_SPI_TIEH_R {
+        VDD_SPI_TIEH_R::new(((self.bits >> 5) & 1) != 0)
+    }
+    #[doc = "Bit 6 - Set this bit and force to use the configuration of eFuse to configure VDD_SPI."]
+    #[inline(always)]
+    pub fn vdd_spi_force(&self) -> VDD_SPI_FORCE_R {
+        VDD_SPI_FORCE_R::new(((self.bits >> 6) & 1) != 0)
+    }
+    #[doc = "Bit 7 - Set SPI regulator to 0 to configure init\\[1:0\\]=0."]
+    #[inline(always)]
+    pub fn vdd_spi_en_init(&self) -> VDD_SPI_EN_INIT_R {
+        VDD_SPI_EN_INIT_R::new(((self.bits >> 7) & 1) != 0)
+    }
+    #[doc = "Bit 8 - Set SPI regulator to 1 to enable output current limit."]
+    #[inline(always)]
+    pub fn vdd_spi_encurlim(&self) -> VDD_SPI_ENCURLIM_R {
+        VDD_SPI_ENCURLIM_R::new(((self.bits >> 8) & 1) != 0)
+    }
+    #[doc = "Bits 9:11 - Tunes the current limit threshold of SPI regulator when tieh=0, about 800 mA/(8+d)."]
+    #[inline(always)]
+    pub fn vdd_spi_dcurlim(&self) -> VDD_SPI_DCURLIM_R {
+        VDD_SPI_DCURLIM_R::new(((self.bits >> 9) & 7) as u8)
+    }
+    #[doc = "Bits 12:13 - Adds resistor from LDO output to ground. 0: no resistance 1: 6 K 2: 4 K 3: 2 K."]
+    #[inline(always)]
+    pub fn vdd_spi_init(&self) -> VDD_SPI_INIT_R {
+        VDD_SPI_INIT_R::new(((self.bits >> 12) & 3) as u8)
+    }
+    #[doc = "Bits 14:15 - Prevents SPI regulator from overshoot."]
+    #[inline(always)]
+    pub fn vdd_spi_dcap(&self) -> VDD_SPI_DCAP_R {
+        VDD_SPI_DCAP_R::new(((self.bits >> 14) & 3) as u8)
+    }
+    #[doc = "Bits 16:17 - Selects RTC watchdog timeout threshold, in unit of slow clock cycle. 0: 40000. 1: 80000. 2: 160000. 3:320000."]
+    #[inline(always)]
+    pub fn wdt_delay_sel(&self) -> WDT_DELAY_SEL_R {
+        WDT_DELAY_SEL_R::new(((self.bits >> 16) & 3) as u8)
+    }
+    #[doc = "Bits 18:20 - Set this bit to enable SPI boot encrypt/decrypt. Odd number of 1: enable. even number of 1: disable."]
+    #[inline(always)]
+    pub fn spi_boot_crypt_cnt(&self) -> SPI_BOOT_CRYPT_CNT_R {
+        SPI_BOOT_CRYPT_CNT_R::new(((self.bits >> 18) & 7) as u8)
+    }
+    #[doc = "Bit 21 - Set this bit to enable revoking first secure boot key."]
+    #[inline(always)]
+    pub fn secure_boot_key_revoke0(&self) -> SECURE_BOOT_KEY_REVOKE0_R {
+        SECURE_BOOT_KEY_REVOKE0_R::new(((self.bits >> 21) & 1) != 0)
+    }
+    #[doc = "Bit 22 - Set this bit to enable revoking second secure boot key."]
+    #[inline(always)]
+    pub fn secure_boot_key_revoke1(&self) -> SECURE_BOOT_KEY_REVOKE1_R {
+        SECURE_BOOT_KEY_REVOKE1_R::new(((self.bits >> 22) & 1) != 0)
+    }
+    #[doc = "Bit 23 - Set this bit to enable revoking third secure boot key."]
+    #[inline(always)]
+    pub fn secure_boot_key_revoke2(&self) -> SECURE_BOOT_KEY_REVOKE2_R {
+        SECURE_BOOT_KEY_REVOKE2_R::new(((self.bits >> 23) & 1) != 0)
+    }
+    #[doc = "Bits 24:27 - Purpose of Key0."]
+    #[inline(always)]
+    pub fn key_purpose_0(&self) -> KEY_PURPOSE_0_R {
+        KEY_PURPOSE_0_R::new(((self.bits >> 24) & 0x0f) as u8)
+    }
+    #[doc = "Bits 28:31 - Purpose of Key1."]
+    #[inline(always)]
+    pub fn key_purpose_1(&self) -> KEY_PURPOSE_1_R {
+        KEY_PURPOSE_1_R::new(((self.bits >> 28) & 0x0f) as u8)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_REPEAT_DATA1")
+            .field("vdd_spi_drefm", &self.vdd_spi_drefm())
+            .field("vdd_spi_drefl", &self.vdd_spi_drefl())
+            .field("vdd_spi_xpd", &self.vdd_spi_xpd())
+            .field("vdd_spi_tieh", &self.vdd_spi_tieh())
+            .field("vdd_spi_force", &self.vdd_spi_force())
+            .field("vdd_spi_en_init", &self.vdd_spi_en_init())
+            .field("vdd_spi_encurlim", &self.vdd_spi_encurlim())
+            .field("vdd_spi_dcurlim", &self.vdd_spi_dcurlim())
+            .field("vdd_spi_init", &self.vdd_spi_init())
+            .field("vdd_spi_dcap", &self.vdd_spi_dcap())
+            .field("wdt_delay_sel", &self.wdt_delay_sel())
+            .field("spi_boot_crypt_cnt", &self.spi_boot_crypt_cnt())
+            .field("secure_boot_key_revoke0", &self.secure_boot_key_revoke0())
+            .field("secure_boot_key_revoke1", &self.secure_boot_key_revoke1())
+            .field("secure_boot_key_revoke2", &self.secure_boot_key_revoke2())
+            .field("key_purpose_0", &self.key_purpose_0())
+            .field("key_purpose_1", &self.key_purpose_1())
+            .finish()
+    }
+}
+#[doc = "BLOCK0 data register 2.\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_repeat_data1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_REPEAT_DATA1_SPEC;
+impl crate::RegisterSpec for RD_REPEAT_DATA1_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_repeat_data1::R`](R) reader structure"]
+impl crate::Readable for RD_REPEAT_DATA1_SPEC {}
+#[doc = "`reset()` method sets RD_REPEAT_DATA1 to value 0"]
+impl crate::Resettable for RD_REPEAT_DATA1_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_repeat_data2.rs

@@ -0,0 +1,129 @@
+#[doc = "Register `RD_REPEAT_DATA2` reader"]
+pub type R = crate::R<RD_REPEAT_DATA2_SPEC>;
+#[doc = "Field `KEY_PURPOSE_2` reader - Purpose of Key2."]
+pub type KEY_PURPOSE_2_R = crate::FieldReader;
+#[doc = "Field `KEY_PURPOSE_3` reader - Purpose of Key3."]
+pub type KEY_PURPOSE_3_R = crate::FieldReader;
+#[doc = "Field `KEY_PURPOSE_4` reader - Purpose of Key4."]
+pub type KEY_PURPOSE_4_R = crate::FieldReader;
+#[doc = "Field `KEY_PURPOSE_5` reader - Purpose of Key5."]
+pub type KEY_PURPOSE_5_R = crate::FieldReader;
+#[doc = "Field `RPT4_RESERVED0` reader - Reserved (used for four backups method)."]
+pub type RPT4_RESERVED0_R = crate::FieldReader;
+#[doc = "Field `SECURE_BOOT_EN` reader - Set this bit to enable secure boot."]
+pub type SECURE_BOOT_EN_R = crate::BitReader;
+#[doc = "Field `SECURE_BOOT_AGGRESSIVE_REVOKE` reader - Set this bit to enable revoking aggressive secure boot."]
+pub type SECURE_BOOT_AGGRESSIVE_REVOKE_R = crate::BitReader;
+#[doc = "Field `DIS_USB_JTAG` reader - Set this bit to disable function of usb switch to jtag in module of usb device."]
+pub type DIS_USB_JTAG_R = crate::BitReader;
+#[doc = "Field `DIS_USB_DEVICE` reader - Set this bit to disable usb device."]
+pub type DIS_USB_DEVICE_R = crate::BitReader;
+#[doc = "Field `STRAP_JTAG_SEL` reader - Set this bit to enable selection between usb_to_jtag and pad_to_jtag through strapping gpio10 when both reg_dis_usb_jtag and reg_dis_pad_jtag are equal to 0."]
+pub type STRAP_JTAG_SEL_R = crate::BitReader;
+#[doc = "Field `USB_PHY_SEL` reader - This bit is used to switch internal PHY and external PHY for USB OTG and USB Device. 0: internal PHY is assigned to USB Device while external PHY is assigned to USB OTG. 1: internal PHY is assigned to USB OTG while external PHY is assigned to USB Device."]
+pub type USB_PHY_SEL_R = crate::BitReader;
+#[doc = "Field `POWER_GLITCH_DSENSE` reader - Sample delay configuration of power glitch."]
+pub type POWER_GLITCH_DSENSE_R = crate::FieldReader;
+#[doc = "Field `FLASH_TPUW` reader - Configures flash waiting time after power-up, in unit of ms. If the value is less than 15, the waiting time is the configurable value. Otherwise, the waiting time is twice the configurable value."]
+pub type FLASH_TPUW_R = crate::FieldReader;
+impl R {
+    #[doc = "Bits 0:3 - Purpose of Key2."]
+    #[inline(always)]
+    pub fn key_purpose_2(&self) -> KEY_PURPOSE_2_R {
+        KEY_PURPOSE_2_R::new((self.bits & 0x0f) as u8)
+    }
+    #[doc = "Bits 4:7 - Purpose of Key3."]
+    #[inline(always)]
+    pub fn key_purpose_3(&self) -> KEY_PURPOSE_3_R {
+        KEY_PURPOSE_3_R::new(((self.bits >> 4) & 0x0f) as u8)
+    }
+    #[doc = "Bits 8:11 - Purpose of Key4."]
+    #[inline(always)]
+    pub fn key_purpose_4(&self) -> KEY_PURPOSE_4_R {
+        KEY_PURPOSE_4_R::new(((self.bits >> 8) & 0x0f) as u8)
+    }
+    #[doc = "Bits 12:15 - Purpose of Key5."]
+    #[inline(always)]
+    pub fn key_purpose_5(&self) -> KEY_PURPOSE_5_R {
+        KEY_PURPOSE_5_R::new(((self.bits >> 12) & 0x0f) as u8)
+    }
+    #[doc = "Bits 16:19 - Reserved (used for four backups method)."]
+    #[inline(always)]
+    pub fn rpt4_reserved0(&self) -> RPT4_RESERVED0_R {
+        RPT4_RESERVED0_R::new(((self.bits >> 16) & 0x0f) as u8)
+    }
+    #[doc = "Bit 20 - Set this bit to enable secure boot."]
+    #[inline(always)]
+    pub fn secure_boot_en(&self) -> SECURE_BOOT_EN_R {
+        SECURE_BOOT_EN_R::new(((self.bits >> 20) & 1) != 0)
+    }
+    #[doc = "Bit 21 - Set this bit to enable revoking aggressive secure boot."]
+    #[inline(always)]
+    pub fn secure_boot_aggressive_revoke(&self) -> SECURE_BOOT_AGGRESSIVE_REVOKE_R {
+        SECURE_BOOT_AGGRESSIVE_REVOKE_R::new(((self.bits >> 21) & 1) != 0)
+    }
+    #[doc = "Bit 22 - Set this bit to disable function of usb switch to jtag in module of usb device."]
+    #[inline(always)]
+    pub fn dis_usb_jtag(&self) -> DIS_USB_JTAG_R {
+        DIS_USB_JTAG_R::new(((self.bits >> 22) & 1) != 0)
+    }
+    #[doc = "Bit 23 - Set this bit to disable usb device."]
+    #[inline(always)]
+    pub fn dis_usb_device(&self) -> DIS_USB_DEVICE_R {
+        DIS_USB_DEVICE_R::new(((self.bits >> 23) & 1) != 0)
+    }
+    #[doc = "Bit 24 - Set this bit to enable selection between usb_to_jtag and pad_to_jtag through strapping gpio10 when both reg_dis_usb_jtag and reg_dis_pad_jtag are equal to 0."]
+    #[inline(always)]
+    pub fn strap_jtag_sel(&self) -> STRAP_JTAG_SEL_R {
+        STRAP_JTAG_SEL_R::new(((self.bits >> 24) & 1) != 0)
+    }
+    #[doc = "Bit 25 - This bit is used to switch internal PHY and external PHY for USB OTG and USB Device. 0: internal PHY is assigned to USB Device while external PHY is assigned to USB OTG. 1: internal PHY is assigned to USB OTG while external PHY is assigned to USB Device."]
+    #[inline(always)]
+    pub fn usb_phy_sel(&self) -> USB_PHY_SEL_R {
+        USB_PHY_SEL_R::new(((self.bits >> 25) & 1) != 0)
+    }
+    #[doc = "Bits 26:27 - Sample delay configuration of power glitch."]
+    #[inline(always)]
+    pub fn power_glitch_dsense(&self) -> POWER_GLITCH_DSENSE_R {
+        POWER_GLITCH_DSENSE_R::new(((self.bits >> 26) & 3) as u8)
+    }
+    #[doc = "Bits 28:31 - Configures flash waiting time after power-up, in unit of ms. If the value is less than 15, the waiting time is the configurable value. Otherwise, the waiting time is twice the configurable value."]
+    #[inline(always)]
+    pub fn flash_tpuw(&self) -> FLASH_TPUW_R {
+        FLASH_TPUW_R::new(((self.bits >> 28) & 0x0f) as u8)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_REPEAT_DATA2")
+            .field("key_purpose_2", &self.key_purpose_2())
+            .field("key_purpose_3", &self.key_purpose_3())
+            .field("key_purpose_4", &self.key_purpose_4())
+            .field("key_purpose_5", &self.key_purpose_5())
+            .field("rpt4_reserved0", &self.rpt4_reserved0())
+            .field("secure_boot_en", &self.secure_boot_en())
+            .field(
+                "secure_boot_aggressive_revoke",
+                &self.secure_boot_aggressive_revoke(),
+            )
+            .field("dis_usb_jtag", &self.dis_usb_jtag())
+            .field("dis_usb_device", &self.dis_usb_device())
+            .field("strap_jtag_sel", &self.strap_jtag_sel())
+            .field("usb_phy_sel", &self.usb_phy_sel())
+            .field("power_glitch_dsense", &self.power_glitch_dsense())
+            .field("flash_tpuw", &self.flash_tpuw())
+            .finish()
+    }
+}
+#[doc = "BLOCK0 data register 3.\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_repeat_data2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_REPEAT_DATA2_SPEC;
+impl crate::RegisterSpec for RD_REPEAT_DATA2_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_repeat_data2::R`](R) reader structure"]
+impl crate::Readable for RD_REPEAT_DATA2_SPEC {}
+#[doc = "`reset()` method sets RD_REPEAT_DATA2 to value 0"]
+impl crate::Resettable for RD_REPEAT_DATA2_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_repeat_data3.rs

@@ -0,0 +1,142 @@
+#[doc = "Register `RD_REPEAT_DATA3` reader"]
+pub type R = crate::R<RD_REPEAT_DATA3_SPEC>;
+#[doc = "Field `DIS_DOWNLOAD_MODE` reader - Set this bit to disable download mode (boot_mode\\[3:0\\] = 0, 1, 2, 3, 6, 7)."]
+pub type DIS_DOWNLOAD_MODE_R = crate::BitReader;
+#[doc = "Field `DIS_LEGACY_SPI_BOOT` reader - Set this bit to disable Legacy SPI boot mode (boot_mode\\[3:0\\] = 4)."]
+pub type DIS_LEGACY_SPI_BOOT_R = crate::BitReader;
+#[doc = "Field `UART_PRINT_CHANNEL` reader - Selectes the default UART print channel. 0: UART0. 1: UART1."]
+pub type UART_PRINT_CHANNEL_R = crate::BitReader;
+#[doc = "Field `FLASH_ECC_MODE` reader - Set ECC mode in ROM, 0: ROM would Enable Flash ECC 16to18 byte mode. 1:ROM would use 16to17 byte mode."]
+pub type FLASH_ECC_MODE_R = crate::BitReader;
+#[doc = "Field `DIS_USB_DOWNLOAD_MODE` reader - Set this bit to disable UART download mode through USB."]
+pub type DIS_USB_DOWNLOAD_MODE_R = crate::BitReader;
+#[doc = "Field `ENABLE_SECURITY_DOWNLOAD` reader - Set this bit to enable secure UART download mode."]
+pub type ENABLE_SECURITY_DOWNLOAD_R = crate::BitReader;
+#[doc = "Field `UART_PRINT_CONTROL` reader - Set the default UARTboot message output mode. 00: Enabled. 01: Enabled when GPIO8 is low at reset. 10: Enabled when GPIO8 is high at reset. 11:disabled."]
+pub type UART_PRINT_CONTROL_R = crate::FieldReader;
+#[doc = "Field `PIN_POWER_SELECTION` reader - GPIO33-GPIO37 power supply selection in ROM code. 0: VDD3P3_CPU. 1: VDD_SPI."]
+pub type PIN_POWER_SELECTION_R = crate::BitReader;
+#[doc = "Field `FLASH_TYPE` reader - Set the maximum lines of SPI flash. 0: four lines. 1: eight lines."]
+pub type FLASH_TYPE_R = crate::BitReader;
+#[doc = "Field `FLASH_PAGE_SIZE` reader - Set Flash page size."]
+pub type FLASH_PAGE_SIZE_R = crate::FieldReader;
+#[doc = "Field `FLASH_ECC_EN` reader - Set 1 to enable ECC for flash boot."]
+pub type FLASH_ECC_EN_R = crate::BitReader;
+#[doc = "Field `FORCE_SEND_RESUME` reader - Set this bit to force ROM code to send a resume command during SPI boot."]
+pub type FORCE_SEND_RESUME_R = crate::BitReader;
+#[doc = "Field `SECURE_VERSION` reader - Secure version (used by ESP-IDF anti-rollback feature)."]
+pub type SECURE_VERSION_R = crate::FieldReader<u16>;
+#[doc = "Field `POWERGLITCH_EN` reader - Set this bit to enable power glitch function."]
+pub type POWERGLITCH_EN_R = crate::BitReader;
+#[doc = "Field `RPT4_RESERVED1` reader - Reserved (used for four backups method)."]
+pub type RPT4_RESERVED1_R = crate::BitReader;
+impl R {
+    #[doc = "Bit 0 - Set this bit to disable download mode (boot_mode\\[3:0\\] = 0, 1, 2, 3, 6, 7)."]
+    #[inline(always)]
+    pub fn dis_download_mode(&self) -> DIS_DOWNLOAD_MODE_R {
+        DIS_DOWNLOAD_MODE_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Set this bit to disable Legacy SPI boot mode (boot_mode\\[3:0\\] = 4)."]
+    #[inline(always)]
+    pub fn dis_legacy_spi_boot(&self) -> DIS_LEGACY_SPI_BOOT_R {
+        DIS_LEGACY_SPI_BOOT_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - Selectes the default UART print channel. 0: UART0. 1: UART1."]
+    #[inline(always)]
+    pub fn uart_print_channel(&self) -> UART_PRINT_CHANNEL_R {
+        UART_PRINT_CHANNEL_R::new(((self.bits >> 2) & 1) != 0)
+    }
+    #[doc = "Bit 3 - Set ECC mode in ROM, 0: ROM would Enable Flash ECC 16to18 byte mode. 1:ROM would use 16to17 byte mode."]
+    #[inline(always)]
+    pub fn flash_ecc_mode(&self) -> FLASH_ECC_MODE_R {
+        FLASH_ECC_MODE_R::new(((self.bits >> 3) & 1) != 0)
+    }
+    #[doc = "Bit 4 - Set this bit to disable UART download mode through USB."]
+    #[inline(always)]
+    pub fn dis_usb_download_mode(&self) -> DIS_USB_DOWNLOAD_MODE_R {
+        DIS_USB_DOWNLOAD_MODE_R::new(((self.bits >> 4) & 1) != 0)
+    }
+    #[doc = "Bit 5 - Set this bit to enable secure UART download mode."]
+    #[inline(always)]
+    pub fn enable_security_download(&self) -> ENABLE_SECURITY_DOWNLOAD_R {
+        ENABLE_SECURITY_DOWNLOAD_R::new(((self.bits >> 5) & 1) != 0)
+    }
+    #[doc = "Bits 6:7 - Set the default UARTboot message output mode. 00: Enabled. 01: Enabled when GPIO8 is low at reset. 10: Enabled when GPIO8 is high at reset. 11:disabled."]
+    #[inline(always)]
+    pub fn uart_print_control(&self) -> UART_PRINT_CONTROL_R {
+        UART_PRINT_CONTROL_R::new(((self.bits >> 6) & 3) as u8)
+    }
+    #[doc = "Bit 8 - GPIO33-GPIO37 power supply selection in ROM code. 0: VDD3P3_CPU. 1: VDD_SPI."]
+    #[inline(always)]
+    pub fn pin_power_selection(&self) -> PIN_POWER_SELECTION_R {
+        PIN_POWER_SELECTION_R::new(((self.bits >> 8) & 1) != 0)
+    }
+    #[doc = "Bit 9 - Set the maximum lines of SPI flash. 0: four lines. 1: eight lines."]
+    #[inline(always)]
+    pub fn flash_type(&self) -> FLASH_TYPE_R {
+        FLASH_TYPE_R::new(((self.bits >> 9) & 1) != 0)
+    }
+    #[doc = "Bits 10:11 - Set Flash page size."]
+    #[inline(always)]
+    pub fn flash_page_size(&self) -> FLASH_PAGE_SIZE_R {
+        FLASH_PAGE_SIZE_R::new(((self.bits >> 10) & 3) as u8)
+    }
+    #[doc = "Bit 12 - Set 1 to enable ECC for flash boot."]
+    #[inline(always)]
+    pub fn flash_ecc_en(&self) -> FLASH_ECC_EN_R {
+        FLASH_ECC_EN_R::new(((self.bits >> 12) & 1) != 0)
+    }
+    #[doc = "Bit 13 - Set this bit to force ROM code to send a resume command during SPI boot."]
+    #[inline(always)]
+    pub fn force_send_resume(&self) -> FORCE_SEND_RESUME_R {
+        FORCE_SEND_RESUME_R::new(((self.bits >> 13) & 1) != 0)
+    }
+    #[doc = "Bits 14:29 - Secure version (used by ESP-IDF anti-rollback feature)."]
+    #[inline(always)]
+    pub fn secure_version(&self) -> SECURE_VERSION_R {
+        SECURE_VERSION_R::new(((self.bits >> 14) & 0xffff) as u16)
+    }
+    #[doc = "Bit 30 - Set this bit to enable power glitch function."]
+    #[inline(always)]
+    pub fn powerglitch_en(&self) -> POWERGLITCH_EN_R {
+        POWERGLITCH_EN_R::new(((self.bits >> 30) & 1) != 0)
+    }
+    #[doc = "Bit 31 - Reserved (used for four backups method)."]
+    #[inline(always)]
+    pub fn rpt4_reserved1(&self) -> RPT4_RESERVED1_R {
+        RPT4_RESERVED1_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_REPEAT_DATA3")
+            .field("dis_download_mode", &self.dis_download_mode())
+            .field("dis_legacy_spi_boot", &self.dis_legacy_spi_boot())
+            .field("uart_print_channel", &self.uart_print_channel())
+            .field("flash_ecc_mode", &self.flash_ecc_mode())
+            .field("dis_usb_download_mode", &self.dis_usb_download_mode())
+            .field("enable_security_download", &self.enable_security_download())
+            .field("uart_print_control", &self.uart_print_control())
+            .field("pin_power_selection", &self.pin_power_selection())
+            .field("flash_type", &self.flash_type())
+            .field("flash_page_size", &self.flash_page_size())
+            .field("flash_ecc_en", &self.flash_ecc_en())
+            .field("force_send_resume", &self.force_send_resume())
+            .field("secure_version", &self.secure_version())
+            .field("powerglitch_en", &self.powerglitch_en())
+            .field("rpt4_reserved1", &self.rpt4_reserved1())
+            .finish()
+    }
+}
+#[doc = "BLOCK0 data register 4.\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_repeat_data3::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_REPEAT_DATA3_SPEC;
+impl crate::RegisterSpec for RD_REPEAT_DATA3_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_repeat_data3::R`](R) reader structure"]
+impl crate::Readable for RD_REPEAT_DATA3_SPEC {}
+#[doc = "`reset()` method sets RD_REPEAT_DATA3 to value 0"]
+impl crate::Resettable for RD_REPEAT_DATA3_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_repeat_data4.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_REPEAT_DATA4` reader"]
+pub type R = crate::R<RD_REPEAT_DATA4_SPEC>;
+#[doc = "Field `RPT4_RESERVED2` reader - Reserved (used for four backups method)."]
+pub type RPT4_RESERVED2_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:23 - Reserved (used for four backups method)."]
+    #[inline(always)]
+    pub fn rpt4_reserved2(&self) -> RPT4_RESERVED2_R {
+        RPT4_RESERVED2_R::new(self.bits & 0x00ff_ffff)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_REPEAT_DATA4")
+            .field("rpt4_reserved2", &self.rpt4_reserved2())
+            .finish()
+    }
+}
+#[doc = "BLOCK0 data register 5.\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_repeat_data4::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_REPEAT_DATA4_SPEC;
+impl crate::RegisterSpec for RD_REPEAT_DATA4_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_repeat_data4::R`](R) reader structure"]
+impl crate::Readable for RD_REPEAT_DATA4_SPEC {}
+#[doc = "`reset()` method sets RD_REPEAT_DATA4 to value 0"]
+impl crate::Resettable for RD_REPEAT_DATA4_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_repeat_err0.rs

@@ -0,0 +1,185 @@
+#[doc = "Register `RD_REPEAT_ERR0` reader"]
+pub type R = crate::R<RD_REPEAT_ERR0_SPEC>;
+#[doc = "Field `RD_DIS_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type RD_DIS_ERR_R = crate::FieldReader;
+#[doc = "Field `DIS_RTC_RAM_BOOT_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type DIS_RTC_RAM_BOOT_ERR_R = crate::BitReader;
+#[doc = "Field `DIS_ICACHE_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type DIS_ICACHE_ERR_R = crate::BitReader;
+#[doc = "Field `DIS_DCACHE_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type DIS_DCACHE_ERR_R = crate::BitReader;
+#[doc = "Field `DIS_DOWNLOAD_ICACHE_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type DIS_DOWNLOAD_ICACHE_ERR_R = crate::BitReader;
+#[doc = "Field `DIS_DOWNLOAD_DCACHE_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type DIS_DOWNLOAD_DCACHE_ERR_R = crate::BitReader;
+#[doc = "Field `DIS_FORCE_DOWNLOAD_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type DIS_FORCE_DOWNLOAD_ERR_R = crate::BitReader;
+#[doc = "Field `DIS_USB_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type DIS_USB_ERR_R = crate::BitReader;
+#[doc = "Field `DIS_CAN_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type DIS_CAN_ERR_R = crate::BitReader;
+#[doc = "Field `DIS_APP_CPU_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type DIS_APP_CPU_ERR_R = crate::BitReader;
+#[doc = "Field `SOFT_DIS_JTAG_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type SOFT_DIS_JTAG_ERR_R = crate::FieldReader;
+#[doc = "Field `DIS_PAD_JTAG_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type DIS_PAD_JTAG_ERR_R = crate::BitReader;
+#[doc = "Field `DIS_DOWNLOAD_MANUAL_ENCRYPT_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type DIS_DOWNLOAD_MANUAL_ENCRYPT_ERR_R = crate::BitReader;
+#[doc = "Field `USB_DREFH_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type USB_DREFH_ERR_R = crate::FieldReader;
+#[doc = "Field `USB_DREFL_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type USB_DREFL_ERR_R = crate::FieldReader;
+#[doc = "Field `USB_EXCHG_PINS_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type USB_EXCHG_PINS_ERR_R = crate::BitReader;
+#[doc = "Field `EXT_PHY_ENABLE_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type EXT_PHY_ENABLE_ERR_R = crate::BitReader;
+#[doc = "Field `BTLC_GPIO_ENABLE_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type BTLC_GPIO_ENABLE_ERR_R = crate::FieldReader;
+#[doc = "Field `VDD_SPI_MODECURLIM_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type VDD_SPI_MODECURLIM_ERR_R = crate::BitReader;
+#[doc = "Field `VDD_SPI_DREFH_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type VDD_SPI_DREFH_ERR_R = crate::FieldReader;
+impl R {
+    #[doc = "Bits 0:6 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn rd_dis_err(&self) -> RD_DIS_ERR_R {
+        RD_DIS_ERR_R::new((self.bits & 0x7f) as u8)
+    }
+    #[doc = "Bit 7 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn dis_rtc_ram_boot_err(&self) -> DIS_RTC_RAM_BOOT_ERR_R {
+        DIS_RTC_RAM_BOOT_ERR_R::new(((self.bits >> 7) & 1) != 0)
+    }
+    #[doc = "Bit 8 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn dis_icache_err(&self) -> DIS_ICACHE_ERR_R {
+        DIS_ICACHE_ERR_R::new(((self.bits >> 8) & 1) != 0)
+    }
+    #[doc = "Bit 9 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn dis_dcache_err(&self) -> DIS_DCACHE_ERR_R {
+        DIS_DCACHE_ERR_R::new(((self.bits >> 9) & 1) != 0)
+    }
+    #[doc = "Bit 10 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn dis_download_icache_err(&self) -> DIS_DOWNLOAD_ICACHE_ERR_R {
+        DIS_DOWNLOAD_ICACHE_ERR_R::new(((self.bits >> 10) & 1) != 0)
+    }
+    #[doc = "Bit 11 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn dis_download_dcache_err(&self) -> DIS_DOWNLOAD_DCACHE_ERR_R {
+        DIS_DOWNLOAD_DCACHE_ERR_R::new(((self.bits >> 11) & 1) != 0)
+    }
+    #[doc = "Bit 12 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn dis_force_download_err(&self) -> DIS_FORCE_DOWNLOAD_ERR_R {
+        DIS_FORCE_DOWNLOAD_ERR_R::new(((self.bits >> 12) & 1) != 0)
+    }
+    #[doc = "Bit 13 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn dis_usb_err(&self) -> DIS_USB_ERR_R {
+        DIS_USB_ERR_R::new(((self.bits >> 13) & 1) != 0)
+    }
+    #[doc = "Bit 14 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn dis_can_err(&self) -> DIS_CAN_ERR_R {
+        DIS_CAN_ERR_R::new(((self.bits >> 14) & 1) != 0)
+    }
+    #[doc = "Bit 15 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn dis_app_cpu_err(&self) -> DIS_APP_CPU_ERR_R {
+        DIS_APP_CPU_ERR_R::new(((self.bits >> 15) & 1) != 0)
+    }
+    #[doc = "Bits 16:18 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn soft_dis_jtag_err(&self) -> SOFT_DIS_JTAG_ERR_R {
+        SOFT_DIS_JTAG_ERR_R::new(((self.bits >> 16) & 7) as u8)
+    }
+    #[doc = "Bit 19 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn dis_pad_jtag_err(&self) -> DIS_PAD_JTAG_ERR_R {
+        DIS_PAD_JTAG_ERR_R::new(((self.bits >> 19) & 1) != 0)
+    }
+    #[doc = "Bit 20 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn dis_download_manual_encrypt_err(&self) -> DIS_DOWNLOAD_MANUAL_ENCRYPT_ERR_R {
+        DIS_DOWNLOAD_MANUAL_ENCRYPT_ERR_R::new(((self.bits >> 20) & 1) != 0)
+    }
+    #[doc = "Bits 21:22 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn usb_drefh_err(&self) -> USB_DREFH_ERR_R {
+        USB_DREFH_ERR_R::new(((self.bits >> 21) & 3) as u8)
+    }
+    #[doc = "Bits 23:24 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn usb_drefl_err(&self) -> USB_DREFL_ERR_R {
+        USB_DREFL_ERR_R::new(((self.bits >> 23) & 3) as u8)
+    }
+    #[doc = "Bit 25 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn usb_exchg_pins_err(&self) -> USB_EXCHG_PINS_ERR_R {
+        USB_EXCHG_PINS_ERR_R::new(((self.bits >> 25) & 1) != 0)
+    }
+    #[doc = "Bit 26 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn ext_phy_enable_err(&self) -> EXT_PHY_ENABLE_ERR_R {
+        EXT_PHY_ENABLE_ERR_R::new(((self.bits >> 26) & 1) != 0)
+    }
+    #[doc = "Bits 27:28 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn btlc_gpio_enable_err(&self) -> BTLC_GPIO_ENABLE_ERR_R {
+        BTLC_GPIO_ENABLE_ERR_R::new(((self.bits >> 27) & 3) as u8)
+    }
+    #[doc = "Bit 29 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn vdd_spi_modecurlim_err(&self) -> VDD_SPI_MODECURLIM_ERR_R {
+        VDD_SPI_MODECURLIM_ERR_R::new(((self.bits >> 29) & 1) != 0)
+    }
+    #[doc = "Bits 30:31 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn vdd_spi_drefh_err(&self) -> VDD_SPI_DREFH_ERR_R {
+        VDD_SPI_DREFH_ERR_R::new(((self.bits >> 30) & 3) as u8)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_REPEAT_ERR0")
+            .field("rd_dis_err", &self.rd_dis_err())
+            .field("dis_rtc_ram_boot_err", &self.dis_rtc_ram_boot_err())
+            .field("dis_icache_err", &self.dis_icache_err())
+            .field("dis_dcache_err", &self.dis_dcache_err())
+            .field("dis_download_icache_err", &self.dis_download_icache_err())
+            .field("dis_download_dcache_err", &self.dis_download_dcache_err())
+            .field("dis_force_download_err", &self.dis_force_download_err())
+            .field("dis_usb_err", &self.dis_usb_err())
+            .field("dis_can_err", &self.dis_can_err())
+            .field("dis_app_cpu_err", &self.dis_app_cpu_err())
+            .field("soft_dis_jtag_err", &self.soft_dis_jtag_err())
+            .field("dis_pad_jtag_err", &self.dis_pad_jtag_err())
+            .field(
+                "dis_download_manual_encrypt_err",
+                &self.dis_download_manual_encrypt_err(),
+            )
+            .field("usb_drefh_err", &self.usb_drefh_err())
+            .field("usb_drefl_err", &self.usb_drefl_err())
+            .field("usb_exchg_pins_err", &self.usb_exchg_pins_err())
+            .field("ext_phy_enable_err", &self.ext_phy_enable_err())
+            .field("btlc_gpio_enable_err", &self.btlc_gpio_enable_err())
+            .field("vdd_spi_modecurlim_err", &self.vdd_spi_modecurlim_err())
+            .field("vdd_spi_drefh_err", &self.vdd_spi_drefh_err())
+            .finish()
+    }
+}
+#[doc = "Programming error record register 0 of BLOCK0.\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_repeat_err0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_REPEAT_ERR0_SPEC;
+impl crate::RegisterSpec for RD_REPEAT_ERR0_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_repeat_err0::R`](R) reader structure"]
+impl crate::Readable for RD_REPEAT_ERR0_SPEC {}
+#[doc = "`reset()` method sets RD_REPEAT_ERR0 to value 0"]
+impl crate::Resettable for RD_REPEAT_ERR0_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_repeat_err1.rs

@@ -0,0 +1,167 @@
+#[doc = "Register `RD_REPEAT_ERR1` reader"]
+pub type R = crate::R<RD_REPEAT_ERR1_SPEC>;
+#[doc = "Field `VDD_SPI_DREFM_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type VDD_SPI_DREFM_ERR_R = crate::FieldReader;
+#[doc = "Field `VDD_SPI_DREFL_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type VDD_SPI_DREFL_ERR_R = crate::FieldReader;
+#[doc = "Field `VDD_SPI_XPD_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type VDD_SPI_XPD_ERR_R = crate::BitReader;
+#[doc = "Field `VDD_SPI_TIEH_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type VDD_SPI_TIEH_ERR_R = crate::BitReader;
+#[doc = "Field `VDD_SPI_FORCE_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type VDD_SPI_FORCE_ERR_R = crate::BitReader;
+#[doc = "Field `VDD_SPI_EN_INIT_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type VDD_SPI_EN_INIT_ERR_R = crate::BitReader;
+#[doc = "Field `VDD_SPI_ENCURLIM_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type VDD_SPI_ENCURLIM_ERR_R = crate::BitReader;
+#[doc = "Field `VDD_SPI_DCURLIM_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type VDD_SPI_DCURLIM_ERR_R = crate::FieldReader;
+#[doc = "Field `VDD_SPI_INIT_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type VDD_SPI_INIT_ERR_R = crate::FieldReader;
+#[doc = "Field `VDD_SPI_DCAP_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type VDD_SPI_DCAP_ERR_R = crate::FieldReader;
+#[doc = "Field `WDT_DELAY_SEL_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type WDT_DELAY_SEL_ERR_R = crate::FieldReader;
+#[doc = "Field `SPI_BOOT_CRYPT_CNT_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type SPI_BOOT_CRYPT_CNT_ERR_R = crate::FieldReader;
+#[doc = "Field `SECURE_BOOT_KEY_REVOKE0_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type SECURE_BOOT_KEY_REVOKE0_ERR_R = crate::BitReader;
+#[doc = "Field `SECURE_BOOT_KEY_REVOKE1_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type SECURE_BOOT_KEY_REVOKE1_ERR_R = crate::BitReader;
+#[doc = "Field `SECURE_BOOT_KEY_REVOKE2_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type SECURE_BOOT_KEY_REVOKE2_ERR_R = crate::BitReader;
+#[doc = "Field `KEY_PURPOSE_0_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type KEY_PURPOSE_0_ERR_R = crate::FieldReader;
+#[doc = "Field `KEY_PURPOSE_1_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type KEY_PURPOSE_1_ERR_R = crate::FieldReader;
+impl R {
+    #[doc = "Bits 0:1 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn vdd_spi_drefm_err(&self) -> VDD_SPI_DREFM_ERR_R {
+        VDD_SPI_DREFM_ERR_R::new((self.bits & 3) as u8)
+    }
+    #[doc = "Bits 2:3 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn vdd_spi_drefl_err(&self) -> VDD_SPI_DREFL_ERR_R {
+        VDD_SPI_DREFL_ERR_R::new(((self.bits >> 2) & 3) as u8)
+    }
+    #[doc = "Bit 4 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn vdd_spi_xpd_err(&self) -> VDD_SPI_XPD_ERR_R {
+        VDD_SPI_XPD_ERR_R::new(((self.bits >> 4) & 1) != 0)
+    }
+    #[doc = "Bit 5 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn vdd_spi_tieh_err(&self) -> VDD_SPI_TIEH_ERR_R {
+        VDD_SPI_TIEH_ERR_R::new(((self.bits >> 5) & 1) != 0)
+    }
+    #[doc = "Bit 6 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn vdd_spi_force_err(&self) -> VDD_SPI_FORCE_ERR_R {
+        VDD_SPI_FORCE_ERR_R::new(((self.bits >> 6) & 1) != 0)
+    }
+    #[doc = "Bit 7 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn vdd_spi_en_init_err(&self) -> VDD_SPI_EN_INIT_ERR_R {
+        VDD_SPI_EN_INIT_ERR_R::new(((self.bits >> 7) & 1) != 0)
+    }
+    #[doc = "Bit 8 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn vdd_spi_encurlim_err(&self) -> VDD_SPI_ENCURLIM_ERR_R {
+        VDD_SPI_ENCURLIM_ERR_R::new(((self.bits >> 8) & 1) != 0)
+    }
+    #[doc = "Bits 9:11 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn vdd_spi_dcurlim_err(&self) -> VDD_SPI_DCURLIM_ERR_R {
+        VDD_SPI_DCURLIM_ERR_R::new(((self.bits >> 9) & 7) as u8)
+    }
+    #[doc = "Bits 12:13 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn vdd_spi_init_err(&self) -> VDD_SPI_INIT_ERR_R {
+        VDD_SPI_INIT_ERR_R::new(((self.bits >> 12) & 3) as u8)
+    }
+    #[doc = "Bits 14:15 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn vdd_spi_dcap_err(&self) -> VDD_SPI_DCAP_ERR_R {
+        VDD_SPI_DCAP_ERR_R::new(((self.bits >> 14) & 3) as u8)
+    }
+    #[doc = "Bits 16:17 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn wdt_delay_sel_err(&self) -> WDT_DELAY_SEL_ERR_R {
+        WDT_DELAY_SEL_ERR_R::new(((self.bits >> 16) & 3) as u8)
+    }
+    #[doc = "Bits 18:20 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn spi_boot_crypt_cnt_err(&self) -> SPI_BOOT_CRYPT_CNT_ERR_R {
+        SPI_BOOT_CRYPT_CNT_ERR_R::new(((self.bits >> 18) & 7) as u8)
+    }
+    #[doc = "Bit 21 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn secure_boot_key_revoke0_err(&self) -> SECURE_BOOT_KEY_REVOKE0_ERR_R {
+        SECURE_BOOT_KEY_REVOKE0_ERR_R::new(((self.bits >> 21) & 1) != 0)
+    }
+    #[doc = "Bit 22 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn secure_boot_key_revoke1_err(&self) -> SECURE_BOOT_KEY_REVOKE1_ERR_R {
+        SECURE_BOOT_KEY_REVOKE1_ERR_R::new(((self.bits >> 22) & 1) != 0)
+    }
+    #[doc = "Bit 23 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn secure_boot_key_revoke2_err(&self) -> SECURE_BOOT_KEY_REVOKE2_ERR_R {
+        SECURE_BOOT_KEY_REVOKE2_ERR_R::new(((self.bits >> 23) & 1) != 0)
+    }
+    #[doc = "Bits 24:27 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn key_purpose_0_err(&self) -> KEY_PURPOSE_0_ERR_R {
+        KEY_PURPOSE_0_ERR_R::new(((self.bits >> 24) & 0x0f) as u8)
+    }
+    #[doc = "Bits 28:31 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn key_purpose_1_err(&self) -> KEY_PURPOSE_1_ERR_R {
+        KEY_PURPOSE_1_ERR_R::new(((self.bits >> 28) & 0x0f) as u8)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_REPEAT_ERR1")
+            .field("vdd_spi_drefm_err", &self.vdd_spi_drefm_err())
+            .field("vdd_spi_drefl_err", &self.vdd_spi_drefl_err())
+            .field("vdd_spi_xpd_err", &self.vdd_spi_xpd_err())
+            .field("vdd_spi_tieh_err", &self.vdd_spi_tieh_err())
+            .field("vdd_spi_force_err", &self.vdd_spi_force_err())
+            .field("vdd_spi_en_init_err", &self.vdd_spi_en_init_err())
+            .field("vdd_spi_encurlim_err", &self.vdd_spi_encurlim_err())
+            .field("vdd_spi_dcurlim_err", &self.vdd_spi_dcurlim_err())
+            .field("vdd_spi_init_err", &self.vdd_spi_init_err())
+            .field("vdd_spi_dcap_err", &self.vdd_spi_dcap_err())
+            .field("wdt_delay_sel_err", &self.wdt_delay_sel_err())
+            .field("spi_boot_crypt_cnt_err", &self.spi_boot_crypt_cnt_err())
+            .field(
+                "secure_boot_key_revoke0_err",
+                &self.secure_boot_key_revoke0_err(),
+            )
+            .field(
+                "secure_boot_key_revoke1_err",
+                &self.secure_boot_key_revoke1_err(),
+            )
+            .field(
+                "secure_boot_key_revoke2_err",
+                &self.secure_boot_key_revoke2_err(),
+            )
+            .field("key_purpose_0_err", &self.key_purpose_0_err())
+            .field("key_purpose_1_err", &self.key_purpose_1_err())
+            .finish()
+    }
+}
+#[doc = "Programming error record register 1 of BLOCK0.\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_repeat_err1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_REPEAT_ERR1_SPEC;
+impl crate::RegisterSpec for RD_REPEAT_ERR1_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_repeat_err1::R`](R) reader structure"]
+impl crate::Readable for RD_REPEAT_ERR1_SPEC {}
+#[doc = "`reset()` method sets RD_REPEAT_ERR1 to value 0"]
+impl crate::Resettable for RD_REPEAT_ERR1_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_repeat_err2.rs

@@ -0,0 +1,129 @@
+#[doc = "Register `RD_REPEAT_ERR2` reader"]
+pub type R = crate::R<RD_REPEAT_ERR2_SPEC>;
+#[doc = "Field `KEY_PURPOSE_2_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type KEY_PURPOSE_2_ERR_R = crate::FieldReader;
+#[doc = "Field `KEY_PURPOSE_3_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type KEY_PURPOSE_3_ERR_R = crate::FieldReader;
+#[doc = "Field `KEY_PURPOSE_4_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type KEY_PURPOSE_4_ERR_R = crate::FieldReader;
+#[doc = "Field `KEY_PURPOSE_5_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type KEY_PURPOSE_5_ERR_R = crate::FieldReader;
+#[doc = "Field `RPT4_RESERVED0_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type RPT4_RESERVED0_ERR_R = crate::FieldReader;
+#[doc = "Field `SECURE_BOOT_EN_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type SECURE_BOOT_EN_ERR_R = crate::BitReader;
+#[doc = "Field `SECURE_BOOT_AGGRESSIVE_REVOKE_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type SECURE_BOOT_AGGRESSIVE_REVOKE_ERR_R = crate::BitReader;
+#[doc = "Field `DIS_USB_JTAG_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type DIS_USB_JTAG_ERR_R = crate::BitReader;
+#[doc = "Field `DIS_USB_DEVICE_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type DIS_USB_DEVICE_ERR_R = crate::BitReader;
+#[doc = "Field `STRAP_JTAG_SEL_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type STRAP_JTAG_SEL_ERR_R = crate::BitReader;
+#[doc = "Field `USB_PHY_SEL_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type USB_PHY_SEL_ERR_R = crate::BitReader;
+#[doc = "Field `POWER_GLITCH_DSENSE_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type POWER_GLITCH_DSENSE_ERR_R = crate::FieldReader;
+#[doc = "Field `FLASH_TPUW_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type FLASH_TPUW_ERR_R = crate::FieldReader;
+impl R {
+    #[doc = "Bits 0:3 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn key_purpose_2_err(&self) -> KEY_PURPOSE_2_ERR_R {
+        KEY_PURPOSE_2_ERR_R::new((self.bits & 0x0f) as u8)
+    }
+    #[doc = "Bits 4:7 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn key_purpose_3_err(&self) -> KEY_PURPOSE_3_ERR_R {
+        KEY_PURPOSE_3_ERR_R::new(((self.bits >> 4) & 0x0f) as u8)
+    }
+    #[doc = "Bits 8:11 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn key_purpose_4_err(&self) -> KEY_PURPOSE_4_ERR_R {
+        KEY_PURPOSE_4_ERR_R::new(((self.bits >> 8) & 0x0f) as u8)
+    }
+    #[doc = "Bits 12:15 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn key_purpose_5_err(&self) -> KEY_PURPOSE_5_ERR_R {
+        KEY_PURPOSE_5_ERR_R::new(((self.bits >> 12) & 0x0f) as u8)
+    }
+    #[doc = "Bits 16:19 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn rpt4_reserved0_err(&self) -> RPT4_RESERVED0_ERR_R {
+        RPT4_RESERVED0_ERR_R::new(((self.bits >> 16) & 0x0f) as u8)
+    }
+    #[doc = "Bit 20 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn secure_boot_en_err(&self) -> SECURE_BOOT_EN_ERR_R {
+        SECURE_BOOT_EN_ERR_R::new(((self.bits >> 20) & 1) != 0)
+    }
+    #[doc = "Bit 21 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn secure_boot_aggressive_revoke_err(&self) -> SECURE_BOOT_AGGRESSIVE_REVOKE_ERR_R {
+        SECURE_BOOT_AGGRESSIVE_REVOKE_ERR_R::new(((self.bits >> 21) & 1) != 0)
+    }
+    #[doc = "Bit 22 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn dis_usb_jtag_err(&self) -> DIS_USB_JTAG_ERR_R {
+        DIS_USB_JTAG_ERR_R::new(((self.bits >> 22) & 1) != 0)
+    }
+    #[doc = "Bit 23 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn dis_usb_device_err(&self) -> DIS_USB_DEVICE_ERR_R {
+        DIS_USB_DEVICE_ERR_R::new(((self.bits >> 23) & 1) != 0)
+    }
+    #[doc = "Bit 24 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn strap_jtag_sel_err(&self) -> STRAP_JTAG_SEL_ERR_R {
+        STRAP_JTAG_SEL_ERR_R::new(((self.bits >> 24) & 1) != 0)
+    }
+    #[doc = "Bit 25 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn usb_phy_sel_err(&self) -> USB_PHY_SEL_ERR_R {
+        USB_PHY_SEL_ERR_R::new(((self.bits >> 25) & 1) != 0)
+    }
+    #[doc = "Bits 26:27 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn power_glitch_dsense_err(&self) -> POWER_GLITCH_DSENSE_ERR_R {
+        POWER_GLITCH_DSENSE_ERR_R::new(((self.bits >> 26) & 3) as u8)
+    }
+    #[doc = "Bits 28:31 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn flash_tpuw_err(&self) -> FLASH_TPUW_ERR_R {
+        FLASH_TPUW_ERR_R::new(((self.bits >> 28) & 0x0f) as u8)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_REPEAT_ERR2")
+            .field("key_purpose_2_err", &self.key_purpose_2_err())
+            .field("key_purpose_3_err", &self.key_purpose_3_err())
+            .field("key_purpose_4_err", &self.key_purpose_4_err())
+            .field("key_purpose_5_err", &self.key_purpose_5_err())
+            .field("rpt4_reserved0_err", &self.rpt4_reserved0_err())
+            .field("secure_boot_en_err", &self.secure_boot_en_err())
+            .field(
+                "secure_boot_aggressive_revoke_err",
+                &self.secure_boot_aggressive_revoke_err(),
+            )
+            .field("dis_usb_jtag_err", &self.dis_usb_jtag_err())
+            .field("dis_usb_device_err", &self.dis_usb_device_err())
+            .field("strap_jtag_sel_err", &self.strap_jtag_sel_err())
+            .field("usb_phy_sel_err", &self.usb_phy_sel_err())
+            .field("power_glitch_dsense_err", &self.power_glitch_dsense_err())
+            .field("flash_tpuw_err", &self.flash_tpuw_err())
+            .finish()
+    }
+}
+#[doc = "Programming error record register 2 of BLOCK0.\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_repeat_err2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_REPEAT_ERR2_SPEC;
+impl crate::RegisterSpec for RD_REPEAT_ERR2_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_repeat_err2::R`](R) reader structure"]
+impl crate::Readable for RD_REPEAT_ERR2_SPEC {}
+#[doc = "`reset()` method sets RD_REPEAT_ERR2 to value 0"]
+impl crate::Resettable for RD_REPEAT_ERR2_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_repeat_err3.rs

@@ -0,0 +1,148 @@
+#[doc = "Register `RD_REPEAT_ERR3` reader"]
+pub type R = crate::R<RD_REPEAT_ERR3_SPEC>;
+#[doc = "Field `DIS_DOWNLOAD_MODE_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type DIS_DOWNLOAD_MODE_ERR_R = crate::BitReader;
+#[doc = "Field `DIS_LEGACY_SPI_BOOT_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type DIS_LEGACY_SPI_BOOT_ERR_R = crate::BitReader;
+#[doc = "Field `UART_PRINT_CHANNEL_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type UART_PRINT_CHANNEL_ERR_R = crate::BitReader;
+#[doc = "Field `FLASH_ECC_MODE_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type FLASH_ECC_MODE_ERR_R = crate::BitReader;
+#[doc = "Field `DIS_USB_DOWNLOAD_MODE_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type DIS_USB_DOWNLOAD_MODE_ERR_R = crate::BitReader;
+#[doc = "Field `ENABLE_SECURITY_DOWNLOAD_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type ENABLE_SECURITY_DOWNLOAD_ERR_R = crate::BitReader;
+#[doc = "Field `UART_PRINT_CONTROL_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type UART_PRINT_CONTROL_ERR_R = crate::FieldReader;
+#[doc = "Field `PIN_POWER_SELECTION_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type PIN_POWER_SELECTION_ERR_R = crate::BitReader;
+#[doc = "Field `FLASH_TYPE_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type FLASH_TYPE_ERR_R = crate::BitReader;
+#[doc = "Field `FLASH_PAGE_SIZE_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type FLASH_PAGE_SIZE_ERR_R = crate::FieldReader;
+#[doc = "Field `FLASH_ECC_EN_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type FLASH_ECC_EN_ERR_R = crate::BitReader;
+#[doc = "Field `FORCE_SEND_RESUME_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type FORCE_SEND_RESUME_ERR_R = crate::BitReader;
+#[doc = "Field `SECURE_VERSION_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type SECURE_VERSION_ERR_R = crate::FieldReader<u16>;
+#[doc = "Field `POWERGLITCH_EN_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type POWERGLITCH_EN_ERR_R = crate::BitReader;
+#[doc = "Field `RPT4_RESERVED1_ERR` reader - Reserved."]
+pub type RPT4_RESERVED1_ERR_R = crate::BitReader;
+impl R {
+    #[doc = "Bit 0 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn dis_download_mode_err(&self) -> DIS_DOWNLOAD_MODE_ERR_R {
+        DIS_DOWNLOAD_MODE_ERR_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn dis_legacy_spi_boot_err(&self) -> DIS_LEGACY_SPI_BOOT_ERR_R {
+        DIS_LEGACY_SPI_BOOT_ERR_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn uart_print_channel_err(&self) -> UART_PRINT_CHANNEL_ERR_R {
+        UART_PRINT_CHANNEL_ERR_R::new(((self.bits >> 2) & 1) != 0)
+    }
+    #[doc = "Bit 3 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn flash_ecc_mode_err(&self) -> FLASH_ECC_MODE_ERR_R {
+        FLASH_ECC_MODE_ERR_R::new(((self.bits >> 3) & 1) != 0)
+    }
+    #[doc = "Bit 4 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn dis_usb_download_mode_err(&self) -> DIS_USB_DOWNLOAD_MODE_ERR_R {
+        DIS_USB_DOWNLOAD_MODE_ERR_R::new(((self.bits >> 4) & 1) != 0)
+    }
+    #[doc = "Bit 5 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn enable_security_download_err(&self) -> ENABLE_SECURITY_DOWNLOAD_ERR_R {
+        ENABLE_SECURITY_DOWNLOAD_ERR_R::new(((self.bits >> 5) & 1) != 0)
+    }
+    #[doc = "Bits 6:7 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn uart_print_control_err(&self) -> UART_PRINT_CONTROL_ERR_R {
+        UART_PRINT_CONTROL_ERR_R::new(((self.bits >> 6) & 3) as u8)
+    }
+    #[doc = "Bit 8 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn pin_power_selection_err(&self) -> PIN_POWER_SELECTION_ERR_R {
+        PIN_POWER_SELECTION_ERR_R::new(((self.bits >> 8) & 1) != 0)
+    }
+    #[doc = "Bit 9 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn flash_type_err(&self) -> FLASH_TYPE_ERR_R {
+        FLASH_TYPE_ERR_R::new(((self.bits >> 9) & 1) != 0)
+    }
+    #[doc = "Bits 10:11 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn flash_page_size_err(&self) -> FLASH_PAGE_SIZE_ERR_R {
+        FLASH_PAGE_SIZE_ERR_R::new(((self.bits >> 10) & 3) as u8)
+    }
+    #[doc = "Bit 12 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn flash_ecc_en_err(&self) -> FLASH_ECC_EN_ERR_R {
+        FLASH_ECC_EN_ERR_R::new(((self.bits >> 12) & 1) != 0)
+    }
+    #[doc = "Bit 13 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn force_send_resume_err(&self) -> FORCE_SEND_RESUME_ERR_R {
+        FORCE_SEND_RESUME_ERR_R::new(((self.bits >> 13) & 1) != 0)
+    }
+    #[doc = "Bits 14:29 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn secure_version_err(&self) -> SECURE_VERSION_ERR_R {
+        SECURE_VERSION_ERR_R::new(((self.bits >> 14) & 0xffff) as u16)
+    }
+    #[doc = "Bit 30 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn powerglitch_en_err(&self) -> POWERGLITCH_EN_ERR_R {
+        POWERGLITCH_EN_ERR_R::new(((self.bits >> 30) & 1) != 0)
+    }
+    #[doc = "Bit 31 - Reserved."]
+    #[inline(always)]
+    pub fn rpt4_reserved1_err(&self) -> RPT4_RESERVED1_ERR_R {
+        RPT4_RESERVED1_ERR_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_REPEAT_ERR3")
+            .field("dis_download_mode_err", &self.dis_download_mode_err())
+            .field("dis_legacy_spi_boot_err", &self.dis_legacy_spi_boot_err())
+            .field("uart_print_channel_err", &self.uart_print_channel_err())
+            .field("flash_ecc_mode_err", &self.flash_ecc_mode_err())
+            .field(
+                "dis_usb_download_mode_err",
+                &self.dis_usb_download_mode_err(),
+            )
+            .field(
+                "enable_security_download_err",
+                &self.enable_security_download_err(),
+            )
+            .field("uart_print_control_err", &self.uart_print_control_err())
+            .field("pin_power_selection_err", &self.pin_power_selection_err())
+            .field("flash_type_err", &self.flash_type_err())
+            .field("flash_page_size_err", &self.flash_page_size_err())
+            .field("flash_ecc_en_err", &self.flash_ecc_en_err())
+            .field("force_send_resume_err", &self.force_send_resume_err())
+            .field("secure_version_err", &self.secure_version_err())
+            .field("powerglitch_en_err", &self.powerglitch_en_err())
+            .field("rpt4_reserved1_err", &self.rpt4_reserved1_err())
+            .finish()
+    }
+}
+#[doc = "Programming error record register 3 of BLOCK0.\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_repeat_err3::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_REPEAT_ERR3_SPEC;
+impl crate::RegisterSpec for RD_REPEAT_ERR3_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_repeat_err3::R`](R) reader structure"]
+impl crate::Readable for RD_REPEAT_ERR3_SPEC {}
+#[doc = "`reset()` method sets RD_REPEAT_ERR3 to value 0"]
+impl crate::Resettable for RD_REPEAT_ERR3_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_repeat_err4.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_REPEAT_ERR4` reader"]
+pub type R = crate::R<RD_REPEAT_ERR4_SPEC>;
+#[doc = "Field `RPT4_RESERVED2_ERR` reader - If any bits in this filed are 1, then it indicates a programming error."]
+pub type RPT4_RESERVED2_ERR_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:23 - If any bits in this filed are 1, then it indicates a programming error."]
+    #[inline(always)]
+    pub fn rpt4_reserved2_err(&self) -> RPT4_RESERVED2_ERR_R {
+        RPT4_RESERVED2_ERR_R::new(self.bits & 0x00ff_ffff)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_REPEAT_ERR4")
+            .field("rpt4_reserved2_err", &self.rpt4_reserved2_err())
+            .finish()
+    }
+}
+#[doc = "Programming error record register 4 of BLOCK0.\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_repeat_err4::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_REPEAT_ERR4_SPEC;
+impl crate::RegisterSpec for RD_REPEAT_ERR4_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_repeat_err4::R`](R) reader structure"]
+impl crate::Readable for RD_REPEAT_ERR4_SPEC {}
+#[doc = "`reset()` method sets RD_REPEAT_ERR4 to value 0"]
+impl crate::Resettable for RD_REPEAT_ERR4_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_rs_err0.rs

@@ -0,0 +1,150 @@
+#[doc = "Register `RD_RS_ERR0` reader"]
+pub type R = crate::R<RD_RS_ERR0_SPEC>;
+#[doc = "Field `MAC_SPI_8M_ERR_NUM` reader - The value of this signal means the number of error bytes."]
+pub type MAC_SPI_8M_ERR_NUM_R = crate::FieldReader;
+#[doc = "Field `MAC_SPI_8M_FAIL` reader - 0: Means no failure and that the data of MAC_SPI_8M is reliable 1: Means that programming user data failed and the number of error bytes is over 6."]
+pub type MAC_SPI_8M_FAIL_R = crate::BitReader;
+#[doc = "Field `SYS_PART1_NUM` reader - The value of this signal means the number of error bytes."]
+pub type SYS_PART1_NUM_R = crate::FieldReader;
+#[doc = "Field `SYS_PART1_FAIL` reader - 0: Means no failure and that the data of system part1 is reliable 1: Means that programming user data failed and the number of error bytes is over 6."]
+pub type SYS_PART1_FAIL_R = crate::BitReader;
+#[doc = "Field `USR_DATA_ERR_NUM` reader - The value of this signal means the number of error bytes."]
+pub type USR_DATA_ERR_NUM_R = crate::FieldReader;
+#[doc = "Field `USR_DATA_FAIL` reader - 0: Means no failure and that the user data is reliable 1: Means that programming user data failed and the number of error bytes is over 6."]
+pub type USR_DATA_FAIL_R = crate::BitReader;
+#[doc = "Field `KEY0_ERR_NUM` reader - The value of this signal means the number of error bytes."]
+pub type KEY0_ERR_NUM_R = crate::FieldReader;
+#[doc = "Field `KEY0_FAIL` reader - 0: Means no failure and that the data of key0 is reliable 1: Means that programming key0 failed and the number of error bytes is over 6."]
+pub type KEY0_FAIL_R = crate::BitReader;
+#[doc = "Field `KEY1_ERR_NUM` reader - The value of this signal means the number of error bytes."]
+pub type KEY1_ERR_NUM_R = crate::FieldReader;
+#[doc = "Field `KEY1_FAIL` reader - 0: Means no failure and that the data of key1 is reliable 1: Means that programming key1 failed and the number of error bytes is over 6."]
+pub type KEY1_FAIL_R = crate::BitReader;
+#[doc = "Field `KEY2_ERR_NUM` reader - The value of this signal means the number of error bytes."]
+pub type KEY2_ERR_NUM_R = crate::FieldReader;
+#[doc = "Field `KEY2_FAIL` reader - 0: Means no failure and that the data of key2 is reliable 1: Means that programming key2 failed and the number of error bytes is over 6."]
+pub type KEY2_FAIL_R = crate::BitReader;
+#[doc = "Field `KEY3_ERR_NUM` reader - The value of this signal means the number of error bytes."]
+pub type KEY3_ERR_NUM_R = crate::FieldReader;
+#[doc = "Field `KEY3_FAIL` reader - 0: Means no failure and that the data of key3 is reliable 1: Means that programming key3 failed and the number of error bytes is over 6."]
+pub type KEY3_FAIL_R = crate::BitReader;
+#[doc = "Field `KEY4_ERR_NUM` reader - The value of this signal means the number of error bytes."]
+pub type KEY4_ERR_NUM_R = crate::FieldReader;
+#[doc = "Field `KEY4_FAIL` reader - 0: Means no failure and that the data of key4 is reliable 1: Means that programming key4 failed and the number of error bytes is over 6."]
+pub type KEY4_FAIL_R = crate::BitReader;
+impl R {
+    #[doc = "Bits 0:2 - The value of this signal means the number of error bytes."]
+    #[inline(always)]
+    pub fn mac_spi_8m_err_num(&self) -> MAC_SPI_8M_ERR_NUM_R {
+        MAC_SPI_8M_ERR_NUM_R::new((self.bits & 7) as u8)
+    }
+    #[doc = "Bit 3 - 0: Means no failure and that the data of MAC_SPI_8M is reliable 1: Means that programming user data failed and the number of error bytes is over 6."]
+    #[inline(always)]
+    pub fn mac_spi_8m_fail(&self) -> MAC_SPI_8M_FAIL_R {
+        MAC_SPI_8M_FAIL_R::new(((self.bits >> 3) & 1) != 0)
+    }
+    #[doc = "Bits 4:6 - The value of this signal means the number of error bytes."]
+    #[inline(always)]
+    pub fn sys_part1_num(&self) -> SYS_PART1_NUM_R {
+        SYS_PART1_NUM_R::new(((self.bits >> 4) & 7) as u8)
+    }
+    #[doc = "Bit 7 - 0: Means no failure and that the data of system part1 is reliable 1: Means that programming user data failed and the number of error bytes is over 6."]
+    #[inline(always)]
+    pub fn sys_part1_fail(&self) -> SYS_PART1_FAIL_R {
+        SYS_PART1_FAIL_R::new(((self.bits >> 7) & 1) != 0)
+    }
+    #[doc = "Bits 8:10 - The value of this signal means the number of error bytes."]
+    #[inline(always)]
+    pub fn usr_data_err_num(&self) -> USR_DATA_ERR_NUM_R {
+        USR_DATA_ERR_NUM_R::new(((self.bits >> 8) & 7) as u8)
+    }
+    #[doc = "Bit 11 - 0: Means no failure and that the user data is reliable 1: Means that programming user data failed and the number of error bytes is over 6."]
+    #[inline(always)]
+    pub fn usr_data_fail(&self) -> USR_DATA_FAIL_R {
+        USR_DATA_FAIL_R::new(((self.bits >> 11) & 1) != 0)
+    }
+    #[doc = "Bits 12:14 - The value of this signal means the number of error bytes."]
+    #[inline(always)]
+    pub fn key0_err_num(&self) -> KEY0_ERR_NUM_R {
+        KEY0_ERR_NUM_R::new(((self.bits >> 12) & 7) as u8)
+    }
+    #[doc = "Bit 15 - 0: Means no failure and that the data of key0 is reliable 1: Means that programming key0 failed and the number of error bytes is over 6."]
+    #[inline(always)]
+    pub fn key0_fail(&self) -> KEY0_FAIL_R {
+        KEY0_FAIL_R::new(((self.bits >> 15) & 1) != 0)
+    }
+    #[doc = "Bits 16:18 - The value of this signal means the number of error bytes."]
+    #[inline(always)]
+    pub fn key1_err_num(&self) -> KEY1_ERR_NUM_R {
+        KEY1_ERR_NUM_R::new(((self.bits >> 16) & 7) as u8)
+    }
+    #[doc = "Bit 19 - 0: Means no failure and that the data of key1 is reliable 1: Means that programming key1 failed and the number of error bytes is over 6."]
+    #[inline(always)]
+    pub fn key1_fail(&self) -> KEY1_FAIL_R {
+        KEY1_FAIL_R::new(((self.bits >> 19) & 1) != 0)
+    }
+    #[doc = "Bits 20:22 - The value of this signal means the number of error bytes."]
+    #[inline(always)]
+    pub fn key2_err_num(&self) -> KEY2_ERR_NUM_R {
+        KEY2_ERR_NUM_R::new(((self.bits >> 20) & 7) as u8)
+    }
+    #[doc = "Bit 23 - 0: Means no failure and that the data of key2 is reliable 1: Means that programming key2 failed and the number of error bytes is over 6."]
+    #[inline(always)]
+    pub fn key2_fail(&self) -> KEY2_FAIL_R {
+        KEY2_FAIL_R::new(((self.bits >> 23) & 1) != 0)
+    }
+    #[doc = "Bits 24:26 - The value of this signal means the number of error bytes."]
+    #[inline(always)]
+    pub fn key3_err_num(&self) -> KEY3_ERR_NUM_R {
+        KEY3_ERR_NUM_R::new(((self.bits >> 24) & 7) as u8)
+    }
+    #[doc = "Bit 27 - 0: Means no failure and that the data of key3 is reliable 1: Means that programming key3 failed and the number of error bytes is over 6."]
+    #[inline(always)]
+    pub fn key3_fail(&self) -> KEY3_FAIL_R {
+        KEY3_FAIL_R::new(((self.bits >> 27) & 1) != 0)
+    }
+    #[doc = "Bits 28:30 - The value of this signal means the number of error bytes."]
+    #[inline(always)]
+    pub fn key4_err_num(&self) -> KEY4_ERR_NUM_R {
+        KEY4_ERR_NUM_R::new(((self.bits >> 28) & 7) as u8)
+    }
+    #[doc = "Bit 31 - 0: Means no failure and that the data of key4 is reliable 1: Means that programming key4 failed and the number of error bytes is over 6."]
+    #[inline(always)]
+    pub fn key4_fail(&self) -> KEY4_FAIL_R {
+        KEY4_FAIL_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_RS_ERR0")
+            .field("mac_spi_8m_err_num", &self.mac_spi_8m_err_num())
+            .field("mac_spi_8m_fail", &self.mac_spi_8m_fail())
+            .field("sys_part1_num", &self.sys_part1_num())
+            .field("sys_part1_fail", &self.sys_part1_fail())
+            .field("usr_data_err_num", &self.usr_data_err_num())
+            .field("usr_data_fail", &self.usr_data_fail())
+            .field("key0_err_num", &self.key0_err_num())
+            .field("key0_fail", &self.key0_fail())
+            .field("key1_err_num", &self.key1_err_num())
+            .field("key1_fail", &self.key1_fail())
+            .field("key2_err_num", &self.key2_err_num())
+            .field("key2_fail", &self.key2_fail())
+            .field("key3_err_num", &self.key3_err_num())
+            .field("key3_fail", &self.key3_fail())
+            .field("key4_err_num", &self.key4_err_num())
+            .field("key4_fail", &self.key4_fail())
+            .finish()
+    }
+}
+#[doc = "Programming error record register 0 of BLOCK1-10.\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_rs_err0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_RS_ERR0_SPEC;
+impl crate::RegisterSpec for RD_RS_ERR0_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_rs_err0::R`](R) reader structure"]
+impl crate::Readable for RD_RS_ERR0_SPEC {}
+#[doc = "`reset()` method sets RD_RS_ERR0 to value 0"]
+impl crate::Resettable for RD_RS_ERR0_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_rs_err1.rs

@@ -0,0 +1,54 @@
+#[doc = "Register `RD_RS_ERR1` reader"]
+pub type R = crate::R<RD_RS_ERR1_SPEC>;
+#[doc = "Field `KEY5_ERR_NUM` reader - The value of this signal means the number of error bytes."]
+pub type KEY5_ERR_NUM_R = crate::FieldReader;
+#[doc = "Field `KEY5_FAIL` reader - 0: Means no failure and that the data of KEY5 is reliable 1: Means that programming user data failed and the number of error bytes is over 6."]
+pub type KEY5_FAIL_R = crate::BitReader;
+#[doc = "Field `SYS_PART2_ERR_NUM` reader - The value of this signal means the number of error bytes."]
+pub type SYS_PART2_ERR_NUM_R = crate::FieldReader;
+#[doc = "Field `SYS_PART2_FAIL` reader - 0: Means no failure and that the data of system part2 is reliable 1: Means that programming user data failed and the number of error bytes is over 6."]
+pub type SYS_PART2_FAIL_R = crate::BitReader;
+impl R {
+    #[doc = "Bits 0:2 - The value of this signal means the number of error bytes."]
+    #[inline(always)]
+    pub fn key5_err_num(&self) -> KEY5_ERR_NUM_R {
+        KEY5_ERR_NUM_R::new((self.bits & 7) as u8)
+    }
+    #[doc = "Bit 3 - 0: Means no failure and that the data of KEY5 is reliable 1: Means that programming user data failed and the number of error bytes is over 6."]
+    #[inline(always)]
+    pub fn key5_fail(&self) -> KEY5_FAIL_R {
+        KEY5_FAIL_R::new(((self.bits >> 3) & 1) != 0)
+    }
+    #[doc = "Bits 4:6 - The value of this signal means the number of error bytes."]
+    #[inline(always)]
+    pub fn sys_part2_err_num(&self) -> SYS_PART2_ERR_NUM_R {
+        SYS_PART2_ERR_NUM_R::new(((self.bits >> 4) & 7) as u8)
+    }
+    #[doc = "Bit 7 - 0: Means no failure and that the data of system part2 is reliable 1: Means that programming user data failed and the number of error bytes is over 6."]
+    #[inline(always)]
+    pub fn sys_part2_fail(&self) -> SYS_PART2_FAIL_R {
+        SYS_PART2_FAIL_R::new(((self.bits >> 7) & 1) != 0)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_RS_ERR1")
+            .field("key5_err_num", &self.key5_err_num())
+            .field("key5_fail", &self.key5_fail())
+            .field("sys_part2_err_num", &self.sys_part2_err_num())
+            .field("sys_part2_fail", &self.sys_part2_fail())
+            .finish()
+    }
+}
+#[doc = "Programming error record register 1 of BLOCK1-10.\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_rs_err1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_RS_ERR1_SPEC;
+impl crate::RegisterSpec for RD_RS_ERR1_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_rs_err1::R`](R) reader structure"]
+impl crate::Readable for RD_RS_ERR1_SPEC {}
+#[doc = "`reset()` method sets RD_RS_ERR1 to value 0"]
+impl crate::Resettable for RD_RS_ERR1_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_sys_part1_data0.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_SYS_PART1_DATA0` reader"]
+pub type R = crate::R<RD_SYS_PART1_DATA0_SPEC>;
+#[doc = "Field `SYS_DATA_PART1_0` reader - Stores the zeroth 32 bits of the first part of system data."]
+pub type SYS_DATA_PART1_0_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the zeroth 32 bits of the first part of system data."]
+    #[inline(always)]
+    pub fn sys_data_part1_0(&self) -> SYS_DATA_PART1_0_R {
+        SYS_DATA_PART1_0_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_SYS_PART1_DATA0")
+            .field("sys_data_part1_0", &self.sys_data_part1_0())
+            .finish()
+    }
+}
+#[doc = "Register 0 of BLOCK2 (system).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_sys_part1_data0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_SYS_PART1_DATA0_SPEC;
+impl crate::RegisterSpec for RD_SYS_PART1_DATA0_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_sys_part1_data0::R`](R) reader structure"]
+impl crate::Readable for RD_SYS_PART1_DATA0_SPEC {}
+#[doc = "`reset()` method sets RD_SYS_PART1_DATA0 to value 0"]
+impl crate::Resettable for RD_SYS_PART1_DATA0_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_sys_part1_data1.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_SYS_PART1_DATA1` reader"]
+pub type R = crate::R<RD_SYS_PART1_DATA1_SPEC>;
+#[doc = "Field `SYS_DATA_PART1_1` reader - Stores the first 32 bits of the first part of system data."]
+pub type SYS_DATA_PART1_1_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the first 32 bits of the first part of system data."]
+    #[inline(always)]
+    pub fn sys_data_part1_1(&self) -> SYS_DATA_PART1_1_R {
+        SYS_DATA_PART1_1_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_SYS_PART1_DATA1")
+            .field("sys_data_part1_1", &self.sys_data_part1_1())
+            .finish()
+    }
+}
+#[doc = "Register 1 of BLOCK2 (system).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_sys_part1_data1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_SYS_PART1_DATA1_SPEC;
+impl crate::RegisterSpec for RD_SYS_PART1_DATA1_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_sys_part1_data1::R`](R) reader structure"]
+impl crate::Readable for RD_SYS_PART1_DATA1_SPEC {}
+#[doc = "`reset()` method sets RD_SYS_PART1_DATA1 to value 0"]
+impl crate::Resettable for RD_SYS_PART1_DATA1_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_sys_part1_data2.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_SYS_PART1_DATA2` reader"]
+pub type R = crate::R<RD_SYS_PART1_DATA2_SPEC>;
+#[doc = "Field `SYS_DATA_PART1_2` reader - Stores the second 32 bits of the first part of system data."]
+pub type SYS_DATA_PART1_2_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the second 32 bits of the first part of system data."]
+    #[inline(always)]
+    pub fn sys_data_part1_2(&self) -> SYS_DATA_PART1_2_R {
+        SYS_DATA_PART1_2_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_SYS_PART1_DATA2")
+            .field("sys_data_part1_2", &self.sys_data_part1_2())
+            .finish()
+    }
+}
+#[doc = "Register 2 of BLOCK2 (system).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_sys_part1_data2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_SYS_PART1_DATA2_SPEC;
+impl crate::RegisterSpec for RD_SYS_PART1_DATA2_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_sys_part1_data2::R`](R) reader structure"]
+impl crate::Readable for RD_SYS_PART1_DATA2_SPEC {}
+#[doc = "`reset()` method sets RD_SYS_PART1_DATA2 to value 0"]
+impl crate::Resettable for RD_SYS_PART1_DATA2_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_sys_part1_data3.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_SYS_PART1_DATA3` reader"]
+pub type R = crate::R<RD_SYS_PART1_DATA3_SPEC>;
+#[doc = "Field `SYS_DATA_PART1_3` reader - Stores the third 32 bits of the first part of system data."]
+pub type SYS_DATA_PART1_3_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the third 32 bits of the first part of system data."]
+    #[inline(always)]
+    pub fn sys_data_part1_3(&self) -> SYS_DATA_PART1_3_R {
+        SYS_DATA_PART1_3_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_SYS_PART1_DATA3")
+            .field("sys_data_part1_3", &self.sys_data_part1_3())
+            .finish()
+    }
+}
+#[doc = "Register 3 of BLOCK2 (system).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_sys_part1_data3::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_SYS_PART1_DATA3_SPEC;
+impl crate::RegisterSpec for RD_SYS_PART1_DATA3_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_sys_part1_data3::R`](R) reader structure"]
+impl crate::Readable for RD_SYS_PART1_DATA3_SPEC {}
+#[doc = "`reset()` method sets RD_SYS_PART1_DATA3 to value 0"]
+impl crate::Resettable for RD_SYS_PART1_DATA3_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_sys_part1_data4.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_SYS_PART1_DATA4` reader"]
+pub type R = crate::R<RD_SYS_PART1_DATA4_SPEC>;
+#[doc = "Field `SYS_DATA_PART1_4` reader - Stores the fourth 32 bits of the first part of system data."]
+pub type SYS_DATA_PART1_4_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the fourth 32 bits of the first part of system data."]
+    #[inline(always)]
+    pub fn sys_data_part1_4(&self) -> SYS_DATA_PART1_4_R {
+        SYS_DATA_PART1_4_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_SYS_PART1_DATA4")
+            .field("sys_data_part1_4", &self.sys_data_part1_4())
+            .finish()
+    }
+}
+#[doc = "Register 4 of BLOCK2 (system).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_sys_part1_data4::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_SYS_PART1_DATA4_SPEC;
+impl crate::RegisterSpec for RD_SYS_PART1_DATA4_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_sys_part1_data4::R`](R) reader structure"]
+impl crate::Readable for RD_SYS_PART1_DATA4_SPEC {}
+#[doc = "`reset()` method sets RD_SYS_PART1_DATA4 to value 0"]
+impl crate::Resettable for RD_SYS_PART1_DATA4_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_sys_part1_data5.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_SYS_PART1_DATA5` reader"]
+pub type R = crate::R<RD_SYS_PART1_DATA5_SPEC>;
+#[doc = "Field `SYS_DATA_PART1_5` reader - Stores the fifth 32 bits of the first part of system data."]
+pub type SYS_DATA_PART1_5_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the fifth 32 bits of the first part of system data."]
+    #[inline(always)]
+    pub fn sys_data_part1_5(&self) -> SYS_DATA_PART1_5_R {
+        SYS_DATA_PART1_5_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_SYS_PART1_DATA5")
+            .field("sys_data_part1_5", &self.sys_data_part1_5())
+            .finish()
+    }
+}
+#[doc = "Register 5 of BLOCK2 (system).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_sys_part1_data5::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_SYS_PART1_DATA5_SPEC;
+impl crate::RegisterSpec for RD_SYS_PART1_DATA5_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_sys_part1_data5::R`](R) reader structure"]
+impl crate::Readable for RD_SYS_PART1_DATA5_SPEC {}
+#[doc = "`reset()` method sets RD_SYS_PART1_DATA5 to value 0"]
+impl crate::Resettable for RD_SYS_PART1_DATA5_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_sys_part1_data6.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_SYS_PART1_DATA6` reader"]
+pub type R = crate::R<RD_SYS_PART1_DATA6_SPEC>;
+#[doc = "Field `SYS_DATA_PART1_6` reader - Stores the sixth 32 bits of the first part of system data."]
+pub type SYS_DATA_PART1_6_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the sixth 32 bits of the first part of system data."]
+    #[inline(always)]
+    pub fn sys_data_part1_6(&self) -> SYS_DATA_PART1_6_R {
+        SYS_DATA_PART1_6_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_SYS_PART1_DATA6")
+            .field("sys_data_part1_6", &self.sys_data_part1_6())
+            .finish()
+    }
+}
+#[doc = "Register 6 of BLOCK2 (system).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_sys_part1_data6::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_SYS_PART1_DATA6_SPEC;
+impl crate::RegisterSpec for RD_SYS_PART1_DATA6_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_sys_part1_data6::R`](R) reader structure"]
+impl crate::Readable for RD_SYS_PART1_DATA6_SPEC {}
+#[doc = "`reset()` method sets RD_SYS_PART1_DATA6 to value 0"]
+impl crate::Resettable for RD_SYS_PART1_DATA6_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_sys_part1_data7.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_SYS_PART1_DATA7` reader"]
+pub type R = crate::R<RD_SYS_PART1_DATA7_SPEC>;
+#[doc = "Field `SYS_DATA_PART1_7` reader - Stores the seventh 32 bits of the first part of system data."]
+pub type SYS_DATA_PART1_7_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the seventh 32 bits of the first part of system data."]
+    #[inline(always)]
+    pub fn sys_data_part1_7(&self) -> SYS_DATA_PART1_7_R {
+        SYS_DATA_PART1_7_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_SYS_PART1_DATA7")
+            .field("sys_data_part1_7", &self.sys_data_part1_7())
+            .finish()
+    }
+}
+#[doc = "Register 7 of BLOCK2 (system).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_sys_part1_data7::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_SYS_PART1_DATA7_SPEC;
+impl crate::RegisterSpec for RD_SYS_PART1_DATA7_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_sys_part1_data7::R`](R) reader structure"]
+impl crate::Readable for RD_SYS_PART1_DATA7_SPEC {}
+#[doc = "`reset()` method sets RD_SYS_PART1_DATA7 to value 0"]
+impl crate::Resettable for RD_SYS_PART1_DATA7_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_sys_part2_data0.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_SYS_PART2_DATA0` reader"]
+pub type R = crate::R<RD_SYS_PART2_DATA0_SPEC>;
+#[doc = "Field `SYS_DATA_PART2_0` reader - Stores the 0th 32 bits of the 2nd part of system data."]
+pub type SYS_DATA_PART2_0_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the 0th 32 bits of the 2nd part of system data."]
+    #[inline(always)]
+    pub fn sys_data_part2_0(&self) -> SYS_DATA_PART2_0_R {
+        SYS_DATA_PART2_0_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_SYS_PART2_DATA0")
+            .field("sys_data_part2_0", &self.sys_data_part2_0())
+            .finish()
+    }
+}
+#[doc = "Register 0 of BLOCK10 (system).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_sys_part2_data0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_SYS_PART2_DATA0_SPEC;
+impl crate::RegisterSpec for RD_SYS_PART2_DATA0_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_sys_part2_data0::R`](R) reader structure"]
+impl crate::Readable for RD_SYS_PART2_DATA0_SPEC {}
+#[doc = "`reset()` method sets RD_SYS_PART2_DATA0 to value 0"]
+impl crate::Resettable for RD_SYS_PART2_DATA0_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_sys_part2_data1.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_SYS_PART2_DATA1` reader"]
+pub type R = crate::R<RD_SYS_PART2_DATA1_SPEC>;
+#[doc = "Field `SYS_DATA_PART2_1` reader - Stores the 1st 32 bits of the 2nd part of system data."]
+pub type SYS_DATA_PART2_1_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the 1st 32 bits of the 2nd part of system data."]
+    #[inline(always)]
+    pub fn sys_data_part2_1(&self) -> SYS_DATA_PART2_1_R {
+        SYS_DATA_PART2_1_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_SYS_PART2_DATA1")
+            .field("sys_data_part2_1", &self.sys_data_part2_1())
+            .finish()
+    }
+}
+#[doc = "Register 1 of BLOCK9 (KEY5).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_sys_part2_data1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_SYS_PART2_DATA1_SPEC;
+impl crate::RegisterSpec for RD_SYS_PART2_DATA1_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_sys_part2_data1::R`](R) reader structure"]
+impl crate::Readable for RD_SYS_PART2_DATA1_SPEC {}
+#[doc = "`reset()` method sets RD_SYS_PART2_DATA1 to value 0"]
+impl crate::Resettable for RD_SYS_PART2_DATA1_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_sys_part2_data2.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_SYS_PART2_DATA2` reader"]
+pub type R = crate::R<RD_SYS_PART2_DATA2_SPEC>;
+#[doc = "Field `SYS_DATA_PART2_2` reader - Stores the 2nd 32 bits of the 2nd part of system data."]
+pub type SYS_DATA_PART2_2_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the 2nd 32 bits of the 2nd part of system data."]
+    #[inline(always)]
+    pub fn sys_data_part2_2(&self) -> SYS_DATA_PART2_2_R {
+        SYS_DATA_PART2_2_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_SYS_PART2_DATA2")
+            .field("sys_data_part2_2", &self.sys_data_part2_2())
+            .finish()
+    }
+}
+#[doc = "Register 2 of BLOCK10 (system).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_sys_part2_data2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_SYS_PART2_DATA2_SPEC;
+impl crate::RegisterSpec for RD_SYS_PART2_DATA2_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_sys_part2_data2::R`](R) reader structure"]
+impl crate::Readable for RD_SYS_PART2_DATA2_SPEC {}
+#[doc = "`reset()` method sets RD_SYS_PART2_DATA2 to value 0"]
+impl crate::Resettable for RD_SYS_PART2_DATA2_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_sys_part2_data3.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_SYS_PART2_DATA3` reader"]
+pub type R = crate::R<RD_SYS_PART2_DATA3_SPEC>;
+#[doc = "Field `SYS_DATA_PART2_3` reader - Stores the 3rd 32 bits of the 2nd part of system data."]
+pub type SYS_DATA_PART2_3_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the 3rd 32 bits of the 2nd part of system data."]
+    #[inline(always)]
+    pub fn sys_data_part2_3(&self) -> SYS_DATA_PART2_3_R {
+        SYS_DATA_PART2_3_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_SYS_PART2_DATA3")
+            .field("sys_data_part2_3", &self.sys_data_part2_3())
+            .finish()
+    }
+}
+#[doc = "Register 3 of BLOCK10 (system).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_sys_part2_data3::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_SYS_PART2_DATA3_SPEC;
+impl crate::RegisterSpec for RD_SYS_PART2_DATA3_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_sys_part2_data3::R`](R) reader structure"]
+impl crate::Readable for RD_SYS_PART2_DATA3_SPEC {}
+#[doc = "`reset()` method sets RD_SYS_PART2_DATA3 to value 0"]
+impl crate::Resettable for RD_SYS_PART2_DATA3_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_sys_part2_data4.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_SYS_PART2_DATA4` reader"]
+pub type R = crate::R<RD_SYS_PART2_DATA4_SPEC>;
+#[doc = "Field `SYS_DATA_PART2_4` reader - Stores the 4th 32 bits of the 2nd part of system data."]
+pub type SYS_DATA_PART2_4_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the 4th 32 bits of the 2nd part of system data."]
+    #[inline(always)]
+    pub fn sys_data_part2_4(&self) -> SYS_DATA_PART2_4_R {
+        SYS_DATA_PART2_4_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_SYS_PART2_DATA4")
+            .field("sys_data_part2_4", &self.sys_data_part2_4())
+            .finish()
+    }
+}
+#[doc = "Register 4 of BLOCK10 (system).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_sys_part2_data4::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_SYS_PART2_DATA4_SPEC;
+impl crate::RegisterSpec for RD_SYS_PART2_DATA4_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_sys_part2_data4::R`](R) reader structure"]
+impl crate::Readable for RD_SYS_PART2_DATA4_SPEC {}
+#[doc = "`reset()` method sets RD_SYS_PART2_DATA4 to value 0"]
+impl crate::Resettable for RD_SYS_PART2_DATA4_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/efuse/rd_sys_part2_data5.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `RD_SYS_PART2_DATA5` reader"]
+pub type R = crate::R<RD_SYS_PART2_DATA5_SPEC>;
+#[doc = "Field `SYS_DATA_PART2_5` reader - Stores the 5th 32 bits of the 2nd part of system data."]
+pub type SYS_DATA_PART2_5_R = crate::FieldReader<u32>;
+impl R {
+    #[doc = "Bits 0:31 - Stores the 5th 32 bits of the 2nd part of system data."]
+    #[inline(always)]
+    pub fn sys_data_part2_5(&self) -> SYS_DATA_PART2_5_R {
+        SYS_DATA_PART2_5_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("RD_SYS_PART2_DATA5")
+            .field("sys_data_part2_5", &self.sys_data_part2_5())
+            .finish()
+    }
+}
+#[doc = "Register 5 of BLOCK10 (system).\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_sys_part2_data5::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct RD_SYS_PART2_DATA5_SPEC;
+impl crate::RegisterSpec for RD_SYS_PART2_DATA5_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`rd_sys_part2_data5::R`](R) reader structure"]
+impl crate::Readable for RD_SYS_PART2_DATA5_SPEC {}
+#[doc = "`reset()` method sets RD_SYS_PART2_DATA5 to value 0"]
+impl crate::Resettable for RD_SYS_PART2_DATA5_SPEC {
+    const RESET_VALUE: u32 = 0;
+}