feat: add display UI with splash screen, dashboard, and RSSI sparkline

Implement full SSD1306 OLED display support:
- Splash screen on boot (1.5s) with project name, version, board
- Dashboard showing radio state, config, counters, RSSI/SNR
- RSSI history sparkline (64-sample ring buffer, 2px-wide bars)
- DisplayOn/DisplayOff host commands routed via dedicated channel
- Pure render functions against generic DrawTarget (no hardware coupling)
- Display on/off control bypasses radio task entirely

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>

vendor/esp32s3/src/io_mux.rs

@@ -0,0 +1,44 @@
+#[repr(C)]
+#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
+#[doc = "Register block"]
+pub struct RegisterBlock {
+    pin_ctrl: PIN_CTRL,
+    gpio: [GPIO; 49],
+    _reserved2: [u8; 0x34],
+    date: DATE,
+}
+impl RegisterBlock {
+    #[doc = "0x00 - Clock Output Configuration Register"]
+    #[inline(always)]
+    pub const fn pin_ctrl(&self) -> &PIN_CTRL {
+        &self.pin_ctrl
+    }
+    #[doc = "0x04..0xc8 - IO MUX Configure Register for pad GPIO0"]
+    #[inline(always)]
+    pub const fn gpio(&self, n: usize) -> &GPIO {
+        &self.gpio[n]
+    }
+    #[doc = "Iterator for array of:"]
+    #[doc = "0x04..0xc8 - IO MUX Configure Register for pad GPIO0"]
+    #[inline(always)]
+    pub fn gpio_iter(&self) -> impl Iterator<Item = &GPIO> {
+        self.gpio.iter()
+    }
+    #[doc = "0xfc - IO MUX Version Control Register"]
+    #[inline(always)]
+    pub const fn date(&self) -> &DATE {
+        &self.date
+    }
+}
+#[doc = "PIN_CTRL (rw) register accessor: Clock Output Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pin_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pin_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pin_ctrl`] module"]
+pub type PIN_CTRL = crate::Reg<pin_ctrl::PIN_CTRL_SPEC>;
+#[doc = "Clock Output Configuration Register"]
+pub mod pin_ctrl;
+#[doc = "GPIO (rw) register accessor: IO MUX Configure Register for pad GPIO0\n\nYou can [`read`](crate::Reg::read) this register and get [`gpio::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gpio::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio`] module"]
+pub type GPIO = crate::Reg<gpio::GPIO_SPEC>;
+#[doc = "IO MUX Configure Register for pad GPIO0"]
+pub mod gpio;
+#[doc = "DATE (rw) register accessor: IO MUX Version Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`date::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`date::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@date`] module"]
+pub type DATE = crate::Reg<date::DATE_SPEC>;
+#[doc = "IO MUX Version Control Register"]
+pub mod date;