feat: add display UI with splash screen, dashboard, and RSSI sparkline

Implement full SSD1306 OLED display support:
- Splash screen on boot (1.5s) with project name, version, board
- Dashboard showing radio state, config, counters, RSSI/SNR
- RSSI history sparkline (64-sample ring buffer, 2px-wide bars)
- DisplayOn/DisplayOff host commands routed via dedicated channel
- Pure render functions against generic DrawTarget (no hardware coupling)
- Display on/off control bypasses radio task entirely

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
This commit is contained in:
swaitsandClaude Opus 4.6 committed 2026-03-29 20:42:54 -06:00
1 parent 7064110293
commit 3102fc747a
17624 files changed
+4564928 -38

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#[doc = "Register `BUSY` reader"]
pub struct R(crate::R<BUSY_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<BUSY_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<BUSY_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<BUSY_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Field `BUSY` reader - ADC busy register."]
pub type BUSY_R = crate::BitReader<BUSY_A>;
#[doc = "ADC busy register.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum BUSY_A {
#[doc = "0: No ongoing ADC conversion is taking place. ADC is ready."]
READY = 0,
#[doc = "1: An ADC conversion is taking place. ADC is busy."]
BUSY = 1,
}
impl From<BUSY_A> for bool {
#[inline(always)]
fn from(variant: BUSY_A) -> Self {
variant as u8 != 0
}
}
impl BUSY_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> BUSY_A {
match self.bits {
false => BUSY_A::READY,
true => BUSY_A::BUSY,
}
}
#[doc = "Checks if the value of the field is `READY`"]
#[inline(always)]
pub fn is_ready(&self) -> bool {
*self == BUSY_A::READY
}
#[doc = "Checks if the value of the field is `BUSY`"]
#[inline(always)]
pub fn is_busy(&self) -> bool {
*self == BUSY_A::BUSY
}
}
impl R {
#[doc = "Bit 0 - ADC busy register."]
#[inline(always)]
pub fn busy(&self) -> BUSY_R {
BUSY_R::new((self.bits & 1) != 0)
}
}
#[doc = "ADC busy register.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [busy](index.html) module"]
pub struct BUSY_SPEC;
impl crate::RegisterSpec for BUSY_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [busy::R](R) reader structure"]
impl crate::Readable for BUSY_SPEC {
type Reader = R;
}
#[doc = "`reset()` method sets BUSY to value 0"]
impl crate::Resettable for BUSY_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
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#[doc = "Register `CONFIG` reader"]
pub struct R(crate::R<CONFIG_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<CONFIG_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<CONFIG_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<CONFIG_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `CONFIG` writer"]
pub struct W(crate::W<CONFIG_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<CONFIG_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<CONFIG_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<CONFIG_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `RES` reader - ADC resolution."]
pub type RES_R = crate::FieldReader<u8, RES_A>;
#[doc = "ADC resolution.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum RES_A {
#[doc = "0: 8bit ADC resolution."]
_8BIT = 0,
#[doc = "1: 9bit ADC resolution."]
_9BIT = 1,
#[doc = "2: 10bit ADC resolution."]
_10BIT = 2,
}
impl From<RES_A> for u8 {
#[inline(always)]
fn from(variant: RES_A) -> Self {
variant as _
}
}
impl RES_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> Option<RES_A> {
match self.bits {
0 => Some(RES_A::_8BIT),
1 => Some(RES_A::_9BIT),
2 => Some(RES_A::_10BIT),
_ => None,
}
}
#[doc = "Checks if the value of the field is `_8BIT`"]
#[inline(always)]
pub fn is_8bit(&self) -> bool {
*self == RES_A::_8BIT
}
#[doc = "Checks if the value of the field is `_9BIT`"]
#[inline(always)]
pub fn is_9bit(&self) -> bool {
*self == RES_A::_9BIT
}
#[doc = "Checks if the value of the field is `_10BIT`"]
#[inline(always)]
pub fn is_10bit(&self) -> bool {
*self == RES_A::_10BIT
}
}
#[doc = "Field `RES` writer - ADC resolution."]
pub type RES_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CONFIG_SPEC, u8, RES_A, 2, O>;
impl<'a, const O: u8> RES_W<'a, O> {
#[doc = "8bit ADC resolution."]
#[inline(always)]
pub fn _8bit(self) -> &'a mut W {
self.variant(RES_A::_8BIT)
}
#[doc = "9bit ADC resolution."]
#[inline(always)]
pub fn _9bit(self) -> &'a mut W {
self.variant(RES_A::_9BIT)
}
#[doc = "10bit ADC resolution."]
#[inline(always)]
pub fn _10bit(self) -> &'a mut W {
self.variant(RES_A::_10BIT)
}
}
#[doc = "Field `INPSEL` reader - ADC input selection."]
pub type INPSEL_R = crate::FieldReader<u8, INPSEL_A>;
#[doc = "ADC input selection.\n\nValue on reset: 6"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum INPSEL_A {
#[doc = "0: Analog input specified by PSEL with no prescaling used as input for the conversion."]
ANALOG_INPUT_NO_PRESCALING = 0,
#[doc = "1: Analog input specified by PSEL with 2/3 prescaling used as input for the conversion."]
ANALOG_INPUT_TWO_THIRDS_PRESCALING = 1,
#[doc = "2: Analog input specified by PSEL with 1/3 prescaling used as input for the conversion."]
ANALOG_INPUT_ONE_THIRD_PRESCALING = 2,
#[doc = "5: Supply voltage with 2/3 prescaling used as input for the conversion."]
SUPPLY_TWO_THIRDS_PRESCALING = 5,
#[doc = "6: Supply voltage with 1/3 prescaling used as input for the conversion."]
SUPPLY_ONE_THIRD_PRESCALING = 6,
}
impl From<INPSEL_A> for u8 {
#[inline(always)]
fn from(variant: INPSEL_A) -> Self {
variant as _
}
}
impl INPSEL_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> Option<INPSEL_A> {
match self.bits {
0 => Some(INPSEL_A::ANALOG_INPUT_NO_PRESCALING),
1 => Some(INPSEL_A::ANALOG_INPUT_TWO_THIRDS_PRESCALING),
2 => Some(INPSEL_A::ANALOG_INPUT_ONE_THIRD_PRESCALING),
5 => Some(INPSEL_A::SUPPLY_TWO_THIRDS_PRESCALING),
6 => Some(INPSEL_A::SUPPLY_ONE_THIRD_PRESCALING),
_ => None,
}
}
#[doc = "Checks if the value of the field is `ANALOG_INPUT_NO_PRESCALING`"]
#[inline(always)]
pub fn is_analog_input_no_prescaling(&self) -> bool {
*self == INPSEL_A::ANALOG_INPUT_NO_PRESCALING
}
#[doc = "Checks if the value of the field is `ANALOG_INPUT_TWO_THIRDS_PRESCALING`"]
#[inline(always)]
pub fn is_analog_input_two_thirds_prescaling(&self) -> bool {
*self == INPSEL_A::ANALOG_INPUT_TWO_THIRDS_PRESCALING
}
#[doc = "Checks if the value of the field is `ANALOG_INPUT_ONE_THIRD_PRESCALING`"]
#[inline(always)]
pub fn is_analog_input_one_third_prescaling(&self) -> bool {
*self == INPSEL_A::ANALOG_INPUT_ONE_THIRD_PRESCALING
}
#[doc = "Checks if the value of the field is `SUPPLY_TWO_THIRDS_PRESCALING`"]
#[inline(always)]
pub fn is_supply_two_thirds_prescaling(&self) -> bool {
*self == INPSEL_A::SUPPLY_TWO_THIRDS_PRESCALING
}
#[doc = "Checks if the value of the field is `SUPPLY_ONE_THIRD_PRESCALING`"]
#[inline(always)]
pub fn is_supply_one_third_prescaling(&self) -> bool {
*self == INPSEL_A::SUPPLY_ONE_THIRD_PRESCALING
}
}
#[doc = "Field `INPSEL` writer - ADC input selection."]
pub type INPSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CONFIG_SPEC, u8, INPSEL_A, 3, O>;
impl<'a, const O: u8> INPSEL_W<'a, O> {
#[doc = "Analog input specified by PSEL with no prescaling used as input for the conversion."]
#[inline(always)]
pub fn analog_input_no_prescaling(self) -> &'a mut W {
self.variant(INPSEL_A::ANALOG_INPUT_NO_PRESCALING)
}
#[doc = "Analog input specified by PSEL with 2/3 prescaling used as input for the conversion."]
#[inline(always)]
pub fn analog_input_two_thirds_prescaling(self) -> &'a mut W {
self.variant(INPSEL_A::ANALOG_INPUT_TWO_THIRDS_PRESCALING)
}
#[doc = "Analog input specified by PSEL with 1/3 prescaling used as input for the conversion."]
#[inline(always)]
pub fn analog_input_one_third_prescaling(self) -> &'a mut W {
self.variant(INPSEL_A::ANALOG_INPUT_ONE_THIRD_PRESCALING)
}
#[doc = "Supply voltage with 2/3 prescaling used as input for the conversion."]
#[inline(always)]
pub fn supply_two_thirds_prescaling(self) -> &'a mut W {
self.variant(INPSEL_A::SUPPLY_TWO_THIRDS_PRESCALING)
}
#[doc = "Supply voltage with 1/3 prescaling used as input for the conversion."]
#[inline(always)]
pub fn supply_one_third_prescaling(self) -> &'a mut W {
self.variant(INPSEL_A::SUPPLY_ONE_THIRD_PRESCALING)
}
}
#[doc = "Field `REFSEL` reader - ADC reference selection."]
pub type REFSEL_R = crate::FieldReader<u8, REFSEL_A>;
#[doc = "ADC reference selection.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum REFSEL_A {
#[doc = "0: Use internal 1.2V bandgap voltage as reference for conversion."]
VBG = 0,
#[doc = "1: Use external source configured by EXTREFSEL as reference for conversion."]
EXTERNAL = 1,
#[doc = "2: Use supply voltage with 1/2 prescaling as reference for conversion. Only usable when supply voltage is between 1.7V and 2.6V."]
SUPPLY_ONE_HALF_PRESCALING = 2,
#[doc = "3: Use supply voltage with 1/3 prescaling as reference for conversion. Only usable when supply voltage is between 2.5V and 3.6V."]
SUPPLY_ONE_THIRD_PRESCALING = 3,
}
impl From<REFSEL_A> for u8 {
#[inline(always)]
fn from(variant: REFSEL_A) -> Self {
variant as _
}
}
impl REFSEL_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> REFSEL_A {
match self.bits {
0 => REFSEL_A::VBG,
1 => REFSEL_A::EXTERNAL,
2 => REFSEL_A::SUPPLY_ONE_HALF_PRESCALING,
3 => REFSEL_A::SUPPLY_ONE_THIRD_PRESCALING,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `VBG`"]
#[inline(always)]
pub fn is_vbg(&self) -> bool {
*self == REFSEL_A::VBG
}
#[doc = "Checks if the value of the field is `EXTERNAL`"]
#[inline(always)]
pub fn is_external(&self) -> bool {
*self == REFSEL_A::EXTERNAL
}
#[doc = "Checks if the value of the field is `SUPPLY_ONE_HALF_PRESCALING`"]
#[inline(always)]
pub fn is_supply_one_half_prescaling(&self) -> bool {
*self == REFSEL_A::SUPPLY_ONE_HALF_PRESCALING
}
#[doc = "Checks if the value of the field is `SUPPLY_ONE_THIRD_PRESCALING`"]
#[inline(always)]
pub fn is_supply_one_third_prescaling(&self) -> bool {
*self == REFSEL_A::SUPPLY_ONE_THIRD_PRESCALING
}
}
#[doc = "Field `REFSEL` writer - ADC reference selection."]
pub type REFSEL_W<'a, const O: u8> =
crate::FieldWriterSafe<'a, u32, CONFIG_SPEC, u8, REFSEL_A, 2, O>;
impl<'a, const O: u8> REFSEL_W<'a, O> {
#[doc = "Use internal 1.2V bandgap voltage as reference for conversion."]
#[inline(always)]
pub fn vbg(self) -> &'a mut W {
self.variant(REFSEL_A::VBG)
}
#[doc = "Use external source configured by EXTREFSEL as reference for conversion."]
#[inline(always)]
pub fn external(self) -> &'a mut W {
self.variant(REFSEL_A::EXTERNAL)
}
#[doc = "Use supply voltage with 1/2 prescaling as reference for conversion. Only usable when supply voltage is between 1.7V and 2.6V."]
#[inline(always)]
pub fn supply_one_half_prescaling(self) -> &'a mut W {
self.variant(REFSEL_A::SUPPLY_ONE_HALF_PRESCALING)
}
#[doc = "Use supply voltage with 1/3 prescaling as reference for conversion. Only usable when supply voltage is between 2.5V and 3.6V."]
#[inline(always)]
pub fn supply_one_third_prescaling(self) -> &'a mut W {
self.variant(REFSEL_A::SUPPLY_ONE_THIRD_PRESCALING)
}
}
#[doc = "Field `PSEL` reader - ADC analog pin selection."]
pub type PSEL_R = crate::FieldReader<u8, PSEL_A>;
#[doc = "ADC analog pin selection.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum PSEL_A {
#[doc = "0: Analog input pins disabled."]
DISABLED = 0,
#[doc = "1: Use analog input 0 as analog input."]
ANALOG_INPUT0 = 1,
#[doc = "2: Use analog input 1 as analog input."]
ANALOG_INPUT1 = 2,
#[doc = "4: Use analog input 2 as analog input."]
ANALOG_INPUT2 = 4,
#[doc = "8: Use analog input 3 as analog input."]
ANALOG_INPUT3 = 8,
#[doc = "16: Use analog input 4 as analog input."]
ANALOG_INPUT4 = 16,
#[doc = "32: Use analog input 5 as analog input."]
ANALOG_INPUT5 = 32,
#[doc = "64: Use analog input 6 as analog input."]
ANALOG_INPUT6 = 64,
#[doc = "128: Use analog input 7 as analog input."]
ANALOG_INPUT7 = 128,
}
impl From<PSEL_A> for u8 {
#[inline(always)]
fn from(variant: PSEL_A) -> Self {
variant as _
}
}
impl PSEL_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> Option<PSEL_A> {
match self.bits {
0 => Some(PSEL_A::DISABLED),
1 => Some(PSEL_A::ANALOG_INPUT0),
2 => Some(PSEL_A::ANALOG_INPUT1),
4 => Some(PSEL_A::ANALOG_INPUT2),
8 => Some(PSEL_A::ANALOG_INPUT3),
16 => Some(PSEL_A::ANALOG_INPUT4),
32 => Some(PSEL_A::ANALOG_INPUT5),
64 => Some(PSEL_A::ANALOG_INPUT6),
128 => Some(PSEL_A::ANALOG_INPUT7),
_ => None,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == PSEL_A::DISABLED
}
#[doc = "Checks if the value of the field is `ANALOG_INPUT0`"]
#[inline(always)]
pub fn is_analog_input0(&self) -> bool {
*self == PSEL_A::ANALOG_INPUT0
}
#[doc = "Checks if the value of the field is `ANALOG_INPUT1`"]
#[inline(always)]
pub fn is_analog_input1(&self) -> bool {
*self == PSEL_A::ANALOG_INPUT1
}
#[doc = "Checks if the value of the field is `ANALOG_INPUT2`"]
#[inline(always)]
pub fn is_analog_input2(&self) -> bool {
*self == PSEL_A::ANALOG_INPUT2
}
#[doc = "Checks if the value of the field is `ANALOG_INPUT3`"]
#[inline(always)]
pub fn is_analog_input3(&self) -> bool {
*self == PSEL_A::ANALOG_INPUT3
}
#[doc = "Checks if the value of the field is `ANALOG_INPUT4`"]
#[inline(always)]
pub fn is_analog_input4(&self) -> bool {
*self == PSEL_A::ANALOG_INPUT4
}
#[doc = "Checks if the value of the field is `ANALOG_INPUT5`"]
#[inline(always)]
pub fn is_analog_input5(&self) -> bool {
*self == PSEL_A::ANALOG_INPUT5
}
#[doc = "Checks if the value of the field is `ANALOG_INPUT6`"]
#[inline(always)]
pub fn is_analog_input6(&self) -> bool {
*self == PSEL_A::ANALOG_INPUT6
}
#[doc = "Checks if the value of the field is `ANALOG_INPUT7`"]
#[inline(always)]
pub fn is_analog_input7(&self) -> bool {
*self == PSEL_A::ANALOG_INPUT7
}
}
#[doc = "Field `PSEL` writer - ADC analog pin selection."]
pub type PSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CONFIG_SPEC, u8, PSEL_A, 8, O>;
impl<'a, const O: u8> PSEL_W<'a, O> {
#[doc = "Analog input pins disabled."]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(PSEL_A::DISABLED)
}
#[doc = "Use analog input 0 as analog input."]
#[inline(always)]
pub fn analog_input0(self) -> &'a mut W {
self.variant(PSEL_A::ANALOG_INPUT0)
}
#[doc = "Use analog input 1 as analog input."]
#[inline(always)]
pub fn analog_input1(self) -> &'a mut W {
self.variant(PSEL_A::ANALOG_INPUT1)
}
#[doc = "Use analog input 2 as analog input."]
#[inline(always)]
pub fn analog_input2(self) -> &'a mut W {
self.variant(PSEL_A::ANALOG_INPUT2)
}
#[doc = "Use analog input 3 as analog input."]
#[inline(always)]
pub fn analog_input3(self) -> &'a mut W {
self.variant(PSEL_A::ANALOG_INPUT3)
}
#[doc = "Use analog input 4 as analog input."]
#[inline(always)]
pub fn analog_input4(self) -> &'a mut W {
self.variant(PSEL_A::ANALOG_INPUT4)
}
#[doc = "Use analog input 5 as analog input."]
#[inline(always)]
pub fn analog_input5(self) -> &'a mut W {
self.variant(PSEL_A::ANALOG_INPUT5)
}
#[doc = "Use analog input 6 as analog input."]
#[inline(always)]
pub fn analog_input6(self) -> &'a mut W {
self.variant(PSEL_A::ANALOG_INPUT6)
}
#[doc = "Use analog input 7 as analog input."]
#[inline(always)]
pub fn analog_input7(self) -> &'a mut W {
self.variant(PSEL_A::ANALOG_INPUT7)
}
}
#[doc = "Field `EXTREFSEL` reader - ADC external reference pin selection."]
pub type EXTREFSEL_R = crate::FieldReader<u8, EXTREFSEL_A>;
#[doc = "ADC external reference pin selection.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum EXTREFSEL_A {
#[doc = "0: Analog external reference inputs disabled."]
NONE = 0,
#[doc = "1: Use analog reference 0 as reference."]
ANALOG_REFERENCE0 = 1,
#[doc = "2: Use analog reference 1 as reference."]
ANALOG_REFERENCE1 = 2,
}
impl From<EXTREFSEL_A> for u8 {
#[inline(always)]
fn from(variant: EXTREFSEL_A) -> Self {
variant as _
}
}
impl EXTREFSEL_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> Option<EXTREFSEL_A> {
match self.bits {
0 => Some(EXTREFSEL_A::NONE),
1 => Some(EXTREFSEL_A::ANALOG_REFERENCE0),
2 => Some(EXTREFSEL_A::ANALOG_REFERENCE1),
_ => None,
}
}
#[doc = "Checks if the value of the field is `NONE`"]
#[inline(always)]
pub fn is_none(&self) -> bool {
*self == EXTREFSEL_A::NONE
}
#[doc = "Checks if the value of the field is `ANALOG_REFERENCE0`"]
#[inline(always)]
pub fn is_analog_reference0(&self) -> bool {
*self == EXTREFSEL_A::ANALOG_REFERENCE0
}
#[doc = "Checks if the value of the field is `ANALOG_REFERENCE1`"]
#[inline(always)]
pub fn is_analog_reference1(&self) -> bool {
*self == EXTREFSEL_A::ANALOG_REFERENCE1
}
}
#[doc = "Field `EXTREFSEL` writer - ADC external reference pin selection."]
pub type EXTREFSEL_W<'a, const O: u8> =
crate::FieldWriter<'a, u32, CONFIG_SPEC, u8, EXTREFSEL_A, 2, O>;
impl<'a, const O: u8> EXTREFSEL_W<'a, O> {
#[doc = "Analog external reference inputs disabled."]
#[inline(always)]
pub fn none(self) -> &'a mut W {
self.variant(EXTREFSEL_A::NONE)
}
#[doc = "Use analog reference 0 as reference."]
#[inline(always)]
pub fn analog_reference0(self) -> &'a mut W {
self.variant(EXTREFSEL_A::ANALOG_REFERENCE0)
}
#[doc = "Use analog reference 1 as reference."]
#[inline(always)]
pub fn analog_reference1(self) -> &'a mut W {
self.variant(EXTREFSEL_A::ANALOG_REFERENCE1)
}
}
impl R {
#[doc = "Bits 0:1 - ADC resolution."]
#[inline(always)]
pub fn res(&self) -> RES_R {
RES_R::new((self.bits & 3) as u8)
}
#[doc = "Bits 2:4 - ADC input selection."]
#[inline(always)]
pub fn inpsel(&self) -> INPSEL_R {
INPSEL_R::new(((self.bits >> 2) & 7) as u8)
}
#[doc = "Bits 5:6 - ADC reference selection."]
#[inline(always)]
pub fn refsel(&self) -> REFSEL_R {
REFSEL_R::new(((self.bits >> 5) & 3) as u8)
}
#[doc = "Bits 8:15 - ADC analog pin selection."]
#[inline(always)]
pub fn psel(&self) -> PSEL_R {
PSEL_R::new(((self.bits >> 8) & 0xff) as u8)
}
#[doc = "Bits 16:17 - ADC external reference pin selection."]
#[inline(always)]
pub fn extrefsel(&self) -> EXTREFSEL_R {
EXTREFSEL_R::new(((self.bits >> 16) & 3) as u8)
}
}
impl W {
#[doc = "Bits 0:1 - ADC resolution."]
#[inline(always)]
pub fn res(&mut self) -> RES_W<0> {
RES_W::new(self)
}
#[doc = "Bits 2:4 - ADC input selection."]
#[inline(always)]
pub fn inpsel(&mut self) -> INPSEL_W<2> {
INPSEL_W::new(self)
}
#[doc = "Bits 5:6 - ADC reference selection."]
#[inline(always)]
pub fn refsel(&mut self) -> REFSEL_W<5> {
REFSEL_W::new(self)
}
#[doc = "Bits 8:15 - ADC analog pin selection."]
#[inline(always)]
pub fn psel(&mut self) -> PSEL_W<8> {
PSEL_W::new(self)
}
#[doc = "Bits 16:17 - ADC external reference pin selection."]
#[inline(always)]
pub fn extrefsel(&mut self) -> EXTREFSEL_W<16> {
EXTREFSEL_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "ADC configuration register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [config](index.html) module"]
pub struct CONFIG_SPEC;
impl crate::RegisterSpec for CONFIG_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [config::R](R) reader structure"]
impl crate::Readable for CONFIG_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [config::W](W) writer structure"]
impl crate::Writable for CONFIG_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets CONFIG to value 0x18"]
impl crate::Resettable for CONFIG_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0x18
}
}
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#[doc = "Register `ENABLE` reader"]
pub struct R(crate::R<ENABLE_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<ENABLE_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<ENABLE_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<ENABLE_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `ENABLE` writer"]
pub struct W(crate::W<ENABLE_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<ENABLE_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<ENABLE_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<ENABLE_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `ENABLE` reader - ADC enable."]
pub type ENABLE_R = crate::FieldReader<u8, ENABLE_A>;
#[doc = "ADC enable.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum ENABLE_A {
#[doc = "0: ADC is disabled."]
DISABLED = 0,
#[doc = "1: ADC is enabled. If an analog input pin is selected as source of the conversion, the selected pin is configured as an analog input."]
ENABLED = 1,
}
impl From<ENABLE_A> for u8 {
#[inline(always)]
fn from(variant: ENABLE_A) -> Self {
variant as _
}
}
impl ENABLE_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> Option<ENABLE_A> {
match self.bits {
0 => Some(ENABLE_A::DISABLED),
1 => Some(ENABLE_A::ENABLED),
_ => None,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == ENABLE_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == ENABLE_A::ENABLED
}
}
#[doc = "Field `ENABLE` writer - ADC enable."]
pub type ENABLE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ENABLE_SPEC, u8, ENABLE_A, 2, O>;
impl<'a, const O: u8> ENABLE_W<'a, O> {
#[doc = "ADC is disabled."]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(ENABLE_A::DISABLED)
}
#[doc = "ADC is enabled. If an analog input pin is selected as source of the conversion, the selected pin is configured as an analog input."]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(ENABLE_A::ENABLED)
}
}
impl R {
#[doc = "Bits 0:1 - ADC enable."]
#[inline(always)]
pub fn enable(&self) -> ENABLE_R {
ENABLE_R::new((self.bits & 3) as u8)
}
}
impl W {
#[doc = "Bits 0:1 - ADC enable."]
#[inline(always)]
pub fn enable(&mut self) -> ENABLE_W<0> {
ENABLE_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "ADC enable.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [enable](index.html) module"]
pub struct ENABLE_SPEC;
impl crate::RegisterSpec for ENABLE_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [enable::R](R) reader structure"]
impl crate::Readable for ENABLE_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [enable::W](W) writer structure"]
impl crate::Writable for ENABLE_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets ENABLE to value 0"]
impl crate::Resettable for ENABLE_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
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#[doc = "Register `EVENTS_END` reader"]
pub struct R(crate::R<EVENTS_END_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<EVENTS_END_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<EVENTS_END_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<EVENTS_END_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `EVENTS_END` writer"]
pub struct W(crate::W<EVENTS_END_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<EVENTS_END_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<EVENTS_END_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<EVENTS_END_SPEC>) -> Self {
W(writer)
}
}
impl W {
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "ADC conversion complete.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_end](index.html) module"]
pub struct EVENTS_END_SPEC;
impl crate::RegisterSpec for EVENTS_END_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [events_end::R](R) reader structure"]
impl crate::Readable for EVENTS_END_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [events_end::W](W) writer structure"]
impl crate::Writable for EVENTS_END_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets EVENTS_END to value 0"]
impl crate::Resettable for EVENTS_END_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
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#[doc = "Register `INTENCLR` reader"]
pub struct R(crate::R<INTENCLR_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<INTENCLR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<INTENCLR_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<INTENCLR_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `INTENCLR` writer"]
pub struct W(crate::W<INTENCLR_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<INTENCLR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<INTENCLR_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<INTENCLR_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `END` reader - Disable interrupt on END event."]
pub type END_R = crate::BitReader<END_A>;
#[doc = "Disable interrupt on END event.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum END_A {
#[doc = "0: Interrupt disabled."]
DISABLED = 0,
#[doc = "1: Interrupt enabled."]
ENABLED = 1,
}
impl From<END_A> for bool {
#[inline(always)]
fn from(variant: END_A) -> Self {
variant as u8 != 0
}
}
impl END_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> END_A {
match self.bits {
false => END_A::DISABLED,
true => END_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == END_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == END_A::ENABLED
}
}
#[doc = "Disable interrupt on END event.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum END_AW {
#[doc = "1: Disable interrupt on write."]
CLEAR = 1,
}
impl From<END_AW> for bool {
#[inline(always)]
fn from(variant: END_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `END` writer - Disable interrupt on END event."]
pub type END_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, END_AW, O>;
impl<'a, const O: u8> END_W<'a, O> {
#[doc = "Disable interrupt on write."]
#[inline(always)]
pub fn clear(self) -> &'a mut W {
self.variant(END_AW::CLEAR)
}
}
impl R {
#[doc = "Bit 0 - Disable interrupt on END event."]
#[inline(always)]
pub fn end(&self) -> END_R {
END_R::new((self.bits & 1) != 0)
}
}
impl W {
#[doc = "Bit 0 - Disable interrupt on END event."]
#[inline(always)]
pub fn end(&mut self) -> END_W<0> {
END_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Interrupt enable clear register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"]
pub struct INTENCLR_SPEC;
impl crate::RegisterSpec for INTENCLR_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [intenclr::R](R) reader structure"]
impl crate::Readable for INTENCLR_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"]
impl crate::Writable for INTENCLR_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets INTENCLR to value 0"]
impl crate::Resettable for INTENCLR_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
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#[doc = "Register `INTENSET` reader"]
pub struct R(crate::R<INTENSET_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<INTENSET_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<INTENSET_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<INTENSET_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `INTENSET` writer"]
pub struct W(crate::W<INTENSET_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<INTENSET_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<INTENSET_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<INTENSET_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `END` reader - Enable interrupt on END event."]
pub type END_R = crate::BitReader<END_A>;
#[doc = "Enable interrupt on END event.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum END_A {
#[doc = "0: Interrupt disabled."]
DISABLED = 0,
#[doc = "1: Interrupt enabled."]
ENABLED = 1,
}
impl From<END_A> for bool {
#[inline(always)]
fn from(variant: END_A) -> Self {
variant as u8 != 0
}
}
impl END_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> END_A {
match self.bits {
false => END_A::DISABLED,
true => END_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == END_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == END_A::ENABLED
}
}
#[doc = "Enable interrupt on END event.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum END_AW {
#[doc = "1: Enable interrupt on write."]
SET = 1,
}
impl From<END_AW> for bool {
#[inline(always)]
fn from(variant: END_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `END` writer - Enable interrupt on END event."]
pub type END_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, END_AW, O>;
impl<'a, const O: u8> END_W<'a, O> {
#[doc = "Enable interrupt on write."]
#[inline(always)]
pub fn set(self) -> &'a mut W {
self.variant(END_AW::SET)
}
}
impl R {
#[doc = "Bit 0 - Enable interrupt on END event."]
#[inline(always)]
pub fn end(&self) -> END_R {
END_R::new((self.bits & 1) != 0)
}
}
impl W {
#[doc = "Bit 0 - Enable interrupt on END event."]
#[inline(always)]
pub fn end(&mut self) -> END_W<0> {
END_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Interrupt enable set register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"]
pub struct INTENSET_SPEC;
impl crate::RegisterSpec for INTENSET_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [intenset::R](R) reader structure"]
impl crate::Readable for INTENSET_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"]
impl crate::Writable for INTENSET_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets INTENSET to value 0"]
impl crate::Resettable for INTENSET_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
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#[doc = "Register `POWER` reader"]
pub struct R(crate::R<POWER_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<POWER_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<POWER_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<POWER_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `POWER` writer"]
pub struct W(crate::W<POWER_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<POWER_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<POWER_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<POWER_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `POWER` reader - Peripheral power control."]
pub type POWER_R = crate::BitReader<POWER_A>;
#[doc = "Peripheral power control.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum POWER_A {
#[doc = "0: Module power disabled."]
DISABLED = 0,
#[doc = "1: Module power enabled."]
ENABLED = 1,
}
impl From<POWER_A> for bool {
#[inline(always)]
fn from(variant: POWER_A) -> Self {
variant as u8 != 0
}
}
impl POWER_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> POWER_A {
match self.bits {
false => POWER_A::DISABLED,
true => POWER_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == POWER_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == POWER_A::ENABLED
}
}
#[doc = "Field `POWER` writer - Peripheral power control."]
pub type POWER_W<'a, const O: u8> = crate::BitWriter<'a, u32, POWER_SPEC, POWER_A, O>;
impl<'a, const O: u8> POWER_W<'a, O> {
#[doc = "Module power disabled."]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(POWER_A::DISABLED)
}
#[doc = "Module power enabled."]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(POWER_A::ENABLED)
}
}
impl R {
#[doc = "Bit 0 - Peripheral power control."]
#[inline(always)]
pub fn power(&self) -> POWER_R {
POWER_R::new((self.bits & 1) != 0)
}
}
impl W {
#[doc = "Bit 0 - Peripheral power control."]
#[inline(always)]
pub fn power(&mut self) -> POWER_W<0> {
POWER_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Peripheral power control.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [power](index.html) module"]
pub struct POWER_SPEC;
impl crate::RegisterSpec for POWER_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [power::R](R) reader structure"]
impl crate::Readable for POWER_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [power::W](W) writer structure"]
impl crate::Writable for POWER_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets POWER to value 0"]
impl crate::Resettable for POWER_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
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#[doc = "Register `RESULT` reader"]
pub struct R(crate::R<RESULT_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<RESULT_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<RESULT_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<RESULT_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Field `RESULT` reader - Result of ADC conversion."]
pub type RESULT_R = crate::FieldReader<u16, u16>;
impl R {
#[doc = "Bits 0:9 - Result of ADC conversion."]
#[inline(always)]
pub fn result(&self) -> RESULT_R {
RESULT_R::new((self.bits & 0x03ff) as u16)
}
}
#[doc = "Result of ADC conversion.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [result](index.html) module"]
pub struct RESULT_SPEC;
impl crate::RegisterSpec for RESULT_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [result::R](R) reader structure"]
impl crate::Readable for RESULT_SPEC {
type Reader = R;
}
#[doc = "`reset()` method sets RESULT to value 0"]
impl crate::Resettable for RESULT_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
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#[doc = "Register `TASKS_START` writer"]
pub struct W(crate::W<TASKS_START_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<TASKS_START_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<TASKS_START_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<TASKS_START_SPEC>) -> Self {
W(writer)
}
}
impl W {
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Start an ADC conversion.\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_start](index.html) module"]
pub struct TASKS_START_SPEC;
impl crate::RegisterSpec for TASKS_START_SPEC {
type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [tasks_start::W](W) writer structure"]
impl crate::Writable for TASKS_START_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets TASKS_START to value 0"]
impl crate::Resettable for TASKS_START_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
+45
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@@ -0,0 +1,45 @@
#[doc = "Register `TASKS_STOP` writer"]
pub struct W(crate::W<TASKS_STOP_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<TASKS_STOP_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<TASKS_STOP_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<TASKS_STOP_SPEC>) -> Self {
W(writer)
}
}
impl W {
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Stop ADC.\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_stop](index.html) module"]
pub struct TASKS_STOP_SPEC;
impl crate::RegisterSpec for TASKS_STOP_SPEC {
type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [tasks_stop::W](W) writer structure"]
impl crate::Writable for TASKS_STOP_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets TASKS_STOP to value 0"]
impl crate::Resettable for TASKS_STOP_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}