feat: add display UI with splash screen, dashboard, and RSSI sparkline
Implement full SSD1306 OLED display support: - Splash screen on boot (1.5s) with project name, version, board - Dashboard showing radio state, config, counters, RSSI/SNR - RSSI history sparkline (64-sample ring buffer, 2px-wide bars) - DisplayOn/DisplayOff host commands routed via dedicated channel - Pure render functions against generic DrawTarget (no hardware coupling) - Display on/off control bypasses radio task entirely Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
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Vendored
+80
@@ -0,0 +1,80 @@
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#[doc = "Register `CTIV` reader"]
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pub struct R(crate::R<CTIV_SPEC>);
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impl core::ops::Deref for R {
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type Target = crate::R<CTIV_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl From<crate::R<CTIV_SPEC>> for R {
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#[inline(always)]
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fn from(reader: crate::R<CTIV_SPEC>) -> Self {
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R(reader)
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}
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}
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#[doc = "Register `CTIV` writer"]
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pub struct W(crate::W<CTIV_SPEC>);
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impl core::ops::Deref for W {
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type Target = crate::W<CTIV_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl core::ops::DerefMut for W {
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#[inline(always)]
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fn deref_mut(&mut self) -> &mut Self::Target {
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&mut self.0
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}
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}
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impl From<crate::W<CTIV_SPEC>> for W {
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#[inline(always)]
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fn from(writer: crate::W<CTIV_SPEC>) -> Self {
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W(writer)
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}
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}
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#[doc = "Field `CTIV` reader - Calibration timer interval in 0.25s resolution."]
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pub type CTIV_R = crate::FieldReader<u8, u8>;
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#[doc = "Field `CTIV` writer - Calibration timer interval in 0.25s resolution."]
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pub type CTIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTIV_SPEC, u8, u8, 7, O>;
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impl R {
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#[doc = "Bits 0:6 - Calibration timer interval in 0.25s resolution."]
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#[inline(always)]
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pub fn ctiv(&self) -> CTIV_R {
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CTIV_R::new((self.bits & 0x7f) as u8)
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}
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}
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impl W {
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#[doc = "Bits 0:6 - Calibration timer interval in 0.25s resolution."]
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#[inline(always)]
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pub fn ctiv(&mut self) -> CTIV_W<0> {
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CTIV_W::new(self)
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}
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#[doc = "Writes raw bits to the register."]
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#[inline(always)]
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pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
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self.0.bits(bits);
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self
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}
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}
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#[doc = "Calibration timer interval.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctiv](index.html) module"]
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pub struct CTIV_SPEC;
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impl crate::RegisterSpec for CTIV_SPEC {
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type Ux = u32;
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}
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#[doc = "`read()` method returns [ctiv::R](R) reader structure"]
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impl crate::Readable for CTIV_SPEC {
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type Reader = R;
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}
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#[doc = "`write(|w| ..)` method takes [ctiv::W](W) writer structure"]
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impl crate::Writable for CTIV_SPEC {
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type Writer = W;
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}
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#[doc = "`reset()` method sets CTIV to value 0"]
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impl crate::Resettable for CTIV_SPEC {
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#[inline(always)]
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fn reset_value() -> Self::Ux {
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0
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}
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}
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+64
@@ -0,0 +1,64 @@
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#[doc = "Register `EVENTS_CTTO` reader"]
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pub struct R(crate::R<EVENTS_CTTO_SPEC>);
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impl core::ops::Deref for R {
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type Target = crate::R<EVENTS_CTTO_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl From<crate::R<EVENTS_CTTO_SPEC>> for R {
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#[inline(always)]
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fn from(reader: crate::R<EVENTS_CTTO_SPEC>) -> Self {
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R(reader)
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}
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}
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#[doc = "Register `EVENTS_CTTO` writer"]
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pub struct W(crate::W<EVENTS_CTTO_SPEC>);
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impl core::ops::Deref for W {
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type Target = crate::W<EVENTS_CTTO_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl core::ops::DerefMut for W {
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#[inline(always)]
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fn deref_mut(&mut self) -> &mut Self::Target {
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&mut self.0
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}
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}
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impl From<crate::W<EVENTS_CTTO_SPEC>> for W {
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#[inline(always)]
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fn from(writer: crate::W<EVENTS_CTTO_SPEC>) -> Self {
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W(writer)
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}
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}
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impl W {
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#[doc = "Writes raw bits to the register."]
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#[inline(always)]
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pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
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self.0.bits(bits);
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self
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}
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}
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#[doc = "Calibration timer timeout.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_ctto](index.html) module"]
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pub struct EVENTS_CTTO_SPEC;
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impl crate::RegisterSpec for EVENTS_CTTO_SPEC {
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type Ux = u32;
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}
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#[doc = "`read()` method returns [events_ctto::R](R) reader structure"]
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impl crate::Readable for EVENTS_CTTO_SPEC {
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type Reader = R;
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}
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#[doc = "`write(|w| ..)` method takes [events_ctto::W](W) writer structure"]
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impl crate::Writable for EVENTS_CTTO_SPEC {
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type Writer = W;
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}
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#[doc = "`reset()` method sets EVENTS_CTTO to value 0"]
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impl crate::Resettable for EVENTS_CTTO_SPEC {
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#[inline(always)]
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fn reset_value() -> Self::Ux {
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0
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}
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}
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+64
@@ -0,0 +1,64 @@
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#[doc = "Register `EVENTS_DONE` reader"]
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pub struct R(crate::R<EVENTS_DONE_SPEC>);
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impl core::ops::Deref for R {
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type Target = crate::R<EVENTS_DONE_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl From<crate::R<EVENTS_DONE_SPEC>> for R {
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#[inline(always)]
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fn from(reader: crate::R<EVENTS_DONE_SPEC>) -> Self {
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R(reader)
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}
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}
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#[doc = "Register `EVENTS_DONE` writer"]
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pub struct W(crate::W<EVENTS_DONE_SPEC>);
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impl core::ops::Deref for W {
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type Target = crate::W<EVENTS_DONE_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl core::ops::DerefMut for W {
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#[inline(always)]
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fn deref_mut(&mut self) -> &mut Self::Target {
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&mut self.0
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}
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}
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impl From<crate::W<EVENTS_DONE_SPEC>> for W {
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#[inline(always)]
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fn from(writer: crate::W<EVENTS_DONE_SPEC>) -> Self {
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W(writer)
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}
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}
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impl W {
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#[doc = "Writes raw bits to the register."]
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#[inline(always)]
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pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
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self.0.bits(bits);
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self
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}
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}
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#[doc = "Calibration of LFCLK RC oscillator completed.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_done](index.html) module"]
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pub struct EVENTS_DONE_SPEC;
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impl crate::RegisterSpec for EVENTS_DONE_SPEC {
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type Ux = u32;
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}
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#[doc = "`read()` method returns [events_done::R](R) reader structure"]
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impl crate::Readable for EVENTS_DONE_SPEC {
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type Reader = R;
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}
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#[doc = "`write(|w| ..)` method takes [events_done::W](W) writer structure"]
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impl crate::Writable for EVENTS_DONE_SPEC {
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type Writer = W;
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}
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#[doc = "`reset()` method sets EVENTS_DONE to value 0"]
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impl crate::Resettable for EVENTS_DONE_SPEC {
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#[inline(always)]
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fn reset_value() -> Self::Ux {
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0
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}
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}
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@@ -0,0 +1,64 @@
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#[doc = "Register `EVENTS_HFCLKSTARTED` reader"]
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pub struct R(crate::R<EVENTS_HFCLKSTARTED_SPEC>);
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impl core::ops::Deref for R {
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type Target = crate::R<EVENTS_HFCLKSTARTED_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl From<crate::R<EVENTS_HFCLKSTARTED_SPEC>> for R {
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#[inline(always)]
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fn from(reader: crate::R<EVENTS_HFCLKSTARTED_SPEC>) -> Self {
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R(reader)
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}
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}
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#[doc = "Register `EVENTS_HFCLKSTARTED` writer"]
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pub struct W(crate::W<EVENTS_HFCLKSTARTED_SPEC>);
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impl core::ops::Deref for W {
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type Target = crate::W<EVENTS_HFCLKSTARTED_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl core::ops::DerefMut for W {
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#[inline(always)]
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fn deref_mut(&mut self) -> &mut Self::Target {
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&mut self.0
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}
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}
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impl From<crate::W<EVENTS_HFCLKSTARTED_SPEC>> for W {
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#[inline(always)]
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fn from(writer: crate::W<EVENTS_HFCLKSTARTED_SPEC>) -> Self {
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W(writer)
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}
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}
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impl W {
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#[doc = "Writes raw bits to the register."]
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#[inline(always)]
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pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
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self.0.bits(bits);
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self
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}
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}
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#[doc = "HFCLK oscillator started.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_hfclkstarted](index.html) module"]
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pub struct EVENTS_HFCLKSTARTED_SPEC;
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impl crate::RegisterSpec for EVENTS_HFCLKSTARTED_SPEC {
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type Ux = u32;
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}
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#[doc = "`read()` method returns [events_hfclkstarted::R](R) reader structure"]
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impl crate::Readable for EVENTS_HFCLKSTARTED_SPEC {
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type Reader = R;
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}
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#[doc = "`write(|w| ..)` method takes [events_hfclkstarted::W](W) writer structure"]
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impl crate::Writable for EVENTS_HFCLKSTARTED_SPEC {
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type Writer = W;
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}
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#[doc = "`reset()` method sets EVENTS_HFCLKSTARTED to value 0"]
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impl crate::Resettable for EVENTS_HFCLKSTARTED_SPEC {
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#[inline(always)]
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fn reset_value() -> Self::Ux {
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0
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}
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}
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@@ -0,0 +1,64 @@
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#[doc = "Register `EVENTS_LFCLKSTARTED` reader"]
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pub struct R(crate::R<EVENTS_LFCLKSTARTED_SPEC>);
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impl core::ops::Deref for R {
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type Target = crate::R<EVENTS_LFCLKSTARTED_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl From<crate::R<EVENTS_LFCLKSTARTED_SPEC>> for R {
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#[inline(always)]
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fn from(reader: crate::R<EVENTS_LFCLKSTARTED_SPEC>) -> Self {
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R(reader)
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}
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}
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#[doc = "Register `EVENTS_LFCLKSTARTED` writer"]
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pub struct W(crate::W<EVENTS_LFCLKSTARTED_SPEC>);
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impl core::ops::Deref for W {
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type Target = crate::W<EVENTS_LFCLKSTARTED_SPEC>;
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#[inline(always)]
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||||
fn deref(&self) -> &Self::Target {
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||||
&self.0
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||||
}
|
||||
}
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||||
impl core::ops::DerefMut for W {
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||||
#[inline(always)]
|
||||
fn deref_mut(&mut self) -> &mut Self::Target {
|
||||
&mut self.0
|
||||
}
|
||||
}
|
||||
impl From<crate::W<EVENTS_LFCLKSTARTED_SPEC>> for W {
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||||
#[inline(always)]
|
||||
fn from(writer: crate::W<EVENTS_LFCLKSTARTED_SPEC>) -> Self {
|
||||
W(writer)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Writes raw bits to the register."]
|
||||
#[inline(always)]
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||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.0.bits(bits);
|
||||
self
|
||||
}
|
||||
}
|
||||
#[doc = "LFCLK oscillator started.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_lfclkstarted](index.html) module"]
|
||||
pub struct EVENTS_LFCLKSTARTED_SPEC;
|
||||
impl crate::RegisterSpec for EVENTS_LFCLKSTARTED_SPEC {
|
||||
type Ux = u32;
|
||||
}
|
||||
#[doc = "`read()` method returns [events_lfclkstarted::R](R) reader structure"]
|
||||
impl crate::Readable for EVENTS_LFCLKSTARTED_SPEC {
|
||||
type Reader = R;
|
||||
}
|
||||
#[doc = "`write(|w| ..)` method takes [events_lfclkstarted::W](W) writer structure"]
|
||||
impl crate::Writable for EVENTS_LFCLKSTARTED_SPEC {
|
||||
type Writer = W;
|
||||
}
|
||||
#[doc = "`reset()` method sets EVENTS_LFCLKSTARTED to value 0"]
|
||||
impl crate::Resettable for EVENTS_LFCLKSTARTED_SPEC {
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Ux {
|
||||
0
|
||||
}
|
||||
}
|
||||
+74
@@ -0,0 +1,74 @@
|
||||
#[doc = "Register `HFCLKRUN` reader"]
|
||||
pub struct R(crate::R<HFCLKRUN_SPEC>);
|
||||
impl core::ops::Deref for R {
|
||||
type Target = crate::R<HFCLKRUN_SPEC>;
|
||||
#[inline(always)]
|
||||
fn deref(&self) -> &Self::Target {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
impl From<crate::R<HFCLKRUN_SPEC>> for R {
|
||||
#[inline(always)]
|
||||
fn from(reader: crate::R<HFCLKRUN_SPEC>) -> Self {
|
||||
R(reader)
|
||||
}
|
||||
}
|
||||
#[doc = "Field `STATUS` reader - Task HFCLKSTART trigger status."]
|
||||
pub type STATUS_R = crate::BitReader<STATUS_A>;
|
||||
#[doc = "Task HFCLKSTART trigger status.\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum STATUS_A {
|
||||
#[doc = "0: Task HFCLKSTART has not been triggered."]
|
||||
NOT_TRIGGERED = 0,
|
||||
#[doc = "1: Task HFCLKSTART has been triggered."]
|
||||
TRIGGERED = 1,
|
||||
}
|
||||
impl From<STATUS_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: STATUS_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
impl STATUS_R {
|
||||
#[doc = "Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> STATUS_A {
|
||||
match self.bits {
|
||||
false => STATUS_A::NOT_TRIGGERED,
|
||||
true => STATUS_A::TRIGGERED,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `NOT_TRIGGERED`"]
|
||||
#[inline(always)]
|
||||
pub fn is_not_triggered(&self) -> bool {
|
||||
*self == STATUS_A::NOT_TRIGGERED
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `TRIGGERED`"]
|
||||
#[inline(always)]
|
||||
pub fn is_triggered(&self) -> bool {
|
||||
*self == STATUS_A::TRIGGERED
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bit 0 - Task HFCLKSTART trigger status."]
|
||||
#[inline(always)]
|
||||
pub fn status(&self) -> STATUS_R {
|
||||
STATUS_R::new((self.bits & 1) != 0)
|
||||
}
|
||||
}
|
||||
#[doc = "Task HFCLKSTART trigger status.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclkrun](index.html) module"]
|
||||
pub struct HFCLKRUN_SPEC;
|
||||
impl crate::RegisterSpec for HFCLKRUN_SPEC {
|
||||
type Ux = u32;
|
||||
}
|
||||
#[doc = "`read()` method returns [hfclkrun::R](R) reader structure"]
|
||||
impl crate::Readable for HFCLKRUN_SPEC {
|
||||
type Reader = R;
|
||||
}
|
||||
#[doc = "`reset()` method sets HFCLKRUN to value 0"]
|
||||
impl crate::Resettable for HFCLKRUN_SPEC {
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Ux {
|
||||
0
|
||||
}
|
||||
}
|
||||
+115
@@ -0,0 +1,115 @@
|
||||
#[doc = "Register `HFCLKSTAT` reader"]
|
||||
pub struct R(crate::R<HFCLKSTAT_SPEC>);
|
||||
impl core::ops::Deref for R {
|
||||
type Target = crate::R<HFCLKSTAT_SPEC>;
|
||||
#[inline(always)]
|
||||
fn deref(&self) -> &Self::Target {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
impl From<crate::R<HFCLKSTAT_SPEC>> for R {
|
||||
#[inline(always)]
|
||||
fn from(reader: crate::R<HFCLKSTAT_SPEC>) -> Self {
|
||||
R(reader)
|
||||
}
|
||||
}
|
||||
#[doc = "Field `SRC` reader - Active clock source for the HF clock."]
|
||||
pub type SRC_R = crate::BitReader<SRC_A>;
|
||||
#[doc = "Active clock source for the HF clock.\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SRC_A {
|
||||
#[doc = "0: Internal 16MHz RC oscillator running and generating the HFCLK clock."]
|
||||
RC = 0,
|
||||
#[doc = "1: External 16MHz/32MHz crystal oscillator running and generating the HFCLK clock."]
|
||||
XTAL = 1,
|
||||
}
|
||||
impl From<SRC_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: SRC_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
impl SRC_R {
|
||||
#[doc = "Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> SRC_A {
|
||||
match self.bits {
|
||||
false => SRC_A::RC,
|
||||
true => SRC_A::XTAL,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `RC`"]
|
||||
#[inline(always)]
|
||||
pub fn is_rc(&self) -> bool {
|
||||
*self == SRC_A::RC
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `XTAL`"]
|
||||
#[inline(always)]
|
||||
pub fn is_xtal(&self) -> bool {
|
||||
*self == SRC_A::XTAL
|
||||
}
|
||||
}
|
||||
#[doc = "Field `STATE` reader - State for the HFCLK."]
|
||||
pub type STATE_R = crate::BitReader<STATE_A>;
|
||||
#[doc = "State for the HFCLK.\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum STATE_A {
|
||||
#[doc = "0: HFCLK clock not running."]
|
||||
NOT_RUNNING = 0,
|
||||
#[doc = "1: HFCLK clock running."]
|
||||
RUNNING = 1,
|
||||
}
|
||||
impl From<STATE_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: STATE_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
impl STATE_R {
|
||||
#[doc = "Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> STATE_A {
|
||||
match self.bits {
|
||||
false => STATE_A::NOT_RUNNING,
|
||||
true => STATE_A::RUNNING,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `NOT_RUNNING`"]
|
||||
#[inline(always)]
|
||||
pub fn is_not_running(&self) -> bool {
|
||||
*self == STATE_A::NOT_RUNNING
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `RUNNING`"]
|
||||
#[inline(always)]
|
||||
pub fn is_running(&self) -> bool {
|
||||
*self == STATE_A::RUNNING
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bit 0 - Active clock source for the HF clock."]
|
||||
#[inline(always)]
|
||||
pub fn src(&self) -> SRC_R {
|
||||
SRC_R::new((self.bits & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 16 - State for the HFCLK."]
|
||||
#[inline(always)]
|
||||
pub fn state(&self) -> STATE_R {
|
||||
STATE_R::new(((self.bits >> 16) & 1) != 0)
|
||||
}
|
||||
}
|
||||
#[doc = "High frequency clock status.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclkstat](index.html) module"]
|
||||
pub struct HFCLKSTAT_SPEC;
|
||||
impl crate::RegisterSpec for HFCLKSTAT_SPEC {
|
||||
type Ux = u32;
|
||||
}
|
||||
#[doc = "`read()` method returns [hfclkstat::R](R) reader structure"]
|
||||
impl crate::Readable for HFCLKSTAT_SPEC {
|
||||
type Reader = R;
|
||||
}
|
||||
#[doc = "`reset()` method sets HFCLKSTAT to value 0"]
|
||||
impl crate::Resettable for HFCLKSTAT_SPEC {
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Ux {
|
||||
0
|
||||
}
|
||||
}
|
||||
+336
@@ -0,0 +1,336 @@
|
||||
#[doc = "Register `INTENCLR` reader"]
|
||||
pub struct R(crate::R<INTENCLR_SPEC>);
|
||||
impl core::ops::Deref for R {
|
||||
type Target = crate::R<INTENCLR_SPEC>;
|
||||
#[inline(always)]
|
||||
fn deref(&self) -> &Self::Target {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
impl From<crate::R<INTENCLR_SPEC>> for R {
|
||||
#[inline(always)]
|
||||
fn from(reader: crate::R<INTENCLR_SPEC>) -> Self {
|
||||
R(reader)
|
||||
}
|
||||
}
|
||||
#[doc = "Register `INTENCLR` writer"]
|
||||
pub struct W(crate::W<INTENCLR_SPEC>);
|
||||
impl core::ops::Deref for W {
|
||||
type Target = crate::W<INTENCLR_SPEC>;
|
||||
#[inline(always)]
|
||||
fn deref(&self) -> &Self::Target {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
impl core::ops::DerefMut for W {
|
||||
#[inline(always)]
|
||||
fn deref_mut(&mut self) -> &mut Self::Target {
|
||||
&mut self.0
|
||||
}
|
||||
}
|
||||
impl From<crate::W<INTENCLR_SPEC>> for W {
|
||||
#[inline(always)]
|
||||
fn from(writer: crate::W<INTENCLR_SPEC>) -> Self {
|
||||
W(writer)
|
||||
}
|
||||
}
|
||||
#[doc = "Field `HFCLKSTARTED` reader - Disable interrupt on HFCLKSTARTED event."]
|
||||
pub type HFCLKSTARTED_R = crate::BitReader<HFCLKSTARTED_A>;
|
||||
#[doc = "Disable interrupt on HFCLKSTARTED event.\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HFCLKSTARTED_A {
|
||||
#[doc = "0: Interrupt disabled."]
|
||||
DISABLED = 0,
|
||||
#[doc = "1: Interrupt enabled."]
|
||||
ENABLED = 1,
|
||||
}
|
||||
impl From<HFCLKSTARTED_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: HFCLKSTARTED_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
impl HFCLKSTARTED_R {
|
||||
#[doc = "Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> HFCLKSTARTED_A {
|
||||
match self.bits {
|
||||
false => HFCLKSTARTED_A::DISABLED,
|
||||
true => HFCLKSTARTED_A::ENABLED,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `DISABLED`"]
|
||||
#[inline(always)]
|
||||
pub fn is_disabled(&self) -> bool {
|
||||
*self == HFCLKSTARTED_A::DISABLED
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `ENABLED`"]
|
||||
#[inline(always)]
|
||||
pub fn is_enabled(&self) -> bool {
|
||||
*self == HFCLKSTARTED_A::ENABLED
|
||||
}
|
||||
}
|
||||
#[doc = "Disable interrupt on HFCLKSTARTED event.\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HFCLKSTARTED_AW {
|
||||
#[doc = "1: Disable interrupt on write."]
|
||||
CLEAR = 1,
|
||||
}
|
||||
impl From<HFCLKSTARTED_AW> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: HFCLKSTARTED_AW) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Field `HFCLKSTARTED` writer - Disable interrupt on HFCLKSTARTED event."]
|
||||
pub type HFCLKSTARTED_W<'a, const O: u8> =
|
||||
crate::BitWriter<'a, u32, INTENCLR_SPEC, HFCLKSTARTED_AW, O>;
|
||||
impl<'a, const O: u8> HFCLKSTARTED_W<'a, O> {
|
||||
#[doc = "Disable interrupt on write."]
|
||||
#[inline(always)]
|
||||
pub fn clear(self) -> &'a mut W {
|
||||
self.variant(HFCLKSTARTED_AW::CLEAR)
|
||||
}
|
||||
}
|
||||
#[doc = "Field `LFCLKSTARTED` reader - Disable interrupt on LFCLKSTARTED event."]
|
||||
pub type LFCLKSTARTED_R = crate::BitReader<LFCLKSTARTED_A>;
|
||||
#[doc = "Disable interrupt on LFCLKSTARTED event.\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum LFCLKSTARTED_A {
|
||||
#[doc = "0: Interrupt disabled."]
|
||||
DISABLED = 0,
|
||||
#[doc = "1: Interrupt enabled."]
|
||||
ENABLED = 1,
|
||||
}
|
||||
impl From<LFCLKSTARTED_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: LFCLKSTARTED_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
impl LFCLKSTARTED_R {
|
||||
#[doc = "Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> LFCLKSTARTED_A {
|
||||
match self.bits {
|
||||
false => LFCLKSTARTED_A::DISABLED,
|
||||
true => LFCLKSTARTED_A::ENABLED,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `DISABLED`"]
|
||||
#[inline(always)]
|
||||
pub fn is_disabled(&self) -> bool {
|
||||
*self == LFCLKSTARTED_A::DISABLED
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `ENABLED`"]
|
||||
#[inline(always)]
|
||||
pub fn is_enabled(&self) -> bool {
|
||||
*self == LFCLKSTARTED_A::ENABLED
|
||||
}
|
||||
}
|
||||
#[doc = "Disable interrupt on LFCLKSTARTED event.\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum LFCLKSTARTED_AW {
|
||||
#[doc = "1: Disable interrupt on write."]
|
||||
CLEAR = 1,
|
||||
}
|
||||
impl From<LFCLKSTARTED_AW> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: LFCLKSTARTED_AW) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Field `LFCLKSTARTED` writer - Disable interrupt on LFCLKSTARTED event."]
|
||||
pub type LFCLKSTARTED_W<'a, const O: u8> =
|
||||
crate::BitWriter<'a, u32, INTENCLR_SPEC, LFCLKSTARTED_AW, O>;
|
||||
impl<'a, const O: u8> LFCLKSTARTED_W<'a, O> {
|
||||
#[doc = "Disable interrupt on write."]
|
||||
#[inline(always)]
|
||||
pub fn clear(self) -> &'a mut W {
|
||||
self.variant(LFCLKSTARTED_AW::CLEAR)
|
||||
}
|
||||
}
|
||||
#[doc = "Field `DONE` reader - Disable interrupt on DONE event."]
|
||||
pub type DONE_R = crate::BitReader<DONE_A>;
|
||||
#[doc = "Disable interrupt on DONE event.\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DONE_A {
|
||||
#[doc = "0: Interrupt disabled."]
|
||||
DISABLED = 0,
|
||||
#[doc = "1: Interrupt enabled."]
|
||||
ENABLED = 1,
|
||||
}
|
||||
impl From<DONE_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: DONE_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
impl DONE_R {
|
||||
#[doc = "Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> DONE_A {
|
||||
match self.bits {
|
||||
false => DONE_A::DISABLED,
|
||||
true => DONE_A::ENABLED,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `DISABLED`"]
|
||||
#[inline(always)]
|
||||
pub fn is_disabled(&self) -> bool {
|
||||
*self == DONE_A::DISABLED
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `ENABLED`"]
|
||||
#[inline(always)]
|
||||
pub fn is_enabled(&self) -> bool {
|
||||
*self == DONE_A::ENABLED
|
||||
}
|
||||
}
|
||||
#[doc = "Disable interrupt on DONE event.\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DONE_AW {
|
||||
#[doc = "1: Disable interrupt on write."]
|
||||
CLEAR = 1,
|
||||
}
|
||||
impl From<DONE_AW> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: DONE_AW) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Field `DONE` writer - Disable interrupt on DONE event."]
|
||||
pub type DONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, DONE_AW, O>;
|
||||
impl<'a, const O: u8> DONE_W<'a, O> {
|
||||
#[doc = "Disable interrupt on write."]
|
||||
#[inline(always)]
|
||||
pub fn clear(self) -> &'a mut W {
|
||||
self.variant(DONE_AW::CLEAR)
|
||||
}
|
||||
}
|
||||
#[doc = "Field `CTTO` reader - Disable interrupt on CTTO event."]
|
||||
pub type CTTO_R = crate::BitReader<CTTO_A>;
|
||||
#[doc = "Disable interrupt on CTTO event.\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CTTO_A {
|
||||
#[doc = "0: Interrupt disabled."]
|
||||
DISABLED = 0,
|
||||
#[doc = "1: Interrupt enabled."]
|
||||
ENABLED = 1,
|
||||
}
|
||||
impl From<CTTO_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: CTTO_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
impl CTTO_R {
|
||||
#[doc = "Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> CTTO_A {
|
||||
match self.bits {
|
||||
false => CTTO_A::DISABLED,
|
||||
true => CTTO_A::ENABLED,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `DISABLED`"]
|
||||
#[inline(always)]
|
||||
pub fn is_disabled(&self) -> bool {
|
||||
*self == CTTO_A::DISABLED
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `ENABLED`"]
|
||||
#[inline(always)]
|
||||
pub fn is_enabled(&self) -> bool {
|
||||
*self == CTTO_A::ENABLED
|
||||
}
|
||||
}
|
||||
#[doc = "Disable interrupt on CTTO event.\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CTTO_AW {
|
||||
#[doc = "1: Disable interrupt on write."]
|
||||
CLEAR = 1,
|
||||
}
|
||||
impl From<CTTO_AW> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: CTTO_AW) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Field `CTTO` writer - Disable interrupt on CTTO event."]
|
||||
pub type CTTO_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, CTTO_AW, O>;
|
||||
impl<'a, const O: u8> CTTO_W<'a, O> {
|
||||
#[doc = "Disable interrupt on write."]
|
||||
#[inline(always)]
|
||||
pub fn clear(self) -> &'a mut W {
|
||||
self.variant(CTTO_AW::CLEAR)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bit 0 - Disable interrupt on HFCLKSTARTED event."]
|
||||
#[inline(always)]
|
||||
pub fn hfclkstarted(&self) -> HFCLKSTARTED_R {
|
||||
HFCLKSTARTED_R::new((self.bits & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 1 - Disable interrupt on LFCLKSTARTED event."]
|
||||
#[inline(always)]
|
||||
pub fn lfclkstarted(&self) -> LFCLKSTARTED_R {
|
||||
LFCLKSTARTED_R::new(((self.bits >> 1) & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 3 - Disable interrupt on DONE event."]
|
||||
#[inline(always)]
|
||||
pub fn done(&self) -> DONE_R {
|
||||
DONE_R::new(((self.bits >> 3) & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 4 - Disable interrupt on CTTO event."]
|
||||
#[inline(always)]
|
||||
pub fn ctto(&self) -> CTTO_R {
|
||||
CTTO_R::new(((self.bits >> 4) & 1) != 0)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bit 0 - Disable interrupt on HFCLKSTARTED event."]
|
||||
#[inline(always)]
|
||||
pub fn hfclkstarted(&mut self) -> HFCLKSTARTED_W<0> {
|
||||
HFCLKSTARTED_W::new(self)
|
||||
}
|
||||
#[doc = "Bit 1 - Disable interrupt on LFCLKSTARTED event."]
|
||||
#[inline(always)]
|
||||
pub fn lfclkstarted(&mut self) -> LFCLKSTARTED_W<1> {
|
||||
LFCLKSTARTED_W::new(self)
|
||||
}
|
||||
#[doc = "Bit 3 - Disable interrupt on DONE event."]
|
||||
#[inline(always)]
|
||||
pub fn done(&mut self) -> DONE_W<3> {
|
||||
DONE_W::new(self)
|
||||
}
|
||||
#[doc = "Bit 4 - Disable interrupt on CTTO event."]
|
||||
#[inline(always)]
|
||||
pub fn ctto(&mut self) -> CTTO_W<4> {
|
||||
CTTO_W::new(self)
|
||||
}
|
||||
#[doc = "Writes raw bits to the register."]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.0.bits(bits);
|
||||
self
|
||||
}
|
||||
}
|
||||
#[doc = "Interrupt enable clear register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"]
|
||||
pub struct INTENCLR_SPEC;
|
||||
impl crate::RegisterSpec for INTENCLR_SPEC {
|
||||
type Ux = u32;
|
||||
}
|
||||
#[doc = "`read()` method returns [intenclr::R](R) reader structure"]
|
||||
impl crate::Readable for INTENCLR_SPEC {
|
||||
type Reader = R;
|
||||
}
|
||||
#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"]
|
||||
impl crate::Writable for INTENCLR_SPEC {
|
||||
type Writer = W;
|
||||
}
|
||||
#[doc = "`reset()` method sets INTENCLR to value 0"]
|
||||
impl crate::Resettable for INTENCLR_SPEC {
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Ux {
|
||||
0
|
||||
}
|
||||
}
|
||||
+336
@@ -0,0 +1,336 @@
|
||||
#[doc = "Register `INTENSET` reader"]
|
||||
pub struct R(crate::R<INTENSET_SPEC>);
|
||||
impl core::ops::Deref for R {
|
||||
type Target = crate::R<INTENSET_SPEC>;
|
||||
#[inline(always)]
|
||||
fn deref(&self) -> &Self::Target {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
impl From<crate::R<INTENSET_SPEC>> for R {
|
||||
#[inline(always)]
|
||||
fn from(reader: crate::R<INTENSET_SPEC>) -> Self {
|
||||
R(reader)
|
||||
}
|
||||
}
|
||||
#[doc = "Register `INTENSET` writer"]
|
||||
pub struct W(crate::W<INTENSET_SPEC>);
|
||||
impl core::ops::Deref for W {
|
||||
type Target = crate::W<INTENSET_SPEC>;
|
||||
#[inline(always)]
|
||||
fn deref(&self) -> &Self::Target {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
impl core::ops::DerefMut for W {
|
||||
#[inline(always)]
|
||||
fn deref_mut(&mut self) -> &mut Self::Target {
|
||||
&mut self.0
|
||||
}
|
||||
}
|
||||
impl From<crate::W<INTENSET_SPEC>> for W {
|
||||
#[inline(always)]
|
||||
fn from(writer: crate::W<INTENSET_SPEC>) -> Self {
|
||||
W(writer)
|
||||
}
|
||||
}
|
||||
#[doc = "Field `HFCLKSTARTED` reader - Enable interrupt on HFCLKSTARTED event."]
|
||||
pub type HFCLKSTARTED_R = crate::BitReader<HFCLKSTARTED_A>;
|
||||
#[doc = "Enable interrupt on HFCLKSTARTED event.\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HFCLKSTARTED_A {
|
||||
#[doc = "0: Interrupt disabled."]
|
||||
DISABLED = 0,
|
||||
#[doc = "1: Interrupt enabled."]
|
||||
ENABLED = 1,
|
||||
}
|
||||
impl From<HFCLKSTARTED_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: HFCLKSTARTED_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
impl HFCLKSTARTED_R {
|
||||
#[doc = "Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> HFCLKSTARTED_A {
|
||||
match self.bits {
|
||||
false => HFCLKSTARTED_A::DISABLED,
|
||||
true => HFCLKSTARTED_A::ENABLED,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `DISABLED`"]
|
||||
#[inline(always)]
|
||||
pub fn is_disabled(&self) -> bool {
|
||||
*self == HFCLKSTARTED_A::DISABLED
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `ENABLED`"]
|
||||
#[inline(always)]
|
||||
pub fn is_enabled(&self) -> bool {
|
||||
*self == HFCLKSTARTED_A::ENABLED
|
||||
}
|
||||
}
|
||||
#[doc = "Enable interrupt on HFCLKSTARTED event.\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HFCLKSTARTED_AW {
|
||||
#[doc = "1: Enable interrupt on write."]
|
||||
SET = 1,
|
||||
}
|
||||
impl From<HFCLKSTARTED_AW> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: HFCLKSTARTED_AW) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Field `HFCLKSTARTED` writer - Enable interrupt on HFCLKSTARTED event."]
|
||||
pub type HFCLKSTARTED_W<'a, const O: u8> =
|
||||
crate::BitWriter<'a, u32, INTENSET_SPEC, HFCLKSTARTED_AW, O>;
|
||||
impl<'a, const O: u8> HFCLKSTARTED_W<'a, O> {
|
||||
#[doc = "Enable interrupt on write."]
|
||||
#[inline(always)]
|
||||
pub fn set(self) -> &'a mut W {
|
||||
self.variant(HFCLKSTARTED_AW::SET)
|
||||
}
|
||||
}
|
||||
#[doc = "Field `LFCLKSTARTED` reader - Enable interrupt on LFCLKSTARTED event."]
|
||||
pub type LFCLKSTARTED_R = crate::BitReader<LFCLKSTARTED_A>;
|
||||
#[doc = "Enable interrupt on LFCLKSTARTED event.\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum LFCLKSTARTED_A {
|
||||
#[doc = "0: Interrupt disabled."]
|
||||
DISABLED = 0,
|
||||
#[doc = "1: Interrupt enabled."]
|
||||
ENABLED = 1,
|
||||
}
|
||||
impl From<LFCLKSTARTED_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: LFCLKSTARTED_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
impl LFCLKSTARTED_R {
|
||||
#[doc = "Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> LFCLKSTARTED_A {
|
||||
match self.bits {
|
||||
false => LFCLKSTARTED_A::DISABLED,
|
||||
true => LFCLKSTARTED_A::ENABLED,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `DISABLED`"]
|
||||
#[inline(always)]
|
||||
pub fn is_disabled(&self) -> bool {
|
||||
*self == LFCLKSTARTED_A::DISABLED
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `ENABLED`"]
|
||||
#[inline(always)]
|
||||
pub fn is_enabled(&self) -> bool {
|
||||
*self == LFCLKSTARTED_A::ENABLED
|
||||
}
|
||||
}
|
||||
#[doc = "Enable interrupt on LFCLKSTARTED event.\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum LFCLKSTARTED_AW {
|
||||
#[doc = "1: Enable interrupt on write."]
|
||||
SET = 1,
|
||||
}
|
||||
impl From<LFCLKSTARTED_AW> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: LFCLKSTARTED_AW) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Field `LFCLKSTARTED` writer - Enable interrupt on LFCLKSTARTED event."]
|
||||
pub type LFCLKSTARTED_W<'a, const O: u8> =
|
||||
crate::BitWriter<'a, u32, INTENSET_SPEC, LFCLKSTARTED_AW, O>;
|
||||
impl<'a, const O: u8> LFCLKSTARTED_W<'a, O> {
|
||||
#[doc = "Enable interrupt on write."]
|
||||
#[inline(always)]
|
||||
pub fn set(self) -> &'a mut W {
|
||||
self.variant(LFCLKSTARTED_AW::SET)
|
||||
}
|
||||
}
|
||||
#[doc = "Field `DONE` reader - Enable interrupt on DONE event."]
|
||||
pub type DONE_R = crate::BitReader<DONE_A>;
|
||||
#[doc = "Enable interrupt on DONE event.\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DONE_A {
|
||||
#[doc = "0: Interrupt disabled."]
|
||||
DISABLED = 0,
|
||||
#[doc = "1: Interrupt enabled."]
|
||||
ENABLED = 1,
|
||||
}
|
||||
impl From<DONE_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: DONE_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
impl DONE_R {
|
||||
#[doc = "Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> DONE_A {
|
||||
match self.bits {
|
||||
false => DONE_A::DISABLED,
|
||||
true => DONE_A::ENABLED,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `DISABLED`"]
|
||||
#[inline(always)]
|
||||
pub fn is_disabled(&self) -> bool {
|
||||
*self == DONE_A::DISABLED
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `ENABLED`"]
|
||||
#[inline(always)]
|
||||
pub fn is_enabled(&self) -> bool {
|
||||
*self == DONE_A::ENABLED
|
||||
}
|
||||
}
|
||||
#[doc = "Enable interrupt on DONE event.\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DONE_AW {
|
||||
#[doc = "1: Enable interrupt on write."]
|
||||
SET = 1,
|
||||
}
|
||||
impl From<DONE_AW> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: DONE_AW) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Field `DONE` writer - Enable interrupt on DONE event."]
|
||||
pub type DONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, DONE_AW, O>;
|
||||
impl<'a, const O: u8> DONE_W<'a, O> {
|
||||
#[doc = "Enable interrupt on write."]
|
||||
#[inline(always)]
|
||||
pub fn set(self) -> &'a mut W {
|
||||
self.variant(DONE_AW::SET)
|
||||
}
|
||||
}
|
||||
#[doc = "Field `CTTO` reader - Enable interrupt on CTTO event."]
|
||||
pub type CTTO_R = crate::BitReader<CTTO_A>;
|
||||
#[doc = "Enable interrupt on CTTO event.\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CTTO_A {
|
||||
#[doc = "0: Interrupt disabled."]
|
||||
DISABLED = 0,
|
||||
#[doc = "1: Interrupt enabled."]
|
||||
ENABLED = 1,
|
||||
}
|
||||
impl From<CTTO_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: CTTO_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
impl CTTO_R {
|
||||
#[doc = "Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> CTTO_A {
|
||||
match self.bits {
|
||||
false => CTTO_A::DISABLED,
|
||||
true => CTTO_A::ENABLED,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `DISABLED`"]
|
||||
#[inline(always)]
|
||||
pub fn is_disabled(&self) -> bool {
|
||||
*self == CTTO_A::DISABLED
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `ENABLED`"]
|
||||
#[inline(always)]
|
||||
pub fn is_enabled(&self) -> bool {
|
||||
*self == CTTO_A::ENABLED
|
||||
}
|
||||
}
|
||||
#[doc = "Enable interrupt on CTTO event.\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CTTO_AW {
|
||||
#[doc = "1: Enable interrupt on write."]
|
||||
SET = 1,
|
||||
}
|
||||
impl From<CTTO_AW> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: CTTO_AW) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Field `CTTO` writer - Enable interrupt on CTTO event."]
|
||||
pub type CTTO_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, CTTO_AW, O>;
|
||||
impl<'a, const O: u8> CTTO_W<'a, O> {
|
||||
#[doc = "Enable interrupt on write."]
|
||||
#[inline(always)]
|
||||
pub fn set(self) -> &'a mut W {
|
||||
self.variant(CTTO_AW::SET)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bit 0 - Enable interrupt on HFCLKSTARTED event."]
|
||||
#[inline(always)]
|
||||
pub fn hfclkstarted(&self) -> HFCLKSTARTED_R {
|
||||
HFCLKSTARTED_R::new((self.bits & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 1 - Enable interrupt on LFCLKSTARTED event."]
|
||||
#[inline(always)]
|
||||
pub fn lfclkstarted(&self) -> LFCLKSTARTED_R {
|
||||
LFCLKSTARTED_R::new(((self.bits >> 1) & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 3 - Enable interrupt on DONE event."]
|
||||
#[inline(always)]
|
||||
pub fn done(&self) -> DONE_R {
|
||||
DONE_R::new(((self.bits >> 3) & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 4 - Enable interrupt on CTTO event."]
|
||||
#[inline(always)]
|
||||
pub fn ctto(&self) -> CTTO_R {
|
||||
CTTO_R::new(((self.bits >> 4) & 1) != 0)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bit 0 - Enable interrupt on HFCLKSTARTED event."]
|
||||
#[inline(always)]
|
||||
pub fn hfclkstarted(&mut self) -> HFCLKSTARTED_W<0> {
|
||||
HFCLKSTARTED_W::new(self)
|
||||
}
|
||||
#[doc = "Bit 1 - Enable interrupt on LFCLKSTARTED event."]
|
||||
#[inline(always)]
|
||||
pub fn lfclkstarted(&mut self) -> LFCLKSTARTED_W<1> {
|
||||
LFCLKSTARTED_W::new(self)
|
||||
}
|
||||
#[doc = "Bit 3 - Enable interrupt on DONE event."]
|
||||
#[inline(always)]
|
||||
pub fn done(&mut self) -> DONE_W<3> {
|
||||
DONE_W::new(self)
|
||||
}
|
||||
#[doc = "Bit 4 - Enable interrupt on CTTO event."]
|
||||
#[inline(always)]
|
||||
pub fn ctto(&mut self) -> CTTO_W<4> {
|
||||
CTTO_W::new(self)
|
||||
}
|
||||
#[doc = "Writes raw bits to the register."]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.0.bits(bits);
|
||||
self
|
||||
}
|
||||
}
|
||||
#[doc = "Interrupt enable set register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"]
|
||||
pub struct INTENSET_SPEC;
|
||||
impl crate::RegisterSpec for INTENSET_SPEC {
|
||||
type Ux = u32;
|
||||
}
|
||||
#[doc = "`read()` method returns [intenset::R](R) reader structure"]
|
||||
impl crate::Readable for INTENSET_SPEC {
|
||||
type Reader = R;
|
||||
}
|
||||
#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"]
|
||||
impl crate::Writable for INTENSET_SPEC {
|
||||
type Writer = W;
|
||||
}
|
||||
#[doc = "`reset()` method sets INTENSET to value 0"]
|
||||
impl crate::Resettable for INTENSET_SPEC {
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Ux {
|
||||
0
|
||||
}
|
||||
}
|
||||
+74
@@ -0,0 +1,74 @@
|
||||
#[doc = "Register `LFCLKRUN` reader"]
|
||||
pub struct R(crate::R<LFCLKRUN_SPEC>);
|
||||
impl core::ops::Deref for R {
|
||||
type Target = crate::R<LFCLKRUN_SPEC>;
|
||||
#[inline(always)]
|
||||
fn deref(&self) -> &Self::Target {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
impl From<crate::R<LFCLKRUN_SPEC>> for R {
|
||||
#[inline(always)]
|
||||
fn from(reader: crate::R<LFCLKRUN_SPEC>) -> Self {
|
||||
R(reader)
|
||||
}
|
||||
}
|
||||
#[doc = "Field `STATUS` reader - Task LFCLKSTART triggered status."]
|
||||
pub type STATUS_R = crate::BitReader<STATUS_A>;
|
||||
#[doc = "Task LFCLKSTART triggered status.\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum STATUS_A {
|
||||
#[doc = "0: Task LFCLKSTART has not been triggered."]
|
||||
NOT_TRIGGERED = 0,
|
||||
#[doc = "1: Task LFCLKSTART has been triggered."]
|
||||
TRIGGERED = 1,
|
||||
}
|
||||
impl From<STATUS_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: STATUS_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
impl STATUS_R {
|
||||
#[doc = "Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> STATUS_A {
|
||||
match self.bits {
|
||||
false => STATUS_A::NOT_TRIGGERED,
|
||||
true => STATUS_A::TRIGGERED,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `NOT_TRIGGERED`"]
|
||||
#[inline(always)]
|
||||
pub fn is_not_triggered(&self) -> bool {
|
||||
*self == STATUS_A::NOT_TRIGGERED
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `TRIGGERED`"]
|
||||
#[inline(always)]
|
||||
pub fn is_triggered(&self) -> bool {
|
||||
*self == STATUS_A::TRIGGERED
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bit 0 - Task LFCLKSTART triggered status."]
|
||||
#[inline(always)]
|
||||
pub fn status(&self) -> STATUS_R {
|
||||
STATUS_R::new((self.bits & 1) != 0)
|
||||
}
|
||||
}
|
||||
#[doc = "Task LFCLKSTART triggered status.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfclkrun](index.html) module"]
|
||||
pub struct LFCLKRUN_SPEC;
|
||||
impl crate::RegisterSpec for LFCLKRUN_SPEC {
|
||||
type Ux = u32;
|
||||
}
|
||||
#[doc = "`read()` method returns [lfclkrun::R](R) reader structure"]
|
||||
impl crate::Readable for LFCLKRUN_SPEC {
|
||||
type Reader = R;
|
||||
}
|
||||
#[doc = "`reset()` method sets LFCLKRUN to value 0"]
|
||||
impl crate::Resettable for LFCLKRUN_SPEC {
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Ux {
|
||||
0
|
||||
}
|
||||
}
|
||||
+141
@@ -0,0 +1,141 @@
|
||||
#[doc = "Register `LFCLKSRC` reader"]
|
||||
pub struct R(crate::R<LFCLKSRC_SPEC>);
|
||||
impl core::ops::Deref for R {
|
||||
type Target = crate::R<LFCLKSRC_SPEC>;
|
||||
#[inline(always)]
|
||||
fn deref(&self) -> &Self::Target {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
impl From<crate::R<LFCLKSRC_SPEC>> for R {
|
||||
#[inline(always)]
|
||||
fn from(reader: crate::R<LFCLKSRC_SPEC>) -> Self {
|
||||
R(reader)
|
||||
}
|
||||
}
|
||||
#[doc = "Register `LFCLKSRC` writer"]
|
||||
pub struct W(crate::W<LFCLKSRC_SPEC>);
|
||||
impl core::ops::Deref for W {
|
||||
type Target = crate::W<LFCLKSRC_SPEC>;
|
||||
#[inline(always)]
|
||||
fn deref(&self) -> &Self::Target {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
impl core::ops::DerefMut for W {
|
||||
#[inline(always)]
|
||||
fn deref_mut(&mut self) -> &mut Self::Target {
|
||||
&mut self.0
|
||||
}
|
||||
}
|
||||
impl From<crate::W<LFCLKSRC_SPEC>> for W {
|
||||
#[inline(always)]
|
||||
fn from(writer: crate::W<LFCLKSRC_SPEC>) -> Self {
|
||||
W(writer)
|
||||
}
|
||||
}
|
||||
#[doc = "Field `SRC` reader - Clock source."]
|
||||
pub type SRC_R = crate::FieldReader<u8, SRC_A>;
|
||||
#[doc = "Clock source.\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
#[repr(u8)]
|
||||
pub enum SRC_A {
|
||||
#[doc = "0: Internal 32KiHz RC oscillator."]
|
||||
RC = 0,
|
||||
#[doc = "1: External 32KiHz crystal."]
|
||||
XTAL = 1,
|
||||
#[doc = "2: Internal 32KiHz synthesizer from HFCLK system clock."]
|
||||
SYNTH = 2,
|
||||
}
|
||||
impl From<SRC_A> for u8 {
|
||||
#[inline(always)]
|
||||
fn from(variant: SRC_A) -> Self {
|
||||
variant as _
|
||||
}
|
||||
}
|
||||
impl SRC_R {
|
||||
#[doc = "Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> Option<SRC_A> {
|
||||
match self.bits {
|
||||
0 => Some(SRC_A::RC),
|
||||
1 => Some(SRC_A::XTAL),
|
||||
2 => Some(SRC_A::SYNTH),
|
||||
_ => None,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `RC`"]
|
||||
#[inline(always)]
|
||||
pub fn is_rc(&self) -> bool {
|
||||
*self == SRC_A::RC
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `XTAL`"]
|
||||
#[inline(always)]
|
||||
pub fn is_xtal(&self) -> bool {
|
||||
*self == SRC_A::XTAL
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `SYNTH`"]
|
||||
#[inline(always)]
|
||||
pub fn is_synth(&self) -> bool {
|
||||
*self == SRC_A::SYNTH
|
||||
}
|
||||
}
|
||||
#[doc = "Field `SRC` writer - Clock source."]
|
||||
pub type SRC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, LFCLKSRC_SPEC, u8, SRC_A, 2, O>;
|
||||
impl<'a, const O: u8> SRC_W<'a, O> {
|
||||
#[doc = "Internal 32KiHz RC oscillator."]
|
||||
#[inline(always)]
|
||||
pub fn rc(self) -> &'a mut W {
|
||||
self.variant(SRC_A::RC)
|
||||
}
|
||||
#[doc = "External 32KiHz crystal."]
|
||||
#[inline(always)]
|
||||
pub fn xtal(self) -> &'a mut W {
|
||||
self.variant(SRC_A::XTAL)
|
||||
}
|
||||
#[doc = "Internal 32KiHz synthesizer from HFCLK system clock."]
|
||||
#[inline(always)]
|
||||
pub fn synth(self) -> &'a mut W {
|
||||
self.variant(SRC_A::SYNTH)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bits 0:1 - Clock source."]
|
||||
#[inline(always)]
|
||||
pub fn src(&self) -> SRC_R {
|
||||
SRC_R::new((self.bits & 3) as u8)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bits 0:1 - Clock source."]
|
||||
#[inline(always)]
|
||||
pub fn src(&mut self) -> SRC_W<0> {
|
||||
SRC_W::new(self)
|
||||
}
|
||||
#[doc = "Writes raw bits to the register."]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.0.bits(bits);
|
||||
self
|
||||
}
|
||||
}
|
||||
#[doc = "Clock source for the LFCLK clock.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfclksrc](index.html) module"]
|
||||
pub struct LFCLKSRC_SPEC;
|
||||
impl crate::RegisterSpec for LFCLKSRC_SPEC {
|
||||
type Ux = u32;
|
||||
}
|
||||
#[doc = "`read()` method returns [lfclksrc::R](R) reader structure"]
|
||||
impl crate::Readable for LFCLKSRC_SPEC {
|
||||
type Reader = R;
|
||||
}
|
||||
#[doc = "`write(|w| ..)` method takes [lfclksrc::W](W) writer structure"]
|
||||
impl crate::Writable for LFCLKSRC_SPEC {
|
||||
type Writer = W;
|
||||
}
|
||||
#[doc = "`reset()` method sets LFCLKSRC to value 0"]
|
||||
impl crate::Resettable for LFCLKSRC_SPEC {
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Ux {
|
||||
0
|
||||
}
|
||||
}
|
||||
+84
@@ -0,0 +1,84 @@
|
||||
#[doc = "Register `LFCLKSRCCOPY` reader"]
|
||||
pub struct R(crate::R<LFCLKSRCCOPY_SPEC>);
|
||||
impl core::ops::Deref for R {
|
||||
type Target = crate::R<LFCLKSRCCOPY_SPEC>;
|
||||
#[inline(always)]
|
||||
fn deref(&self) -> &Self::Target {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
impl From<crate::R<LFCLKSRCCOPY_SPEC>> for R {
|
||||
#[inline(always)]
|
||||
fn from(reader: crate::R<LFCLKSRCCOPY_SPEC>) -> Self {
|
||||
R(reader)
|
||||
}
|
||||
}
|
||||
#[doc = "Field `SRC` reader - Clock source for the LFCLK clock, set when task LKCLKSTART is triggered."]
|
||||
pub type SRC_R = crate::FieldReader<u8, SRC_A>;
|
||||
#[doc = "Clock source for the LFCLK clock, set when task LKCLKSTART is triggered.\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
#[repr(u8)]
|
||||
pub enum SRC_A {
|
||||
#[doc = "0: Internal 32KiHz RC oscillator."]
|
||||
RC = 0,
|
||||
#[doc = "1: External 32KiHz crystal."]
|
||||
XTAL = 1,
|
||||
#[doc = "2: Internal 32KiHz synthesizer from HFCLK system clock."]
|
||||
SYNTH = 2,
|
||||
}
|
||||
impl From<SRC_A> for u8 {
|
||||
#[inline(always)]
|
||||
fn from(variant: SRC_A) -> Self {
|
||||
variant as _
|
||||
}
|
||||
}
|
||||
impl SRC_R {
|
||||
#[doc = "Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> Option<SRC_A> {
|
||||
match self.bits {
|
||||
0 => Some(SRC_A::RC),
|
||||
1 => Some(SRC_A::XTAL),
|
||||
2 => Some(SRC_A::SYNTH),
|
||||
_ => None,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `RC`"]
|
||||
#[inline(always)]
|
||||
pub fn is_rc(&self) -> bool {
|
||||
*self == SRC_A::RC
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `XTAL`"]
|
||||
#[inline(always)]
|
||||
pub fn is_xtal(&self) -> bool {
|
||||
*self == SRC_A::XTAL
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `SYNTH`"]
|
||||
#[inline(always)]
|
||||
pub fn is_synth(&self) -> bool {
|
||||
*self == SRC_A::SYNTH
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bits 0:1 - Clock source for the LFCLK clock, set when task LKCLKSTART is triggered."]
|
||||
#[inline(always)]
|
||||
pub fn src(&self) -> SRC_R {
|
||||
SRC_R::new((self.bits & 3) as u8)
|
||||
}
|
||||
}
|
||||
#[doc = "Clock source for the LFCLK clock, set when task LKCLKSTART is triggered.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfclksrccopy](index.html) module"]
|
||||
pub struct LFCLKSRCCOPY_SPEC;
|
||||
impl crate::RegisterSpec for LFCLKSRCCOPY_SPEC {
|
||||
type Ux = u32;
|
||||
}
|
||||
#[doc = "`read()` method returns [lfclksrccopy::R](R) reader structure"]
|
||||
impl crate::Readable for LFCLKSRCCOPY_SPEC {
|
||||
type Reader = R;
|
||||
}
|
||||
#[doc = "`reset()` method sets LFCLKSRCCOPY to value 0"]
|
||||
impl crate::Resettable for LFCLKSRCCOPY_SPEC {
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Ux {
|
||||
0
|
||||
}
|
||||
}
|
||||
+125
@@ -0,0 +1,125 @@
|
||||
#[doc = "Register `LFCLKSTAT` reader"]
|
||||
pub struct R(crate::R<LFCLKSTAT_SPEC>);
|
||||
impl core::ops::Deref for R {
|
||||
type Target = crate::R<LFCLKSTAT_SPEC>;
|
||||
#[inline(always)]
|
||||
fn deref(&self) -> &Self::Target {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
impl From<crate::R<LFCLKSTAT_SPEC>> for R {
|
||||
#[inline(always)]
|
||||
fn from(reader: crate::R<LFCLKSTAT_SPEC>) -> Self {
|
||||
R(reader)
|
||||
}
|
||||
}
|
||||
#[doc = "Field `SRC` reader - Active clock source for the LF clock."]
|
||||
pub type SRC_R = crate::FieldReader<u8, SRC_A>;
|
||||
#[doc = "Active clock source for the LF clock.\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
#[repr(u8)]
|
||||
pub enum SRC_A {
|
||||
#[doc = "0: Internal 32KiHz RC oscillator running and generating the LFCLK clock."]
|
||||
RC = 0,
|
||||
#[doc = "1: External 32KiHz crystal oscillator running and generating the LFCLK clock."]
|
||||
XTAL = 1,
|
||||
#[doc = "2: Internal 32KiHz synthesizer from the HFCLK running and generating the LFCLK clock."]
|
||||
SYNTH = 2,
|
||||
}
|
||||
impl From<SRC_A> for u8 {
|
||||
#[inline(always)]
|
||||
fn from(variant: SRC_A) -> Self {
|
||||
variant as _
|
||||
}
|
||||
}
|
||||
impl SRC_R {
|
||||
#[doc = "Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> Option<SRC_A> {
|
||||
match self.bits {
|
||||
0 => Some(SRC_A::RC),
|
||||
1 => Some(SRC_A::XTAL),
|
||||
2 => Some(SRC_A::SYNTH),
|
||||
_ => None,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `RC`"]
|
||||
#[inline(always)]
|
||||
pub fn is_rc(&self) -> bool {
|
||||
*self == SRC_A::RC
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `XTAL`"]
|
||||
#[inline(always)]
|
||||
pub fn is_xtal(&self) -> bool {
|
||||
*self == SRC_A::XTAL
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `SYNTH`"]
|
||||
#[inline(always)]
|
||||
pub fn is_synth(&self) -> bool {
|
||||
*self == SRC_A::SYNTH
|
||||
}
|
||||
}
|
||||
#[doc = "Field `STATE` reader - State for the LF clock."]
|
||||
pub type STATE_R = crate::BitReader<STATE_A>;
|
||||
#[doc = "State for the LF clock.\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum STATE_A {
|
||||
#[doc = "0: LFCLK clock not running."]
|
||||
NOT_RUNNING = 0,
|
||||
#[doc = "1: LFCLK clock running."]
|
||||
RUNNING = 1,
|
||||
}
|
||||
impl From<STATE_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: STATE_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
impl STATE_R {
|
||||
#[doc = "Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> STATE_A {
|
||||
match self.bits {
|
||||
false => STATE_A::NOT_RUNNING,
|
||||
true => STATE_A::RUNNING,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `NOT_RUNNING`"]
|
||||
#[inline(always)]
|
||||
pub fn is_not_running(&self) -> bool {
|
||||
*self == STATE_A::NOT_RUNNING
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `RUNNING`"]
|
||||
#[inline(always)]
|
||||
pub fn is_running(&self) -> bool {
|
||||
*self == STATE_A::RUNNING
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bits 0:1 - Active clock source for the LF clock."]
|
||||
#[inline(always)]
|
||||
pub fn src(&self) -> SRC_R {
|
||||
SRC_R::new((self.bits & 3) as u8)
|
||||
}
|
||||
#[doc = "Bit 16 - State for the LF clock."]
|
||||
#[inline(always)]
|
||||
pub fn state(&self) -> STATE_R {
|
||||
STATE_R::new(((self.bits >> 16) & 1) != 0)
|
||||
}
|
||||
}
|
||||
#[doc = "Low frequency clock status.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfclkstat](index.html) module"]
|
||||
pub struct LFCLKSTAT_SPEC;
|
||||
impl crate::RegisterSpec for LFCLKSTAT_SPEC {
|
||||
type Ux = u32;
|
||||
}
|
||||
#[doc = "`read()` method returns [lfclkstat::R](R) reader structure"]
|
||||
impl crate::Readable for LFCLKSTAT_SPEC {
|
||||
type Reader = R;
|
||||
}
|
||||
#[doc = "`reset()` method sets LFCLKSTAT to value 0"]
|
||||
impl crate::Resettable for LFCLKSTAT_SPEC {
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Ux {
|
||||
0
|
||||
}
|
||||
}
|
||||
+45
@@ -0,0 +1,45 @@
|
||||
#[doc = "Register `TASKS_CAL` writer"]
|
||||
pub struct W(crate::W<TASKS_CAL_SPEC>);
|
||||
impl core::ops::Deref for W {
|
||||
type Target = crate::W<TASKS_CAL_SPEC>;
|
||||
#[inline(always)]
|
||||
fn deref(&self) -> &Self::Target {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
impl core::ops::DerefMut for W {
|
||||
#[inline(always)]
|
||||
fn deref_mut(&mut self) -> &mut Self::Target {
|
||||
&mut self.0
|
||||
}
|
||||
}
|
||||
impl From<crate::W<TASKS_CAL_SPEC>> for W {
|
||||
#[inline(always)]
|
||||
fn from(writer: crate::W<TASKS_CAL_SPEC>) -> Self {
|
||||
W(writer)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Writes raw bits to the register."]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.0.bits(bits);
|
||||
self
|
||||
}
|
||||
}
|
||||
#[doc = "Start calibration of LFCLK RC oscillator.\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_cal](index.html) module"]
|
||||
pub struct TASKS_CAL_SPEC;
|
||||
impl crate::RegisterSpec for TASKS_CAL_SPEC {
|
||||
type Ux = u32;
|
||||
}
|
||||
#[doc = "`write(|w| ..)` method takes [tasks_cal::W](W) writer structure"]
|
||||
impl crate::Writable for TASKS_CAL_SPEC {
|
||||
type Writer = W;
|
||||
}
|
||||
#[doc = "`reset()` method sets TASKS_CAL to value 0"]
|
||||
impl crate::Resettable for TASKS_CAL_SPEC {
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Ux {
|
||||
0
|
||||
}
|
||||
}
|
||||
+45
@@ -0,0 +1,45 @@
|
||||
#[doc = "Register `TASKS_CTSTART` writer"]
|
||||
pub struct W(crate::W<TASKS_CTSTART_SPEC>);
|
||||
impl core::ops::Deref for W {
|
||||
type Target = crate::W<TASKS_CTSTART_SPEC>;
|
||||
#[inline(always)]
|
||||
fn deref(&self) -> &Self::Target {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
impl core::ops::DerefMut for W {
|
||||
#[inline(always)]
|
||||
fn deref_mut(&mut self) -> &mut Self::Target {
|
||||
&mut self.0
|
||||
}
|
||||
}
|
||||
impl From<crate::W<TASKS_CTSTART_SPEC>> for W {
|
||||
#[inline(always)]
|
||||
fn from(writer: crate::W<TASKS_CTSTART_SPEC>) -> Self {
|
||||
W(writer)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Writes raw bits to the register."]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.0.bits(bits);
|
||||
self
|
||||
}
|
||||
}
|
||||
#[doc = "Start calibration timer.\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_ctstart](index.html) module"]
|
||||
pub struct TASKS_CTSTART_SPEC;
|
||||
impl crate::RegisterSpec for TASKS_CTSTART_SPEC {
|
||||
type Ux = u32;
|
||||
}
|
||||
#[doc = "`write(|w| ..)` method takes [tasks_ctstart::W](W) writer structure"]
|
||||
impl crate::Writable for TASKS_CTSTART_SPEC {
|
||||
type Writer = W;
|
||||
}
|
||||
#[doc = "`reset()` method sets TASKS_CTSTART to value 0"]
|
||||
impl crate::Resettable for TASKS_CTSTART_SPEC {
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Ux {
|
||||
0
|
||||
}
|
||||
}
|
||||
+45
@@ -0,0 +1,45 @@
|
||||
#[doc = "Register `TASKS_CTSTOP` writer"]
|
||||
pub struct W(crate::W<TASKS_CTSTOP_SPEC>);
|
||||
impl core::ops::Deref for W {
|
||||
type Target = crate::W<TASKS_CTSTOP_SPEC>;
|
||||
#[inline(always)]
|
||||
fn deref(&self) -> &Self::Target {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
impl core::ops::DerefMut for W {
|
||||
#[inline(always)]
|
||||
fn deref_mut(&mut self) -> &mut Self::Target {
|
||||
&mut self.0
|
||||
}
|
||||
}
|
||||
impl From<crate::W<TASKS_CTSTOP_SPEC>> for W {
|
||||
#[inline(always)]
|
||||
fn from(writer: crate::W<TASKS_CTSTOP_SPEC>) -> Self {
|
||||
W(writer)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Writes raw bits to the register."]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.0.bits(bits);
|
||||
self
|
||||
}
|
||||
}
|
||||
#[doc = "Stop calibration timer.\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_ctstop](index.html) module"]
|
||||
pub struct TASKS_CTSTOP_SPEC;
|
||||
impl crate::RegisterSpec for TASKS_CTSTOP_SPEC {
|
||||
type Ux = u32;
|
||||
}
|
||||
#[doc = "`write(|w| ..)` method takes [tasks_ctstop::W](W) writer structure"]
|
||||
impl crate::Writable for TASKS_CTSTOP_SPEC {
|
||||
type Writer = W;
|
||||
}
|
||||
#[doc = "`reset()` method sets TASKS_CTSTOP to value 0"]
|
||||
impl crate::Resettable for TASKS_CTSTOP_SPEC {
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Ux {
|
||||
0
|
||||
}
|
||||
}
|
||||
+45
@@ -0,0 +1,45 @@
|
||||
#[doc = "Register `TASKS_HFCLKSTART` writer"]
|
||||
pub struct W(crate::W<TASKS_HFCLKSTART_SPEC>);
|
||||
impl core::ops::Deref for W {
|
||||
type Target = crate::W<TASKS_HFCLKSTART_SPEC>;
|
||||
#[inline(always)]
|
||||
fn deref(&self) -> &Self::Target {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
impl core::ops::DerefMut for W {
|
||||
#[inline(always)]
|
||||
fn deref_mut(&mut self) -> &mut Self::Target {
|
||||
&mut self.0
|
||||
}
|
||||
}
|
||||
impl From<crate::W<TASKS_HFCLKSTART_SPEC>> for W {
|
||||
#[inline(always)]
|
||||
fn from(writer: crate::W<TASKS_HFCLKSTART_SPEC>) -> Self {
|
||||
W(writer)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Writes raw bits to the register."]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.0.bits(bits);
|
||||
self
|
||||
}
|
||||
}
|
||||
#[doc = "Start HFCLK clock source.\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_hfclkstart](index.html) module"]
|
||||
pub struct TASKS_HFCLKSTART_SPEC;
|
||||
impl crate::RegisterSpec for TASKS_HFCLKSTART_SPEC {
|
||||
type Ux = u32;
|
||||
}
|
||||
#[doc = "`write(|w| ..)` method takes [tasks_hfclkstart::W](W) writer structure"]
|
||||
impl crate::Writable for TASKS_HFCLKSTART_SPEC {
|
||||
type Writer = W;
|
||||
}
|
||||
#[doc = "`reset()` method sets TASKS_HFCLKSTART to value 0"]
|
||||
impl crate::Resettable for TASKS_HFCLKSTART_SPEC {
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Ux {
|
||||
0
|
||||
}
|
||||
}
|
||||
+45
@@ -0,0 +1,45 @@
|
||||
#[doc = "Register `TASKS_HFCLKSTOP` writer"]
|
||||
pub struct W(crate::W<TASKS_HFCLKSTOP_SPEC>);
|
||||
impl core::ops::Deref for W {
|
||||
type Target = crate::W<TASKS_HFCLKSTOP_SPEC>;
|
||||
#[inline(always)]
|
||||
fn deref(&self) -> &Self::Target {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
impl core::ops::DerefMut for W {
|
||||
#[inline(always)]
|
||||
fn deref_mut(&mut self) -> &mut Self::Target {
|
||||
&mut self.0
|
||||
}
|
||||
}
|
||||
impl From<crate::W<TASKS_HFCLKSTOP_SPEC>> for W {
|
||||
#[inline(always)]
|
||||
fn from(writer: crate::W<TASKS_HFCLKSTOP_SPEC>) -> Self {
|
||||
W(writer)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Writes raw bits to the register."]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.0.bits(bits);
|
||||
self
|
||||
}
|
||||
}
|
||||
#[doc = "Stop HFCLK clock source.\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_hfclkstop](index.html) module"]
|
||||
pub struct TASKS_HFCLKSTOP_SPEC;
|
||||
impl crate::RegisterSpec for TASKS_HFCLKSTOP_SPEC {
|
||||
type Ux = u32;
|
||||
}
|
||||
#[doc = "`write(|w| ..)` method takes [tasks_hfclkstop::W](W) writer structure"]
|
||||
impl crate::Writable for TASKS_HFCLKSTOP_SPEC {
|
||||
type Writer = W;
|
||||
}
|
||||
#[doc = "`reset()` method sets TASKS_HFCLKSTOP to value 0"]
|
||||
impl crate::Resettable for TASKS_HFCLKSTOP_SPEC {
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Ux {
|
||||
0
|
||||
}
|
||||
}
|
||||
+45
@@ -0,0 +1,45 @@
|
||||
#[doc = "Register `TASKS_LFCLKSTART` writer"]
|
||||
pub struct W(crate::W<TASKS_LFCLKSTART_SPEC>);
|
||||
impl core::ops::Deref for W {
|
||||
type Target = crate::W<TASKS_LFCLKSTART_SPEC>;
|
||||
#[inline(always)]
|
||||
fn deref(&self) -> &Self::Target {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
impl core::ops::DerefMut for W {
|
||||
#[inline(always)]
|
||||
fn deref_mut(&mut self) -> &mut Self::Target {
|
||||
&mut self.0
|
||||
}
|
||||
}
|
||||
impl From<crate::W<TASKS_LFCLKSTART_SPEC>> for W {
|
||||
#[inline(always)]
|
||||
fn from(writer: crate::W<TASKS_LFCLKSTART_SPEC>) -> Self {
|
||||
W(writer)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Writes raw bits to the register."]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.0.bits(bits);
|
||||
self
|
||||
}
|
||||
}
|
||||
#[doc = "Start LFCLK clock source.\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_lfclkstart](index.html) module"]
|
||||
pub struct TASKS_LFCLKSTART_SPEC;
|
||||
impl crate::RegisterSpec for TASKS_LFCLKSTART_SPEC {
|
||||
type Ux = u32;
|
||||
}
|
||||
#[doc = "`write(|w| ..)` method takes [tasks_lfclkstart::W](W) writer structure"]
|
||||
impl crate::Writable for TASKS_LFCLKSTART_SPEC {
|
||||
type Writer = W;
|
||||
}
|
||||
#[doc = "`reset()` method sets TASKS_LFCLKSTART to value 0"]
|
||||
impl crate::Resettable for TASKS_LFCLKSTART_SPEC {
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Ux {
|
||||
0
|
||||
}
|
||||
}
|
||||
+45
@@ -0,0 +1,45 @@
|
||||
#[doc = "Register `TASKS_LFCLKSTOP` writer"]
|
||||
pub struct W(crate::W<TASKS_LFCLKSTOP_SPEC>);
|
||||
impl core::ops::Deref for W {
|
||||
type Target = crate::W<TASKS_LFCLKSTOP_SPEC>;
|
||||
#[inline(always)]
|
||||
fn deref(&self) -> &Self::Target {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
impl core::ops::DerefMut for W {
|
||||
#[inline(always)]
|
||||
fn deref_mut(&mut self) -> &mut Self::Target {
|
||||
&mut self.0
|
||||
}
|
||||
}
|
||||
impl From<crate::W<TASKS_LFCLKSTOP_SPEC>> for W {
|
||||
#[inline(always)]
|
||||
fn from(writer: crate::W<TASKS_LFCLKSTOP_SPEC>) -> Self {
|
||||
W(writer)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Writes raw bits to the register."]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.0.bits(bits);
|
||||
self
|
||||
}
|
||||
}
|
||||
#[doc = "Stop LFCLK clock source.\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_lfclkstop](index.html) module"]
|
||||
pub struct TASKS_LFCLKSTOP_SPEC;
|
||||
impl crate::RegisterSpec for TASKS_LFCLKSTOP_SPEC {
|
||||
type Ux = u32;
|
||||
}
|
||||
#[doc = "`write(|w| ..)` method takes [tasks_lfclkstop::W](W) writer structure"]
|
||||
impl crate::Writable for TASKS_LFCLKSTOP_SPEC {
|
||||
type Writer = W;
|
||||
}
|
||||
#[doc = "`reset()` method sets TASKS_LFCLKSTOP to value 0"]
|
||||
impl crate::Resettable for TASKS_LFCLKSTOP_SPEC {
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Ux {
|
||||
0
|
||||
}
|
||||
}
|
||||
+129
@@ -0,0 +1,129 @@
|
||||
#[doc = "Register `XTALFREQ` reader"]
|
||||
pub struct R(crate::R<XTALFREQ_SPEC>);
|
||||
impl core::ops::Deref for R {
|
||||
type Target = crate::R<XTALFREQ_SPEC>;
|
||||
#[inline(always)]
|
||||
fn deref(&self) -> &Self::Target {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
impl From<crate::R<XTALFREQ_SPEC>> for R {
|
||||
#[inline(always)]
|
||||
fn from(reader: crate::R<XTALFREQ_SPEC>) -> Self {
|
||||
R(reader)
|
||||
}
|
||||
}
|
||||
#[doc = "Register `XTALFREQ` writer"]
|
||||
pub struct W(crate::W<XTALFREQ_SPEC>);
|
||||
impl core::ops::Deref for W {
|
||||
type Target = crate::W<XTALFREQ_SPEC>;
|
||||
#[inline(always)]
|
||||
fn deref(&self) -> &Self::Target {
|
||||
&self.0
|
||||
}
|
||||
}
|
||||
impl core::ops::DerefMut for W {
|
||||
#[inline(always)]
|
||||
fn deref_mut(&mut self) -> &mut Self::Target {
|
||||
&mut self.0
|
||||
}
|
||||
}
|
||||
impl From<crate::W<XTALFREQ_SPEC>> for W {
|
||||
#[inline(always)]
|
||||
fn from(writer: crate::W<XTALFREQ_SPEC>) -> Self {
|
||||
W(writer)
|
||||
}
|
||||
}
|
||||
#[doc = "Field `XTALFREQ` reader - External Xtal frequency selection."]
|
||||
pub type XTALFREQ_R = crate::FieldReader<u8, XTALFREQ_A>;
|
||||
#[doc = "External Xtal frequency selection.\n\nValue on reset: 255"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
#[repr(u8)]
|
||||
pub enum XTALFREQ_A {
|
||||
#[doc = "255: 16MHz xtal is used as source for the HFCLK oscillator."]
|
||||
_16MHZ = 255,
|
||||
#[doc = "0: 32MHz xtal is used as source for the HFCLK oscillator."]
|
||||
_32MHZ = 0,
|
||||
}
|
||||
impl From<XTALFREQ_A> for u8 {
|
||||
#[inline(always)]
|
||||
fn from(variant: XTALFREQ_A) -> Self {
|
||||
variant as _
|
||||
}
|
||||
}
|
||||
impl XTALFREQ_R {
|
||||
#[doc = "Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> Option<XTALFREQ_A> {
|
||||
match self.bits {
|
||||
255 => Some(XTALFREQ_A::_16MHZ),
|
||||
0 => Some(XTALFREQ_A::_32MHZ),
|
||||
_ => None,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_16MHZ`"]
|
||||
#[inline(always)]
|
||||
pub fn is_16mhz(&self) -> bool {
|
||||
*self == XTALFREQ_A::_16MHZ
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_32MHZ`"]
|
||||
#[inline(always)]
|
||||
pub fn is_32mhz(&self) -> bool {
|
||||
*self == XTALFREQ_A::_32MHZ
|
||||
}
|
||||
}
|
||||
#[doc = "Field `XTALFREQ` writer - External Xtal frequency selection."]
|
||||
pub type XTALFREQ_W<'a, const O: u8> =
|
||||
crate::FieldWriter<'a, u32, XTALFREQ_SPEC, u8, XTALFREQ_A, 8, O>;
|
||||
impl<'a, const O: u8> XTALFREQ_W<'a, O> {
|
||||
#[doc = "16MHz xtal is used as source for the HFCLK oscillator."]
|
||||
#[inline(always)]
|
||||
pub fn _16mhz(self) -> &'a mut W {
|
||||
self.variant(XTALFREQ_A::_16MHZ)
|
||||
}
|
||||
#[doc = "32MHz xtal is used as source for the HFCLK oscillator."]
|
||||
#[inline(always)]
|
||||
pub fn _32mhz(self) -> &'a mut W {
|
||||
self.variant(XTALFREQ_A::_32MHZ)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bits 0:7 - External Xtal frequency selection."]
|
||||
#[inline(always)]
|
||||
pub fn xtalfreq(&self) -> XTALFREQ_R {
|
||||
XTALFREQ_R::new((self.bits & 0xff) as u8)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bits 0:7 - External Xtal frequency selection."]
|
||||
#[inline(always)]
|
||||
pub fn xtalfreq(&mut self) -> XTALFREQ_W<0> {
|
||||
XTALFREQ_W::new(self)
|
||||
}
|
||||
#[doc = "Writes raw bits to the register."]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.0.bits(bits);
|
||||
self
|
||||
}
|
||||
}
|
||||
#[doc = "Crystal frequency.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [xtalfreq](index.html) module"]
|
||||
pub struct XTALFREQ_SPEC;
|
||||
impl crate::RegisterSpec for XTALFREQ_SPEC {
|
||||
type Ux = u32;
|
||||
}
|
||||
#[doc = "`read()` method returns [xtalfreq::R](R) reader structure"]
|
||||
impl crate::Readable for XTALFREQ_SPEC {
|
||||
type Reader = R;
|
||||
}
|
||||
#[doc = "`write(|w| ..)` method takes [xtalfreq::W](W) writer structure"]
|
||||
impl crate::Writable for XTALFREQ_SPEC {
|
||||
type Writer = W;
|
||||
}
|
||||
#[doc = "`reset()` method sets XTALFREQ to value 0xffff_ffff"]
|
||||
impl crate::Resettable for XTALFREQ_SPEC {
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Ux {
|
||||
0xffff_ffff
|
||||
}
|
||||
}
|
||||
Reference in new issue
Block a user