feat: add display UI with splash screen, dashboard, and RSSI sparkline
Implement full SSD1306 OLED display support: - Splash screen on boot (1.5s) with project name, version, board - Dashboard showing radio state, config, counters, RSSI/SNR - RSSI history sparkline (64-sample ring buffer, 2px-wide bars) - DisplayOn/DisplayOff host commands routed via dedicated channel - Pure render functions against generic DrawTarget (no hardware coupling) - Display on/off control bypasses radio task entirely Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
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#[doc = "Register `MAXCNT` reader"]
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pub struct R(crate::R<MAXCNT_SPEC>);
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impl core::ops::Deref for R {
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type Target = crate::R<MAXCNT_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl From<crate::R<MAXCNT_SPEC>> for R {
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#[inline(always)]
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fn from(reader: crate::R<MAXCNT_SPEC>) -> Self {
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R(reader)
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}
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}
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#[doc = "Register `MAXCNT` writer"]
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pub struct W(crate::W<MAXCNT_SPEC>);
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impl core::ops::Deref for W {
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type Target = crate::W<MAXCNT_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl core::ops::DerefMut for W {
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#[inline(always)]
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fn deref_mut(&mut self) -> &mut Self::Target {
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&mut self.0
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}
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}
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impl From<crate::W<MAXCNT_SPEC>> for W {
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#[inline(always)]
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fn from(writer: crate::W<MAXCNT_SPEC>) -> Self {
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W(writer)
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}
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}
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#[doc = "Field `BUFFSIZE` reader - Length of DMA RAM allocation in number of samples"]
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pub type BUFFSIZE_R = crate::FieldReader<u16, u16>;
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#[doc = "Field `BUFFSIZE` writer - Length of DMA RAM allocation in number of samples"]
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pub type BUFFSIZE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, MAXCNT_SPEC, u16, u16, 15, O>;
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impl R {
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#[doc = "Bits 0:14 - Length of DMA RAM allocation in number of samples"]
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#[inline(always)]
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pub fn buffsize(&self) -> BUFFSIZE_R {
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BUFFSIZE_R::new((self.bits & 0x7fff) as u16)
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}
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}
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impl W {
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#[doc = "Bits 0:14 - Length of DMA RAM allocation in number of samples"]
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#[inline(always)]
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pub fn buffsize(&mut self) -> BUFFSIZE_W<0> {
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BUFFSIZE_W::new(self)
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}
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#[doc = "Writes raw bits to the register."]
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#[inline(always)]
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pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
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self.0.bits(bits);
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self
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}
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}
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#[doc = "Number of samples to allocate memory for in EasyDMA mode\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [maxcnt](index.html) module"]
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pub struct MAXCNT_SPEC;
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impl crate::RegisterSpec for MAXCNT_SPEC {
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type Ux = u32;
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}
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#[doc = "`read()` method returns [maxcnt::R](R) reader structure"]
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impl crate::Readable for MAXCNT_SPEC {
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type Reader = R;
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}
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#[doc = "`write(|w| ..)` method takes [maxcnt::W](W) writer structure"]
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impl crate::Writable for MAXCNT_SPEC {
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type Writer = W;
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}
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#[doc = "`reset()` method sets MAXCNT to value 0"]
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impl crate::Resettable for MAXCNT_SPEC {
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#[inline(always)]
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fn reset_value() -> Self::Ux {
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0
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}
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}
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+80
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#[doc = "Register `PTR` reader"]
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pub struct R(crate::R<PTR_SPEC>);
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impl core::ops::Deref for R {
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type Target = crate::R<PTR_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl From<crate::R<PTR_SPEC>> for R {
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#[inline(always)]
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fn from(reader: crate::R<PTR_SPEC>) -> Self {
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R(reader)
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}
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}
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#[doc = "Register `PTR` writer"]
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pub struct W(crate::W<PTR_SPEC>);
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impl core::ops::Deref for W {
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type Target = crate::W<PTR_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl core::ops::DerefMut for W {
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#[inline(always)]
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fn deref_mut(&mut self) -> &mut Self::Target {
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&mut self.0
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}
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}
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impl From<crate::W<PTR_SPEC>> for W {
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#[inline(always)]
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fn from(writer: crate::W<PTR_SPEC>) -> Self {
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W(writer)
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}
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}
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#[doc = "Field `SAMPLEPTR` reader - Address to write PDM samples to over DMA"]
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pub type SAMPLEPTR_R = crate::FieldReader<u32, u32>;
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#[doc = "Field `SAMPLEPTR` writer - Address to write PDM samples to over DMA"]
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pub type SAMPLEPTR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PTR_SPEC, u32, u32, 32, O>;
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impl R {
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#[doc = "Bits 0:31 - Address to write PDM samples to over DMA"]
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#[inline(always)]
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pub fn sampleptr(&self) -> SAMPLEPTR_R {
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SAMPLEPTR_R::new(self.bits)
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}
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}
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impl W {
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#[doc = "Bits 0:31 - Address to write PDM samples to over DMA"]
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#[inline(always)]
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pub fn sampleptr(&mut self) -> SAMPLEPTR_W<0> {
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SAMPLEPTR_W::new(self)
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}
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#[doc = "Writes raw bits to the register."]
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#[inline(always)]
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pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
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self.0.bits(bits);
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self
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}
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}
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#[doc = "RAM address pointer to write samples to with EasyDMA\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ptr](index.html) module"]
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pub struct PTR_SPEC;
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impl crate::RegisterSpec for PTR_SPEC {
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type Ux = u32;
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}
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#[doc = "`read()` method returns [ptr::R](R) reader structure"]
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impl crate::Readable for PTR_SPEC {
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type Reader = R;
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}
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#[doc = "`write(|w| ..)` method takes [ptr::W](W) writer structure"]
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impl crate::Writable for PTR_SPEC {
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type Writer = W;
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}
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#[doc = "`reset()` method sets PTR to value 0"]
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impl crate::Resettable for PTR_SPEC {
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#[inline(always)]
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fn reset_value() -> Self::Ux {
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0
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}
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}
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