feat: add display UI with splash screen, dashboard, and RSSI sparkline
Implement full SSD1306 OLED display support: - Splash screen on boot (1.5s) with project name, version, board - Dashboard showing radio state, config, counters, RSSI/SNR - RSSI history sparkline (64-sample ring buffer, 2px-wide bars) - DisplayOn/DisplayOff host commands routed via dedicated channel - Pure render functions against generic DrawTarget (no hardware coupling) - Display on/off control bypasses radio task entirely Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
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Vendored
+22
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#[doc = r"Register block"]
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#[repr(C)]
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pub struct ACL {
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#[doc = "0x00 - Description cluster: Start address of region to protect. The start address must be word-aligned."]
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pub addr: ADDR,
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#[doc = "0x04 - Description cluster: Size of region to protect counting from address ACL\\[n\\].ADDR. Write '0' as no effect."]
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pub size: SIZE,
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#[doc = "0x08 - Description cluster: Access permissions for region n as defined by start address ACL\\[n\\].ADDR and size ACL\\[n\\].SIZE"]
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pub perm: PERM,
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}
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#[doc = "ADDR (rw) register accessor: an alias for `Reg<ADDR_SPEC>`"]
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pub type ADDR = crate::Reg<addr::ADDR_SPEC>;
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#[doc = "Description cluster: Start address of region to protect. The start address must be word-aligned."]
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pub mod addr;
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#[doc = "SIZE (rw) register accessor: an alias for `Reg<SIZE_SPEC>`"]
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pub type SIZE = crate::Reg<size::SIZE_SPEC>;
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#[doc = "Description cluster: Size of region to protect counting from address ACL\\[n\\].ADDR. Write '0' as no effect."]
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pub mod size;
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#[doc = "PERM (rw) register accessor: an alias for `Reg<PERM_SPEC>`"]
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pub type PERM = crate::Reg<perm::PERM_SPEC>;
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#[doc = "Description cluster: Access permissions for region n as defined by start address ACL\\[n\\].ADDR and size ACL\\[n\\].SIZE"]
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pub mod perm;
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+80
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#[doc = "Register `ADDR` reader"]
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pub struct R(crate::R<ADDR_SPEC>);
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impl core::ops::Deref for R {
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type Target = crate::R<ADDR_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl From<crate::R<ADDR_SPEC>> for R {
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#[inline(always)]
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fn from(reader: crate::R<ADDR_SPEC>) -> Self {
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R(reader)
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}
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}
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#[doc = "Register `ADDR` writer"]
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pub struct W(crate::W<ADDR_SPEC>);
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impl core::ops::Deref for W {
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type Target = crate::W<ADDR_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl core::ops::DerefMut for W {
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#[inline(always)]
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fn deref_mut(&mut self) -> &mut Self::Target {
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&mut self.0
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}
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}
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impl From<crate::W<ADDR_SPEC>> for W {
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#[inline(always)]
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fn from(writer: crate::W<ADDR_SPEC>) -> Self {
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W(writer)
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}
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}
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#[doc = "Field `ADDR` reader - Start address of flash region n. The start address must point to a flash page boundary."]
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pub type ADDR_R = crate::FieldReader<u32, u32>;
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#[doc = "Field `ADDR` writer - Start address of flash region n. The start address must point to a flash page boundary."]
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pub type ADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ADDR_SPEC, u32, u32, 32, O>;
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impl R {
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#[doc = "Bits 0:31 - Start address of flash region n. The start address must point to a flash page boundary."]
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#[inline(always)]
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pub fn addr(&self) -> ADDR_R {
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ADDR_R::new(self.bits)
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}
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}
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impl W {
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#[doc = "Bits 0:31 - Start address of flash region n. The start address must point to a flash page boundary."]
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#[inline(always)]
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pub fn addr(&mut self) -> ADDR_W<0> {
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ADDR_W::new(self)
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}
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#[doc = "Writes raw bits to the register."]
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#[inline(always)]
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pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
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self.0.bits(bits);
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self
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}
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}
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#[doc = "Description cluster: Start address of region to protect. The start address must be word-aligned.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [addr](index.html) module"]
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pub struct ADDR_SPEC;
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impl crate::RegisterSpec for ADDR_SPEC {
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type Ux = u32;
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}
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#[doc = "`read()` method returns [addr::R](R) reader structure"]
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impl crate::Readable for ADDR_SPEC {
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type Reader = R;
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}
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#[doc = "`write(|w| ..)` method takes [addr::W](W) writer structure"]
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impl crate::Writable for ADDR_SPEC {
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type Writer = W;
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}
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#[doc = "`reset()` method sets ADDR to value 0"]
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impl crate::Resettable for ADDR_SPEC {
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#[inline(always)]
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fn reset_value() -> Self::Ux {
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0
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}
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}
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+186
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#[doc = "Register `PERM` reader"]
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pub struct R(crate::R<PERM_SPEC>);
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impl core::ops::Deref for R {
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type Target = crate::R<PERM_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl From<crate::R<PERM_SPEC>> for R {
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#[inline(always)]
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fn from(reader: crate::R<PERM_SPEC>) -> Self {
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R(reader)
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}
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}
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#[doc = "Register `PERM` writer"]
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pub struct W(crate::W<PERM_SPEC>);
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impl core::ops::Deref for W {
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type Target = crate::W<PERM_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl core::ops::DerefMut for W {
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#[inline(always)]
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fn deref_mut(&mut self) -> &mut Self::Target {
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&mut self.0
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}
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}
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impl From<crate::W<PERM_SPEC>> for W {
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#[inline(always)]
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fn from(writer: crate::W<PERM_SPEC>) -> Self {
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W(writer)
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}
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}
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#[doc = "Field `WRITE` reader - Configure write and erase permissions for region n. Write '0' has no effect."]
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pub type WRITE_R = crate::BitReader<WRITE_A>;
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#[doc = "Configure write and erase permissions for region n. Write '0' has no effect.\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum WRITE_A {
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#[doc = "0: Allow write and erase instructions to region n"]
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ENABLE = 0,
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#[doc = "1: Block write and erase instructions to region n"]
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DISABLE = 1,
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}
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impl From<WRITE_A> for bool {
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#[inline(always)]
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fn from(variant: WRITE_A) -> Self {
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variant as u8 != 0
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}
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}
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impl WRITE_R {
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#[doc = "Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> WRITE_A {
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match self.bits {
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false => WRITE_A::ENABLE,
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true => WRITE_A::DISABLE,
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}
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}
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#[doc = "Checks if the value of the field is `ENABLE`"]
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#[inline(always)]
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pub fn is_enable(&self) -> bool {
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*self == WRITE_A::ENABLE
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}
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#[doc = "Checks if the value of the field is `DISABLE`"]
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#[inline(always)]
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pub fn is_disable(&self) -> bool {
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*self == WRITE_A::DISABLE
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}
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}
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#[doc = "Field `WRITE` writer - Configure write and erase permissions for region n. Write '0' has no effect."]
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pub type WRITE_W<'a, const O: u8> = crate::BitWriter<'a, u32, PERM_SPEC, WRITE_A, O>;
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impl<'a, const O: u8> WRITE_W<'a, O> {
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#[doc = "Allow write and erase instructions to region n"]
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#[inline(always)]
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pub fn enable(self) -> &'a mut W {
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self.variant(WRITE_A::ENABLE)
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}
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#[doc = "Block write and erase instructions to region n"]
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#[inline(always)]
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pub fn disable(self) -> &'a mut W {
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self.variant(WRITE_A::DISABLE)
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}
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}
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#[doc = "Field `READ` reader - Configure read permissions for region n. Write '0' has no effect."]
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pub type READ_R = crate::BitReader<READ_A>;
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#[doc = "Configure read permissions for region n. Write '0' has no effect.\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum READ_A {
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#[doc = "0: Allow read instructions to region n"]
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ENABLE = 0,
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#[doc = "1: Block read instructions to region n"]
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DISABLE = 1,
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}
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impl From<READ_A> for bool {
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#[inline(always)]
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fn from(variant: READ_A) -> Self {
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variant as u8 != 0
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}
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}
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impl READ_R {
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#[doc = "Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> READ_A {
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match self.bits {
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false => READ_A::ENABLE,
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true => READ_A::DISABLE,
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}
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}
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#[doc = "Checks if the value of the field is `ENABLE`"]
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#[inline(always)]
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pub fn is_enable(&self) -> bool {
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*self == READ_A::ENABLE
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}
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#[doc = "Checks if the value of the field is `DISABLE`"]
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#[inline(always)]
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pub fn is_disable(&self) -> bool {
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*self == READ_A::DISABLE
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}
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}
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#[doc = "Field `READ` writer - Configure read permissions for region n. Write '0' has no effect."]
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pub type READ_W<'a, const O: u8> = crate::BitWriter<'a, u32, PERM_SPEC, READ_A, O>;
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impl<'a, const O: u8> READ_W<'a, O> {
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#[doc = "Allow read instructions to region n"]
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#[inline(always)]
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pub fn enable(self) -> &'a mut W {
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self.variant(READ_A::ENABLE)
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}
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#[doc = "Block read instructions to region n"]
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#[inline(always)]
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pub fn disable(self) -> &'a mut W {
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self.variant(READ_A::DISABLE)
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}
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}
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impl R {
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#[doc = "Bit 1 - Configure write and erase permissions for region n. Write '0' has no effect."]
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#[inline(always)]
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pub fn write(&self) -> WRITE_R {
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WRITE_R::new(((self.bits >> 1) & 1) != 0)
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}
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#[doc = "Bit 2 - Configure read permissions for region n. Write '0' has no effect."]
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#[inline(always)]
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pub fn read(&self) -> READ_R {
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READ_R::new(((self.bits >> 2) & 1) != 0)
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}
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}
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impl W {
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#[doc = "Bit 1 - Configure write and erase permissions for region n. Write '0' has no effect."]
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#[inline(always)]
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pub fn write(&mut self) -> WRITE_W<1> {
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WRITE_W::new(self)
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}
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#[doc = "Bit 2 - Configure read permissions for region n. Write '0' has no effect."]
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#[inline(always)]
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pub fn read(&mut self) -> READ_W<2> {
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READ_W::new(self)
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}
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#[doc = "Writes raw bits to the register."]
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#[inline(always)]
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pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
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self.0.bits(bits);
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self
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}
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}
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#[doc = "Description cluster: Access permissions for region n as defined by start address ACL\\[n\\].ADDR and size ACL\\[n\\].SIZE\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [perm](index.html) module"]
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pub struct PERM_SPEC;
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impl crate::RegisterSpec for PERM_SPEC {
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type Ux = u32;
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}
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#[doc = "`read()` method returns [perm::R](R) reader structure"]
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impl crate::Readable for PERM_SPEC {
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type Reader = R;
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}
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#[doc = "`write(|w| ..)` method takes [perm::W](W) writer structure"]
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impl crate::Writable for PERM_SPEC {
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type Writer = W;
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}
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#[doc = "`reset()` method sets PERM to value 0"]
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impl crate::Resettable for PERM_SPEC {
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#[inline(always)]
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fn reset_value() -> Self::Ux {
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0
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}
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}
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+80
@@ -0,0 +1,80 @@
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#[doc = "Register `SIZE` reader"]
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pub struct R(crate::R<SIZE_SPEC>);
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impl core::ops::Deref for R {
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type Target = crate::R<SIZE_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl From<crate::R<SIZE_SPEC>> for R {
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#[inline(always)]
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fn from(reader: crate::R<SIZE_SPEC>) -> Self {
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R(reader)
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}
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}
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#[doc = "Register `SIZE` writer"]
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pub struct W(crate::W<SIZE_SPEC>);
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impl core::ops::Deref for W {
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type Target = crate::W<SIZE_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl core::ops::DerefMut for W {
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#[inline(always)]
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fn deref_mut(&mut self) -> &mut Self::Target {
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&mut self.0
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}
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}
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impl From<crate::W<SIZE_SPEC>> for W {
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#[inline(always)]
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fn from(writer: crate::W<SIZE_SPEC>) -> Self {
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W(writer)
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}
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}
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#[doc = "Field `SIZE` reader - Size of flash region n in bytes. Must be a multiple of the flash page size."]
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pub type SIZE_R = crate::FieldReader<u32, u32>;
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#[doc = "Field `SIZE` writer - Size of flash region n in bytes. Must be a multiple of the flash page size."]
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pub type SIZE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SIZE_SPEC, u32, u32, 32, O>;
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impl R {
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#[doc = "Bits 0:31 - Size of flash region n in bytes. Must be a multiple of the flash page size."]
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#[inline(always)]
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pub fn size(&self) -> SIZE_R {
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SIZE_R::new(self.bits)
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}
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}
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impl W {
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#[doc = "Bits 0:31 - Size of flash region n in bytes. Must be a multiple of the flash page size."]
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#[inline(always)]
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pub fn size(&mut self) -> SIZE_W<0> {
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SIZE_W::new(self)
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}
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#[doc = "Writes raw bits to the register."]
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#[inline(always)]
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pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
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self.0.bits(bits);
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self
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}
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}
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#[doc = "Description cluster: Size of region to protect counting from address ACL\\[n\\].ADDR. Write '0' as no effect.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [size](index.html) module"]
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pub struct SIZE_SPEC;
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impl crate::RegisterSpec for SIZE_SPEC {
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type Ux = u32;
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}
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#[doc = "`read()` method returns [size::R](R) reader structure"]
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impl crate::Readable for SIZE_SPEC {
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type Reader = R;
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}
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#[doc = "`write(|w| ..)` method takes [size::W](W) writer structure"]
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impl crate::Writable for SIZE_SPEC {
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type Writer = W;
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}
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#[doc = "`reset()` method sets SIZE to value 0"]
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impl crate::Resettable for SIZE_SPEC {
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#[inline(always)]
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fn reset_value() -> Self::Ux {
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0
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}
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}
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Block a user