feat: add display UI with splash screen, dashboard, and RSSI sparkline

Implement full SSD1306 OLED display support:
- Splash screen on boot (1.5s) with project name, version, board
- Dashboard showing radio state, config, counters, RSSI/SNR
- RSSI history sparkline (64-sample ring buffer, 2px-wide bars)
- DisplayOn/DisplayOff host commands routed via dedicated channel
- Pure render functions against generic DrawTarget (no hardware coupling)
- Display on/off control bypasses radio task entirely

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>

vendor/nrf52820-pac/src/spis0/config.rs

@@ -0,0 +1,246 @@
+#[doc = "Register `CONFIG` reader"]
+pub struct R(crate::R<CONFIG_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CONFIG_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CONFIG_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CONFIG_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CONFIG` writer"]
+pub struct W(crate::W<CONFIG_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CONFIG_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CONFIG_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CONFIG_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ORDER` reader - Bit order"]
+pub type ORDER_R = crate::BitReader<ORDER_A>;
+#[doc = "Bit order\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ORDER_A {
+    #[doc = "0: Most significant bit shifted out first"]
+    MSB_FIRST = 0,
+    #[doc = "1: Least significant bit shifted out first"]
+    LSB_FIRST = 1,
+}
+impl From<ORDER_A> for bool {
+    #[inline(always)]
+    fn from(variant: ORDER_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ORDER_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ORDER_A {
+        match self.bits {
+            false => ORDER_A::MSB_FIRST,
+            true => ORDER_A::LSB_FIRST,
+        }
+    }
+    #[doc = "Checks if the value of the field is `MSB_FIRST`"]
+    #[inline(always)]
+    pub fn is_msb_first(&self) -> bool {
+        *self == ORDER_A::MSB_FIRST
+    }
+    #[doc = "Checks if the value of the field is `LSB_FIRST`"]
+    #[inline(always)]
+    pub fn is_lsb_first(&self) -> bool {
+        *self == ORDER_A::LSB_FIRST
+    }
+}
+#[doc = "Field `ORDER` writer - Bit order"]
+pub type ORDER_W<'a, const O: u8> = crate::BitWriter<'a, u32, CONFIG_SPEC, ORDER_A, O>;
+impl<'a, const O: u8> ORDER_W<'a, O> {
+    #[doc = "Most significant bit shifted out first"]
+    #[inline(always)]
+    pub fn msb_first(self) -> &'a mut W {
+        self.variant(ORDER_A::MSB_FIRST)
+    }
+    #[doc = "Least significant bit shifted out first"]
+    #[inline(always)]
+    pub fn lsb_first(self) -> &'a mut W {
+        self.variant(ORDER_A::LSB_FIRST)
+    }
+}
+#[doc = "Field `CPHA` reader - Serial clock (SCK) phase"]
+pub type CPHA_R = crate::BitReader<CPHA_A>;
+#[doc = "Serial clock (SCK) phase\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CPHA_A {
+    #[doc = "0: Sample on leading edge of clock, shift serial data on trailing edge"]
+    LEADING = 0,
+    #[doc = "1: Sample on trailing edge of clock, shift serial data on leading edge"]
+    TRAILING = 1,
+}
+impl From<CPHA_A> for bool {
+    #[inline(always)]
+    fn from(variant: CPHA_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl CPHA_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CPHA_A {
+        match self.bits {
+            false => CPHA_A::LEADING,
+            true => CPHA_A::TRAILING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `LEADING`"]
+    #[inline(always)]
+    pub fn is_leading(&self) -> bool {
+        *self == CPHA_A::LEADING
+    }
+    #[doc = "Checks if the value of the field is `TRAILING`"]
+    #[inline(always)]
+    pub fn is_trailing(&self) -> bool {
+        *self == CPHA_A::TRAILING
+    }
+}
+#[doc = "Field `CPHA` writer - Serial clock (SCK) phase"]
+pub type CPHA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CONFIG_SPEC, CPHA_A, O>;
+impl<'a, const O: u8> CPHA_W<'a, O> {
+    #[doc = "Sample on leading edge of clock, shift serial data on trailing edge"]
+    #[inline(always)]
+    pub fn leading(self) -> &'a mut W {
+        self.variant(CPHA_A::LEADING)
+    }
+    #[doc = "Sample on trailing edge of clock, shift serial data on leading edge"]
+    #[inline(always)]
+    pub fn trailing(self) -> &'a mut W {
+        self.variant(CPHA_A::TRAILING)
+    }
+}
+#[doc = "Field `CPOL` reader - Serial clock (SCK) polarity"]
+pub type CPOL_R = crate::BitReader<CPOL_A>;
+#[doc = "Serial clock (SCK) polarity\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CPOL_A {
+    #[doc = "0: Active high"]
+    ACTIVE_HIGH = 0,
+    #[doc = "1: Active low"]
+    ACTIVE_LOW = 1,
+}
+impl From<CPOL_A> for bool {
+    #[inline(always)]
+    fn from(variant: CPOL_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl CPOL_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CPOL_A {
+        match self.bits {
+            false => CPOL_A::ACTIVE_HIGH,
+            true => CPOL_A::ACTIVE_LOW,
+        }
+    }
+    #[doc = "Checks if the value of the field is `ACTIVE_HIGH`"]
+    #[inline(always)]
+    pub fn is_active_high(&self) -> bool {
+        *self == CPOL_A::ACTIVE_HIGH
+    }
+    #[doc = "Checks if the value of the field is `ACTIVE_LOW`"]
+    #[inline(always)]
+    pub fn is_active_low(&self) -> bool {
+        *self == CPOL_A::ACTIVE_LOW
+    }
+}
+#[doc = "Field `CPOL` writer - Serial clock (SCK) polarity"]
+pub type CPOL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CONFIG_SPEC, CPOL_A, O>;
+impl<'a, const O: u8> CPOL_W<'a, O> {
+    #[doc = "Active high"]
+    #[inline(always)]
+    pub fn active_high(self) -> &'a mut W {
+        self.variant(CPOL_A::ACTIVE_HIGH)
+    }
+    #[doc = "Active low"]
+    #[inline(always)]
+    pub fn active_low(self) -> &'a mut W {
+        self.variant(CPOL_A::ACTIVE_LOW)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Bit order"]
+    #[inline(always)]
+    pub fn order(&self) -> ORDER_R {
+        ORDER_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Serial clock (SCK) phase"]
+    #[inline(always)]
+    pub fn cpha(&self) -> CPHA_R {
+        CPHA_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - Serial clock (SCK) polarity"]
+    #[inline(always)]
+    pub fn cpol(&self) -> CPOL_R {
+        CPOL_R::new(((self.bits >> 2) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Bit order"]
+    #[inline(always)]
+    pub fn order(&mut self) -> ORDER_W<0> {
+        ORDER_W::new(self)
+    }
+    #[doc = "Bit 1 - Serial clock (SCK) phase"]
+    #[inline(always)]
+    pub fn cpha(&mut self) -> CPHA_W<1> {
+        CPHA_W::new(self)
+    }
+    #[doc = "Bit 2 - Serial clock (SCK) polarity"]
+    #[inline(always)]
+    pub fn cpol(&mut self) -> CPOL_W<2> {
+        CPOL_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [config](index.html) module"]
+pub struct CONFIG_SPEC;
+impl crate::RegisterSpec for CONFIG_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [config::R](R) reader structure"]
+impl crate::Readable for CONFIG_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [config::W](W) writer structure"]
+impl crate::Writable for CONFIG_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CONFIG to value 0"]
+impl crate::Resettable for CONFIG_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf52820-pac/src/spis0/def.rs

@@ -0,0 +1,80 @@
+#[doc = "Register `DEF` reader"]
+pub struct R(crate::R<DEF_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<DEF_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<DEF_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<DEF_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `DEF` writer"]
+pub struct W(crate::W<DEF_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<DEF_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<DEF_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<DEF_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `DEF` reader - Default character. Character clocked out in case of an ignored transaction."]
+pub type DEF_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `DEF` writer - Default character. Character clocked out in case of an ignored transaction."]
+pub type DEF_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DEF_SPEC, u8, u8, 8, O>;
+impl R {
+    #[doc = "Bits 0:7 - Default character. Character clocked out in case of an ignored transaction."]
+    #[inline(always)]
+    pub fn def(&self) -> DEF_R {
+        DEF_R::new((self.bits & 0xff) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - Default character. Character clocked out in case of an ignored transaction."]
+    #[inline(always)]
+    pub fn def(&mut self) -> DEF_W<0> {
+        DEF_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Default character. Character clocked out in case of an ignored transaction.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [def](index.html) module"]
+pub struct DEF_SPEC;
+impl crate::RegisterSpec for DEF_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [def::R](R) reader structure"]
+impl crate::Readable for DEF_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [def::W](W) writer structure"]
+impl crate::Writable for DEF_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets DEF to value 0"]
+impl crate::Resettable for DEF_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf52820-pac/src/spis0/enable.rs

@@ -0,0 +1,128 @@
+#[doc = "Register `ENABLE` reader"]
+pub struct R(crate::R<ENABLE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ENABLE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ENABLE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ENABLE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ENABLE` writer"]
+pub struct W(crate::W<ENABLE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ENABLE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ENABLE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ENABLE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ENABLE` reader - Enable or disable SPI slave"]
+pub type ENABLE_R = crate::FieldReader<u8, ENABLE_A>;
+#[doc = "Enable or disable SPI slave\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum ENABLE_A {
+    #[doc = "0: Disable SPI slave"]
+    DISABLED = 0,
+    #[doc = "2: Enable SPI slave"]
+    ENABLED = 2,
+}
+impl From<ENABLE_A> for u8 {
+    #[inline(always)]
+    fn from(variant: ENABLE_A) -> Self {
+        variant as _
+    }
+}
+impl ENABLE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<ENABLE_A> {
+        match self.bits {
+            0 => Some(ENABLE_A::DISABLED),
+            2 => Some(ENABLE_A::ENABLED),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == ENABLE_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == ENABLE_A::ENABLED
+    }
+}
+#[doc = "Field `ENABLE` writer - Enable or disable SPI slave"]
+pub type ENABLE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ENABLE_SPEC, u8, ENABLE_A, 4, O>;
+impl<'a, const O: u8> ENABLE_W<'a, O> {
+    #[doc = "Disable SPI slave"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(ENABLE_A::DISABLED)
+    }
+    #[doc = "Enable SPI slave"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(ENABLE_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:3 - Enable or disable SPI slave"]
+    #[inline(always)]
+    pub fn enable(&self) -> ENABLE_R {
+        ENABLE_R::new((self.bits & 0x0f) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:3 - Enable or disable SPI slave"]
+    #[inline(always)]
+    pub fn enable(&mut self) -> ENABLE_W<0> {
+        ENABLE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Enable SPI slave\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [enable](index.html) module"]
+pub struct ENABLE_SPEC;
+impl crate::RegisterSpec for ENABLE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [enable::R](R) reader structure"]
+impl crate::Readable for ENABLE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [enable::W](W) writer structure"]
+impl crate::Writable for ENABLE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets ENABLE to value 0"]
+impl crate::Resettable for ENABLE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf52820-pac/src/spis0/events_acquired.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_ACQUIRED` reader"]
+pub struct R(crate::R<EVENTS_ACQUIRED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_ACQUIRED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_ACQUIRED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_ACQUIRED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_ACQUIRED` writer"]
+pub struct W(crate::W<EVENTS_ACQUIRED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_ACQUIRED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_ACQUIRED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_ACQUIRED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_ACQUIRED` reader - Semaphore acquired"]
+pub type EVENTS_ACQUIRED_R = crate::BitReader<EVENTS_ACQUIRED_A>;
+#[doc = "Semaphore acquired\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_ACQUIRED_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_ACQUIRED_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_ACQUIRED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_ACQUIRED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_ACQUIRED_A {
+        match self.bits {
+            false => EVENTS_ACQUIRED_A::NOT_GENERATED,
+            true => EVENTS_ACQUIRED_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_ACQUIRED_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_ACQUIRED_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_ACQUIRED` writer - Semaphore acquired"]
+pub type EVENTS_ACQUIRED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_ACQUIRED_SPEC, EVENTS_ACQUIRED_A, O>;
+impl<'a, const O: u8> EVENTS_ACQUIRED_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_ACQUIRED_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_ACQUIRED_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Semaphore acquired"]
+    #[inline(always)]
+    pub fn events_acquired(&self) -> EVENTS_ACQUIRED_R {
+        EVENTS_ACQUIRED_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Semaphore acquired"]
+    #[inline(always)]
+    pub fn events_acquired(&mut self) -> EVENTS_ACQUIRED_W<0> {
+        EVENTS_ACQUIRED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Semaphore acquired\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_acquired](index.html) module"]
+pub struct EVENTS_ACQUIRED_SPEC;
+impl crate::RegisterSpec for EVENTS_ACQUIRED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_acquired::R](R) reader structure"]
+impl crate::Readable for EVENTS_ACQUIRED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_acquired::W](W) writer structure"]
+impl crate::Writable for EVENTS_ACQUIRED_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_ACQUIRED to value 0"]
+impl crate::Resettable for EVENTS_ACQUIRED_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf52820-pac/src/spis0/events_end.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_END` reader"]
+pub struct R(crate::R<EVENTS_END_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_END_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_END_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_END_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_END` writer"]
+pub struct W(crate::W<EVENTS_END_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_END_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_END_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_END_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_END` reader - Granted transaction completed"]
+pub type EVENTS_END_R = crate::BitReader<EVENTS_END_A>;
+#[doc = "Granted transaction completed\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_END_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_END_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_END_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_END_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_END_A {
+        match self.bits {
+            false => EVENTS_END_A::NOT_GENERATED,
+            true => EVENTS_END_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_END_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_END_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_END` writer - Granted transaction completed"]
+pub type EVENTS_END_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_END_SPEC, EVENTS_END_A, O>;
+impl<'a, const O: u8> EVENTS_END_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_END_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_END_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Granted transaction completed"]
+    #[inline(always)]
+    pub fn events_end(&self) -> EVENTS_END_R {
+        EVENTS_END_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Granted transaction completed"]
+    #[inline(always)]
+    pub fn events_end(&mut self) -> EVENTS_END_W<0> {
+        EVENTS_END_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Granted transaction completed\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_end](index.html) module"]
+pub struct EVENTS_END_SPEC;
+impl crate::RegisterSpec for EVENTS_END_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_end::R](R) reader structure"]
+impl crate::Readable for EVENTS_END_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_end::W](W) writer structure"]
+impl crate::Writable for EVENTS_END_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_END to value 0"]
+impl crate::Resettable for EVENTS_END_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf52820-pac/src/spis0/events_endrx.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_ENDRX` reader"]
+pub struct R(crate::R<EVENTS_ENDRX_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_ENDRX_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_ENDRX_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_ENDRX_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_ENDRX` writer"]
+pub struct W(crate::W<EVENTS_ENDRX_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_ENDRX_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_ENDRX_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_ENDRX_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_ENDRX` reader - End of RXD buffer reached"]
+pub type EVENTS_ENDRX_R = crate::BitReader<EVENTS_ENDRX_A>;
+#[doc = "End of RXD buffer reached\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_ENDRX_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_ENDRX_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_ENDRX_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_ENDRX_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_ENDRX_A {
+        match self.bits {
+            false => EVENTS_ENDRX_A::NOT_GENERATED,
+            true => EVENTS_ENDRX_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_ENDRX_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_ENDRX_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_ENDRX` writer - End of RXD buffer reached"]
+pub type EVENTS_ENDRX_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_ENDRX_SPEC, EVENTS_ENDRX_A, O>;
+impl<'a, const O: u8> EVENTS_ENDRX_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_ENDRX_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_ENDRX_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - End of RXD buffer reached"]
+    #[inline(always)]
+    pub fn events_endrx(&self) -> EVENTS_ENDRX_R {
+        EVENTS_ENDRX_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - End of RXD buffer reached"]
+    #[inline(always)]
+    pub fn events_endrx(&mut self) -> EVENTS_ENDRX_W<0> {
+        EVENTS_ENDRX_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "End of RXD buffer reached\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_endrx](index.html) module"]
+pub struct EVENTS_ENDRX_SPEC;
+impl crate::RegisterSpec for EVENTS_ENDRX_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_endrx::R](R) reader structure"]
+impl crate::Readable for EVENTS_ENDRX_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_endrx::W](W) writer structure"]
+impl crate::Writable for EVENTS_ENDRX_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_ENDRX to value 0"]
+impl crate::Resettable for EVENTS_ENDRX_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf52820-pac/src/spis0/intenclr.rs

@@ -0,0 +1,267 @@
+#[doc = "Register `INTENCLR` reader"]
+pub struct R(crate::R<INTENCLR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENCLR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENCLR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENCLR` writer"]
+pub struct W(crate::W<INTENCLR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENCLR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENCLR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `END` reader - Write '1' to disable interrupt for event END"]
+pub type END_R = crate::BitReader<END_A>;
+#[doc = "Write '1' to disable interrupt for event END\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum END_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<END_A> for bool {
+    #[inline(always)]
+    fn from(variant: END_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl END_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> END_A {
+        match self.bits {
+            false => END_A::DISABLED,
+            true => END_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == END_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == END_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event END\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum END_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<END_AW> for bool {
+    #[inline(always)]
+    fn from(variant: END_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `END` writer - Write '1' to disable interrupt for event END"]
+pub type END_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, END_AW, O>;
+impl<'a, const O: u8> END_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(END_AW::CLEAR)
+    }
+}
+#[doc = "Field `ENDRX` reader - Write '1' to disable interrupt for event ENDRX"]
+pub type ENDRX_R = crate::BitReader<ENDRX_A>;
+#[doc = "Write '1' to disable interrupt for event ENDRX\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ENDRX_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<ENDRX_A> for bool {
+    #[inline(always)]
+    fn from(variant: ENDRX_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ENDRX_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ENDRX_A {
+        match self.bits {
+            false => ENDRX_A::DISABLED,
+            true => ENDRX_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == ENDRX_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == ENDRX_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event ENDRX\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ENDRX_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<ENDRX_AW> for bool {
+    #[inline(always)]
+    fn from(variant: ENDRX_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `ENDRX` writer - Write '1' to disable interrupt for event ENDRX"]
+pub type ENDRX_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, ENDRX_AW, O>;
+impl<'a, const O: u8> ENDRX_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(ENDRX_AW::CLEAR)
+    }
+}
+#[doc = "Field `ACQUIRED` reader - Write '1' to disable interrupt for event ACQUIRED"]
+pub type ACQUIRED_R = crate::BitReader<ACQUIRED_A>;
+#[doc = "Write '1' to disable interrupt for event ACQUIRED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ACQUIRED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<ACQUIRED_A> for bool {
+    #[inline(always)]
+    fn from(variant: ACQUIRED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ACQUIRED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ACQUIRED_A {
+        match self.bits {
+            false => ACQUIRED_A::DISABLED,
+            true => ACQUIRED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == ACQUIRED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == ACQUIRED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event ACQUIRED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ACQUIRED_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<ACQUIRED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: ACQUIRED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `ACQUIRED` writer - Write '1' to disable interrupt for event ACQUIRED"]
+pub type ACQUIRED_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, ACQUIRED_AW, O>;
+impl<'a, const O: u8> ACQUIRED_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(ACQUIRED_AW::CLEAR)
+    }
+}
+impl R {
+    #[doc = "Bit 1 - Write '1' to disable interrupt for event END"]
+    #[inline(always)]
+    pub fn end(&self) -> END_R {
+        END_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 4 - Write '1' to disable interrupt for event ENDRX"]
+    #[inline(always)]
+    pub fn endrx(&self) -> ENDRX_R {
+        ENDRX_R::new(((self.bits >> 4) & 1) != 0)
+    }
+    #[doc = "Bit 10 - Write '1' to disable interrupt for event ACQUIRED"]
+    #[inline(always)]
+    pub fn acquired(&self) -> ACQUIRED_R {
+        ACQUIRED_R::new(((self.bits >> 10) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 1 - Write '1' to disable interrupt for event END"]
+    #[inline(always)]
+    pub fn end(&mut self) -> END_W<1> {
+        END_W::new(self)
+    }
+    #[doc = "Bit 4 - Write '1' to disable interrupt for event ENDRX"]
+    #[inline(always)]
+    pub fn endrx(&mut self) -> ENDRX_W<4> {
+        ENDRX_W::new(self)
+    }
+    #[doc = "Bit 10 - Write '1' to disable interrupt for event ACQUIRED"]
+    #[inline(always)]
+    pub fn acquired(&mut self) -> ACQUIRED_W<10> {
+        ACQUIRED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Disable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"]
+pub struct INTENCLR_SPEC;
+impl crate::RegisterSpec for INTENCLR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [intenclr::R](R) reader structure"]
+impl crate::Readable for INTENCLR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"]
+impl crate::Writable for INTENCLR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTENCLR to value 0"]
+impl crate::Resettable for INTENCLR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf52820-pac/src/spis0/intenset.rs

@@ -0,0 +1,267 @@
+#[doc = "Register `INTENSET` reader"]
+pub struct R(crate::R<INTENSET_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENSET_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENSET_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENSET` writer"]
+pub struct W(crate::W<INTENSET_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENSET_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENSET_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `END` reader - Write '1' to enable interrupt for event END"]
+pub type END_R = crate::BitReader<END_A>;
+#[doc = "Write '1' to enable interrupt for event END\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum END_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<END_A> for bool {
+    #[inline(always)]
+    fn from(variant: END_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl END_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> END_A {
+        match self.bits {
+            false => END_A::DISABLED,
+            true => END_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == END_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == END_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event END\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum END_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<END_AW> for bool {
+    #[inline(always)]
+    fn from(variant: END_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `END` writer - Write '1' to enable interrupt for event END"]
+pub type END_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, END_AW, O>;
+impl<'a, const O: u8> END_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(END_AW::SET)
+    }
+}
+#[doc = "Field `ENDRX` reader - Write '1' to enable interrupt for event ENDRX"]
+pub type ENDRX_R = crate::BitReader<ENDRX_A>;
+#[doc = "Write '1' to enable interrupt for event ENDRX\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ENDRX_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<ENDRX_A> for bool {
+    #[inline(always)]
+    fn from(variant: ENDRX_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ENDRX_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ENDRX_A {
+        match self.bits {
+            false => ENDRX_A::DISABLED,
+            true => ENDRX_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == ENDRX_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == ENDRX_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event ENDRX\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ENDRX_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<ENDRX_AW> for bool {
+    #[inline(always)]
+    fn from(variant: ENDRX_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `ENDRX` writer - Write '1' to enable interrupt for event ENDRX"]
+pub type ENDRX_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, ENDRX_AW, O>;
+impl<'a, const O: u8> ENDRX_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(ENDRX_AW::SET)
+    }
+}
+#[doc = "Field `ACQUIRED` reader - Write '1' to enable interrupt for event ACQUIRED"]
+pub type ACQUIRED_R = crate::BitReader<ACQUIRED_A>;
+#[doc = "Write '1' to enable interrupt for event ACQUIRED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ACQUIRED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<ACQUIRED_A> for bool {
+    #[inline(always)]
+    fn from(variant: ACQUIRED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ACQUIRED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ACQUIRED_A {
+        match self.bits {
+            false => ACQUIRED_A::DISABLED,
+            true => ACQUIRED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == ACQUIRED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == ACQUIRED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event ACQUIRED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ACQUIRED_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<ACQUIRED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: ACQUIRED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `ACQUIRED` writer - Write '1' to enable interrupt for event ACQUIRED"]
+pub type ACQUIRED_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, ACQUIRED_AW, O>;
+impl<'a, const O: u8> ACQUIRED_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(ACQUIRED_AW::SET)
+    }
+}
+impl R {
+    #[doc = "Bit 1 - Write '1' to enable interrupt for event END"]
+    #[inline(always)]
+    pub fn end(&self) -> END_R {
+        END_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 4 - Write '1' to enable interrupt for event ENDRX"]
+    #[inline(always)]
+    pub fn endrx(&self) -> ENDRX_R {
+        ENDRX_R::new(((self.bits >> 4) & 1) != 0)
+    }
+    #[doc = "Bit 10 - Write '1' to enable interrupt for event ACQUIRED"]
+    #[inline(always)]
+    pub fn acquired(&self) -> ACQUIRED_R {
+        ACQUIRED_R::new(((self.bits >> 10) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 1 - Write '1' to enable interrupt for event END"]
+    #[inline(always)]
+    pub fn end(&mut self) -> END_W<1> {
+        END_W::new(self)
+    }
+    #[doc = "Bit 4 - Write '1' to enable interrupt for event ENDRX"]
+    #[inline(always)]
+    pub fn endrx(&mut self) -> ENDRX_W<4> {
+        ENDRX_W::new(self)
+    }
+    #[doc = "Bit 10 - Write '1' to enable interrupt for event ACQUIRED"]
+    #[inline(always)]
+    pub fn acquired(&mut self) -> ACQUIRED_W<10> {
+        ACQUIRED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Enable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"]
+pub struct INTENSET_SPEC;
+impl crate::RegisterSpec for INTENSET_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [intenset::R](R) reader structure"]
+impl crate::Readable for INTENSET_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"]
+impl crate::Writable for INTENSET_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTENSET to value 0"]
+impl crate::Resettable for INTENSET_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf52820-pac/src/spis0/orc.rs

@@ -0,0 +1,80 @@
+#[doc = "Register `ORC` reader"]
+pub struct R(crate::R<ORC_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ORC_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ORC_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ORC_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ORC` writer"]
+pub struct W(crate::W<ORC_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ORC_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ORC_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ORC_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ORC` reader - Over-read character. Character clocked out after an over-read of the transmit buffer."]
+pub type ORC_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `ORC` writer - Over-read character. Character clocked out after an over-read of the transmit buffer."]
+pub type ORC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ORC_SPEC, u8, u8, 8, O>;
+impl R {
+    #[doc = "Bits 0:7 - Over-read character. Character clocked out after an over-read of the transmit buffer."]
+    #[inline(always)]
+    pub fn orc(&self) -> ORC_R {
+        ORC_R::new((self.bits & 0xff) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - Over-read character. Character clocked out after an over-read of the transmit buffer."]
+    #[inline(always)]
+    pub fn orc(&mut self) -> ORC_W<0> {
+        ORC_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Over-read character\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [orc](index.html) module"]
+pub struct ORC_SPEC;
+impl crate::RegisterSpec for ORC_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [orc::R](R) reader structure"]
+impl crate::Readable for ORC_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [orc::W](W) writer structure"]
+impl crate::Writable for ORC_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets ORC to value 0"]
+impl crate::Resettable for ORC_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf52820-pac/src/spis0/psel.rs

@@ -0,0 +1,28 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct PSEL {
+    #[doc = "0x00 - Pin select for SCK"]
+    pub sck: SCK,
+    #[doc = "0x04 - Pin select for MISO signal"]
+    pub miso: MISO,
+    #[doc = "0x08 - Pin select for MOSI signal"]
+    pub mosi: MOSI,
+    #[doc = "0x0c - Pin select for CSN signal"]
+    pub csn: CSN,
+}
+#[doc = "SCK (rw) register accessor: an alias for `Reg<SCK_SPEC>`"]
+pub type SCK = crate::Reg<sck::SCK_SPEC>;
+#[doc = "Pin select for SCK"]
+pub mod sck;
+#[doc = "MISO (rw) register accessor: an alias for `Reg<MISO_SPEC>`"]
+pub type MISO = crate::Reg<miso::MISO_SPEC>;
+#[doc = "Pin select for MISO signal"]
+pub mod miso;
+#[doc = "MOSI (rw) register accessor: an alias for `Reg<MOSI_SPEC>`"]
+pub type MOSI = crate::Reg<mosi::MOSI_SPEC>;
+#[doc = "Pin select for MOSI signal"]
+pub mod mosi;
+#[doc = "CSN (rw) register accessor: an alias for `Reg<CSN_SPEC>`"]
+pub type CSN = crate::Reg<csn::CSN_SPEC>;
+#[doc = "Pin select for CSN signal"]
+pub mod csn;

vendor/nrf52820-pac/src/spis0/psel/csn.rs

@@ -0,0 +1,140 @@
+#[doc = "Register `CSN` reader"]
+pub struct R(crate::R<CSN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CSN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CSN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CSN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CSN` writer"]
+pub struct W(crate::W<CSN_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CSN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CSN_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CSN_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `PIN` reader - Pin number"]
+pub type PIN_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `PIN` writer - Pin number"]
+pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CSN_SPEC, u8, u8, 5, O>;
+#[doc = "Field `CONNECT` reader - Connection"]
+pub type CONNECT_R = crate::BitReader<CONNECT_A>;
+#[doc = "Connection\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CONNECT_A {
+    #[doc = "1: Disconnect"]
+    DISCONNECTED = 1,
+    #[doc = "0: Connect"]
+    CONNECTED = 0,
+}
+impl From<CONNECT_A> for bool {
+    #[inline(always)]
+    fn from(variant: CONNECT_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl CONNECT_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CONNECT_A {
+        match self.bits {
+            true => CONNECT_A::DISCONNECTED,
+            false => CONNECT_A::CONNECTED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISCONNECTED`"]
+    #[inline(always)]
+    pub fn is_disconnected(&self) -> bool {
+        *self == CONNECT_A::DISCONNECTED
+    }
+    #[doc = "Checks if the value of the field is `CONNECTED`"]
+    #[inline(always)]
+    pub fn is_connected(&self) -> bool {
+        *self == CONNECT_A::CONNECTED
+    }
+}
+#[doc = "Field `CONNECT` writer - Connection"]
+pub type CONNECT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CSN_SPEC, CONNECT_A, O>;
+impl<'a, const O: u8> CONNECT_W<'a, O> {
+    #[doc = "Disconnect"]
+    #[inline(always)]
+    pub fn disconnected(self) -> &'a mut W {
+        self.variant(CONNECT_A::DISCONNECTED)
+    }
+    #[doc = "Connect"]
+    #[inline(always)]
+    pub fn connected(self) -> &'a mut W {
+        self.variant(CONNECT_A::CONNECTED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:4 - Pin number"]
+    #[inline(always)]
+    pub fn pin(&self) -> PIN_R {
+        PIN_R::new((self.bits & 0x1f) as u8)
+    }
+    #[doc = "Bit 31 - Connection"]
+    #[inline(always)]
+    pub fn connect(&self) -> CONNECT_R {
+        CONNECT_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:4 - Pin number"]
+    #[inline(always)]
+    pub fn pin(&mut self) -> PIN_W<0> {
+        PIN_W::new(self)
+    }
+    #[doc = "Bit 31 - Connection"]
+    #[inline(always)]
+    pub fn connect(&mut self) -> CONNECT_W<31> {
+        CONNECT_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Pin select for CSN signal\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [csn](index.html) module"]
+pub struct CSN_SPEC;
+impl crate::RegisterSpec for CSN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [csn::R](R) reader structure"]
+impl crate::Readable for CSN_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [csn::W](W) writer structure"]
+impl crate::Writable for CSN_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CSN to value 0xffff_ffff"]
+impl crate::Resettable for CSN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0xffff_ffff
+    }
+}

vendor/nrf52820-pac/src/spis0/psel/miso.rs

@@ -0,0 +1,140 @@
+#[doc = "Register `MISO` reader"]
+pub struct R(crate::R<MISO_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<MISO_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<MISO_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<MISO_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `MISO` writer"]
+pub struct W(crate::W<MISO_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<MISO_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<MISO_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<MISO_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `PIN` reader - Pin number"]
+pub type PIN_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `PIN` writer - Pin number"]
+pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, MISO_SPEC, u8, u8, 5, O>;
+#[doc = "Field `CONNECT` reader - Connection"]
+pub type CONNECT_R = crate::BitReader<CONNECT_A>;
+#[doc = "Connection\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CONNECT_A {
+    #[doc = "1: Disconnect"]
+    DISCONNECTED = 1,
+    #[doc = "0: Connect"]
+    CONNECTED = 0,
+}
+impl From<CONNECT_A> for bool {
+    #[inline(always)]
+    fn from(variant: CONNECT_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl CONNECT_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CONNECT_A {
+        match self.bits {
+            true => CONNECT_A::DISCONNECTED,
+            false => CONNECT_A::CONNECTED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISCONNECTED`"]
+    #[inline(always)]
+    pub fn is_disconnected(&self) -> bool {
+        *self == CONNECT_A::DISCONNECTED
+    }
+    #[doc = "Checks if the value of the field is `CONNECTED`"]
+    #[inline(always)]
+    pub fn is_connected(&self) -> bool {
+        *self == CONNECT_A::CONNECTED
+    }
+}
+#[doc = "Field `CONNECT` writer - Connection"]
+pub type CONNECT_W<'a, const O: u8> = crate::BitWriter<'a, u32, MISO_SPEC, CONNECT_A, O>;
+impl<'a, const O: u8> CONNECT_W<'a, O> {
+    #[doc = "Disconnect"]
+    #[inline(always)]
+    pub fn disconnected(self) -> &'a mut W {
+        self.variant(CONNECT_A::DISCONNECTED)
+    }
+    #[doc = "Connect"]
+    #[inline(always)]
+    pub fn connected(self) -> &'a mut W {
+        self.variant(CONNECT_A::CONNECTED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:4 - Pin number"]
+    #[inline(always)]
+    pub fn pin(&self) -> PIN_R {
+        PIN_R::new((self.bits & 0x1f) as u8)
+    }
+    #[doc = "Bit 31 - Connection"]
+    #[inline(always)]
+    pub fn connect(&self) -> CONNECT_R {
+        CONNECT_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:4 - Pin number"]
+    #[inline(always)]
+    pub fn pin(&mut self) -> PIN_W<0> {
+        PIN_W::new(self)
+    }
+    #[doc = "Bit 31 - Connection"]
+    #[inline(always)]
+    pub fn connect(&mut self) -> CONNECT_W<31> {
+        CONNECT_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Pin select for MISO signal\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [miso](index.html) module"]
+pub struct MISO_SPEC;
+impl crate::RegisterSpec for MISO_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [miso::R](R) reader structure"]
+impl crate::Readable for MISO_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [miso::W](W) writer structure"]
+impl crate::Writable for MISO_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets MISO to value 0xffff_ffff"]
+impl crate::Resettable for MISO_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0xffff_ffff
+    }
+}

vendor/nrf52820-pac/src/spis0/psel/mosi.rs

@@ -0,0 +1,140 @@
+#[doc = "Register `MOSI` reader"]
+pub struct R(crate::R<MOSI_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<MOSI_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<MOSI_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<MOSI_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `MOSI` writer"]
+pub struct W(crate::W<MOSI_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<MOSI_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<MOSI_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<MOSI_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `PIN` reader - Pin number"]
+pub type PIN_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `PIN` writer - Pin number"]
+pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, MOSI_SPEC, u8, u8, 5, O>;
+#[doc = "Field `CONNECT` reader - Connection"]
+pub type CONNECT_R = crate::BitReader<CONNECT_A>;
+#[doc = "Connection\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CONNECT_A {
+    #[doc = "1: Disconnect"]
+    DISCONNECTED = 1,
+    #[doc = "0: Connect"]
+    CONNECTED = 0,
+}
+impl From<CONNECT_A> for bool {
+    #[inline(always)]
+    fn from(variant: CONNECT_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl CONNECT_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CONNECT_A {
+        match self.bits {
+            true => CONNECT_A::DISCONNECTED,
+            false => CONNECT_A::CONNECTED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISCONNECTED`"]
+    #[inline(always)]
+    pub fn is_disconnected(&self) -> bool {
+        *self == CONNECT_A::DISCONNECTED
+    }
+    #[doc = "Checks if the value of the field is `CONNECTED`"]
+    #[inline(always)]
+    pub fn is_connected(&self) -> bool {
+        *self == CONNECT_A::CONNECTED
+    }
+}
+#[doc = "Field `CONNECT` writer - Connection"]
+pub type CONNECT_W<'a, const O: u8> = crate::BitWriter<'a, u32, MOSI_SPEC, CONNECT_A, O>;
+impl<'a, const O: u8> CONNECT_W<'a, O> {
+    #[doc = "Disconnect"]
+    #[inline(always)]
+    pub fn disconnected(self) -> &'a mut W {
+        self.variant(CONNECT_A::DISCONNECTED)
+    }
+    #[doc = "Connect"]
+    #[inline(always)]
+    pub fn connected(self) -> &'a mut W {
+        self.variant(CONNECT_A::CONNECTED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:4 - Pin number"]
+    #[inline(always)]
+    pub fn pin(&self) -> PIN_R {
+        PIN_R::new((self.bits & 0x1f) as u8)
+    }
+    #[doc = "Bit 31 - Connection"]
+    #[inline(always)]
+    pub fn connect(&self) -> CONNECT_R {
+        CONNECT_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:4 - Pin number"]
+    #[inline(always)]
+    pub fn pin(&mut self) -> PIN_W<0> {
+        PIN_W::new(self)
+    }
+    #[doc = "Bit 31 - Connection"]
+    #[inline(always)]
+    pub fn connect(&mut self) -> CONNECT_W<31> {
+        CONNECT_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Pin select for MOSI signal\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mosi](index.html) module"]
+pub struct MOSI_SPEC;
+impl crate::RegisterSpec for MOSI_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [mosi::R](R) reader structure"]
+impl crate::Readable for MOSI_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [mosi::W](W) writer structure"]
+impl crate::Writable for MOSI_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets MOSI to value 0xffff_ffff"]
+impl crate::Resettable for MOSI_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0xffff_ffff
+    }
+}

vendor/nrf52820-pac/src/spis0/psel/sck.rs

@@ -0,0 +1,140 @@
+#[doc = "Register `SCK` reader"]
+pub struct R(crate::R<SCK_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SCK_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SCK_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SCK_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SCK` writer"]
+pub struct W(crate::W<SCK_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SCK_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SCK_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SCK_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `PIN` reader - Pin number"]
+pub type PIN_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `PIN` writer - Pin number"]
+pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCK_SPEC, u8, u8, 5, O>;
+#[doc = "Field `CONNECT` reader - Connection"]
+pub type CONNECT_R = crate::BitReader<CONNECT_A>;
+#[doc = "Connection\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CONNECT_A {
+    #[doc = "1: Disconnect"]
+    DISCONNECTED = 1,
+    #[doc = "0: Connect"]
+    CONNECTED = 0,
+}
+impl From<CONNECT_A> for bool {
+    #[inline(always)]
+    fn from(variant: CONNECT_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl CONNECT_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CONNECT_A {
+        match self.bits {
+            true => CONNECT_A::DISCONNECTED,
+            false => CONNECT_A::CONNECTED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISCONNECTED`"]
+    #[inline(always)]
+    pub fn is_disconnected(&self) -> bool {
+        *self == CONNECT_A::DISCONNECTED
+    }
+    #[doc = "Checks if the value of the field is `CONNECTED`"]
+    #[inline(always)]
+    pub fn is_connected(&self) -> bool {
+        *self == CONNECT_A::CONNECTED
+    }
+}
+#[doc = "Field `CONNECT` writer - Connection"]
+pub type CONNECT_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCK_SPEC, CONNECT_A, O>;
+impl<'a, const O: u8> CONNECT_W<'a, O> {
+    #[doc = "Disconnect"]
+    #[inline(always)]
+    pub fn disconnected(self) -> &'a mut W {
+        self.variant(CONNECT_A::DISCONNECTED)
+    }
+    #[doc = "Connect"]
+    #[inline(always)]
+    pub fn connected(self) -> &'a mut W {
+        self.variant(CONNECT_A::CONNECTED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:4 - Pin number"]
+    #[inline(always)]
+    pub fn pin(&self) -> PIN_R {
+        PIN_R::new((self.bits & 0x1f) as u8)
+    }
+    #[doc = "Bit 31 - Connection"]
+    #[inline(always)]
+    pub fn connect(&self) -> CONNECT_R {
+        CONNECT_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:4 - Pin number"]
+    #[inline(always)]
+    pub fn pin(&mut self) -> PIN_W<0> {
+        PIN_W::new(self)
+    }
+    #[doc = "Bit 31 - Connection"]
+    #[inline(always)]
+    pub fn connect(&mut self) -> CONNECT_W<31> {
+        CONNECT_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Pin select for SCK\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sck](index.html) module"]
+pub struct SCK_SPEC;
+impl crate::RegisterSpec for SCK_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [sck::R](R) reader structure"]
+impl crate::Readable for SCK_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [sck::W](W) writer structure"]
+impl crate::Writable for SCK_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SCK to value 0xffff_ffff"]
+impl crate::Resettable for SCK_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0xffff_ffff
+    }
+}

vendor/nrf52820-pac/src/spis0/rxd.rs

@@ -0,0 +1,28 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct RXD {
+    #[doc = "0x00 - RXD data pointer"]
+    pub ptr: PTR,
+    #[doc = "0x04 - Maximum number of bytes in receive buffer"]
+    pub maxcnt: MAXCNT,
+    #[doc = "0x08 - Number of bytes received in last granted transaction"]
+    pub amount: AMOUNT,
+    #[doc = "0x0c - EasyDMA list type"]
+    pub list: LIST,
+}
+#[doc = "PTR (rw) register accessor: an alias for `Reg<PTR_SPEC>`"]
+pub type PTR = crate::Reg<ptr::PTR_SPEC>;
+#[doc = "RXD data pointer"]
+pub mod ptr;
+#[doc = "MAXCNT (rw) register accessor: an alias for `Reg<MAXCNT_SPEC>`"]
+pub type MAXCNT = crate::Reg<maxcnt::MAXCNT_SPEC>;
+#[doc = "Maximum number of bytes in receive buffer"]
+pub mod maxcnt;
+#[doc = "AMOUNT (r) register accessor: an alias for `Reg<AMOUNT_SPEC>`"]
+pub type AMOUNT = crate::Reg<amount::AMOUNT_SPEC>;
+#[doc = "Number of bytes received in last granted transaction"]
+pub mod amount;
+#[doc = "LIST (rw) register accessor: an alias for `Reg<LIST_SPEC>`"]
+pub type LIST = crate::Reg<list::LIST_SPEC>;
+#[doc = "EasyDMA list type"]
+pub mod list;

vendor/nrf52820-pac/src/spis0/rxd/amount.rs

@@ -0,0 +1,40 @@
+#[doc = "Register `AMOUNT` reader"]
+pub struct R(crate::R<AMOUNT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<AMOUNT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<AMOUNT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<AMOUNT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `AMOUNT` reader - Number of bytes received in the last granted transaction"]
+pub type AMOUNT_R = crate::FieldReader<u16, u16>;
+impl R {
+    #[doc = "Bits 0:14 - Number of bytes received in the last granted transaction"]
+    #[inline(always)]
+    pub fn amount(&self) -> AMOUNT_R {
+        AMOUNT_R::new((self.bits & 0x7fff) as u16)
+    }
+}
+#[doc = "Number of bytes received in last granted transaction\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [amount](index.html) module"]
+pub struct AMOUNT_SPEC;
+impl crate::RegisterSpec for AMOUNT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [amount::R](R) reader structure"]
+impl crate::Readable for AMOUNT_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets AMOUNT to value 0"]
+impl crate::Resettable for AMOUNT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf52820-pac/src/spis0/rxd/list.rs

@@ -0,0 +1,128 @@
+#[doc = "Register `LIST` reader"]
+pub struct R(crate::R<LIST_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<LIST_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<LIST_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<LIST_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `LIST` writer"]
+pub struct W(crate::W<LIST_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<LIST_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<LIST_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<LIST_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `LIST` reader - List type"]
+pub type LIST_R = crate::FieldReader<u8, LIST_A>;
+#[doc = "List type\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum LIST_A {
+    #[doc = "0: Disable EasyDMA list"]
+    DISABLED = 0,
+    #[doc = "1: Use array list"]
+    ARRAY_LIST = 1,
+}
+impl From<LIST_A> for u8 {
+    #[inline(always)]
+    fn from(variant: LIST_A) -> Self {
+        variant as _
+    }
+}
+impl LIST_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<LIST_A> {
+        match self.bits {
+            0 => Some(LIST_A::DISABLED),
+            1 => Some(LIST_A::ARRAY_LIST),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == LIST_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ARRAY_LIST`"]
+    #[inline(always)]
+    pub fn is_array_list(&self) -> bool {
+        *self == LIST_A::ARRAY_LIST
+    }
+}
+#[doc = "Field `LIST` writer - List type"]
+pub type LIST_W<'a, const O: u8> = crate::FieldWriter<'a, u32, LIST_SPEC, u8, LIST_A, 2, O>;
+impl<'a, const O: u8> LIST_W<'a, O> {
+    #[doc = "Disable EasyDMA list"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(LIST_A::DISABLED)
+    }
+    #[doc = "Use array list"]
+    #[inline(always)]
+    pub fn array_list(self) -> &'a mut W {
+        self.variant(LIST_A::ARRAY_LIST)
+    }
+}
+impl R {
+    #[doc = "Bits 0:1 - List type"]
+    #[inline(always)]
+    pub fn list(&self) -> LIST_R {
+        LIST_R::new((self.bits & 3) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:1 - List type"]
+    #[inline(always)]
+    pub fn list(&mut self) -> LIST_W<0> {
+        LIST_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "EasyDMA list type\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [list](index.html) module"]
+pub struct LIST_SPEC;
+impl crate::RegisterSpec for LIST_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [list::R](R) reader structure"]
+impl crate::Readable for LIST_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [list::W](W) writer structure"]
+impl crate::Writable for LIST_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets LIST to value 0"]
+impl crate::Resettable for LIST_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf52820-pac/src/spis0/rxd/maxcnt.rs

@@ -0,0 +1,80 @@
+#[doc = "Register `MAXCNT` reader"]
+pub struct R(crate::R<MAXCNT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<MAXCNT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<MAXCNT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<MAXCNT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `MAXCNT` writer"]
+pub struct W(crate::W<MAXCNT_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<MAXCNT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<MAXCNT_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<MAXCNT_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `MAXCNT` reader - Maximum number of bytes in receive buffer"]
+pub type MAXCNT_R = crate::FieldReader<u16, u16>;
+#[doc = "Field `MAXCNT` writer - Maximum number of bytes in receive buffer"]
+pub type MAXCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, MAXCNT_SPEC, u16, u16, 15, O>;
+impl R {
+    #[doc = "Bits 0:14 - Maximum number of bytes in receive buffer"]
+    #[inline(always)]
+    pub fn maxcnt(&self) -> MAXCNT_R {
+        MAXCNT_R::new((self.bits & 0x7fff) as u16)
+    }
+}
+impl W {
+    #[doc = "Bits 0:14 - Maximum number of bytes in receive buffer"]
+    #[inline(always)]
+    pub fn maxcnt(&mut self) -> MAXCNT_W<0> {
+        MAXCNT_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Maximum number of bytes in receive buffer\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [maxcnt](index.html) module"]
+pub struct MAXCNT_SPEC;
+impl crate::RegisterSpec for MAXCNT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [maxcnt::R](R) reader structure"]
+impl crate::Readable for MAXCNT_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [maxcnt::W](W) writer structure"]
+impl crate::Writable for MAXCNT_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets MAXCNT to value 0"]
+impl crate::Resettable for MAXCNT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf52820-pac/src/spis0/rxd/ptr.rs

@@ -0,0 +1,80 @@
+#[doc = "Register `PTR` reader"]
+pub struct R(crate::R<PTR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PTR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PTR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PTR` writer"]
+pub struct W(crate::W<PTR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PTR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PTR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `PTR` reader - RXD data pointer"]
+pub type PTR_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `PTR` writer - RXD data pointer"]
+pub type PTR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PTR_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - RXD data pointer"]
+    #[inline(always)]
+    pub fn ptr(&self) -> PTR_R {
+        PTR_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - RXD data pointer"]
+    #[inline(always)]
+    pub fn ptr(&mut self) -> PTR_W<0> {
+        PTR_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "RXD data pointer\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ptr](index.html) module"]
+pub struct PTR_SPEC;
+impl crate::RegisterSpec for PTR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ptr::R](R) reader structure"]
+impl crate::Readable for PTR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ptr::W](W) writer structure"]
+impl crate::Writable for PTR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PTR to value 0"]
+impl crate::Resettable for PTR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf52820-pac/src/spis0/semstat.rs

@@ -0,0 +1,92 @@
+#[doc = "Register `SEMSTAT` reader"]
+pub struct R(crate::R<SEMSTAT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SEMSTAT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SEMSTAT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SEMSTAT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `SEMSTAT` reader - Semaphore status"]
+pub type SEMSTAT_R = crate::FieldReader<u8, SEMSTAT_A>;
+#[doc = "Semaphore status\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum SEMSTAT_A {
+    #[doc = "0: Semaphore is free"]
+    FREE = 0,
+    #[doc = "1: Semaphore is assigned to CPU"]
+    CPU = 1,
+    #[doc = "2: Semaphore is assigned to SPI slave"]
+    SPIS = 2,
+    #[doc = "3: Semaphore is assigned to SPI but a handover to the CPU is pending"]
+    CPUPENDING = 3,
+}
+impl From<SEMSTAT_A> for u8 {
+    #[inline(always)]
+    fn from(variant: SEMSTAT_A) -> Self {
+        variant as _
+    }
+}
+impl SEMSTAT_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> SEMSTAT_A {
+        match self.bits {
+            0 => SEMSTAT_A::FREE,
+            1 => SEMSTAT_A::CPU,
+            2 => SEMSTAT_A::SPIS,
+            3 => SEMSTAT_A::CPUPENDING,
+            _ => unreachable!(),
+        }
+    }
+    #[doc = "Checks if the value of the field is `FREE`"]
+    #[inline(always)]
+    pub fn is_free(&self) -> bool {
+        *self == SEMSTAT_A::FREE
+    }
+    #[doc = "Checks if the value of the field is `CPU`"]
+    #[inline(always)]
+    pub fn is_cpu(&self) -> bool {
+        *self == SEMSTAT_A::CPU
+    }
+    #[doc = "Checks if the value of the field is `SPIS`"]
+    #[inline(always)]
+    pub fn is_spis(&self) -> bool {
+        *self == SEMSTAT_A::SPIS
+    }
+    #[doc = "Checks if the value of the field is `CPUPENDING`"]
+    #[inline(always)]
+    pub fn is_cpupending(&self) -> bool {
+        *self == SEMSTAT_A::CPUPENDING
+    }
+}
+impl R {
+    #[doc = "Bits 0:1 - Semaphore status"]
+    #[inline(always)]
+    pub fn semstat(&self) -> SEMSTAT_R {
+        SEMSTAT_R::new((self.bits & 3) as u8)
+    }
+}
+#[doc = "Semaphore status register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [semstat](index.html) module"]
+pub struct SEMSTAT_SPEC;
+impl crate::RegisterSpec for SEMSTAT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [semstat::R](R) reader structure"]
+impl crate::Readable for SEMSTAT_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets SEMSTAT to value 0x01"]
+impl crate::Resettable for SEMSTAT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x01
+    }
+}

vendor/nrf52820-pac/src/spis0/shorts.rs

@@ -0,0 +1,126 @@
+#[doc = "Register `SHORTS` reader"]
+pub struct R(crate::R<SHORTS_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SHORTS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SHORTS_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SHORTS_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SHORTS` writer"]
+pub struct W(crate::W<SHORTS_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SHORTS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SHORTS_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SHORTS_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `END_ACQUIRE` reader - Shortcut between event END and task ACQUIRE"]
+pub type END_ACQUIRE_R = crate::BitReader<END_ACQUIRE_A>;
+#[doc = "Shortcut between event END and task ACQUIRE\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum END_ACQUIRE_A {
+    #[doc = "0: Disable shortcut"]
+    DISABLED = 0,
+    #[doc = "1: Enable shortcut"]
+    ENABLED = 1,
+}
+impl From<END_ACQUIRE_A> for bool {
+    #[inline(always)]
+    fn from(variant: END_ACQUIRE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl END_ACQUIRE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> END_ACQUIRE_A {
+        match self.bits {
+            false => END_ACQUIRE_A::DISABLED,
+            true => END_ACQUIRE_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == END_ACQUIRE_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == END_ACQUIRE_A::ENABLED
+    }
+}
+#[doc = "Field `END_ACQUIRE` writer - Shortcut between event END and task ACQUIRE"]
+pub type END_ACQUIRE_W<'a, const O: u8> = crate::BitWriter<'a, u32, SHORTS_SPEC, END_ACQUIRE_A, O>;
+impl<'a, const O: u8> END_ACQUIRE_W<'a, O> {
+    #[doc = "Disable shortcut"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(END_ACQUIRE_A::DISABLED)
+    }
+    #[doc = "Enable shortcut"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(END_ACQUIRE_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bit 2 - Shortcut between event END and task ACQUIRE"]
+    #[inline(always)]
+    pub fn end_acquire(&self) -> END_ACQUIRE_R {
+        END_ACQUIRE_R::new(((self.bits >> 2) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 2 - Shortcut between event END and task ACQUIRE"]
+    #[inline(always)]
+    pub fn end_acquire(&mut self) -> END_ACQUIRE_W<2> {
+        END_ACQUIRE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Shortcuts between local events and tasks\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [shorts](index.html) module"]
+pub struct SHORTS_SPEC;
+impl crate::RegisterSpec for SHORTS_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [shorts::R](R) reader structure"]
+impl crate::Readable for SHORTS_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [shorts::W](W) writer structure"]
+impl crate::Writable for SHORTS_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SHORTS to value 0"]
+impl crate::Resettable for SHORTS_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf52820-pac/src/spis0/status.rs

@@ -0,0 +1,200 @@
+#[doc = "Register `STATUS` reader"]
+pub struct R(crate::R<STATUS_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<STATUS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<STATUS_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<STATUS_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `STATUS` writer"]
+pub struct W(crate::W<STATUS_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<STATUS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<STATUS_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<STATUS_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `OVERREAD` reader - TX buffer over-read detected, and prevented"]
+pub type OVERREAD_R = crate::BitReader<OVERREAD_A>;
+#[doc = "TX buffer over-read detected, and prevented\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum OVERREAD_A {
+    #[doc = "0: Read: error not present"]
+    NOT_PRESENT = 0,
+    #[doc = "1: Read: error present"]
+    PRESENT = 1,
+}
+impl From<OVERREAD_A> for bool {
+    #[inline(always)]
+    fn from(variant: OVERREAD_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl OVERREAD_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> OVERREAD_A {
+        match self.bits {
+            false => OVERREAD_A::NOT_PRESENT,
+            true => OVERREAD_A::PRESENT,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_PRESENT`"]
+    #[inline(always)]
+    pub fn is_not_present(&self) -> bool {
+        *self == OVERREAD_A::NOT_PRESENT
+    }
+    #[doc = "Checks if the value of the field is `PRESENT`"]
+    #[inline(always)]
+    pub fn is_present(&self) -> bool {
+        *self == OVERREAD_A::PRESENT
+    }
+}
+#[doc = "TX buffer over-read detected, and prevented\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum OVERREAD_AW {
+    #[doc = "1: Write: clear error on writing '1'"]
+    CLEAR = 1,
+}
+impl From<OVERREAD_AW> for bool {
+    #[inline(always)]
+    fn from(variant: OVERREAD_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `OVERREAD` writer - TX buffer over-read detected, and prevented"]
+pub type OVERREAD_W<'a, const O: u8> = crate::BitWriter<'a, u32, STATUS_SPEC, OVERREAD_AW, O>;
+impl<'a, const O: u8> OVERREAD_W<'a, O> {
+    #[doc = "Write: clear error on writing '1'"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(OVERREAD_AW::CLEAR)
+    }
+}
+#[doc = "Field `OVERFLOW` reader - RX buffer overflow detected, and prevented"]
+pub type OVERFLOW_R = crate::BitReader<OVERFLOW_A>;
+#[doc = "RX buffer overflow detected, and prevented\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum OVERFLOW_A {
+    #[doc = "0: Read: error not present"]
+    NOT_PRESENT = 0,
+    #[doc = "1: Read: error present"]
+    PRESENT = 1,
+}
+impl From<OVERFLOW_A> for bool {
+    #[inline(always)]
+    fn from(variant: OVERFLOW_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl OVERFLOW_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> OVERFLOW_A {
+        match self.bits {
+            false => OVERFLOW_A::NOT_PRESENT,
+            true => OVERFLOW_A::PRESENT,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_PRESENT`"]
+    #[inline(always)]
+    pub fn is_not_present(&self) -> bool {
+        *self == OVERFLOW_A::NOT_PRESENT
+    }
+    #[doc = "Checks if the value of the field is `PRESENT`"]
+    #[inline(always)]
+    pub fn is_present(&self) -> bool {
+        *self == OVERFLOW_A::PRESENT
+    }
+}
+#[doc = "RX buffer overflow detected, and prevented\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum OVERFLOW_AW {
+    #[doc = "1: Write: clear error on writing '1'"]
+    CLEAR = 1,
+}
+impl From<OVERFLOW_AW> for bool {
+    #[inline(always)]
+    fn from(variant: OVERFLOW_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `OVERFLOW` writer - RX buffer overflow detected, and prevented"]
+pub type OVERFLOW_W<'a, const O: u8> = crate::BitWriter<'a, u32, STATUS_SPEC, OVERFLOW_AW, O>;
+impl<'a, const O: u8> OVERFLOW_W<'a, O> {
+    #[doc = "Write: clear error on writing '1'"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(OVERFLOW_AW::CLEAR)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - TX buffer over-read detected, and prevented"]
+    #[inline(always)]
+    pub fn overread(&self) -> OVERREAD_R {
+        OVERREAD_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - RX buffer overflow detected, and prevented"]
+    #[inline(always)]
+    pub fn overflow(&self) -> OVERFLOW_R {
+        OVERFLOW_R::new(((self.bits >> 1) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - TX buffer over-read detected, and prevented"]
+    #[inline(always)]
+    pub fn overread(&mut self) -> OVERREAD_W<0> {
+        OVERREAD_W::new(self)
+    }
+    #[doc = "Bit 1 - RX buffer overflow detected, and prevented"]
+    #[inline(always)]
+    pub fn overflow(&mut self) -> OVERFLOW_W<1> {
+        OVERFLOW_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Status from last transaction\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"]
+pub struct STATUS_SPEC;
+impl crate::RegisterSpec for STATUS_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [status::R](R) reader structure"]
+impl crate::Readable for STATUS_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [status::W](W) writer structure"]
+impl crate::Writable for STATUS_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets STATUS to value 0"]
+impl crate::Resettable for STATUS_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf52820-pac/src/spis0/tasks_acquire.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_ACQUIRE` writer"]
+pub struct W(crate::W<TASKS_ACQUIRE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_ACQUIRE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_ACQUIRE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_ACQUIRE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Acquire SPI semaphore\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_ACQUIRE_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_ACQUIRE_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_ACQUIRE_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_ACQUIRE` writer - Acquire SPI semaphore"]
+pub type TASKS_ACQUIRE_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_ACQUIRE_SPEC, TASKS_ACQUIRE_AW, O>;
+impl<'a, const O: u8> TASKS_ACQUIRE_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_ACQUIRE_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Acquire SPI semaphore"]
+    #[inline(always)]
+    pub fn tasks_acquire(&mut self) -> TASKS_ACQUIRE_W<0> {
+        TASKS_ACQUIRE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Acquire SPI semaphore\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_acquire](index.html) module"]
+pub struct TASKS_ACQUIRE_SPEC;
+impl crate::RegisterSpec for TASKS_ACQUIRE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_acquire::W](W) writer structure"]
+impl crate::Writable for TASKS_ACQUIRE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_ACQUIRE to value 0"]
+impl crate::Resettable for TASKS_ACQUIRE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf52820-pac/src/spis0/tasks_release.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_RELEASE` writer"]
+pub struct W(crate::W<TASKS_RELEASE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_RELEASE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_RELEASE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_RELEASE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Release SPI semaphore, enabling the SPI slave to acquire it\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_RELEASE_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_RELEASE_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_RELEASE_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_RELEASE` writer - Release SPI semaphore, enabling the SPI slave to acquire it"]
+pub type TASKS_RELEASE_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_RELEASE_SPEC, TASKS_RELEASE_AW, O>;
+impl<'a, const O: u8> TASKS_RELEASE_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_RELEASE_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Release SPI semaphore, enabling the SPI slave to acquire it"]
+    #[inline(always)]
+    pub fn tasks_release(&mut self) -> TASKS_RELEASE_W<0> {
+        TASKS_RELEASE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Release SPI semaphore, enabling the SPI slave to acquire it\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_release](index.html) module"]
+pub struct TASKS_RELEASE_SPEC;
+impl crate::RegisterSpec for TASKS_RELEASE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_release::W](W) writer structure"]
+impl crate::Writable for TASKS_RELEASE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_RELEASE to value 0"]
+impl crate::Resettable for TASKS_RELEASE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf52820-pac/src/spis0/txd.rs

@@ -0,0 +1,28 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct TXD {
+    #[doc = "0x00 - TXD data pointer"]
+    pub ptr: PTR,
+    #[doc = "0x04 - Maximum number of bytes in transmit buffer"]
+    pub maxcnt: MAXCNT,
+    #[doc = "0x08 - Number of bytes transmitted in last granted transaction"]
+    pub amount: AMOUNT,
+    #[doc = "0x0c - EasyDMA list type"]
+    pub list: LIST,
+}
+#[doc = "PTR (rw) register accessor: an alias for `Reg<PTR_SPEC>`"]
+pub type PTR = crate::Reg<ptr::PTR_SPEC>;
+#[doc = "TXD data pointer"]
+pub mod ptr;
+#[doc = "MAXCNT (rw) register accessor: an alias for `Reg<MAXCNT_SPEC>`"]
+pub type MAXCNT = crate::Reg<maxcnt::MAXCNT_SPEC>;
+#[doc = "Maximum number of bytes in transmit buffer"]
+pub mod maxcnt;
+#[doc = "AMOUNT (r) register accessor: an alias for `Reg<AMOUNT_SPEC>`"]
+pub type AMOUNT = crate::Reg<amount::AMOUNT_SPEC>;
+#[doc = "Number of bytes transmitted in last granted transaction"]
+pub mod amount;
+#[doc = "LIST (rw) register accessor: an alias for `Reg<LIST_SPEC>`"]
+pub type LIST = crate::Reg<list::LIST_SPEC>;
+#[doc = "EasyDMA list type"]
+pub mod list;

vendor/nrf52820-pac/src/spis0/txd/amount.rs

@@ -0,0 +1,40 @@
+#[doc = "Register `AMOUNT` reader"]
+pub struct R(crate::R<AMOUNT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<AMOUNT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<AMOUNT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<AMOUNT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `AMOUNT` reader - Number of bytes transmitted in last granted transaction"]
+pub type AMOUNT_R = crate::FieldReader<u16, u16>;
+impl R {
+    #[doc = "Bits 0:14 - Number of bytes transmitted in last granted transaction"]
+    #[inline(always)]
+    pub fn amount(&self) -> AMOUNT_R {
+        AMOUNT_R::new((self.bits & 0x7fff) as u16)
+    }
+}
+#[doc = "Number of bytes transmitted in last granted transaction\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [amount](index.html) module"]
+pub struct AMOUNT_SPEC;
+impl crate::RegisterSpec for AMOUNT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [amount::R](R) reader structure"]
+impl crate::Readable for AMOUNT_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets AMOUNT to value 0"]
+impl crate::Resettable for AMOUNT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf52820-pac/src/spis0/txd/list.rs

@@ -0,0 +1,128 @@
+#[doc = "Register `LIST` reader"]
+pub struct R(crate::R<LIST_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<LIST_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<LIST_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<LIST_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `LIST` writer"]
+pub struct W(crate::W<LIST_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<LIST_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<LIST_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<LIST_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `LIST` reader - List type"]
+pub type LIST_R = crate::FieldReader<u8, LIST_A>;
+#[doc = "List type\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum LIST_A {
+    #[doc = "0: Disable EasyDMA list"]
+    DISABLED = 0,
+    #[doc = "1: Use array list"]
+    ARRAY_LIST = 1,
+}
+impl From<LIST_A> for u8 {
+    #[inline(always)]
+    fn from(variant: LIST_A) -> Self {
+        variant as _
+    }
+}
+impl LIST_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<LIST_A> {
+        match self.bits {
+            0 => Some(LIST_A::DISABLED),
+            1 => Some(LIST_A::ARRAY_LIST),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == LIST_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ARRAY_LIST`"]
+    #[inline(always)]
+    pub fn is_array_list(&self) -> bool {
+        *self == LIST_A::ARRAY_LIST
+    }
+}
+#[doc = "Field `LIST` writer - List type"]
+pub type LIST_W<'a, const O: u8> = crate::FieldWriter<'a, u32, LIST_SPEC, u8, LIST_A, 2, O>;
+impl<'a, const O: u8> LIST_W<'a, O> {
+    #[doc = "Disable EasyDMA list"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(LIST_A::DISABLED)
+    }
+    #[doc = "Use array list"]
+    #[inline(always)]
+    pub fn array_list(self) -> &'a mut W {
+        self.variant(LIST_A::ARRAY_LIST)
+    }
+}
+impl R {
+    #[doc = "Bits 0:1 - List type"]
+    #[inline(always)]
+    pub fn list(&self) -> LIST_R {
+        LIST_R::new((self.bits & 3) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:1 - List type"]
+    #[inline(always)]
+    pub fn list(&mut self) -> LIST_W<0> {
+        LIST_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "EasyDMA list type\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [list](index.html) module"]
+pub struct LIST_SPEC;
+impl crate::RegisterSpec for LIST_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [list::R](R) reader structure"]
+impl crate::Readable for LIST_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [list::W](W) writer structure"]
+impl crate::Writable for LIST_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets LIST to value 0"]
+impl crate::Resettable for LIST_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf52820-pac/src/spis0/txd/maxcnt.rs

@@ -0,0 +1,80 @@
+#[doc = "Register `MAXCNT` reader"]
+pub struct R(crate::R<MAXCNT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<MAXCNT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<MAXCNT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<MAXCNT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `MAXCNT` writer"]
+pub struct W(crate::W<MAXCNT_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<MAXCNT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<MAXCNT_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<MAXCNT_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `MAXCNT` reader - Maximum number of bytes in transmit buffer"]
+pub type MAXCNT_R = crate::FieldReader<u16, u16>;
+#[doc = "Field `MAXCNT` writer - Maximum number of bytes in transmit buffer"]
+pub type MAXCNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, MAXCNT_SPEC, u16, u16, 15, O>;
+impl R {
+    #[doc = "Bits 0:14 - Maximum number of bytes in transmit buffer"]
+    #[inline(always)]
+    pub fn maxcnt(&self) -> MAXCNT_R {
+        MAXCNT_R::new((self.bits & 0x7fff) as u16)
+    }
+}
+impl W {
+    #[doc = "Bits 0:14 - Maximum number of bytes in transmit buffer"]
+    #[inline(always)]
+    pub fn maxcnt(&mut self) -> MAXCNT_W<0> {
+        MAXCNT_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Maximum number of bytes in transmit buffer\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [maxcnt](index.html) module"]
+pub struct MAXCNT_SPEC;
+impl crate::RegisterSpec for MAXCNT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [maxcnt::R](R) reader structure"]
+impl crate::Readable for MAXCNT_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [maxcnt::W](W) writer structure"]
+impl crate::Writable for MAXCNT_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets MAXCNT to value 0"]
+impl crate::Resettable for MAXCNT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf52820-pac/src/spis0/txd/ptr.rs

@@ -0,0 +1,80 @@
+#[doc = "Register `PTR` reader"]
+pub struct R(crate::R<PTR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PTR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PTR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PTR` writer"]
+pub struct W(crate::W<PTR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PTR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PTR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `PTR` reader - TXD data pointer"]
+pub type PTR_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `PTR` writer - TXD data pointer"]
+pub type PTR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PTR_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - TXD data pointer"]
+    #[inline(always)]
+    pub fn ptr(&self) -> PTR_R {
+        PTR_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - TXD data pointer"]
+    #[inline(always)]
+    pub fn ptr(&mut self) -> PTR_W<0> {
+        PTR_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "TXD data pointer\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ptr](index.html) module"]
+pub struct PTR_SPEC;
+impl crate::RegisterSpec for PTR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ptr::R](R) reader structure"]
+impl crate::Readable for PTR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ptr::W](W) writer structure"]
+impl crate::Writable for PTR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PTR to value 0"]
+impl crate::Resettable for PTR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}