feat: add display UI with splash screen, dashboard, and RSSI sparkline

Implement full SSD1306 OLED display support:
- Splash screen on boot (1.5s) with project name, version, board
- Dashboard showing radio state, config, counters, RSSI/SNR
- RSSI history sparkline (64-sample ring buffer, 2px-wide bars)
- DisplayOn/DisplayOff host commands routed via dedicated channel
- Pure render functions against generic DrawTarget (no hardware coupling)
- Display on/off control bypasses radio task entirely

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>

vendor/nrf52820-pac/src/uicr/approtect.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `APPROTECT` reader"]
+pub struct R(crate::R<APPROTECT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<APPROTECT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<APPROTECT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<APPROTECT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `APPROTECT` writer"]
+pub struct W(crate::W<APPROTECT_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<APPROTECT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<APPROTECT_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<APPROTECT_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `PALL` reader - Enable or disable access port protection."]
+pub type PALL_R = crate::FieldReader<u8, PALL_A>;
+#[doc = "Enable or disable access port protection.\n\nValue on reset: 255"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum PALL_A {
+    #[doc = "255: Hardware disable of access port protection for devices where access port protection is controlled by hardware"]
+    DISABLED = 255,
+    #[doc = "90: Hardware disable of access port protection for devices where access port protection is controlled by hardware and software"]
+    HW_DISABLED = 90,
+    #[doc = "0: Enable"]
+    ENABLED = 0,
+}
+impl From<PALL_A> for u8 {
+    #[inline(always)]
+    fn from(variant: PALL_A) -> Self {
+        variant as _
+    }
+}
+impl PALL_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<PALL_A> {
+        match self.bits {
+            255 => Some(PALL_A::DISABLED),
+            90 => Some(PALL_A::HW_DISABLED),
+            0 => Some(PALL_A::ENABLED),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == PALL_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `HW_DISABLED`"]
+    #[inline(always)]
+    pub fn is_hw_disabled(&self) -> bool {
+        *self == PALL_A::HW_DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == PALL_A::ENABLED
+    }
+}
+#[doc = "Field `PALL` writer - Enable or disable access port protection."]
+pub type PALL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, APPROTECT_SPEC, u8, PALL_A, 8, O>;
+impl<'a, const O: u8> PALL_W<'a, O> {
+    #[doc = "Hardware disable of access port protection for devices where access port protection is controlled by hardware"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(PALL_A::DISABLED)
+    }
+    #[doc = "Hardware disable of access port protection for devices where access port protection is controlled by hardware and software"]
+    #[inline(always)]
+    pub fn hw_disabled(self) -> &'a mut W {
+        self.variant(PALL_A::HW_DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(PALL_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - Enable or disable access port protection."]
+    #[inline(always)]
+    pub fn pall(&self) -> PALL_R {
+        PALL_R::new((self.bits & 0xff) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - Enable or disable access port protection."]
+    #[inline(always)]
+    pub fn pall(&mut self) -> PALL_W<0> {
+        PALL_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Access port protection\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [approtect](index.html) module"]
+pub struct APPROTECT_SPEC;
+impl crate::RegisterSpec for APPROTECT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [approtect::R](R) reader structure"]
+impl crate::Readable for APPROTECT_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [approtect::W](W) writer structure"]
+impl crate::Writable for APPROTECT_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets APPROTECT to value 0xffff_ffff"]
+impl crate::Resettable for APPROTECT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0xffff_ffff
+    }
+}

vendor/nrf52820-pac/src/uicr/customer.rs

@@ -0,0 +1,81 @@
+#[doc = "Register `CUSTOMER[%s]` reader"]
+pub struct R(crate::R<CUSTOMER_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CUSTOMER_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CUSTOMER_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CUSTOMER_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CUSTOMER[%s]` writer"]
+pub struct W(crate::W<CUSTOMER_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CUSTOMER_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CUSTOMER_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CUSTOMER_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CUSTOMER` reader - Reserved for customer"]
+pub type CUSTOMER_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `CUSTOMER` writer - Reserved for customer"]
+pub type CUSTOMER_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CUSTOMER_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - Reserved for customer"]
+    #[inline(always)]
+    pub fn customer(&self) -> CUSTOMER_R {
+        CUSTOMER_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Reserved for customer"]
+    #[inline(always)]
+    pub fn customer(&mut self) -> CUSTOMER_W<0> {
+        CUSTOMER_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description collection: Reserved for customer\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [customer](index.html) module"]
+pub struct CUSTOMER_SPEC;
+impl crate::RegisterSpec for CUSTOMER_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [customer::R](R) reader structure"]
+impl crate::Readable for CUSTOMER_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [customer::W](W) writer structure"]
+impl crate::Writable for CUSTOMER_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CUSTOMER[%s]
+to value 0xffff_ffff"]
+impl crate::Resettable for CUSTOMER_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0xffff_ffff
+    }
+}

vendor/nrf52820-pac/src/uicr/debugctrl.rs

@@ -0,0 +1,129 @@
+#[doc = "Register `DEBUGCTRL` reader"]
+pub struct R(crate::R<DEBUGCTRL_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<DEBUGCTRL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<DEBUGCTRL_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<DEBUGCTRL_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `DEBUGCTRL` writer"]
+pub struct W(crate::W<DEBUGCTRL_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<DEBUGCTRL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<DEBUGCTRL_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<DEBUGCTRL_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CPUFPBEN` reader - Configure CPU flash patch and breakpoint (FPB) unit behavior"]
+pub type CPUFPBEN_R = crate::FieldReader<u8, CPUFPBEN_A>;
+#[doc = "Configure CPU flash patch and breakpoint (FPB) unit behavior\n\nValue on reset: 255"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum CPUFPBEN_A {
+    #[doc = "255: Enable CPU FPB unit (default behavior)"]
+    ENABLED = 255,
+    #[doc = "0: Disable CPU FPB unit. Writes into the FPB registers will be ignored."]
+    DISABLED = 0,
+}
+impl From<CPUFPBEN_A> for u8 {
+    #[inline(always)]
+    fn from(variant: CPUFPBEN_A) -> Self {
+        variant as _
+    }
+}
+impl CPUFPBEN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<CPUFPBEN_A> {
+        match self.bits {
+            255 => Some(CPUFPBEN_A::ENABLED),
+            0 => Some(CPUFPBEN_A::DISABLED),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == CPUFPBEN_A::ENABLED
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == CPUFPBEN_A::DISABLED
+    }
+}
+#[doc = "Field `CPUFPBEN` writer - Configure CPU flash patch and breakpoint (FPB) unit behavior"]
+pub type CPUFPBEN_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, DEBUGCTRL_SPEC, u8, CPUFPBEN_A, 8, O>;
+impl<'a, const O: u8> CPUFPBEN_W<'a, O> {
+    #[doc = "Enable CPU FPB unit (default behavior)"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(CPUFPBEN_A::ENABLED)
+    }
+    #[doc = "Disable CPU FPB unit. Writes into the FPB registers will be ignored."]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(CPUFPBEN_A::DISABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 8:15 - Configure CPU flash patch and breakpoint (FPB) unit behavior"]
+    #[inline(always)]
+    pub fn cpufpben(&self) -> CPUFPBEN_R {
+        CPUFPBEN_R::new(((self.bits >> 8) & 0xff) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 8:15 - Configure CPU flash patch and breakpoint (FPB) unit behavior"]
+    #[inline(always)]
+    pub fn cpufpben(&mut self) -> CPUFPBEN_W<8> {
+        CPUFPBEN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Processor debug control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [debugctrl](index.html) module"]
+pub struct DEBUGCTRL_SPEC;
+impl crate::RegisterSpec for DEBUGCTRL_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [debugctrl::R](R) reader structure"]
+impl crate::Readable for DEBUGCTRL_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [debugctrl::W](W) writer structure"]
+impl crate::Writable for DEBUGCTRL_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets DEBUGCTRL to value 0xffff_ffff"]
+impl crate::Resettable for DEBUGCTRL_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0xffff_ffff
+    }
+}

vendor/nrf52820-pac/src/uicr/nrffw.rs

@@ -0,0 +1,81 @@
+#[doc = "Register `NRFFW[%s]` reader"]
+pub struct R(crate::R<NRFFW_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<NRFFW_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<NRFFW_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<NRFFW_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `NRFFW[%s]` writer"]
+pub struct W(crate::W<NRFFW_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<NRFFW_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<NRFFW_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<NRFFW_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `NRFFW` reader - Reserved for Nordic firmware design"]
+pub type NRFFW_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `NRFFW` writer - Reserved for Nordic firmware design"]
+pub type NRFFW_W<'a, const O: u8> = crate::FieldWriter<'a, u32, NRFFW_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - Reserved for Nordic firmware design"]
+    #[inline(always)]
+    pub fn nrffw(&self) -> NRFFW_R {
+        NRFFW_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Reserved for Nordic firmware design"]
+    #[inline(always)]
+    pub fn nrffw(&mut self) -> NRFFW_W<0> {
+        NRFFW_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description collection: Reserved for Nordic firmware design\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [nrffw](index.html) module"]
+pub struct NRFFW_SPEC;
+impl crate::RegisterSpec for NRFFW_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [nrffw::R](R) reader structure"]
+impl crate::Readable for NRFFW_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [nrffw::W](W) writer structure"]
+impl crate::Writable for NRFFW_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets NRFFW[%s]
+to value 0xffff_ffff"]
+impl crate::Resettable for NRFFW_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0xffff_ffff
+    }
+}

vendor/nrf52820-pac/src/uicr/nrfhw.rs

@@ -0,0 +1,81 @@
+#[doc = "Register `NRFHW[%s]` reader"]
+pub struct R(crate::R<NRFHW_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<NRFHW_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<NRFHW_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<NRFHW_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `NRFHW[%s]` writer"]
+pub struct W(crate::W<NRFHW_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<NRFHW_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<NRFHW_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<NRFHW_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `NRFHW` reader - Reserved for Nordic hardware design"]
+pub type NRFHW_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `NRFHW` writer - Reserved for Nordic hardware design"]
+pub type NRFHW_W<'a, const O: u8> = crate::FieldWriter<'a, u32, NRFHW_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - Reserved for Nordic hardware design"]
+    #[inline(always)]
+    pub fn nrfhw(&self) -> NRFHW_R {
+        NRFHW_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Reserved for Nordic hardware design"]
+    #[inline(always)]
+    pub fn nrfhw(&mut self) -> NRFHW_W<0> {
+        NRFHW_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description collection: Reserved for Nordic hardware design\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [nrfhw](index.html) module"]
+pub struct NRFHW_SPEC;
+impl crate::RegisterSpec for NRFHW_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [nrfhw::R](R) reader structure"]
+impl crate::Readable for NRFHW_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [nrfhw::W](W) writer structure"]
+impl crate::Writable for NRFHW_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets NRFHW[%s]
+to value 0xffff_ffff"]
+impl crate::Resettable for NRFHW_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0xffff_ffff
+    }
+}

vendor/nrf52820-pac/src/uicr/pselreset.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `PSELRESET[%s]` reader"]
+pub struct R(crate::R<PSELRESET_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PSELRESET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PSELRESET_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PSELRESET_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PSELRESET[%s]` writer"]
+pub struct W(crate::W<PSELRESET_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PSELRESET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PSELRESET_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PSELRESET_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `PIN` reader - GPIO pin number onto which nRESET is exposed"]
+pub type PIN_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `PIN` writer - GPIO pin number onto which nRESET is exposed"]
+pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PSELRESET_SPEC, u8, u8, 5, O>;
+#[doc = "Field `CONNECT` reader - Connection"]
+pub type CONNECT_R = crate::BitReader<CONNECT_A>;
+#[doc = "Connection\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CONNECT_A {
+    #[doc = "1: Disconnect"]
+    DISCONNECTED = 1,
+    #[doc = "0: Connect"]
+    CONNECTED = 0,
+}
+impl From<CONNECT_A> for bool {
+    #[inline(always)]
+    fn from(variant: CONNECT_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl CONNECT_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CONNECT_A {
+        match self.bits {
+            true => CONNECT_A::DISCONNECTED,
+            false => CONNECT_A::CONNECTED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISCONNECTED`"]
+    #[inline(always)]
+    pub fn is_disconnected(&self) -> bool {
+        *self == CONNECT_A::DISCONNECTED
+    }
+    #[doc = "Checks if the value of the field is `CONNECTED`"]
+    #[inline(always)]
+    pub fn is_connected(&self) -> bool {
+        *self == CONNECT_A::CONNECTED
+    }
+}
+#[doc = "Field `CONNECT` writer - Connection"]
+pub type CONNECT_W<'a, const O: u8> = crate::BitWriter<'a, u32, PSELRESET_SPEC, CONNECT_A, O>;
+impl<'a, const O: u8> CONNECT_W<'a, O> {
+    #[doc = "Disconnect"]
+    #[inline(always)]
+    pub fn disconnected(self) -> &'a mut W {
+        self.variant(CONNECT_A::DISCONNECTED)
+    }
+    #[doc = "Connect"]
+    #[inline(always)]
+    pub fn connected(self) -> &'a mut W {
+        self.variant(CONNECT_A::CONNECTED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:4 - GPIO pin number onto which nRESET is exposed"]
+    #[inline(always)]
+    pub fn pin(&self) -> PIN_R {
+        PIN_R::new((self.bits & 0x1f) as u8)
+    }
+    #[doc = "Bit 31 - Connection"]
+    #[inline(always)]
+    pub fn connect(&self) -> CONNECT_R {
+        CONNECT_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:4 - GPIO pin number onto which nRESET is exposed"]
+    #[inline(always)]
+    pub fn pin(&mut self) -> PIN_W<0> {
+        PIN_W::new(self)
+    }
+    #[doc = "Bit 31 - Connection"]
+    #[inline(always)]
+    pub fn connect(&mut self) -> CONNECT_W<31> {
+        CONNECT_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description collection: Mapping of the nRESET function (see POWER chapter for details)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pselreset](index.html) module"]
+pub struct PSELRESET_SPEC;
+impl crate::RegisterSpec for PSELRESET_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [pselreset::R](R) reader structure"]
+impl crate::Readable for PSELRESET_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [pselreset::W](W) writer structure"]
+impl crate::Writable for PSELRESET_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PSELRESET[%s]
+to value 0xffff_ffff"]
+impl crate::Resettable for PSELRESET_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0xffff_ffff
+    }
+}

vendor/nrf52820-pac/src/uicr/regout0.rs

@@ -0,0 +1,193 @@
+#[doc = "Register `REGOUT0` reader"]
+pub struct R(crate::R<REGOUT0_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<REGOUT0_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<REGOUT0_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<REGOUT0_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `REGOUT0` writer"]
+pub struct W(crate::W<REGOUT0_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<REGOUT0_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<REGOUT0_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<REGOUT0_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `VOUT` reader - Output voltage from REG0 regulator stage."]
+pub type VOUT_R = crate::FieldReader<u8, VOUT_A>;
+#[doc = "Output voltage from REG0 regulator stage.\n\nValue on reset: 7"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum VOUT_A {
+    #[doc = "0: 1.8 V"]
+    _1V8 = 0,
+    #[doc = "1: 2.1 V"]
+    _2V1 = 1,
+    #[doc = "2: 2.4 V"]
+    _2V4 = 2,
+    #[doc = "3: 2.7 V"]
+    _2V7 = 3,
+    #[doc = "4: 3.0 V"]
+    _3V0 = 4,
+    #[doc = "5: 3.3 V"]
+    _3V3 = 5,
+    #[doc = "7: Default voltage: 1.8 V"]
+    DEFAULT = 7,
+}
+impl From<VOUT_A> for u8 {
+    #[inline(always)]
+    fn from(variant: VOUT_A) -> Self {
+        variant as _
+    }
+}
+impl VOUT_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<VOUT_A> {
+        match self.bits {
+            0 => Some(VOUT_A::_1V8),
+            1 => Some(VOUT_A::_2V1),
+            2 => Some(VOUT_A::_2V4),
+            3 => Some(VOUT_A::_2V7),
+            4 => Some(VOUT_A::_3V0),
+            5 => Some(VOUT_A::_3V3),
+            7 => Some(VOUT_A::DEFAULT),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `_1V8`"]
+    #[inline(always)]
+    pub fn is_1v8(&self) -> bool {
+        *self == VOUT_A::_1V8
+    }
+    #[doc = "Checks if the value of the field is `_2V1`"]
+    #[inline(always)]
+    pub fn is_2v1(&self) -> bool {
+        *self == VOUT_A::_2V1
+    }
+    #[doc = "Checks if the value of the field is `_2V4`"]
+    #[inline(always)]
+    pub fn is_2v4(&self) -> bool {
+        *self == VOUT_A::_2V4
+    }
+    #[doc = "Checks if the value of the field is `_2V7`"]
+    #[inline(always)]
+    pub fn is_2v7(&self) -> bool {
+        *self == VOUT_A::_2V7
+    }
+    #[doc = "Checks if the value of the field is `_3V0`"]
+    #[inline(always)]
+    pub fn is_3v0(&self) -> bool {
+        *self == VOUT_A::_3V0
+    }
+    #[doc = "Checks if the value of the field is `_3V3`"]
+    #[inline(always)]
+    pub fn is_3v3(&self) -> bool {
+        *self == VOUT_A::_3V3
+    }
+    #[doc = "Checks if the value of the field is `DEFAULT`"]
+    #[inline(always)]
+    pub fn is_default(&self) -> bool {
+        *self == VOUT_A::DEFAULT
+    }
+}
+#[doc = "Field `VOUT` writer - Output voltage from REG0 regulator stage."]
+pub type VOUT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, REGOUT0_SPEC, u8, VOUT_A, 3, O>;
+impl<'a, const O: u8> VOUT_W<'a, O> {
+    #[doc = "1.8 V"]
+    #[inline(always)]
+    pub fn _1v8(self) -> &'a mut W {
+        self.variant(VOUT_A::_1V8)
+    }
+    #[doc = "2.1 V"]
+    #[inline(always)]
+    pub fn _2v1(self) -> &'a mut W {
+        self.variant(VOUT_A::_2V1)
+    }
+    #[doc = "2.4 V"]
+    #[inline(always)]
+    pub fn _2v4(self) -> &'a mut W {
+        self.variant(VOUT_A::_2V4)
+    }
+    #[doc = "2.7 V"]
+    #[inline(always)]
+    pub fn _2v7(self) -> &'a mut W {
+        self.variant(VOUT_A::_2V7)
+    }
+    #[doc = "3.0 V"]
+    #[inline(always)]
+    pub fn _3v0(self) -> &'a mut W {
+        self.variant(VOUT_A::_3V0)
+    }
+    #[doc = "3.3 V"]
+    #[inline(always)]
+    pub fn _3v3(self) -> &'a mut W {
+        self.variant(VOUT_A::_3V3)
+    }
+    #[doc = "Default voltage: 1.8 V"]
+    #[inline(always)]
+    pub fn default(self) -> &'a mut W {
+        self.variant(VOUT_A::DEFAULT)
+    }
+}
+impl R {
+    #[doc = "Bits 0:2 - Output voltage from REG0 regulator stage."]
+    #[inline(always)]
+    pub fn vout(&self) -> VOUT_R {
+        VOUT_R::new((self.bits & 7) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:2 - Output voltage from REG0 regulator stage."]
+    #[inline(always)]
+    pub fn vout(&mut self) -> VOUT_W<0> {
+        VOUT_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Output voltage from REG0 regulator stage. The maximum output voltage from this stage is given as VDDH - V_VDDH-VDD.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [regout0](index.html) module"]
+pub struct REGOUT0_SPEC;
+impl crate::RegisterSpec for REGOUT0_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [regout0::R](R) reader structure"]
+impl crate::Readable for REGOUT0_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [regout0::W](W) writer structure"]
+impl crate::Writable for REGOUT0_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets REGOUT0 to value 0xffff_ffff"]
+impl crate::Resettable for REGOUT0_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0xffff_ffff
+    }
+}