feat: add display UI with splash screen, dashboard, and RSSI sparkline

Implement full SSD1306 OLED display support:
- Splash screen on boot (1.5s) with project name, version, board
- Dashboard showing radio state, config, counters, RSSI/SNR
- RSSI history sparkline (64-sample ring buffer, 2px-wide bars)
- DisplayOn/DisplayOff host commands routed via dedicated channel
- Pure render functions against generic DrawTarget (no hardware coupling)
- Display on/off control bypasses radio task entirely

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>

vendor/nrf52832-pac/src/ppi/ch.rs

@@ -0,0 +1,16 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct CH {
+    #[doc = "0x00 - Description cluster\\[0\\]: Channel 0 event end-point"]
+    pub eep: EEP,
+    #[doc = "0x04 - Description cluster\\[0\\]: Channel 0 task end-point"]
+    pub tep: TEP,
+}
+#[doc = "EEP (rw) register accessor: an alias for `Reg<EEP_SPEC>`"]
+pub type EEP = crate::Reg<eep::EEP_SPEC>;
+#[doc = "Description cluster\\[0\\]: Channel 0 event end-point"]
+pub mod eep;
+#[doc = "TEP (rw) register accessor: an alias for `Reg<TEP_SPEC>`"]
+pub type TEP = crate::Reg<tep::TEP_SPEC>;
+#[doc = "Description cluster\\[0\\]: Channel 0 task end-point"]
+pub mod tep;

vendor/nrf52832-pac/src/ppi/ch/eep.rs

@@ -0,0 +1,80 @@
+#[doc = "Register `EEP` reader"]
+pub struct R(crate::R<EEP_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EEP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EEP_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EEP_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EEP` writer"]
+pub struct W(crate::W<EEP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EEP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EEP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EEP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EEP` reader - Pointer to event register. Accepts only addresses to registers from the Event group."]
+pub type EEP_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `EEP` writer - Pointer to event register. Accepts only addresses to registers from the Event group."]
+pub type EEP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EEP_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - Pointer to event register. Accepts only addresses to registers from the Event group."]
+    #[inline(always)]
+    pub fn eep(&self) -> EEP_R {
+        EEP_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Pointer to event register. Accepts only addresses to registers from the Event group."]
+    #[inline(always)]
+    pub fn eep(&mut self) -> EEP_W<0> {
+        EEP_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description cluster\\[0\\]: Channel 0 event end-point\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eep](index.html) module"]
+pub struct EEP_SPEC;
+impl crate::RegisterSpec for EEP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [eep::R](R) reader structure"]
+impl crate::Readable for EEP_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [eep::W](W) writer structure"]
+impl crate::Writable for EEP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EEP to value 0"]
+impl crate::Resettable for EEP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf52832-pac/src/ppi/ch/tep.rs

@@ -0,0 +1,80 @@
+#[doc = "Register `TEP` reader"]
+pub struct R(crate::R<TEP_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<TEP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<TEP_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<TEP_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `TEP` writer"]
+pub struct W(crate::W<TEP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TEP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TEP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TEP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `TEP` reader - Pointer to task register. Accepts only addresses to registers from the Task group."]
+pub type TEP_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `TEP` writer - Pointer to task register. Accepts only addresses to registers from the Task group."]
+pub type TEP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TEP_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - Pointer to task register. Accepts only addresses to registers from the Task group."]
+    #[inline(always)]
+    pub fn tep(&self) -> TEP_R {
+        TEP_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Pointer to task register. Accepts only addresses to registers from the Task group."]
+    #[inline(always)]
+    pub fn tep(&mut self) -> TEP_W<0> {
+        TEP_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description cluster\\[0\\]: Channel 0 task end-point\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tep](index.html) module"]
+pub struct TEP_SPEC;
+impl crate::RegisterSpec for TEP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [tep::R](R) reader structure"]
+impl crate::Readable for TEP_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [tep::W](W) writer structure"]
+impl crate::Writable for TEP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TEP to value 0"]
+impl crate::Resettable for TEP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf52832-pac/src/ppi/fork.rs

@@ -0,0 +1,10 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct FORK {
+    #[doc = "0x00 - Description cluster\\[0\\]: Channel 0 task end-point"]
+    pub tep: TEP,
+}
+#[doc = "TEP (rw) register accessor: an alias for `Reg<TEP_SPEC>`"]
+pub type TEP = crate::Reg<tep::TEP_SPEC>;
+#[doc = "Description cluster\\[0\\]: Channel 0 task end-point"]
+pub mod tep;

vendor/nrf52832-pac/src/ppi/fork/tep.rs

@@ -0,0 +1,80 @@
+#[doc = "Register `TEP` reader"]
+pub struct R(crate::R<TEP_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<TEP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<TEP_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<TEP_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `TEP` writer"]
+pub struct W(crate::W<TEP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TEP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TEP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TEP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `TEP` reader - Pointer to task register"]
+pub type TEP_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `TEP` writer - Pointer to task register"]
+pub type TEP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TEP_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - Pointer to task register"]
+    #[inline(always)]
+    pub fn tep(&self) -> TEP_R {
+        TEP_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Pointer to task register"]
+    #[inline(always)]
+    pub fn tep(&mut self) -> TEP_W<0> {
+        TEP_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description cluster\\[0\\]: Channel 0 task end-point\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tep](index.html) module"]
+pub struct TEP_SPEC;
+impl crate::RegisterSpec for TEP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [tep::R](R) reader structure"]
+impl crate::Readable for TEP_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [tep::W](W) writer structure"]
+impl crate::Writable for TEP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TEP to value 0"]
+impl crate::Resettable for TEP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf52832-pac/src/ppi/tasks_chg.rs

@@ -0,0 +1,16 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct TASKS_CHG {
+    #[doc = "0x00 - Description cluster\\[0\\]: Enable channel group 0"]
+    pub en: EN,
+    #[doc = "0x04 - Description cluster\\[0\\]: Disable channel group 0"]
+    pub dis: DIS,
+}
+#[doc = "EN (w) register accessor: an alias for `Reg<EN_SPEC>`"]
+pub type EN = crate::Reg<en::EN_SPEC>;
+#[doc = "Description cluster\\[0\\]: Enable channel group 0"]
+pub mod en;
+#[doc = "DIS (w) register accessor: an alias for `Reg<DIS_SPEC>`"]
+pub type DIS = crate::Reg<dis::DIS_SPEC>;
+#[doc = "Description cluster\\[0\\]: Disable channel group 0"]
+pub mod dis;

vendor/nrf52832-pac/src/ppi/tasks_chg/dis.rs

@@ -0,0 +1,45 @@
+#[doc = "Register `DIS` writer"]
+pub struct W(crate::W<DIS_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<DIS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<DIS_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<DIS_SPEC>) -> Self {
+        W(writer)
+    }
+}
+impl W {
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description cluster\\[0\\]: Disable channel group 0\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dis](index.html) module"]
+pub struct DIS_SPEC;
+impl crate::RegisterSpec for DIS_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [dis::W](W) writer structure"]
+impl crate::Writable for DIS_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets DIS to value 0"]
+impl crate::Resettable for DIS_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf52832-pac/src/ppi/tasks_chg/en.rs

@@ -0,0 +1,45 @@
+#[doc = "Register `EN` writer"]
+pub struct W(crate::W<EN_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EN_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EN_SPEC>) -> Self {
+        W(writer)
+    }
+}
+impl W {
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description cluster\\[0\\]: Enable channel group 0\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](index.html) module"]
+pub struct EN_SPEC;
+impl crate::RegisterSpec for EN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [en::W](W) writer structure"]
+impl crate::Writable for EN_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EN to value 0"]
+impl crate::Resettable for EN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}