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feat: add display UI with splash screen, dashboard, and RSSI sparkline

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Implement full SSD1306 OLED display support:
- Splash screen on boot (1.5s) with project name, version, board
- Dashboard showing radio state, config, counters, RSSI/SNR
- RSSI history sparkline (64-sample ring buffer, 2px-wide bars)
- DisplayOn/DisplayOff host commands routed via dedicated channel
- Pure render functions against generic DrawTarget (no hardware coupling)
- Display on/off control bypasses radio task entirely

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
This commit is contained in:
swaitsandClaude Opus 4.6 committed 2026-03-29 20:42:54 -06:00
1 parent 7064110293
commit 3102fc747a
17624 files changed
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vendor/nrf52840-pac/.cargo-checksum.json
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{"files":{".cargo_vcs_info.json":"a3d3ad6e16001b70437106c8d035cade91eeed5289bd2ff15638d44d3d651030","Cargo.toml":"ded2df8f3060891c711992bb36973a1c921d0dddb14e971750e82c22f8bf2262","Cargo.toml.orig":"cb19e99a4ee0fe83cbc099ce995ad2f336de7faa0fd8685d95f97ac7f110ce2b","README.md":"bac342a6d4e21c9e4934a414542d855f0f4a2ca6077b7efca5c04fa8df6d8869","build.rs":"0196fb21a218de974f9cbe9021ea542ebec1ec595b06328c35250742ee8d04f1","device.x":"20adf02cdbc0cfd6ef2970fadbb5e33f5796dce583690a144955d4e2ad8f3179","src/aar.rs":"07daf4da00ce62fe2a81ce1fe6f8cc98eb183cdcf5814cab8f9bdb81fb27171a","src/aar/addrptr.rs":"c4db69c10af1585e7d727d5cb9826af237dc51882c3fe29a3f63adb13fadd482","src/aar/enable.rs":"9a5cb63951239ee2437587972eb4a98aef61e5bbb2b3b796bbcd682f28714ce1","src/aar/events_end.rs":"1ec71d885d9850bddb6cd8e892b7519eccd73f38a739b55cbca35a7f94fa2619","src/aar/events_notresolved.rs":"3994928c5520f3a653c1fb340d38183acc3d04add8f0faaa608d6457819f7eed","src/aar/events_resolved.rs":"9aa158378ad51b963f794eea822acdfd2e27ad6120b3b2bdec2361a9f34795cd","src/aar/intenclr.rs":"fb8a7ebf9ca6404b7e7be5e4e843af550be6c46e481cef0cc0ce906c93e9d799","src/aar/intenset.rs":"43ee8ec4d962fb0f1c7d6b6ef4ed12d8db8f49947148c64fd65e0ae96b7d060d","src/aar/irkptr.rs":"1fa88b9a29496c36f8f78ad499e10c1c05456943d5bfb7cfe3d63f031f14bd0a","src/aar/nirk.rs":"4232a823cf677d3958bb190cee7e9af11b5f41df101578283b83a0d2ad22eff1","src/aar/scratchptr.rs":"f4d0da4a538968bc3fb3dc5c85e544dfcbb267fc02849d9dfe9460053263a462","src/aar/status.rs":"79c07d04aef566dbf6075a8deb54fa05cb48ae8dbfb4bfefdf36ddaabc29518b","src/aar/tasks_start.rs":"c9b2013d0924e0a038861065f814caa2394b1c66a84f4b0d0884830faf3ae952","src/aar/tasks_stop.rs":"a8240e83d06c4472bff6e10ecbb5b21c5e09d02d637116aea342b00e862e3a76","src/acl.rs":"3fb4877a1031fc91295b02deef949a22028eee24fef93beedd29aa5f2866087c","src/acl/acl.rs":"e34c9774aa8578185e699c6a6a66ba3697b25676a716a1109e0bd4b940387845","src/acl/acl/addr.rs":"586b239999bdcea5f7188fad4b33022901e7b7eb5c4bf545c1eca0f65f812188","src/acl/acl/perm.rs":"59acd0d7352c541c0b99152efb25b0c9cebae5f8704f17cdab8132bed2555626","src/acl/acl/size.rs":"4c16dae0a3863bde561b303cfcc18eec5e92e1ffe74ea60ead00c021b01af4b8","src/acl/acl/unused0.rs":"96db98b5b2bd8c55b7e5af755bf509e24e7cc23beedc3e9eb2b915b92bb8e984","src/cc_host_rgf.rs":"ce513f167437a6820c619864e3fcd3e36f5b59ec100110c9925ef15e985339d8","src/cc_host_rgf/host_cryptokey_sel.rs":"6ade4fba171216144a42f0ba4ff2a357eb2e033b89bc9cc2c6fbd32ea906cda1","src/cc_host_rgf/host_iot_kdr0.rs":"1269e31e03e384248d71aecd52c7995451aa93a4ea52af22c301edbf5bc3a473","src/cc_host_rgf/host_iot_kdr1.rs":"872e0965be15b1b6c013d42a9183130a12d4acd9614896455f285bd851a26888","src/cc_host_rgf/host_iot_kdr2.rs":"dc410736f517667dc0a754ad84fc8c03e3835108b8a2ef7d244a45f7db61a645","src/cc_host_rgf/host_iot_kdr3.rs":"7ddb2bd1056751d4fa03d57c944ccc51df31a219bf3a233c6ba984f2e06aa418","src/cc_host_rgf/host_iot_kprtl_lock.rs":"18be36fee3faafcca42fc6f3ab6b5a69e792ebf69bb2a4e5eb632f0d6c2706f3","src/cc_host_rgf/host_iot_lcs.rs":"b743f0d67940dd3baf4a779d9f91f94b31a7956870a3393fd5613743b46c0877","src/ccm.rs":"37ce0b99a8beac733e15e41df35c67ba42e61f5bb589e76d9d63d5879d200e34","src/ccm/cnfptr.rs":"8e10303b2019438bf8ad5b9b115ee875c13679655d17da6e7eacb6d1ec50bd10","src/ccm/enable.rs":"32ee95dd3e53bfc9ec46d385b66ee3cfbe540b9115993550e0b63f5904d63c21","src/ccm/events_endcrypt.rs":"a38d951be41d77e341ef4d1b0847e101b228f70a0e087b8b02e6b90248d31efd","src/ccm/events_endksgen.rs":"657616b958c0d96e0004297d4d5883b4937bf0ffd16338993ad9590661a65da2","src/ccm/events_error.rs":"8d60beacf1a3df711afd2d2eb14554896a725081ad91e54254c5c499bea985ab","src/ccm/inptr.rs":"ff037087779f66ee364abefe58291fbb38a78859c835efd5c8e7ae5b5792f016","src/ccm/intenclr.rs":"94365e6b6e79f90bb2c266b11d4ab4ba09856f6bc624e7332debf51815743e7b","src/ccm/intenset.rs":"51daa64df63d1869c2cf5a2c9c128d6d363ce1bca283f354b63e4cad9cd1b2ce","src/ccm/maxpacketsize.rs":"28ad81df6d39907709bb4a9131646f070e11d2856a6fdd753ecf019418886f12","src/ccm/micstatus.rs":"3278103acbb4e8a092c28bb1b4df52e9a7a56b956977e62a65d628fe65b5443b","src/ccm/mode.rs":"5bfd662f031f70aef8d3032f9e576183802580f9dc917bbf439823a639453b19","src/ccm/outptr.rs":"769df1e86004fd76f381a344d467356529a7f309d2191c3601532fff299e11ce","src/ccm/rateoverride.rs":"9b20240a123bab4b989a7daf42034aaf080f8e893f4b9aaaeb1b2c817d8f4772","src/ccm/scratchptr.rs":"e9dad5a681f2e06c86069bfd89079fd2b74881521d5eed6198352921dd45bca4","src/ccm/shorts.rs":"65f898f9c5444f12357d6ab306677e9ca3b14a76bcbf7f5f0e1c8f736edf0bf4","src/ccm/tasks_crypt.rs":"25925f3193d7bffe7978e291907dedcd1bb976c308e40e918504126f4bf8f362","src/ccm/tasks_ksgen.rs":"ea1949186aa7302c9f62d83c08d3de05c8d7687f04055ed7c1942477bb50bf9f","src/ccm/tasks_rateoverride.rs":"695d19772603b4dce7386eb912005869a8ce7094cf1592ae638f086c9d5674b7","src/ccm/tasks_stop.rs":"caccd6734bf34bcd4dc9133e1fa6d803ab77bf1addbd053d7844bc232445c30b","src/clock.rs":"4b29c2878ea5ed2b3fedf3e251686e67accf03828c6aff01dd6cd4052af4f8c0","src/clock/ctiv.rs":"cecbcL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truncated
vendor/nrf52840-pac/.cargo_vcs_info.json
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{
"git": {
"sha1": "e0467528f3bd252734b9b35aae76eb6daff58b84"
},
"path_in_vcs": "pacs/nrf52840-pac"
}
vendor/nrf52840-pac/Cargo.toml
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# THIS FILE IS AUTOMATICALLY GENERATED BY CARGO
#
# When uploading crates to the registry Cargo will automatically
# "normalize" Cargo.toml files for maximal compatibility
# with all versions of Cargo and also rewrite `path` dependencies
# to registry (e.g., crates.io) dependencies.
#
# If you are reading this file be aware that the original Cargo.toml
# will likely look very different (and much more reasonable).
# See Cargo.toml.orig for the original contents.
[package]
edition = "2018"
name = "nrf52840-pac"
version = "0.12.2"
description = "Peripheral Access Crate for Nordic's nrf52840 microcontroller"
documentation = "https://docs.rs/nrf52840-pac"
readme = "README.md"
keywords = [
"no-std",
"arm",
"cortex-m",
"nrf",
"peripherals",
]
license = "0BSD"
repository = "https://github.com/nrf-rs/nrf-pacs"
[dependencies.cortex-m]
version = "0.7.3"
[dependencies.cortex-m-rt]
version = ">=0.6.15,<0.8"
optional = true
[dependencies.vcell]
version = "0.1.3"
[features]
rt = ["cortex-m-rt/device"]
vendor/nrf52840-pac/README.md
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# PACs for nRF microcontrollers
![CI](https://github.com/nrf-rs/nrf-pacs/workflows/CI/badge.svg)
This repository contains Peripheral Access Crates (PACs) for Nordic's nRF series of Cortex-M microcontrollers.
All these crates are automatically generated using [svd2rust].
For a more user-friendly interface to the peripherals, the [`nrf-hal`] crates might be more appropriate.
Please refer to the [changelog] to see what changed in the last releases.
[changelog]: ./CHANGELOG.md
[`nrf-hal`]: https://github.com/nrf-rs/nrf-hal/
[svd2rust]: https://github.com/rust-embedded/svd2rust
## Crates
Every nRF chip has its own PAC, listed below:
| Crate | Docs | crates.io | target |
|-------|------|-----------|--------|
| `nrf51-pac` | [![docs.rs](https://docs.rs/nrf51-pac/badge.svg)](https://docs.rs/nrf51-pac) | [![crates.io](https://img.shields.io/crates/d/nrf51-pac.svg)](https://crates.io/crates/nrf51-pac) | `thumbv6m-none-eabi` |
| `nrf52805-pac` | [![docs.rs](https://docs.rs/nrf52805-pac/badge.svg)](https://docs.rs/nrf52805-pac) | [![crates.io](https://img.shields.io/crates/d/nrf52805-pac.svg)](https://crates.io/crates/nrf52805-pac) | `thumbv7em-none-eabi` |
| `nrf52810-pac` | [![docs.rs](https://docs.rs/nrf52810-pac/badge.svg)](https://docs.rs/nrf52810-pac) | [![crates.io](https://img.shields.io/crates/d/nrf52810-pac.svg)](https://crates.io/crates/nrf52810-pac) | `thumbv7em-none-eabi` |
| `nrf52811-pac` | [![docs.rs](https://docs.rs/nrf52811-pac/badge.svg)](https://docs.rs/nrf52811-pac) | [![crates.io](https://img.shields.io/crates/d/nrf52811-pac.svg)](https://crates.io/crates/nrf52811-pac) | `thumbv7em-none-eabi` |
| `nrf52820-pac` | [![docs.rs](https://docs.rs/nrf52820-pac/badge.svg)](https://docs.rs/nrf52820-pac) | [![crates.io](https://img.shields.io/crates/d/nrf52820-pac.svg)](https://crates.io/crates/nrf52820-pac) | `thumbv7em-none-eabi` |
| `nrf52832-pac` | [![docs.rs](https://docs.rs/nrf52832-pac/badge.svg)](https://docs.rs/nrf52832-pac) | [![crates.io](https://img.shields.io/crates/d/nrf52832-pac.svg)](https://crates.io/crates/nrf52832-pac) | `thumbv7em-none-eabihf` |
| `nrf52833-pac` | [![docs.rs](https://docs.rs/nrf52833-pac/badge.svg)](https://docs.rs/nrf52833-pac) | [![crates.io](https://img.shields.io/crates/d/nrf52833-pac.svg)](https://crates.io/crates/nrf52833-pac) | `thumbv7em-none-eabihf` |
| `nrf52840-pac` | [![docs.rs](https://docs.rs/nrf52840-pac/badge.svg)](https://docs.rs/nrf52840-pac) | [![crates.io](https://img.shields.io/crates/d/nrf52840-pac.svg)](https://crates.io/crates/nrf52840-pac) | `thumbv7em-none-eabihf` |
| `nrf5340-app-pac` | [![docs.rs](https://docs.rs/nrf5340-app-pac/badge.svg)](https://docs.rs/nrf5340-app-pac) | [![crates.io](https://img.shields.io/crates/d/nrf5340-app-pac.svg)](https://crates.io/crates/nrf5340-app-pac) | `thumbv8m.main-none-eabihf` |
| `nrf5340-net-pac` | [![docs.rs](https://docs.rs/nrf5340-net-pac/badge.svg)](https://docs.rs/nrf5340-net-pac) | [![crates.io](https://img.shields.io/crates/d/nrf5340-net-pac.svg)](https://crates.io/crates/nrf5340-net-pac) | `thumbv8m.main-none-eabihf` |
| `nrf9160-pac` | [![docs.rs](https://docs.rs/nrf9160-pac/badge.svg)](https://docs.rs/nrf9160-pac) | [![crates.io](https://img.shields.io/crates/d/nrf9160-pac.svg)](https://crates.io/crates/nrf9160-pac) | `thumbv8m.main-none-eabihf` |
<!-- TODO: this table could be autogenerated -->
## Device Reference Manuals from Nordic
| Device | Product Specification | DK Reference Guide |
|-------|------|-----------|
| [`nRF52805`](https://www.nordicsemi.com/Products/nrf52805) | [`v1.2`](https://infocenter.nordicsemi.com/pdf/nRF52805_PS_v1.2.pdf) | [`v1.3.1*`](https://infocenter.nordicsemi.com/pdf/nRF52_DK_User_Guide_v1.3.1.pdf) |
| [`nRF52810`](https://www.nordicsemi.com/products/nrf52810) | [`v1.3`](https://infocenter.nordicsemi.com/pdf/nRF52810_PS_v1.3.pdf) | [`v1.3.1*`](https://infocenter.nordicsemi.com/pdf/nRF52_DK_User_Guide_v1.3.1.pdf) |
| [`nRF52811`](https://www.nordicsemi.com/products/nrf52811) | [`v1.0`](https://infocenter.nordicsemi.com/pdf/nRF52811_PS_v1.0.pdf) | [`v1.3.1*`](https://infocenter.nordicsemi.com/pdf/nRF52_DK_User_Guide_v1.3.1.pdf) |
| [`nRF52820`](https://www.nordicsemi.com/Products/nRF52820) | [`v1.0`](https://infocenter.nordicsemi.com/pdf/nRF52820_PS_v1.0.pdf) | [`v1.0.1`](http://infocenter.nordicsemi.com/pdf/nRF52833_DK_User_Guide_v1.0.1.pdf) |
| [`nRF52832`](https://www.nordicsemi.com/products/nrf52832) | [`v1.4`](https://infocenter.nordicsemi.com/pdf/nRF52832_PS_v1.4.pdf) | [`v1.3.1*`](https://infocenter.nordicsemi.com/pdf/nRF52_DK_User_Guide_v1.3.1.pdf) |
| [`nRF52833`](https://www.nordicsemi.com/products/nrf52833) | [`v1.3`](https://infocenter.nordicsemi.com/pdf/nRF52833_PS_v1.3.pdf) | [`v1.0.1`](http://infocenter.nordicsemi.com/pdf/nRF52833_DK_User_Guide_v1.0.1.pdf) |
| [`nRF52840`](https://www.nordicsemi.com/Products/nRF52840) | [`v1.1`](https://infocenter.nordicsemi.com/pdf/nRF52840_PS_v1.1.pdf) | [`v1.2`](https://infocenter.nordicsemi.com/pdf/nRF52840_DK_User_Guide_v1.2.pdf) |
| [`nRF5340`](https://www.nordicsemi.com/Products/nRF5340) | [`v1.1`](https://infocenter.nordicsemi.com/pdf/nRF5340_PS_v1.1.pdf) | [`v1.0.0`](https://infocenter.nordicsemi.com/pdf/nRF5340_DK_User_Guide_20210304.pdf) |
| [`nRF9160`](https://www.nordicsemi.com/Products/nrf9160) | [`v2.0`](https://infocenter.nordicsemi.com/pdf/nRF9160_PS_v2.0.pdf) | [`v0.9.3`](https://infocenter.nordicsemi.com/pdf/nRF9160_DK_HW_User_Guide_v0.9.3.pdf) |
\* These devices do not have a separate development kit and share the [NRF52 DK](https://www.nordicsemi.com/Software-and-tools/Development-Kits/nRF52-DK)
vendor/nrf52840-pac/build.rs
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use std::env;
use std::fs::File;
use std::io::Write;
use std::path::PathBuf;
fn main() {
if env::var_os("CARGO_FEATURE_RT").is_some() {
let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
File::create(out.join("device.x"))
.unwrap()
.write_all(include_bytes!("device.x"))
.unwrap();
println!("cargo:rustc-link-search={}", out.display());
println!("cargo:rerun-if-changed=device.x");
}
println!("cargo:rerun-if-changed=build.rs");
}
vendor/nrf52840-pac/device.x
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PROVIDE(POWER_CLOCK = DefaultHandler);
PROVIDE(RADIO = DefaultHandler);
PROVIDE(UARTE0_UART0 = DefaultHandler);
PROVIDE(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0 = DefaultHandler);
PROVIDE(SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1 = DefaultHandler);
PROVIDE(NFCT = DefaultHandler);
PROVIDE(GPIOTE = DefaultHandler);
PROVIDE(SAADC = DefaultHandler);
PROVIDE(TIMER0 = DefaultHandler);
PROVIDE(TIMER1 = DefaultHandler);
PROVIDE(TIMER2 = DefaultHandler);
PROVIDE(RTC0 = DefaultHandler);
PROVIDE(TEMP = DefaultHandler);
PROVIDE(RNG = DefaultHandler);
PROVIDE(ECB = DefaultHandler);
PROVIDE(CCM_AAR = DefaultHandler);
PROVIDE(WDT = DefaultHandler);
PROVIDE(RTC1 = DefaultHandler);
PROVIDE(QDEC = DefaultHandler);
PROVIDE(COMP_LPCOMP = DefaultHandler);
PROVIDE(SWI0_EGU0 = DefaultHandler);
PROVIDE(SWI1_EGU1 = DefaultHandler);
PROVIDE(SWI2_EGU2 = DefaultHandler);
PROVIDE(SWI3_EGU3 = DefaultHandler);
PROVIDE(SWI4_EGU4 = DefaultHandler);
PROVIDE(SWI5_EGU5 = DefaultHandler);
PROVIDE(TIMER3 = DefaultHandler);
PROVIDE(TIMER4 = DefaultHandler);
PROVIDE(PWM0 = DefaultHandler);
PROVIDE(PDM = DefaultHandler);
PROVIDE(MWU = DefaultHandler);
PROVIDE(PWM1 = DefaultHandler);
PROVIDE(PWM2 = DefaultHandler);
PROVIDE(SPIM2_SPIS2_SPI2 = DefaultHandler);
PROVIDE(RTC2 = DefaultHandler);
PROVIDE(I2S = DefaultHandler);
PROVIDE(FPU = DefaultHandler);
PROVIDE(USBD = DefaultHandler);
PROVIDE(UARTE1 = DefaultHandler);
PROVIDE(QSPI = DefaultHandler);
PROVIDE(CRYPTOCELL = DefaultHandler);
PROVIDE(PWM3 = DefaultHandler);
PROVIDE(SPIM3 = DefaultHandler);
vendor/nrf52840-pac/src/aar.rs
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#[doc = r"Register block"]
#[repr(C)]
pub struct RegisterBlock {
#[doc = "0x00 - Start resolving addresses based on IRKs specified in the IRK data structure"]
pub tasks_start: TASKS_START,
_reserved1: [u8; 0x04],
#[doc = "0x08 - Stop resolving addresses"]
pub tasks_stop: TASKS_STOP,
_reserved2: [u8; 0xf4],
#[doc = "0x100 - Address resolution procedure complete"]
pub events_end: EVENTS_END,
#[doc = "0x104 - Address resolved"]
pub events_resolved: EVENTS_RESOLVED,
#[doc = "0x108 - Address not resolved"]
pub events_notresolved: EVENTS_NOTRESOLVED,
_reserved5: [u8; 0x01f8],
#[doc = "0x304 - Enable interrupt"]
pub intenset: INTENSET,
#[doc = "0x308 - Disable interrupt"]
pub intenclr: INTENCLR,
_reserved7: [u8; 0xf4],
#[doc = "0x400 - Resolution status"]
pub status: STATUS,
_reserved8: [u8; 0xfc],
#[doc = "0x500 - Enable AAR"]
pub enable: ENABLE,
#[doc = "0x504 - Number of IRKs"]
pub nirk: NIRK,
#[doc = "0x508 - Pointer to IRK data structure"]
pub irkptr: IRKPTR,
_reserved11: [u8; 0x04],
#[doc = "0x510 - Pointer to the resolvable address"]
pub addrptr: ADDRPTR,
#[doc = "0x514 - Pointer to data area used for temporary storage"]
pub scratchptr: SCRATCHPTR,
}
#[doc = "TASKS_START (w) register accessor: an alias for `Reg<TASKS_START_SPEC>`"]
pub type TASKS_START = crate::Reg<tasks_start::TASKS_START_SPEC>;
#[doc = "Start resolving addresses based on IRKs specified in the IRK data structure"]
pub mod tasks_start;
#[doc = "TASKS_STOP (w) register accessor: an alias for `Reg<TASKS_STOP_SPEC>`"]
pub type TASKS_STOP = crate::Reg<tasks_stop::TASKS_STOP_SPEC>;
#[doc = "Stop resolving addresses"]
pub mod tasks_stop;
#[doc = "EVENTS_END (rw) register accessor: an alias for `Reg<EVENTS_END_SPEC>`"]
pub type EVENTS_END = crate::Reg<events_end::EVENTS_END_SPEC>;
#[doc = "Address resolution procedure complete"]
pub mod events_end;
#[doc = "EVENTS_RESOLVED (rw) register accessor: an alias for `Reg<EVENTS_RESOLVED_SPEC>`"]
pub type EVENTS_RESOLVED = crate::Reg<events_resolved::EVENTS_RESOLVED_SPEC>;
#[doc = "Address resolved"]
pub mod events_resolved;
#[doc = "EVENTS_NOTRESOLVED (rw) register accessor: an alias for `Reg<EVENTS_NOTRESOLVED_SPEC>`"]
pub type EVENTS_NOTRESOLVED = crate::Reg<events_notresolved::EVENTS_NOTRESOLVED_SPEC>;
#[doc = "Address not resolved"]
pub mod events_notresolved;
#[doc = "INTENSET (rw) register accessor: an alias for `Reg<INTENSET_SPEC>`"]
pub type INTENSET = crate::Reg<intenset::INTENSET_SPEC>;
#[doc = "Enable interrupt"]
pub mod intenset;
#[doc = "INTENCLR (rw) register accessor: an alias for `Reg<INTENCLR_SPEC>`"]
pub type INTENCLR = crate::Reg<intenclr::INTENCLR_SPEC>;
#[doc = "Disable interrupt"]
pub mod intenclr;
#[doc = "STATUS (r) register accessor: an alias for `Reg<STATUS_SPEC>`"]
pub type STATUS = crate::Reg<status::STATUS_SPEC>;
#[doc = "Resolution status"]
pub mod status;
#[doc = "ENABLE (rw) register accessor: an alias for `Reg<ENABLE_SPEC>`"]
pub type ENABLE = crate::Reg<enable::ENABLE_SPEC>;
#[doc = "Enable AAR"]
pub mod enable;
#[doc = "NIRK (rw) register accessor: an alias for `Reg<NIRK_SPEC>`"]
pub type NIRK = crate::Reg<nirk::NIRK_SPEC>;
#[doc = "Number of IRKs"]
pub mod nirk;
#[doc = "IRKPTR (rw) register accessor: an alias for `Reg<IRKPTR_SPEC>`"]
pub type IRKPTR = crate::Reg<irkptr::IRKPTR_SPEC>;
#[doc = "Pointer to IRK data structure"]
pub mod irkptr;
#[doc = "ADDRPTR (rw) register accessor: an alias for `Reg<ADDRPTR_SPEC>`"]
pub type ADDRPTR = crate::Reg<addrptr::ADDRPTR_SPEC>;
#[doc = "Pointer to the resolvable address"]
pub mod addrptr;
#[doc = "SCRATCHPTR (rw) register accessor: an alias for `Reg<SCRATCHPTR_SPEC>`"]
pub type SCRATCHPTR = crate::Reg<scratchptr::SCRATCHPTR_SPEC>;
#[doc = "Pointer to data area used for temporary storage"]
pub mod scratchptr;
vendor/nrf52840-pac/src/aar/addrptr.rs
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#[doc = "Register `ADDRPTR` reader"]
pub struct R(crate::R<ADDRPTR_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<ADDRPTR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<ADDRPTR_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<ADDRPTR_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `ADDRPTR` writer"]
pub struct W(crate::W<ADDRPTR_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<ADDRPTR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<ADDRPTR_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<ADDRPTR_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `ADDRPTR` reader - Pointer to the resolvable address (6-bytes)"]
pub type ADDRPTR_R = crate::FieldReader<u32, u32>;
#[doc = "Field `ADDRPTR` writer - Pointer to the resolvable address (6-bytes)"]
pub type ADDRPTR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ADDRPTR_SPEC, u32, u32, 32, O>;
impl R {
#[doc = "Bits 0:31 - Pointer to the resolvable address (6-bytes)"]
#[inline(always)]
pub fn addrptr(&self) -> ADDRPTR_R {
ADDRPTR_R::new(self.bits)
}
}
impl W {
#[doc = "Bits 0:31 - Pointer to the resolvable address (6-bytes)"]
#[inline(always)]
pub fn addrptr(&mut self) -> ADDRPTR_W<0> {
ADDRPTR_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Pointer to the resolvable address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [addrptr](index.html) module"]
pub struct ADDRPTR_SPEC;
impl crate::RegisterSpec for ADDRPTR_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [addrptr::R](R) reader structure"]
impl crate::Readable for ADDRPTR_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [addrptr::W](W) writer structure"]
impl crate::Writable for ADDRPTR_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets ADDRPTR to value 0"]
impl crate::Resettable for ADDRPTR_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/aar/enable.rs
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#[doc = "Register `ENABLE` reader"]
pub struct R(crate::R<ENABLE_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<ENABLE_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<ENABLE_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<ENABLE_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `ENABLE` writer"]
pub struct W(crate::W<ENABLE_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<ENABLE_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<ENABLE_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<ENABLE_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `ENABLE` reader - Enable or disable AAR"]
pub type ENABLE_R = crate::FieldReader<u8, ENABLE_A>;
#[doc = "Enable or disable AAR\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum ENABLE_A {
#[doc = "0: Disable"]
DISABLED = 0,
#[doc = "3: Enable"]
ENABLED = 3,
}
impl From<ENABLE_A> for u8 {
#[inline(always)]
fn from(variant: ENABLE_A) -> Self {
variant as _
}
}
impl ENABLE_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> Option<ENABLE_A> {
match self.bits {
0 => Some(ENABLE_A::DISABLED),
3 => Some(ENABLE_A::ENABLED),
_ => None,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == ENABLE_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == ENABLE_A::ENABLED
}
}
#[doc = "Field `ENABLE` writer - Enable or disable AAR"]
pub type ENABLE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ENABLE_SPEC, u8, ENABLE_A, 2, O>;
impl<'a, const O: u8> ENABLE_W<'a, O> {
#[doc = "Disable"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(ENABLE_A::DISABLED)
}
#[doc = "Enable"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(ENABLE_A::ENABLED)
}
}
impl R {
#[doc = "Bits 0:1 - Enable or disable AAR"]
#[inline(always)]
pub fn enable(&self) -> ENABLE_R {
ENABLE_R::new((self.bits & 3) as u8)
}
}
impl W {
#[doc = "Bits 0:1 - Enable or disable AAR"]
#[inline(always)]
pub fn enable(&mut self) -> ENABLE_W<0> {
ENABLE_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Enable AAR\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [enable](index.html) module"]
pub struct ENABLE_SPEC;
impl crate::RegisterSpec for ENABLE_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [enable::R](R) reader structure"]
impl crate::Readable for ENABLE_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [enable::W](W) writer structure"]
impl crate::Writable for ENABLE_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets ENABLE to value 0"]
impl crate::Resettable for ENABLE_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/aar/events_end.rs
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#[doc = "Register `EVENTS_END` reader"]
pub struct R(crate::R<EVENTS_END_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<EVENTS_END_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<EVENTS_END_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<EVENTS_END_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `EVENTS_END` writer"]
pub struct W(crate::W<EVENTS_END_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<EVENTS_END_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<EVENTS_END_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<EVENTS_END_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `EVENTS_END` reader - "]
pub type EVENTS_END_R = crate::BitReader<bool>;
#[doc = "Field `EVENTS_END` writer - "]
pub type EVENTS_END_W<'a, const O: u8> = crate::BitWriter<'a, u32, EVENTS_END_SPEC, bool, O>;
impl R {
#[doc = "Bit 0"]
#[inline(always)]
pub fn events_end(&self) -> EVENTS_END_R {
EVENTS_END_R::new((self.bits & 1) != 0)
}
}
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn events_end(&mut self) -> EVENTS_END_W<0> {
EVENTS_END_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Address resolution procedure complete\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_end](index.html) module"]
pub struct EVENTS_END_SPEC;
impl crate::RegisterSpec for EVENTS_END_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [events_end::R](R) reader structure"]
impl crate::Readable for EVENTS_END_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [events_end::W](W) writer structure"]
impl crate::Writable for EVENTS_END_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets EVENTS_END to value 0"]
impl crate::Resettable for EVENTS_END_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/aar/events_notresolved.rs
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#[doc = "Register `EVENTS_NOTRESOLVED` reader"]
pub struct R(crate::R<EVENTS_NOTRESOLVED_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<EVENTS_NOTRESOLVED_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<EVENTS_NOTRESOLVED_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<EVENTS_NOTRESOLVED_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `EVENTS_NOTRESOLVED` writer"]
pub struct W(crate::W<EVENTS_NOTRESOLVED_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<EVENTS_NOTRESOLVED_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<EVENTS_NOTRESOLVED_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<EVENTS_NOTRESOLVED_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `EVENTS_NOTRESOLVED` reader - "]
pub type EVENTS_NOTRESOLVED_R = crate::BitReader<bool>;
#[doc = "Field `EVENTS_NOTRESOLVED` writer - "]
pub type EVENTS_NOTRESOLVED_W<'a, const O: u8> =
crate::BitWriter<'a, u32, EVENTS_NOTRESOLVED_SPEC, bool, O>;
impl R {
#[doc = "Bit 0"]
#[inline(always)]
pub fn events_notresolved(&self) -> EVENTS_NOTRESOLVED_R {
EVENTS_NOTRESOLVED_R::new((self.bits & 1) != 0)
}
}
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn events_notresolved(&mut self) -> EVENTS_NOTRESOLVED_W<0> {
EVENTS_NOTRESOLVED_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Address not resolved\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_notresolved](index.html) module"]
pub struct EVENTS_NOTRESOLVED_SPEC;
impl crate::RegisterSpec for EVENTS_NOTRESOLVED_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [events_notresolved::R](R) reader structure"]
impl crate::Readable for EVENTS_NOTRESOLVED_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [events_notresolved::W](W) writer structure"]
impl crate::Writable for EVENTS_NOTRESOLVED_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets EVENTS_NOTRESOLVED to value 0"]
impl crate::Resettable for EVENTS_NOTRESOLVED_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/aar/events_resolved.rs
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#[doc = "Register `EVENTS_RESOLVED` reader"]
pub struct R(crate::R<EVENTS_RESOLVED_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<EVENTS_RESOLVED_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<EVENTS_RESOLVED_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<EVENTS_RESOLVED_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `EVENTS_RESOLVED` writer"]
pub struct W(crate::W<EVENTS_RESOLVED_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<EVENTS_RESOLVED_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<EVENTS_RESOLVED_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<EVENTS_RESOLVED_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `EVENTS_RESOLVED` reader - "]
pub type EVENTS_RESOLVED_R = crate::BitReader<bool>;
#[doc = "Field `EVENTS_RESOLVED` writer - "]
pub type EVENTS_RESOLVED_W<'a, const O: u8> =
crate::BitWriter<'a, u32, EVENTS_RESOLVED_SPEC, bool, O>;
impl R {
#[doc = "Bit 0"]
#[inline(always)]
pub fn events_resolved(&self) -> EVENTS_RESOLVED_R {
EVENTS_RESOLVED_R::new((self.bits & 1) != 0)
}
}
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn events_resolved(&mut self) -> EVENTS_RESOLVED_W<0> {
EVENTS_RESOLVED_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Address resolved\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_resolved](index.html) module"]
pub struct EVENTS_RESOLVED_SPEC;
impl crate::RegisterSpec for EVENTS_RESOLVED_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [events_resolved::R](R) reader structure"]
impl crate::Readable for EVENTS_RESOLVED_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [events_resolved::W](W) writer structure"]
impl crate::Writable for EVENTS_RESOLVED_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets EVENTS_RESOLVED to value 0"]
impl crate::Resettable for EVENTS_RESOLVED_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/aar/intenclr.rs
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#[doc = "Register `INTENCLR` reader"]
pub struct R(crate::R<INTENCLR_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<INTENCLR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<INTENCLR_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<INTENCLR_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `INTENCLR` writer"]
pub struct W(crate::W<INTENCLR_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<INTENCLR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<INTENCLR_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<INTENCLR_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `END` reader - Write '1' to disable interrupt for END event"]
pub type END_R = crate::BitReader<END_A>;
#[doc = "Write '1' to disable interrupt for END event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum END_A {
#[doc = "0: Read: Disabled"]
DISABLED = 0,
#[doc = "1: Read: Enabled"]
ENABLED = 1,
}
impl From<END_A> for bool {
#[inline(always)]
fn from(variant: END_A) -> Self {
variant as u8 != 0
}
}
impl END_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> END_A {
match self.bits {
false => END_A::DISABLED,
true => END_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == END_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == END_A::ENABLED
}
}
#[doc = "Write '1' to disable interrupt for END event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum END_AW {
#[doc = "1: Disable"]
CLEAR = 1,
}
impl From<END_AW> for bool {
#[inline(always)]
fn from(variant: END_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `END` writer - Write '1' to disable interrupt for END event"]
pub type END_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, END_AW, O>;
impl<'a, const O: u8> END_W<'a, O> {
#[doc = "Disable"]
#[inline(always)]
pub fn clear(self) -> &'a mut W {
self.variant(END_AW::CLEAR)
}
}
#[doc = "Field `RESOLVED` reader - Write '1' to disable interrupt for RESOLVED event"]
pub type RESOLVED_R = crate::BitReader<RESOLVED_A>;
#[doc = "Write '1' to disable interrupt for RESOLVED event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RESOLVED_A {
#[doc = "0: Read: Disabled"]
DISABLED = 0,
#[doc = "1: Read: Enabled"]
ENABLED = 1,
}
impl From<RESOLVED_A> for bool {
#[inline(always)]
fn from(variant: RESOLVED_A) -> Self {
variant as u8 != 0
}
}
impl RESOLVED_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> RESOLVED_A {
match self.bits {
false => RESOLVED_A::DISABLED,
true => RESOLVED_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == RESOLVED_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == RESOLVED_A::ENABLED
}
}
#[doc = "Write '1' to disable interrupt for RESOLVED event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RESOLVED_AW {
#[doc = "1: Disable"]
CLEAR = 1,
}
impl From<RESOLVED_AW> for bool {
#[inline(always)]
fn from(variant: RESOLVED_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `RESOLVED` writer - Write '1' to disable interrupt for RESOLVED event"]
pub type RESOLVED_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, RESOLVED_AW, O>;
impl<'a, const O: u8> RESOLVED_W<'a, O> {
#[doc = "Disable"]
#[inline(always)]
pub fn clear(self) -> &'a mut W {
self.variant(RESOLVED_AW::CLEAR)
}
}
#[doc = "Field `NOTRESOLVED` reader - Write '1' to disable interrupt for NOTRESOLVED event"]
pub type NOTRESOLVED_R = crate::BitReader<NOTRESOLVED_A>;
#[doc = "Write '1' to disable interrupt for NOTRESOLVED event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum NOTRESOLVED_A {
#[doc = "0: Read: Disabled"]
DISABLED = 0,
#[doc = "1: Read: Enabled"]
ENABLED = 1,
}
impl From<NOTRESOLVED_A> for bool {
#[inline(always)]
fn from(variant: NOTRESOLVED_A) -> Self {
variant as u8 != 0
}
}
impl NOTRESOLVED_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> NOTRESOLVED_A {
match self.bits {
false => NOTRESOLVED_A::DISABLED,
true => NOTRESOLVED_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == NOTRESOLVED_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == NOTRESOLVED_A::ENABLED
}
}
#[doc = "Write '1' to disable interrupt for NOTRESOLVED event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum NOTRESOLVED_AW {
#[doc = "1: Disable"]
CLEAR = 1,
}
impl From<NOTRESOLVED_AW> for bool {
#[inline(always)]
fn from(variant: NOTRESOLVED_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `NOTRESOLVED` writer - Write '1' to disable interrupt for NOTRESOLVED event"]
pub type NOTRESOLVED_W<'a, const O: u8> =
crate::BitWriter<'a, u32, INTENCLR_SPEC, NOTRESOLVED_AW, O>;
impl<'a, const O: u8> NOTRESOLVED_W<'a, O> {
#[doc = "Disable"]
#[inline(always)]
pub fn clear(self) -> &'a mut W {
self.variant(NOTRESOLVED_AW::CLEAR)
}
}
impl R {
#[doc = "Bit 0 - Write '1' to disable interrupt for END event"]
#[inline(always)]
pub fn end(&self) -> END_R {
END_R::new((self.bits & 1) != 0)
}
#[doc = "Bit 1 - Write '1' to disable interrupt for RESOLVED event"]
#[inline(always)]
pub fn resolved(&self) -> RESOLVED_R {
RESOLVED_R::new(((self.bits >> 1) & 1) != 0)
}
#[doc = "Bit 2 - Write '1' to disable interrupt for NOTRESOLVED event"]
#[inline(always)]
pub fn notresolved(&self) -> NOTRESOLVED_R {
NOTRESOLVED_R::new(((self.bits >> 2) & 1) != 0)
}
}
impl W {
#[doc = "Bit 0 - Write '1' to disable interrupt for END event"]
#[inline(always)]
pub fn end(&mut self) -> END_W<0> {
END_W::new(self)
}
#[doc = "Bit 1 - Write '1' to disable interrupt for RESOLVED event"]
#[inline(always)]
pub fn resolved(&mut self) -> RESOLVED_W<1> {
RESOLVED_W::new(self)
}
#[doc = "Bit 2 - Write '1' to disable interrupt for NOTRESOLVED event"]
#[inline(always)]
pub fn notresolved(&mut self) -> NOTRESOLVED_W<2> {
NOTRESOLVED_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Disable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"]
pub struct INTENCLR_SPEC;
impl crate::RegisterSpec for INTENCLR_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [intenclr::R](R) reader structure"]
impl crate::Readable for INTENCLR_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"]
impl crate::Writable for INTENCLR_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets INTENCLR to value 0"]
impl crate::Resettable for INTENCLR_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/aar/intenset.rs
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#[doc = "Register `INTENSET` reader"]
pub struct R(crate::R<INTENSET_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<INTENSET_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<INTENSET_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<INTENSET_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `INTENSET` writer"]
pub struct W(crate::W<INTENSET_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<INTENSET_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<INTENSET_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<INTENSET_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `END` reader - Write '1' to enable interrupt for END event"]
pub type END_R = crate::BitReader<END_A>;
#[doc = "Write '1' to enable interrupt for END event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum END_A {
#[doc = "0: Read: Disabled"]
DISABLED = 0,
#[doc = "1: Read: Enabled"]
ENABLED = 1,
}
impl From<END_A> for bool {
#[inline(always)]
fn from(variant: END_A) -> Self {
variant as u8 != 0
}
}
impl END_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> END_A {
match self.bits {
false => END_A::DISABLED,
true => END_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == END_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == END_A::ENABLED
}
}
#[doc = "Write '1' to enable interrupt for END event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum END_AW {
#[doc = "1: Enable"]
SET = 1,
}
impl From<END_AW> for bool {
#[inline(always)]
fn from(variant: END_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `END` writer - Write '1' to enable interrupt for END event"]
pub type END_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, END_AW, O>;
impl<'a, const O: u8> END_W<'a, O> {
#[doc = "Enable"]
#[inline(always)]
pub fn set(self) -> &'a mut W {
self.variant(END_AW::SET)
}
}
#[doc = "Field `RESOLVED` reader - Write '1' to enable interrupt for RESOLVED event"]
pub type RESOLVED_R = crate::BitReader<RESOLVED_A>;
#[doc = "Write '1' to enable interrupt for RESOLVED event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RESOLVED_A {
#[doc = "0: Read: Disabled"]
DISABLED = 0,
#[doc = "1: Read: Enabled"]
ENABLED = 1,
}
impl From<RESOLVED_A> for bool {
#[inline(always)]
fn from(variant: RESOLVED_A) -> Self {
variant as u8 != 0
}
}
impl RESOLVED_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> RESOLVED_A {
match self.bits {
false => RESOLVED_A::DISABLED,
true => RESOLVED_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == RESOLVED_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == RESOLVED_A::ENABLED
}
}
#[doc = "Write '1' to enable interrupt for RESOLVED event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RESOLVED_AW {
#[doc = "1: Enable"]
SET = 1,
}
impl From<RESOLVED_AW> for bool {
#[inline(always)]
fn from(variant: RESOLVED_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `RESOLVED` writer - Write '1' to enable interrupt for RESOLVED event"]
pub type RESOLVED_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, RESOLVED_AW, O>;
impl<'a, const O: u8> RESOLVED_W<'a, O> {
#[doc = "Enable"]
#[inline(always)]
pub fn set(self) -> &'a mut W {
self.variant(RESOLVED_AW::SET)
}
}
#[doc = "Field `NOTRESOLVED` reader - Write '1' to enable interrupt for NOTRESOLVED event"]
pub type NOTRESOLVED_R = crate::BitReader<NOTRESOLVED_A>;
#[doc = "Write '1' to enable interrupt for NOTRESOLVED event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum NOTRESOLVED_A {
#[doc = "0: Read: Disabled"]
DISABLED = 0,
#[doc = "1: Read: Enabled"]
ENABLED = 1,
}
impl From<NOTRESOLVED_A> for bool {
#[inline(always)]
fn from(variant: NOTRESOLVED_A) -> Self {
variant as u8 != 0
}
}
impl NOTRESOLVED_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> NOTRESOLVED_A {
match self.bits {
false => NOTRESOLVED_A::DISABLED,
true => NOTRESOLVED_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == NOTRESOLVED_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == NOTRESOLVED_A::ENABLED
}
}
#[doc = "Write '1' to enable interrupt for NOTRESOLVED event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum NOTRESOLVED_AW {
#[doc = "1: Enable"]
SET = 1,
}
impl From<NOTRESOLVED_AW> for bool {
#[inline(always)]
fn from(variant: NOTRESOLVED_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `NOTRESOLVED` writer - Write '1' to enable interrupt for NOTRESOLVED event"]
pub type NOTRESOLVED_W<'a, const O: u8> =
crate::BitWriter<'a, u32, INTENSET_SPEC, NOTRESOLVED_AW, O>;
impl<'a, const O: u8> NOTRESOLVED_W<'a, O> {
#[doc = "Enable"]
#[inline(always)]
pub fn set(self) -> &'a mut W {
self.variant(NOTRESOLVED_AW::SET)
}
}
impl R {
#[doc = "Bit 0 - Write '1' to enable interrupt for END event"]
#[inline(always)]
pub fn end(&self) -> END_R {
END_R::new((self.bits & 1) != 0)
}
#[doc = "Bit 1 - Write '1' to enable interrupt for RESOLVED event"]
#[inline(always)]
pub fn resolved(&self) -> RESOLVED_R {
RESOLVED_R::new(((self.bits >> 1) & 1) != 0)
}
#[doc = "Bit 2 - Write '1' to enable interrupt for NOTRESOLVED event"]
#[inline(always)]
pub fn notresolved(&self) -> NOTRESOLVED_R {
NOTRESOLVED_R::new(((self.bits >> 2) & 1) != 0)
}
}
impl W {
#[doc = "Bit 0 - Write '1' to enable interrupt for END event"]
#[inline(always)]
pub fn end(&mut self) -> END_W<0> {
END_W::new(self)
}
#[doc = "Bit 1 - Write '1' to enable interrupt for RESOLVED event"]
#[inline(always)]
pub fn resolved(&mut self) -> RESOLVED_W<1> {
RESOLVED_W::new(self)
}
#[doc = "Bit 2 - Write '1' to enable interrupt for NOTRESOLVED event"]
#[inline(always)]
pub fn notresolved(&mut self) -> NOTRESOLVED_W<2> {
NOTRESOLVED_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Enable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"]
pub struct INTENSET_SPEC;
impl crate::RegisterSpec for INTENSET_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [intenset::R](R) reader structure"]
impl crate::Readable for INTENSET_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"]
impl crate::Writable for INTENSET_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets INTENSET to value 0"]
impl crate::Resettable for INTENSET_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/aar/irkptr.rs
Vendored
+80
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#[doc = "Register `IRKPTR` reader"]
pub struct R(crate::R<IRKPTR_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<IRKPTR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<IRKPTR_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<IRKPTR_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `IRKPTR` writer"]
pub struct W(crate::W<IRKPTR_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<IRKPTR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<IRKPTR_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<IRKPTR_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `IRKPTR` reader - Pointer to the IRK data structure"]
pub type IRKPTR_R = crate::FieldReader<u32, u32>;
#[doc = "Field `IRKPTR` writer - Pointer to the IRK data structure"]
pub type IRKPTR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, IRKPTR_SPEC, u32, u32, 32, O>;
impl R {
#[doc = "Bits 0:31 - Pointer to the IRK data structure"]
#[inline(always)]
pub fn irkptr(&self) -> IRKPTR_R {
IRKPTR_R::new(self.bits)
}
}
impl W {
#[doc = "Bits 0:31 - Pointer to the IRK data structure"]
#[inline(always)]
pub fn irkptr(&mut self) -> IRKPTR_W<0> {
IRKPTR_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Pointer to IRK data structure\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irkptr](index.html) module"]
pub struct IRKPTR_SPEC;
impl crate::RegisterSpec for IRKPTR_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [irkptr::R](R) reader structure"]
impl crate::Readable for IRKPTR_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [irkptr::W](W) writer structure"]
impl crate::Writable for IRKPTR_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets IRKPTR to value 0"]
impl crate::Resettable for IRKPTR_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/aar/nirk.rs
Vendored
+80
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#[doc = "Register `NIRK` reader"]
pub struct R(crate::R<NIRK_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<NIRK_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<NIRK_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<NIRK_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `NIRK` writer"]
pub struct W(crate::W<NIRK_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<NIRK_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<NIRK_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<NIRK_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `NIRK` reader - Number of Identity root keys available in the IRK data structure"]
pub type NIRK_R = crate::FieldReader<u8, u8>;
#[doc = "Field `NIRK` writer - Number of Identity root keys available in the IRK data structure"]
pub type NIRK_W<'a, const O: u8> = crate::FieldWriter<'a, u32, NIRK_SPEC, u8, u8, 5, O>;
impl R {
#[doc = "Bits 0:4 - Number of Identity root keys available in the IRK data structure"]
#[inline(always)]
pub fn nirk(&self) -> NIRK_R {
NIRK_R::new((self.bits & 0x1f) as u8)
}
}
impl W {
#[doc = "Bits 0:4 - Number of Identity root keys available in the IRK data structure"]
#[inline(always)]
pub fn nirk(&mut self) -> NIRK_W<0> {
NIRK_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Number of IRKs\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [nirk](index.html) module"]
pub struct NIRK_SPEC;
impl crate::RegisterSpec for NIRK_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [nirk::R](R) reader structure"]
impl crate::Readable for NIRK_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [nirk::W](W) writer structure"]
impl crate::Writable for NIRK_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets NIRK to value 0x01"]
impl crate::Resettable for NIRK_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0x01
}
}
vendor/nrf52840-pac/src/aar/scratchptr.rs
Vendored
+81
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@@ -0,0 +1,81 @@
#[doc = "Register `SCRATCHPTR` reader"]
pub struct R(crate::R<SCRATCHPTR_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<SCRATCHPTR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<SCRATCHPTR_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<SCRATCHPTR_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `SCRATCHPTR` writer"]
pub struct W(crate::W<SCRATCHPTR_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<SCRATCHPTR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<SCRATCHPTR_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<SCRATCHPTR_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `SCRATCHPTR` reader - Pointer to a scratch data area used for temporary storage during resolution.A space of minimum 3 bytes must be reserved."]
pub type SCRATCHPTR_R = crate::FieldReader<u32, u32>;
#[doc = "Field `SCRATCHPTR` writer - Pointer to a scratch data area used for temporary storage during resolution.A space of minimum 3 bytes must be reserved."]
pub type SCRATCHPTR_W<'a, const O: u8> =
crate::FieldWriter<'a, u32, SCRATCHPTR_SPEC, u32, u32, 32, O>;
impl R {
#[doc = "Bits 0:31 - Pointer to a scratch data area used for temporary storage during resolution.A space of minimum 3 bytes must be reserved."]
#[inline(always)]
pub fn scratchptr(&self) -> SCRATCHPTR_R {
SCRATCHPTR_R::new(self.bits)
}
}
impl W {
#[doc = "Bits 0:31 - Pointer to a scratch data area used for temporary storage during resolution.A space of minimum 3 bytes must be reserved."]
#[inline(always)]
pub fn scratchptr(&mut self) -> SCRATCHPTR_W<0> {
SCRATCHPTR_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Pointer to data area used for temporary storage\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scratchptr](index.html) module"]
pub struct SCRATCHPTR_SPEC;
impl crate::RegisterSpec for SCRATCHPTR_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [scratchptr::R](R) reader structure"]
impl crate::Readable for SCRATCHPTR_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [scratchptr::W](W) writer structure"]
impl crate::Writable for SCRATCHPTR_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets SCRATCHPTR to value 0"]
impl crate::Resettable for SCRATCHPTR_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/aar/status.rs
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+40
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#[doc = "Register `STATUS` reader"]
pub struct R(crate::R<STATUS_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<STATUS_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<STATUS_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<STATUS_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Field `STATUS` reader - The IRK that was used last time an address was resolved"]
pub type STATUS_R = crate::FieldReader<u8, u8>;
impl R {
#[doc = "Bits 0:3 - The IRK that was used last time an address was resolved"]
#[inline(always)]
pub fn status(&self) -> STATUS_R {
STATUS_R::new((self.bits & 0x0f) as u8)
}
}
#[doc = "Resolution status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"]
pub struct STATUS_SPEC;
impl crate::RegisterSpec for STATUS_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [status::R](R) reader structure"]
impl crate::Readable for STATUS_SPEC {
type Reader = R;
}
#[doc = "`reset()` method sets STATUS to value 0"]
impl crate::Resettable for STATUS_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/aar/tasks_start.rs
Vendored
+52
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#[doc = "Register `TASKS_START` writer"]
pub struct W(crate::W<TASKS_START_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<TASKS_START_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<TASKS_START_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<TASKS_START_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `TASKS_START` writer - "]
pub type TASKS_START_W<'a, const O: u8> = crate::BitWriter<'a, u32, TASKS_START_SPEC, bool, O>;
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn tasks_start(&mut self) -> TASKS_START_W<0> {
TASKS_START_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Start resolving addresses based on IRKs specified in the IRK data structure\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_start](index.html) module"]
pub struct TASKS_START_SPEC;
impl crate::RegisterSpec for TASKS_START_SPEC {
type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [tasks_start::W](W) writer structure"]
impl crate::Writable for TASKS_START_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets TASKS_START to value 0"]
impl crate::Resettable for TASKS_START_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/aar/tasks_stop.rs
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+52
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#[doc = "Register `TASKS_STOP` writer"]
pub struct W(crate::W<TASKS_STOP_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<TASKS_STOP_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<TASKS_STOP_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<TASKS_STOP_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `TASKS_STOP` writer - "]
pub type TASKS_STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, TASKS_STOP_SPEC, bool, O>;
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn tasks_stop(&mut self) -> TASKS_STOP_W<0> {
TASKS_STOP_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Stop resolving addresses\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_stop](index.html) module"]
pub struct TASKS_STOP_SPEC;
impl crate::RegisterSpec for TASKS_STOP_SPEC {
type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [tasks_stop::W](W) writer structure"]
impl crate::Writable for TASKS_STOP_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets TASKS_STOP to value 0"]
impl crate::Resettable for TASKS_STOP_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/acl.rs
Vendored
+12
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#[doc = r"Register block"]
#[repr(C)]
pub struct RegisterBlock {
_reserved0: [u8; 0x0800],
#[doc = "0x800..0x880 - Unspecified"]
pub acl: [ACL; 8],
}
#[doc = "Unspecified"]
pub use acl::ACL;
#[doc = r"Cluster"]
#[doc = "Unspecified"]
pub mod acl;
vendor/nrf52840-pac/src/acl/acl.rs
Vendored
+28
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#[doc = r"Register block"]
#[repr(C)]
pub struct ACL {
#[doc = "0x00 - Description cluster\\[n\\]: Configure the word-aligned start address of region n to protect"]
pub addr: ADDR,
#[doc = "0x04 - Description cluster\\[n\\]: Size of region to protect counting from address ACL\\[n\\].ADDR. Write '0' as no effect."]
pub size: SIZE,
#[doc = "0x08 - Description cluster\\[n\\]: Access permissions for region n as defined by start address ACL\\[n\\].ADDR and size ACL\\[n\\].SIZE"]
pub perm: PERM,
#[doc = "0x0c - Unspecified"]
pub unused0: UNUSED0,
}
#[doc = "ADDR (rw) register accessor: an alias for `Reg<ADDR_SPEC>`"]
pub type ADDR = crate::Reg<addr::ADDR_SPEC>;
#[doc = "Description cluster\\[n\\]: Configure the word-aligned start address of region n to protect"]
pub mod addr;
#[doc = "SIZE (rw) register accessor: an alias for `Reg<SIZE_SPEC>`"]
pub type SIZE = crate::Reg<size::SIZE_SPEC>;
#[doc = "Description cluster\\[n\\]: Size of region to protect counting from address ACL\\[n\\].ADDR. Write '0' as no effect."]
pub mod size;
#[doc = "PERM (rw) register accessor: an alias for `Reg<PERM_SPEC>`"]
pub type PERM = crate::Reg<perm::PERM_SPEC>;
#[doc = "Description cluster\\[n\\]: Access permissions for region n as defined by start address ACL\\[n\\].ADDR and size ACL\\[n\\].SIZE"]
pub mod perm;
#[doc = "UNUSED0 (rw) register accessor: an alias for `Reg<UNUSED0_SPEC>`"]
pub type UNUSED0 = crate::Reg<unused0::UNUSED0_SPEC>;
#[doc = "Unspecified"]
pub mod unused0;
vendor/nrf52840-pac/src/acl/acl/addr.rs
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#[doc = "Register `ADDR` reader"]
pub struct R(crate::R<ADDR_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<ADDR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<ADDR_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<ADDR_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `ADDR` writer"]
pub struct W(crate::W<ADDR_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<ADDR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<ADDR_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<ADDR_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `ADDR` reader - Valid word-aligned start address of region n to protect. Address must point to a flash page boundary."]
pub type ADDR_R = crate::FieldReader<u32, u32>;
#[doc = "Field `ADDR` writer - Valid word-aligned start address of region n to protect. Address must point to a flash page boundary."]
pub type ADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ADDR_SPEC, u32, u32, 32, O>;
impl R {
#[doc = "Bits 0:31 - Valid word-aligned start address of region n to protect. Address must point to a flash page boundary."]
#[inline(always)]
pub fn addr(&self) -> ADDR_R {
ADDR_R::new(self.bits)
}
}
impl W {
#[doc = "Bits 0:31 - Valid word-aligned start address of region n to protect. Address must point to a flash page boundary."]
#[inline(always)]
pub fn addr(&mut self) -> ADDR_W<0> {
ADDR_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Description cluster\\[n\\]: Configure the word-aligned start address of region n to protect\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [addr](index.html) module"]
pub struct ADDR_SPEC;
impl crate::RegisterSpec for ADDR_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [addr::R](R) reader structure"]
impl crate::Readable for ADDR_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [addr::W](W) writer structure"]
impl crate::Writable for ADDR_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets ADDR to value 0"]
impl crate::Resettable for ADDR_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/acl/acl/perm.rs
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#[doc = "Register `PERM` reader"]
pub struct R(crate::R<PERM_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<PERM_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<PERM_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<PERM_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `PERM` writer"]
pub struct W(crate::W<PERM_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<PERM_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<PERM_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<PERM_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `WRITE` reader - Configure write and erase permissions for region n. Write '0' has no effect."]
pub type WRITE_R = crate::BitReader<WRITE_A>;
#[doc = "Configure write and erase permissions for region n. Write '0' has no effect.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum WRITE_A {
#[doc = "0: Allow write and erase instructions to region n"]
ENABLE = 0,
#[doc = "1: Block write and erase instructions to region n"]
DISABLE = 1,
}
impl From<WRITE_A> for bool {
#[inline(always)]
fn from(variant: WRITE_A) -> Self {
variant as u8 != 0
}
}
impl WRITE_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> WRITE_A {
match self.bits {
false => WRITE_A::ENABLE,
true => WRITE_A::DISABLE,
}
}
#[doc = "Checks if the value of the field is `ENABLE`"]
#[inline(always)]
pub fn is_enable(&self) -> bool {
*self == WRITE_A::ENABLE
}
#[doc = "Checks if the value of the field is `DISABLE`"]
#[inline(always)]
pub fn is_disable(&self) -> bool {
*self == WRITE_A::DISABLE
}
}
#[doc = "Field `WRITE` writer - Configure write and erase permissions for region n. Write '0' has no effect."]
pub type WRITE_W<'a, const O: u8> = crate::BitWriter<'a, u32, PERM_SPEC, WRITE_A, O>;
impl<'a, const O: u8> WRITE_W<'a, O> {
#[doc = "Allow write and erase instructions to region n"]
#[inline(always)]
pub fn enable(self) -> &'a mut W {
self.variant(WRITE_A::ENABLE)
}
#[doc = "Block write and erase instructions to region n"]
#[inline(always)]
pub fn disable(self) -> &'a mut W {
self.variant(WRITE_A::DISABLE)
}
}
#[doc = "Field `READ` reader - Configure read permissions for region n. Write '0' has no effect."]
pub type READ_R = crate::BitReader<READ_A>;
#[doc = "Configure read permissions for region n. Write '0' has no effect.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum READ_A {
#[doc = "0: Allow read instructions to region n"]
ENABLE = 0,
#[doc = "1: Block read instructions to region n"]
DISABLE = 1,
}
impl From<READ_A> for bool {
#[inline(always)]
fn from(variant: READ_A) -> Self {
variant as u8 != 0
}
}
impl READ_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> READ_A {
match self.bits {
false => READ_A::ENABLE,
true => READ_A::DISABLE,
}
}
#[doc = "Checks if the value of the field is `ENABLE`"]
#[inline(always)]
pub fn is_enable(&self) -> bool {
*self == READ_A::ENABLE
}
#[doc = "Checks if the value of the field is `DISABLE`"]
#[inline(always)]
pub fn is_disable(&self) -> bool {
*self == READ_A::DISABLE
}
}
#[doc = "Field `READ` writer - Configure read permissions for region n. Write '0' has no effect."]
pub type READ_W<'a, const O: u8> = crate::BitWriter<'a, u32, PERM_SPEC, READ_A, O>;
impl<'a, const O: u8> READ_W<'a, O> {
#[doc = "Allow read instructions to region n"]
#[inline(always)]
pub fn enable(self) -> &'a mut W {
self.variant(READ_A::ENABLE)
}
#[doc = "Block read instructions to region n"]
#[inline(always)]
pub fn disable(self) -> &'a mut W {
self.variant(READ_A::DISABLE)
}
}
impl R {
#[doc = "Bit 1 - Configure write and erase permissions for region n. Write '0' has no effect."]
#[inline(always)]
pub fn write(&self) -> WRITE_R {
WRITE_R::new(((self.bits >> 1) & 1) != 0)
}
#[doc = "Bit 2 - Configure read permissions for region n. Write '0' has no effect."]
#[inline(always)]
pub fn read(&self) -> READ_R {
READ_R::new(((self.bits >> 2) & 1) != 0)
}
}
impl W {
#[doc = "Bit 1 - Configure write and erase permissions for region n. Write '0' has no effect."]
#[inline(always)]
pub fn write(&mut self) -> WRITE_W<1> {
WRITE_W::new(self)
}
#[doc = "Bit 2 - Configure read permissions for region n. Write '0' has no effect."]
#[inline(always)]
pub fn read(&mut self) -> READ_W<2> {
READ_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Description cluster\\[n\\]: Access permissions for region n as defined by start address ACL\\[n\\].ADDR and size ACL\\[n\\].SIZE\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [perm](index.html) module"]
pub struct PERM_SPEC;
impl crate::RegisterSpec for PERM_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [perm::R](R) reader structure"]
impl crate::Readable for PERM_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [perm::W](W) writer structure"]
impl crate::Writable for PERM_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets PERM to value 0"]
impl crate::Resettable for PERM_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/acl/acl/size.rs
Vendored
+80
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@@ -0,0 +1,80 @@
#[doc = "Register `SIZE` reader"]
pub struct R(crate::R<SIZE_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<SIZE_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<SIZE_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<SIZE_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `SIZE` writer"]
pub struct W(crate::W<SIZE_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<SIZE_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<SIZE_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<SIZE_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `SIZE` reader - Size of flash region n in bytes. Must be a multiple of the flash page size, and the maximum region size is limited to 512kB."]
pub type SIZE_R = crate::FieldReader<u32, u32>;
#[doc = "Field `SIZE` writer - Size of flash region n in bytes. Must be a multiple of the flash page size, and the maximum region size is limited to 512kB."]
pub type SIZE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SIZE_SPEC, u32, u32, 32, O>;
impl R {
#[doc = "Bits 0:31 - Size of flash region n in bytes. Must be a multiple of the flash page size, and the maximum region size is limited to 512kB."]
#[inline(always)]
pub fn size(&self) -> SIZE_R {
SIZE_R::new(self.bits)
}
}
impl W {
#[doc = "Bits 0:31 - Size of flash region n in bytes. Must be a multiple of the flash page size, and the maximum region size is limited to 512kB."]
#[inline(always)]
pub fn size(&mut self) -> SIZE_W<0> {
SIZE_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Description cluster\\[n\\]: Size of region to protect counting from address ACL\\[n\\].ADDR. Write '0' as no effect.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [size](index.html) module"]
pub struct SIZE_SPEC;
impl crate::RegisterSpec for SIZE_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [size::R](R) reader structure"]
impl crate::Readable for SIZE_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [size::W](W) writer structure"]
impl crate::Writable for SIZE_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets SIZE to value 0"]
impl crate::Resettable for SIZE_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/acl/acl/unused0.rs
Vendored
+64
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@@ -0,0 +1,64 @@
#[doc = "Register `UNUSED0` reader"]
pub struct R(crate::R<UNUSED0_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<UNUSED0_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<UNUSED0_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<UNUSED0_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `UNUSED0` writer"]
pub struct W(crate::W<UNUSED0_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<UNUSED0_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<UNUSED0_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<UNUSED0_SPEC>) -> Self {
W(writer)
}
}
impl W {
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Unspecified\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [unused0](index.html) module"]
pub struct UNUSED0_SPEC;
impl crate::RegisterSpec for UNUSED0_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [unused0::R](R) reader structure"]
impl crate::Readable for UNUSED0_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [unused0::W](W) writer structure"]
impl crate::Writable for UNUSED0_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets UNUSED0 to value 0"]
impl crate::Resettable for UNUSED0_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/cc_host_rgf.rs
Vendored
+48
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@@ -0,0 +1,48 @@
#[doc = r"Register block"]
#[repr(C)]
pub struct RegisterBlock {
_reserved0: [u8; 0x1a38],
#[doc = "0x1a38 - AES hardware key select"]
pub host_cryptokey_sel: HOST_CRYPTOKEY_SEL,
_reserved1: [u8; 0x10],
#[doc = "0x1a4c - This write-once register is the K_PRTL lock register. When this register is set, K_PRTL can not be used and a zeroed key will be used instead. The value of this register is saved in the CRYPTOCELL AO power domain."]
pub host_iot_kprtl_lock: HOST_IOT_KPRTL_LOCK,
#[doc = "0x1a50 - This register holds bits 31:0 of K_DR. The value of this register is saved in the CRYPTOCELL AO power domain. Reading from this address returns the K_DR valid status indicating if K_DR is successfully retained."]
pub host_iot_kdr0: HOST_IOT_KDR0,
#[doc = "0x1a54 - This register holds bits 63:32 of K_DR. The value of this register is saved in the CRYPTOCELL AO power domain."]
pub host_iot_kdr1: HOST_IOT_KDR1,
#[doc = "0x1a58 - This register holds bits 95:64 of K_DR. The value of this register is saved in the CRYPTOCELL AO power domain."]
pub host_iot_kdr2: HOST_IOT_KDR2,
#[doc = "0x1a5c - This register holds bits 127:96 of K_DR. The value of this register is saved in the CRYPTOCELL AO power domain."]
pub host_iot_kdr3: HOST_IOT_KDR3,
#[doc = "0x1a60 - Controls lifecycle state (LCS) for CRYPTOCELL subsystem"]
pub host_iot_lcs: HOST_IOT_LCS,
}
#[doc = "HOST_CRYPTOKEY_SEL (rw) register accessor: an alias for `Reg<HOST_CRYPTOKEY_SEL_SPEC>`"]
pub type HOST_CRYPTOKEY_SEL = crate::Reg<host_cryptokey_sel::HOST_CRYPTOKEY_SEL_SPEC>;
#[doc = "AES hardware key select"]
pub mod host_cryptokey_sel;
#[doc = "HOST_IOT_KPRTL_LOCK (rw) register accessor: an alias for `Reg<HOST_IOT_KPRTL_LOCK_SPEC>`"]
pub type HOST_IOT_KPRTL_LOCK = crate::Reg<host_iot_kprtl_lock::HOST_IOT_KPRTL_LOCK_SPEC>;
#[doc = "This write-once register is the K_PRTL lock register. When this register is set, K_PRTL can not be used and a zeroed key will be used instead. The value of this register is saved in the CRYPTOCELL AO power domain."]
pub mod host_iot_kprtl_lock;
#[doc = "HOST_IOT_KDR0 (rw) register accessor: an alias for `Reg<HOST_IOT_KDR0_SPEC>`"]
pub type HOST_IOT_KDR0 = crate::Reg<host_iot_kdr0::HOST_IOT_KDR0_SPEC>;
#[doc = "This register holds bits 31:0 of K_DR. The value of this register is saved in the CRYPTOCELL AO power domain. Reading from this address returns the K_DR valid status indicating if K_DR is successfully retained."]
pub mod host_iot_kdr0;
#[doc = "HOST_IOT_KDR1 (w) register accessor: an alias for `Reg<HOST_IOT_KDR1_SPEC>`"]
pub type HOST_IOT_KDR1 = crate::Reg<host_iot_kdr1::HOST_IOT_KDR1_SPEC>;
#[doc = "This register holds bits 63:32 of K_DR. The value of this register is saved in the CRYPTOCELL AO power domain."]
pub mod host_iot_kdr1;
#[doc = "HOST_IOT_KDR2 (w) register accessor: an alias for `Reg<HOST_IOT_KDR2_SPEC>`"]
pub type HOST_IOT_KDR2 = crate::Reg<host_iot_kdr2::HOST_IOT_KDR2_SPEC>;
#[doc = "This register holds bits 95:64 of K_DR. The value of this register is saved in the CRYPTOCELL AO power domain."]
pub mod host_iot_kdr2;
#[doc = "HOST_IOT_KDR3 (w) register accessor: an alias for `Reg<HOST_IOT_KDR3_SPEC>`"]
pub type HOST_IOT_KDR3 = crate::Reg<host_iot_kdr3::HOST_IOT_KDR3_SPEC>;
#[doc = "This register holds bits 127:96 of K_DR. The value of this register is saved in the CRYPTOCELL AO power domain."]
pub mod host_iot_kdr3;
#[doc = "HOST_IOT_LCS (rw) register accessor: an alias for `Reg<HOST_IOT_LCS_SPEC>`"]
pub type HOST_IOT_LCS = crate::Reg<host_iot_lcs::HOST_IOT_LCS_SPEC>;
#[doc = "Controls lifecycle state (LCS) for CRYPTOCELL subsystem"]
pub mod host_iot_lcs;
vendor/nrf52840-pac/src/cc_host_rgf/host_cryptokey_sel.rs
Vendored
+142
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#[doc = "Register `HOST_CRYPTOKEY_SEL` reader"]
pub struct R(crate::R<HOST_CRYPTOKEY_SEL_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<HOST_CRYPTOKEY_SEL_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<HOST_CRYPTOKEY_SEL_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<HOST_CRYPTOKEY_SEL_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `HOST_CRYPTOKEY_SEL` writer"]
pub struct W(crate::W<HOST_CRYPTOKEY_SEL_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<HOST_CRYPTOKEY_SEL_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<HOST_CRYPTOKEY_SEL_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<HOST_CRYPTOKEY_SEL_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `HOST_CRYPTOKEY_SEL` reader - Select the source of the HW key that is used by the AES engine"]
pub type HOST_CRYPTOKEY_SEL_R = crate::FieldReader<u8, HOST_CRYPTOKEY_SEL_A>;
#[doc = "Select the source of the HW key that is used by the AES engine\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum HOST_CRYPTOKEY_SEL_A {
#[doc = "0: Use device root key K_DR from CRYPTOCELL AO power domain"]
K_DR = 0,
#[doc = "1: Use hard-coded RTL key K_PRTL"]
K_PRTL = 1,
#[doc = "2: Use provided session key"]
SESSION = 2,
}
impl From<HOST_CRYPTOKEY_SEL_A> for u8 {
#[inline(always)]
fn from(variant: HOST_CRYPTOKEY_SEL_A) -> Self {
variant as _
}
}
impl HOST_CRYPTOKEY_SEL_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> Option<HOST_CRYPTOKEY_SEL_A> {
match self.bits {
0 => Some(HOST_CRYPTOKEY_SEL_A::K_DR),
1 => Some(HOST_CRYPTOKEY_SEL_A::K_PRTL),
2 => Some(HOST_CRYPTOKEY_SEL_A::SESSION),
_ => None,
}
}
#[doc = "Checks if the value of the field is `K_DR`"]
#[inline(always)]
pub fn is_k_dr(&self) -> bool {
*self == HOST_CRYPTOKEY_SEL_A::K_DR
}
#[doc = "Checks if the value of the field is `K_PRTL`"]
#[inline(always)]
pub fn is_k_prtl(&self) -> bool {
*self == HOST_CRYPTOKEY_SEL_A::K_PRTL
}
#[doc = "Checks if the value of the field is `SESSION`"]
#[inline(always)]
pub fn is_session(&self) -> bool {
*self == HOST_CRYPTOKEY_SEL_A::SESSION
}
}
#[doc = "Field `HOST_CRYPTOKEY_SEL` writer - Select the source of the HW key that is used by the AES engine"]
pub type HOST_CRYPTOKEY_SEL_W<'a, const O: u8> =
crate::FieldWriter<'a, u32, HOST_CRYPTOKEY_SEL_SPEC, u8, HOST_CRYPTOKEY_SEL_A, 2, O>;
impl<'a, const O: u8> HOST_CRYPTOKEY_SEL_W<'a, O> {
#[doc = "Use device root key K_DR from CRYPTOCELL AO power domain"]
#[inline(always)]
pub fn k_dr(self) -> &'a mut W {
self.variant(HOST_CRYPTOKEY_SEL_A::K_DR)
}
#[doc = "Use hard-coded RTL key K_PRTL"]
#[inline(always)]
pub fn k_prtl(self) -> &'a mut W {
self.variant(HOST_CRYPTOKEY_SEL_A::K_PRTL)
}
#[doc = "Use provided session key"]
#[inline(always)]
pub fn session(self) -> &'a mut W {
self.variant(HOST_CRYPTOKEY_SEL_A::SESSION)
}
}
impl R {
#[doc = "Bits 0:1 - Select the source of the HW key that is used by the AES engine"]
#[inline(always)]
pub fn host_cryptokey_sel(&self) -> HOST_CRYPTOKEY_SEL_R {
HOST_CRYPTOKEY_SEL_R::new((self.bits & 3) as u8)
}
}
impl W {
#[doc = "Bits 0:1 - Select the source of the HW key that is used by the AES engine"]
#[inline(always)]
pub fn host_cryptokey_sel(&mut self) -> HOST_CRYPTOKEY_SEL_W<0> {
HOST_CRYPTOKEY_SEL_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "AES hardware key select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [host_cryptokey_sel](index.html) module"]
pub struct HOST_CRYPTOKEY_SEL_SPEC;
impl crate::RegisterSpec for HOST_CRYPTOKEY_SEL_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [host_cryptokey_sel::R](R) reader structure"]
impl crate::Readable for HOST_CRYPTOKEY_SEL_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [host_cryptokey_sel::W](W) writer structure"]
impl crate::Writable for HOST_CRYPTOKEY_SEL_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets HOST_CRYPTOKEY_SEL to value 0"]
impl crate::Resettable for HOST_CRYPTOKEY_SEL_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/cc_host_rgf/host_iot_kdr0.rs
Vendored
+81
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#[doc = "Register `HOST_IOT_KDR0` reader"]
pub struct R(crate::R<HOST_IOT_KDR0_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<HOST_IOT_KDR0_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<HOST_IOT_KDR0_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<HOST_IOT_KDR0_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `HOST_IOT_KDR0` writer"]
pub struct W(crate::W<HOST_IOT_KDR0_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<HOST_IOT_KDR0_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<HOST_IOT_KDR0_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<HOST_IOT_KDR0_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `HOST_IOT_KDR0` reader - Write: K_DR bits 31:0 Read: 0x00000000 when 128-bit K_DR key value is not yet retained in the CRYPTOCELL AO power domain Read: 0x00000001 when 128-bit K_DR key value is successfully retained in the CRYPTOCELL AO power domain"]
pub type HOST_IOT_KDR0_R = crate::FieldReader<u32, u32>;
#[doc = "Field `HOST_IOT_KDR0` writer - Write: K_DR bits 31:0 Read: 0x00000000 when 128-bit K_DR key value is not yet retained in the CRYPTOCELL AO power domain Read: 0x00000001 when 128-bit K_DR key value is successfully retained in the CRYPTOCELL AO power domain"]
pub type HOST_IOT_KDR0_W<'a, const O: u8> =
crate::FieldWriter<'a, u32, HOST_IOT_KDR0_SPEC, u32, u32, 32, O>;
impl R {
#[doc = "Bits 0:31 - Write: K_DR bits 31:0 Read: 0x00000000 when 128-bit K_DR key value is not yet retained in the CRYPTOCELL AO power domain Read: 0x00000001 when 128-bit K_DR key value is successfully retained in the CRYPTOCELL AO power domain"]
#[inline(always)]
pub fn host_iot_kdr0(&self) -> HOST_IOT_KDR0_R {
HOST_IOT_KDR0_R::new(self.bits)
}
}
impl W {
#[doc = "Bits 0:31 - Write: K_DR bits 31:0 Read: 0x00000000 when 128-bit K_DR key value is not yet retained in the CRYPTOCELL AO power domain Read: 0x00000001 when 128-bit K_DR key value is successfully retained in the CRYPTOCELL AO power domain"]
#[inline(always)]
pub fn host_iot_kdr0(&mut self) -> HOST_IOT_KDR0_W<0> {
HOST_IOT_KDR0_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "This register holds bits 31:0 of K_DR. The value of this register is saved in the CRYPTOCELL AO power domain. Reading from this address returns the K_DR valid status indicating if K_DR is successfully retained.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [host_iot_kdr0](index.html) module"]
pub struct HOST_IOT_KDR0_SPEC;
impl crate::RegisterSpec for HOST_IOT_KDR0_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [host_iot_kdr0::R](R) reader structure"]
impl crate::Readable for HOST_IOT_KDR0_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [host_iot_kdr0::W](W) writer structure"]
impl crate::Writable for HOST_IOT_KDR0_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets HOST_IOT_KDR0 to value 0"]
impl crate::Resettable for HOST_IOT_KDR0_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/cc_host_rgf/host_iot_kdr1.rs
Vendored
+53
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@@ -0,0 +1,53 @@
#[doc = "Register `HOST_IOT_KDR1` writer"]
pub struct W(crate::W<HOST_IOT_KDR1_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<HOST_IOT_KDR1_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<HOST_IOT_KDR1_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<HOST_IOT_KDR1_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `HOST_IOT_KDR1` writer - K_DR bits 63:32"]
pub type HOST_IOT_KDR1_W<'a, const O: u8> =
crate::FieldWriter<'a, u32, HOST_IOT_KDR1_SPEC, u32, u32, 32, O>;
impl W {
#[doc = "Bits 0:31 - K_DR bits 63:32"]
#[inline(always)]
pub fn host_iot_kdr1(&mut self) -> HOST_IOT_KDR1_W<0> {
HOST_IOT_KDR1_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "This register holds bits 63:32 of K_DR. The value of this register is saved in the CRYPTOCELL AO power domain.\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [host_iot_kdr1](index.html) module"]
pub struct HOST_IOT_KDR1_SPEC;
impl crate::RegisterSpec for HOST_IOT_KDR1_SPEC {
type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [host_iot_kdr1::W](W) writer structure"]
impl crate::Writable for HOST_IOT_KDR1_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets HOST_IOT_KDR1 to value 0"]
impl crate::Resettable for HOST_IOT_KDR1_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/cc_host_rgf/host_iot_kdr2.rs
Vendored
+53
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@@ -0,0 +1,53 @@
#[doc = "Register `HOST_IOT_KDR2` writer"]
pub struct W(crate::W<HOST_IOT_KDR2_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<HOST_IOT_KDR2_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<HOST_IOT_KDR2_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<HOST_IOT_KDR2_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `HOST_IOT_KDR2` writer - K_DR bits 95:64"]
pub type HOST_IOT_KDR2_W<'a, const O: u8> =
crate::FieldWriter<'a, u32, HOST_IOT_KDR2_SPEC, u32, u32, 32, O>;
impl W {
#[doc = "Bits 0:31 - K_DR bits 95:64"]
#[inline(always)]
pub fn host_iot_kdr2(&mut self) -> HOST_IOT_KDR2_W<0> {
HOST_IOT_KDR2_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "This register holds bits 95:64 of K_DR. The value of this register is saved in the CRYPTOCELL AO power domain.\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [host_iot_kdr2](index.html) module"]
pub struct HOST_IOT_KDR2_SPEC;
impl crate::RegisterSpec for HOST_IOT_KDR2_SPEC {
type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [host_iot_kdr2::W](W) writer structure"]
impl crate::Writable for HOST_IOT_KDR2_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets HOST_IOT_KDR2 to value 0"]
impl crate::Resettable for HOST_IOT_KDR2_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/cc_host_rgf/host_iot_kdr3.rs
Vendored
+53
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@@ -0,0 +1,53 @@
#[doc = "Register `HOST_IOT_KDR3` writer"]
pub struct W(crate::W<HOST_IOT_KDR3_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<HOST_IOT_KDR3_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<HOST_IOT_KDR3_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<HOST_IOT_KDR3_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `HOST_IOT_KDR3` writer - K_DR bits 127:96"]
pub type HOST_IOT_KDR3_W<'a, const O: u8> =
crate::FieldWriter<'a, u32, HOST_IOT_KDR3_SPEC, u32, u32, 32, O>;
impl W {
#[doc = "Bits 0:31 - K_DR bits 127:96"]
#[inline(always)]
pub fn host_iot_kdr3(&mut self) -> HOST_IOT_KDR3_W<0> {
HOST_IOT_KDR3_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "This register holds bits 127:96 of K_DR. The value of this register is saved in the CRYPTOCELL AO power domain.\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [host_iot_kdr3](index.html) module"]
pub struct HOST_IOT_KDR3_SPEC;
impl crate::RegisterSpec for HOST_IOT_KDR3_SPEC {
type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [host_iot_kdr3::W](W) writer structure"]
impl crate::Writable for HOST_IOT_KDR3_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets HOST_IOT_KDR3 to value 0"]
impl crate::Resettable for HOST_IOT_KDR3_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/cc_host_rgf/host_iot_kprtl_lock.rs
Vendored
+127
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@@ -0,0 +1,127 @@
#[doc = "Register `HOST_IOT_KPRTL_LOCK` reader"]
pub struct R(crate::R<HOST_IOT_KPRTL_LOCK_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<HOST_IOT_KPRTL_LOCK_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<HOST_IOT_KPRTL_LOCK_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<HOST_IOT_KPRTL_LOCK_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `HOST_IOT_KPRTL_LOCK` writer"]
pub struct W(crate::W<HOST_IOT_KPRTL_LOCK_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<HOST_IOT_KPRTL_LOCK_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<HOST_IOT_KPRTL_LOCK_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<HOST_IOT_KPRTL_LOCK_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `HOST_IOT_KPRTL_LOCK` reader - This register is the K_PRTL lock register. When this register is set, K_PRTL can not be used and a zeroed key will be used instead. The value of this register is saved in the CRYPTOCELL AO power domain."]
pub type HOST_IOT_KPRTL_LOCK_R = crate::BitReader<HOST_IOT_KPRTL_LOCK_A>;
#[doc = "This register is the K_PRTL lock register. When this register is set, K_PRTL can not be used and a zeroed key will be used instead. The value of this register is saved in the CRYPTOCELL AO power domain.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum HOST_IOT_KPRTL_LOCK_A {
#[doc = "0: K_PRTL can be selected for use from register HOST_CRYPTOKEY_SEL"]
DISABLED = 0,
#[doc = "1: K_PRTL has been locked until next power-on reset (POR). If K_PRTL is selected anyway, a zeroed key will be used instead."]
ENABLED = 1,
}
impl From<HOST_IOT_KPRTL_LOCK_A> for bool {
#[inline(always)]
fn from(variant: HOST_IOT_KPRTL_LOCK_A) -> Self {
variant as u8 != 0
}
}
impl HOST_IOT_KPRTL_LOCK_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> HOST_IOT_KPRTL_LOCK_A {
match self.bits {
false => HOST_IOT_KPRTL_LOCK_A::DISABLED,
true => HOST_IOT_KPRTL_LOCK_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == HOST_IOT_KPRTL_LOCK_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == HOST_IOT_KPRTL_LOCK_A::ENABLED
}
}
#[doc = "Field `HOST_IOT_KPRTL_LOCK` writer - This register is the K_PRTL lock register. When this register is set, K_PRTL can not be used and a zeroed key will be used instead. The value of this register is saved in the CRYPTOCELL AO power domain."]
pub type HOST_IOT_KPRTL_LOCK_W<'a, const O: u8> =
crate::BitWriter<'a, u32, HOST_IOT_KPRTL_LOCK_SPEC, HOST_IOT_KPRTL_LOCK_A, O>;
impl<'a, const O: u8> HOST_IOT_KPRTL_LOCK_W<'a, O> {
#[doc = "K_PRTL can be selected for use from register HOST_CRYPTOKEY_SEL"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(HOST_IOT_KPRTL_LOCK_A::DISABLED)
}
#[doc = "K_PRTL has been locked until next power-on reset (POR). If K_PRTL is selected anyway, a zeroed key will be used instead."]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(HOST_IOT_KPRTL_LOCK_A::ENABLED)
}
}
impl R {
#[doc = "Bit 0 - This register is the K_PRTL lock register. When this register is set, K_PRTL can not be used and a zeroed key will be used instead. The value of this register is saved in the CRYPTOCELL AO power domain."]
#[inline(always)]
pub fn host_iot_kprtl_lock(&self) -> HOST_IOT_KPRTL_LOCK_R {
HOST_IOT_KPRTL_LOCK_R::new((self.bits & 1) != 0)
}
}
impl W {
#[doc = "Bit 0 - This register is the K_PRTL lock register. When this register is set, K_PRTL can not be used and a zeroed key will be used instead. The value of this register is saved in the CRYPTOCELL AO power domain."]
#[inline(always)]
pub fn host_iot_kprtl_lock(&mut self) -> HOST_IOT_KPRTL_LOCK_W<0> {
HOST_IOT_KPRTL_LOCK_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "This write-once register is the K_PRTL lock register. When this register is set, K_PRTL can not be used and a zeroed key will be used instead. The value of this register is saved in the CRYPTOCELL AO power domain.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [host_iot_kprtl_lock](index.html) module"]
pub struct HOST_IOT_KPRTL_LOCK_SPEC;
impl crate::RegisterSpec for HOST_IOT_KPRTL_LOCK_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [host_iot_kprtl_lock::R](R) reader structure"]
impl crate::Readable for HOST_IOT_KPRTL_LOCK_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [host_iot_kprtl_lock::W](W) writer structure"]
impl crate::Writable for HOST_IOT_KPRTL_LOCK_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets HOST_IOT_KPRTL_LOCK to value 0"]
impl crate::Resettable for HOST_IOT_KPRTL_LOCK_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/cc_host_rgf/host_iot_lcs.rs
Vendored
+189
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#[doc = "Register `HOST_IOT_LCS` reader"]
pub struct R(crate::R<HOST_IOT_LCS_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<HOST_IOT_LCS_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<HOST_IOT_LCS_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<HOST_IOT_LCS_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `HOST_IOT_LCS` writer"]
pub struct W(crate::W<HOST_IOT_LCS_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<HOST_IOT_LCS_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<HOST_IOT_LCS_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<HOST_IOT_LCS_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `LCS` reader - Lifecycle state value. This field is write-once per reset."]
pub type LCS_R = crate::FieldReader<u8, LCS_A>;
#[doc = "Lifecycle state value. This field is write-once per reset.\n\nValue on reset: 2"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum LCS_A {
#[doc = "0: CC310 operates in debug mode"]
DEBUG = 0,
#[doc = "2: CC310 operates in secure mode"]
SECURE = 2,
}
impl From<LCS_A> for u8 {
#[inline(always)]
fn from(variant: LCS_A) -> Self {
variant as _
}
}
impl LCS_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> Option<LCS_A> {
match self.bits {
0 => Some(LCS_A::DEBUG),
2 => Some(LCS_A::SECURE),
_ => None,
}
}
#[doc = "Checks if the value of the field is `DEBUG`"]
#[inline(always)]
pub fn is_debug(&self) -> bool {
*self == LCS_A::DEBUG
}
#[doc = "Checks if the value of the field is `SECURE`"]
#[inline(always)]
pub fn is_secure(&self) -> bool {
*self == LCS_A::SECURE
}
}
#[doc = "Field `LCS` writer - Lifecycle state value. This field is write-once per reset."]
pub type LCS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, HOST_IOT_LCS_SPEC, u8, LCS_A, 3, O>;
impl<'a, const O: u8> LCS_W<'a, O> {
#[doc = "CC310 operates in debug mode"]
#[inline(always)]
pub fn debug(self) -> &'a mut W {
self.variant(LCS_A::DEBUG)
}
#[doc = "CC310 operates in secure mode"]
#[inline(always)]
pub fn secure(self) -> &'a mut W {
self.variant(LCS_A::SECURE)
}
}
#[doc = "Field `LCS_IS_VALID` reader - This field is read-only and indicates if CRYPTOCELL LCS has been successfully configured since last reset"]
pub type LCS_IS_VALID_R = crate::BitReader<LCS_IS_VALID_A>;
#[doc = "This field is read-only and indicates if CRYPTOCELL LCS has been successfully configured since last reset\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum LCS_IS_VALID_A {
#[doc = "0: A valid LCS is not yet retained in the CRYPTOCELL AO power domain"]
INVALID = 0,
#[doc = "1: A valid LCS is successfully retained in the CRYPTOCELL AO power domain"]
VALID = 1,
}
impl From<LCS_IS_VALID_A> for bool {
#[inline(always)]
fn from(variant: LCS_IS_VALID_A) -> Self {
variant as u8 != 0
}
}
impl LCS_IS_VALID_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> LCS_IS_VALID_A {
match self.bits {
false => LCS_IS_VALID_A::INVALID,
true => LCS_IS_VALID_A::VALID,
}
}
#[doc = "Checks if the value of the field is `INVALID`"]
#[inline(always)]
pub fn is_invalid(&self) -> bool {
*self == LCS_IS_VALID_A::INVALID
}
#[doc = "Checks if the value of the field is `VALID`"]
#[inline(always)]
pub fn is_valid(&self) -> bool {
*self == LCS_IS_VALID_A::VALID
}
}
#[doc = "Field `LCS_IS_VALID` writer - This field is read-only and indicates if CRYPTOCELL LCS has been successfully configured since last reset"]
pub type LCS_IS_VALID_W<'a, const O: u8> =
crate::BitWriter<'a, u32, HOST_IOT_LCS_SPEC, LCS_IS_VALID_A, O>;
impl<'a, const O: u8> LCS_IS_VALID_W<'a, O> {
#[doc = "A valid LCS is not yet retained in the CRYPTOCELL AO power domain"]
#[inline(always)]
pub fn invalid(self) -> &'a mut W {
self.variant(LCS_IS_VALID_A::INVALID)
}
#[doc = "A valid LCS is successfully retained in the CRYPTOCELL AO power domain"]
#[inline(always)]
pub fn valid(self) -> &'a mut W {
self.variant(LCS_IS_VALID_A::VALID)
}
}
impl R {
#[doc = "Bits 0:2 - Lifecycle state value. This field is write-once per reset."]
#[inline(always)]
pub fn lcs(&self) -> LCS_R {
LCS_R::new((self.bits & 7) as u8)
}
#[doc = "Bit 8 - This field is read-only and indicates if CRYPTOCELL LCS has been successfully configured since last reset"]
#[inline(always)]
pub fn lcs_is_valid(&self) -> LCS_IS_VALID_R {
LCS_IS_VALID_R::new(((self.bits >> 8) & 1) != 0)
}
}
impl W {
#[doc = "Bits 0:2 - Lifecycle state value. This field is write-once per reset."]
#[inline(always)]
pub fn lcs(&mut self) -> LCS_W<0> {
LCS_W::new(self)
}
#[doc = "Bit 8 - This field is read-only and indicates if CRYPTOCELL LCS has been successfully configured since last reset"]
#[inline(always)]
pub fn lcs_is_valid(&mut self) -> LCS_IS_VALID_W<8> {
LCS_IS_VALID_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Controls lifecycle state (LCS) for CRYPTOCELL subsystem\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [host_iot_lcs](index.html) module"]
pub struct HOST_IOT_LCS_SPEC;
impl crate::RegisterSpec for HOST_IOT_LCS_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [host_iot_lcs::R](R) reader structure"]
impl crate::Readable for HOST_IOT_LCS_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [host_iot_lcs::W](W) writer structure"]
impl crate::Writable for HOST_IOT_LCS_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets HOST_IOT_LCS to value 0x02"]
impl crate::Resettable for HOST_IOT_LCS_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0x02
}
}
vendor/nrf52840-pac/src/ccm.rs
Vendored
+123
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#[doc = r"Register block"]
#[repr(C)]
pub struct RegisterBlock {
#[doc = "0x00 - Start generation of key-stream. This operation will stop by itself when completed."]
pub tasks_ksgen: TASKS_KSGEN,
#[doc = "0x04 - Start encryption/decryption. This operation will stop by itself when completed."]
pub tasks_crypt: TASKS_CRYPT,
#[doc = "0x08 - Stop encryption/decryption"]
pub tasks_stop: TASKS_STOP,
#[doc = "0x0c - Override DATARATE setting in MODE register with the contents of the RATEOVERRIDE register for any ongoing encryption/decryption"]
pub tasks_rateoverride: TASKS_RATEOVERRIDE,
_reserved4: [u8; 0xf0],
#[doc = "0x100 - Key-stream generation complete"]
pub events_endksgen: EVENTS_ENDKSGEN,
#[doc = "0x104 - Encrypt/decrypt complete"]
pub events_endcrypt: EVENTS_ENDCRYPT,
#[doc = "0x108 - Deprecated register - CCM error event"]
pub events_error: EVENTS_ERROR,
_reserved7: [u8; 0xf4],
#[doc = "0x200 - Shortcut register"]
pub shorts: SHORTS,
_reserved8: [u8; 0x0100],
#[doc = "0x304 - Enable interrupt"]
pub intenset: INTENSET,
#[doc = "0x308 - Disable interrupt"]
pub intenclr: INTENCLR,
_reserved10: [u8; 0xf4],
#[doc = "0x400 - MIC check result"]
pub micstatus: MICSTATUS,
_reserved11: [u8; 0xfc],
#[doc = "0x500 - Enable"]
pub enable: ENABLE,
#[doc = "0x504 - Operation mode"]
pub mode: MODE,
#[doc = "0x508 - Pointer to data structure holding AES key and NONCE vector"]
pub cnfptr: CNFPTR,
#[doc = "0x50c - Input pointer"]
pub inptr: INPTR,
#[doc = "0x510 - Output pointer"]
pub outptr: OUTPTR,
#[doc = "0x514 - Pointer to data area used for temporary storage"]
pub scratchptr: SCRATCHPTR,
#[doc = "0x518 - Length of key-stream generated when MODE.LENGTH = Extended."]
pub maxpacketsize: MAXPACKETSIZE,
#[doc = "0x51c - Data rate override setting."]
pub rateoverride: RATEOVERRIDE,
}
#[doc = "TASKS_KSGEN (w) register accessor: an alias for `Reg<TASKS_KSGEN_SPEC>`"]
pub type TASKS_KSGEN = crate::Reg<tasks_ksgen::TASKS_KSGEN_SPEC>;
#[doc = "Start generation of key-stream. This operation will stop by itself when completed."]
pub mod tasks_ksgen;
#[doc = "TASKS_CRYPT (w) register accessor: an alias for `Reg<TASKS_CRYPT_SPEC>`"]
pub type TASKS_CRYPT = crate::Reg<tasks_crypt::TASKS_CRYPT_SPEC>;
#[doc = "Start encryption/decryption. This operation will stop by itself when completed."]
pub mod tasks_crypt;
#[doc = "TASKS_STOP (w) register accessor: an alias for `Reg<TASKS_STOP_SPEC>`"]
pub type TASKS_STOP = crate::Reg<tasks_stop::TASKS_STOP_SPEC>;
#[doc = "Stop encryption/decryption"]
pub mod tasks_stop;
#[doc = "TASKS_RATEOVERRIDE (w) register accessor: an alias for `Reg<TASKS_RATEOVERRIDE_SPEC>`"]
pub type TASKS_RATEOVERRIDE = crate::Reg<tasks_rateoverride::TASKS_RATEOVERRIDE_SPEC>;
#[doc = "Override DATARATE setting in MODE register with the contents of the RATEOVERRIDE register for any ongoing encryption/decryption"]
pub mod tasks_rateoverride;
#[doc = "EVENTS_ENDKSGEN (rw) register accessor: an alias for `Reg<EVENTS_ENDKSGEN_SPEC>`"]
pub type EVENTS_ENDKSGEN = crate::Reg<events_endksgen::EVENTS_ENDKSGEN_SPEC>;
#[doc = "Key-stream generation complete"]
pub mod events_endksgen;
#[doc = "EVENTS_ENDCRYPT (rw) register accessor: an alias for `Reg<EVENTS_ENDCRYPT_SPEC>`"]
pub type EVENTS_ENDCRYPT = crate::Reg<events_endcrypt::EVENTS_ENDCRYPT_SPEC>;
#[doc = "Encrypt/decrypt complete"]
pub mod events_endcrypt;
#[doc = "EVENTS_ERROR (rw) register accessor: an alias for `Reg<EVENTS_ERROR_SPEC>`"]
pub type EVENTS_ERROR = crate::Reg<events_error::EVENTS_ERROR_SPEC>;
#[doc = "Deprecated register - CCM error event"]
pub mod events_error;
#[doc = "SHORTS (rw) register accessor: an alias for `Reg<SHORTS_SPEC>`"]
pub type SHORTS = crate::Reg<shorts::SHORTS_SPEC>;
#[doc = "Shortcut register"]
pub mod shorts;
#[doc = "INTENSET (rw) register accessor: an alias for `Reg<INTENSET_SPEC>`"]
pub type INTENSET = crate::Reg<intenset::INTENSET_SPEC>;
#[doc = "Enable interrupt"]
pub mod intenset;
#[doc = "INTENCLR (rw) register accessor: an alias for `Reg<INTENCLR_SPEC>`"]
pub type INTENCLR = crate::Reg<intenclr::INTENCLR_SPEC>;
#[doc = "Disable interrupt"]
pub mod intenclr;
#[doc = "MICSTATUS (r) register accessor: an alias for `Reg<MICSTATUS_SPEC>`"]
pub type MICSTATUS = crate::Reg<micstatus::MICSTATUS_SPEC>;
#[doc = "MIC check result"]
pub mod micstatus;
#[doc = "ENABLE (rw) register accessor: an alias for `Reg<ENABLE_SPEC>`"]
pub type ENABLE = crate::Reg<enable::ENABLE_SPEC>;
#[doc = "Enable"]
pub mod enable;
#[doc = "MODE (rw) register accessor: an alias for `Reg<MODE_SPEC>`"]
pub type MODE = crate::Reg<mode::MODE_SPEC>;
#[doc = "Operation mode"]
pub mod mode;
#[doc = "CNFPTR (rw) register accessor: an alias for `Reg<CNFPTR_SPEC>`"]
pub type CNFPTR = crate::Reg<cnfptr::CNFPTR_SPEC>;
#[doc = "Pointer to data structure holding AES key and NONCE vector"]
pub mod cnfptr;
#[doc = "INPTR (rw) register accessor: an alias for `Reg<INPTR_SPEC>`"]
pub type INPTR = crate::Reg<inptr::INPTR_SPEC>;
#[doc = "Input pointer"]
pub mod inptr;
#[doc = "OUTPTR (rw) register accessor: an alias for `Reg<OUTPTR_SPEC>`"]
pub type OUTPTR = crate::Reg<outptr::OUTPTR_SPEC>;
#[doc = "Output pointer"]
pub mod outptr;
#[doc = "SCRATCHPTR (rw) register accessor: an alias for `Reg<SCRATCHPTR_SPEC>`"]
pub type SCRATCHPTR = crate::Reg<scratchptr::SCRATCHPTR_SPEC>;
#[doc = "Pointer to data area used for temporary storage"]
pub mod scratchptr;
#[doc = "MAXPACKETSIZE (rw) register accessor: an alias for `Reg<MAXPACKETSIZE_SPEC>`"]
pub type MAXPACKETSIZE = crate::Reg<maxpacketsize::MAXPACKETSIZE_SPEC>;
#[doc = "Length of key-stream generated when MODE.LENGTH = Extended."]
pub mod maxpacketsize;
#[doc = "RATEOVERRIDE (rw) register accessor: an alias for `Reg<RATEOVERRIDE_SPEC>`"]
pub type RATEOVERRIDE = crate::Reg<rateoverride::RATEOVERRIDE_SPEC>;
#[doc = "Data rate override setting."]
pub mod rateoverride;
vendor/nrf52840-pac/src/ccm/cnfptr.rs
Vendored
+80
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@@ -0,0 +1,80 @@
#[doc = "Register `CNFPTR` reader"]
pub struct R(crate::R<CNFPTR_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<CNFPTR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<CNFPTR_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<CNFPTR_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `CNFPTR` writer"]
pub struct W(crate::W<CNFPTR_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<CNFPTR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<CNFPTR_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<CNFPTR_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `CNFPTR` reader - Pointer to the data structure holding the AES key and the CCM NONCE vector (see Table 1 CCM data structure overview)"]
pub type CNFPTR_R = crate::FieldReader<u32, u32>;
#[doc = "Field `CNFPTR` writer - Pointer to the data structure holding the AES key and the CCM NONCE vector (see Table 1 CCM data structure overview)"]
pub type CNFPTR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CNFPTR_SPEC, u32, u32, 32, O>;
impl R {
#[doc = "Bits 0:31 - Pointer to the data structure holding the AES key and the CCM NONCE vector (see Table 1 CCM data structure overview)"]
#[inline(always)]
pub fn cnfptr(&self) -> CNFPTR_R {
CNFPTR_R::new(self.bits)
}
}
impl W {
#[doc = "Bits 0:31 - Pointer to the data structure holding the AES key and the CCM NONCE vector (see Table 1 CCM data structure overview)"]
#[inline(always)]
pub fn cnfptr(&mut self) -> CNFPTR_W<0> {
CNFPTR_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Pointer to data structure holding AES key and NONCE vector\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnfptr](index.html) module"]
pub struct CNFPTR_SPEC;
impl crate::RegisterSpec for CNFPTR_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [cnfptr::R](R) reader structure"]
impl crate::Readable for CNFPTR_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [cnfptr::W](W) writer structure"]
impl crate::Writable for CNFPTR_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets CNFPTR to value 0"]
impl crate::Resettable for CNFPTR_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/ccm/enable.rs
Vendored
+128
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@@ -0,0 +1,128 @@
#[doc = "Register `ENABLE` reader"]
pub struct R(crate::R<ENABLE_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<ENABLE_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<ENABLE_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<ENABLE_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `ENABLE` writer"]
pub struct W(crate::W<ENABLE_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<ENABLE_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<ENABLE_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<ENABLE_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `ENABLE` reader - Enable or disable CCM"]
pub type ENABLE_R = crate::FieldReader<u8, ENABLE_A>;
#[doc = "Enable or disable CCM\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum ENABLE_A {
#[doc = "0: Disable"]
DISABLED = 0,
#[doc = "2: Enable"]
ENABLED = 2,
}
impl From<ENABLE_A> for u8 {
#[inline(always)]
fn from(variant: ENABLE_A) -> Self {
variant as _
}
}
impl ENABLE_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> Option<ENABLE_A> {
match self.bits {
0 => Some(ENABLE_A::DISABLED),
2 => Some(ENABLE_A::ENABLED),
_ => None,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == ENABLE_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == ENABLE_A::ENABLED
}
}
#[doc = "Field `ENABLE` writer - Enable or disable CCM"]
pub type ENABLE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ENABLE_SPEC, u8, ENABLE_A, 2, O>;
impl<'a, const O: u8> ENABLE_W<'a, O> {
#[doc = "Disable"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(ENABLE_A::DISABLED)
}
#[doc = "Enable"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(ENABLE_A::ENABLED)
}
}
impl R {
#[doc = "Bits 0:1 - Enable or disable CCM"]
#[inline(always)]
pub fn enable(&self) -> ENABLE_R {
ENABLE_R::new((self.bits & 3) as u8)
}
}
impl W {
#[doc = "Bits 0:1 - Enable or disable CCM"]
#[inline(always)]
pub fn enable(&mut self) -> ENABLE_W<0> {
ENABLE_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [enable](index.html) module"]
pub struct ENABLE_SPEC;
impl crate::RegisterSpec for ENABLE_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [enable::R](R) reader structure"]
impl crate::Readable for ENABLE_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [enable::W](W) writer structure"]
impl crate::Writable for ENABLE_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets ENABLE to value 0"]
impl crate::Resettable for ENABLE_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/ccm/events_endcrypt.rs
Vendored
+81
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#[doc = "Register `EVENTS_ENDCRYPT` reader"]
pub struct R(crate::R<EVENTS_ENDCRYPT_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<EVENTS_ENDCRYPT_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<EVENTS_ENDCRYPT_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<EVENTS_ENDCRYPT_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `EVENTS_ENDCRYPT` writer"]
pub struct W(crate::W<EVENTS_ENDCRYPT_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<EVENTS_ENDCRYPT_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<EVENTS_ENDCRYPT_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<EVENTS_ENDCRYPT_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `EVENTS_ENDCRYPT` reader - "]
pub type EVENTS_ENDCRYPT_R = crate::BitReader<bool>;
#[doc = "Field `EVENTS_ENDCRYPT` writer - "]
pub type EVENTS_ENDCRYPT_W<'a, const O: u8> =
crate::BitWriter<'a, u32, EVENTS_ENDCRYPT_SPEC, bool, O>;
impl R {
#[doc = "Bit 0"]
#[inline(always)]
pub fn events_endcrypt(&self) -> EVENTS_ENDCRYPT_R {
EVENTS_ENDCRYPT_R::new((self.bits & 1) != 0)
}
}
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn events_endcrypt(&mut self) -> EVENTS_ENDCRYPT_W<0> {
EVENTS_ENDCRYPT_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Encrypt/decrypt complete\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_endcrypt](index.html) module"]
pub struct EVENTS_ENDCRYPT_SPEC;
impl crate::RegisterSpec for EVENTS_ENDCRYPT_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [events_endcrypt::R](R) reader structure"]
impl crate::Readable for EVENTS_ENDCRYPT_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [events_endcrypt::W](W) writer structure"]
impl crate::Writable for EVENTS_ENDCRYPT_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets EVENTS_ENDCRYPT to value 0"]
impl crate::Resettable for EVENTS_ENDCRYPT_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/ccm/events_endksgen.rs
Vendored
+81
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#[doc = "Register `EVENTS_ENDKSGEN` reader"]
pub struct R(crate::R<EVENTS_ENDKSGEN_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<EVENTS_ENDKSGEN_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<EVENTS_ENDKSGEN_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<EVENTS_ENDKSGEN_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `EVENTS_ENDKSGEN` writer"]
pub struct W(crate::W<EVENTS_ENDKSGEN_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<EVENTS_ENDKSGEN_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<EVENTS_ENDKSGEN_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<EVENTS_ENDKSGEN_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `EVENTS_ENDKSGEN` reader - "]
pub type EVENTS_ENDKSGEN_R = crate::BitReader<bool>;
#[doc = "Field `EVENTS_ENDKSGEN` writer - "]
pub type EVENTS_ENDKSGEN_W<'a, const O: u8> =
crate::BitWriter<'a, u32, EVENTS_ENDKSGEN_SPEC, bool, O>;
impl R {
#[doc = "Bit 0"]
#[inline(always)]
pub fn events_endksgen(&self) -> EVENTS_ENDKSGEN_R {
EVENTS_ENDKSGEN_R::new((self.bits & 1) != 0)
}
}
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn events_endksgen(&mut self) -> EVENTS_ENDKSGEN_W<0> {
EVENTS_ENDKSGEN_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Key-stream generation complete\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_endksgen](index.html) module"]
pub struct EVENTS_ENDKSGEN_SPEC;
impl crate::RegisterSpec for EVENTS_ENDKSGEN_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [events_endksgen::R](R) reader structure"]
impl crate::Readable for EVENTS_ENDKSGEN_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [events_endksgen::W](W) writer structure"]
impl crate::Writable for EVENTS_ENDKSGEN_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets EVENTS_ENDKSGEN to value 0"]
impl crate::Resettable for EVENTS_ENDKSGEN_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/ccm/events_error.rs
Vendored
+80
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@@ -0,0 +1,80 @@
#[doc = "Register `EVENTS_ERROR` reader"]
pub struct R(crate::R<EVENTS_ERROR_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<EVENTS_ERROR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<EVENTS_ERROR_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<EVENTS_ERROR_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `EVENTS_ERROR` writer"]
pub struct W(crate::W<EVENTS_ERROR_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<EVENTS_ERROR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<EVENTS_ERROR_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<EVENTS_ERROR_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `EVENTS_ERROR` reader - "]
pub type EVENTS_ERROR_R = crate::BitReader<bool>;
#[doc = "Field `EVENTS_ERROR` writer - "]
pub type EVENTS_ERROR_W<'a, const O: u8> = crate::BitWriter<'a, u32, EVENTS_ERROR_SPEC, bool, O>;
impl R {
#[doc = "Bit 0"]
#[inline(always)]
pub fn events_error(&self) -> EVENTS_ERROR_R {
EVENTS_ERROR_R::new((self.bits & 1) != 0)
}
}
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn events_error(&mut self) -> EVENTS_ERROR_W<0> {
EVENTS_ERROR_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Deprecated register - CCM error event\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_error](index.html) module"]
pub struct EVENTS_ERROR_SPEC;
impl crate::RegisterSpec for EVENTS_ERROR_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [events_error::R](R) reader structure"]
impl crate::Readable for EVENTS_ERROR_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [events_error::W](W) writer structure"]
impl crate::Writable for EVENTS_ERROR_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets EVENTS_ERROR to value 0"]
impl crate::Resettable for EVENTS_ERROR_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/ccm/inptr.rs
Vendored
+80
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@@ -0,0 +1,80 @@
#[doc = "Register `INPTR` reader"]
pub struct R(crate::R<INPTR_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<INPTR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<INPTR_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<INPTR_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `INPTR` writer"]
pub struct W(crate::W<INPTR_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<INPTR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<INPTR_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<INPTR_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `INPTR` reader - Input pointer"]
pub type INPTR_R = crate::FieldReader<u32, u32>;
#[doc = "Field `INPTR` writer - Input pointer"]
pub type INPTR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, INPTR_SPEC, u32, u32, 32, O>;
impl R {
#[doc = "Bits 0:31 - Input pointer"]
#[inline(always)]
pub fn inptr(&self) -> INPTR_R {
INPTR_R::new(self.bits)
}
}
impl W {
#[doc = "Bits 0:31 - Input pointer"]
#[inline(always)]
pub fn inptr(&mut self) -> INPTR_W<0> {
INPTR_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Input pointer\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [inptr](index.html) module"]
pub struct INPTR_SPEC;
impl crate::RegisterSpec for INPTR_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [inptr::R](R) reader structure"]
impl crate::Readable for INPTR_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [inptr::W](W) writer structure"]
impl crate::Writable for INPTR_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets INPTR to value 0"]
impl crate::Resettable for INPTR_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/ccm/intenclr.rs
Vendored
+267
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@@ -0,0 +1,267 @@
#[doc = "Register `INTENCLR` reader"]
pub struct R(crate::R<INTENCLR_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<INTENCLR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<INTENCLR_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<INTENCLR_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `INTENCLR` writer"]
pub struct W(crate::W<INTENCLR_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<INTENCLR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<INTENCLR_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<INTENCLR_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `ENDKSGEN` reader - Write '1' to disable interrupt for ENDKSGEN event"]
pub type ENDKSGEN_R = crate::BitReader<ENDKSGEN_A>;
#[doc = "Write '1' to disable interrupt for ENDKSGEN event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ENDKSGEN_A {
#[doc = "0: Read: Disabled"]
DISABLED = 0,
#[doc = "1: Read: Enabled"]
ENABLED = 1,
}
impl From<ENDKSGEN_A> for bool {
#[inline(always)]
fn from(variant: ENDKSGEN_A) -> Self {
variant as u8 != 0
}
}
impl ENDKSGEN_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> ENDKSGEN_A {
match self.bits {
false => ENDKSGEN_A::DISABLED,
true => ENDKSGEN_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == ENDKSGEN_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == ENDKSGEN_A::ENABLED
}
}
#[doc = "Write '1' to disable interrupt for ENDKSGEN event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ENDKSGEN_AW {
#[doc = "1: Disable"]
CLEAR = 1,
}
impl From<ENDKSGEN_AW> for bool {
#[inline(always)]
fn from(variant: ENDKSGEN_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `ENDKSGEN` writer - Write '1' to disable interrupt for ENDKSGEN event"]
pub type ENDKSGEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, ENDKSGEN_AW, O>;
impl<'a, const O: u8> ENDKSGEN_W<'a, O> {
#[doc = "Disable"]
#[inline(always)]
pub fn clear(self) -> &'a mut W {
self.variant(ENDKSGEN_AW::CLEAR)
}
}
#[doc = "Field `ENDCRYPT` reader - Write '1' to disable interrupt for ENDCRYPT event"]
pub type ENDCRYPT_R = crate::BitReader<ENDCRYPT_A>;
#[doc = "Write '1' to disable interrupt for ENDCRYPT event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ENDCRYPT_A {
#[doc = "0: Read: Disabled"]
DISABLED = 0,
#[doc = "1: Read: Enabled"]
ENABLED = 1,
}
impl From<ENDCRYPT_A> for bool {
#[inline(always)]
fn from(variant: ENDCRYPT_A) -> Self {
variant as u8 != 0
}
}
impl ENDCRYPT_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> ENDCRYPT_A {
match self.bits {
false => ENDCRYPT_A::DISABLED,
true => ENDCRYPT_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == ENDCRYPT_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == ENDCRYPT_A::ENABLED
}
}
#[doc = "Write '1' to disable interrupt for ENDCRYPT event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ENDCRYPT_AW {
#[doc = "1: Disable"]
CLEAR = 1,
}
impl From<ENDCRYPT_AW> for bool {
#[inline(always)]
fn from(variant: ENDCRYPT_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `ENDCRYPT` writer - Write '1' to disable interrupt for ENDCRYPT event"]
pub type ENDCRYPT_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, ENDCRYPT_AW, O>;
impl<'a, const O: u8> ENDCRYPT_W<'a, O> {
#[doc = "Disable"]
#[inline(always)]
pub fn clear(self) -> &'a mut W {
self.variant(ENDCRYPT_AW::CLEAR)
}
}
#[doc = "Field `ERROR` reader - Write '1' to disable interrupt for ERROR event"]
pub type ERROR_R = crate::BitReader<ERROR_A>;
#[doc = "Write '1' to disable interrupt for ERROR event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ERROR_A {
#[doc = "0: Read: Disabled"]
DISABLED = 0,
#[doc = "1: Read: Enabled"]
ENABLED = 1,
}
impl From<ERROR_A> for bool {
#[inline(always)]
fn from(variant: ERROR_A) -> Self {
variant as u8 != 0
}
}
impl ERROR_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> ERROR_A {
match self.bits {
false => ERROR_A::DISABLED,
true => ERROR_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == ERROR_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == ERROR_A::ENABLED
}
}
#[doc = "Write '1' to disable interrupt for ERROR event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ERROR_AW {
#[doc = "1: Disable"]
CLEAR = 1,
}
impl From<ERROR_AW> for bool {
#[inline(always)]
fn from(variant: ERROR_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `ERROR` writer - Write '1' to disable interrupt for ERROR event"]
pub type ERROR_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, ERROR_AW, O>;
impl<'a, const O: u8> ERROR_W<'a, O> {
#[doc = "Disable"]
#[inline(always)]
pub fn clear(self) -> &'a mut W {
self.variant(ERROR_AW::CLEAR)
}
}
impl R {
#[doc = "Bit 0 - Write '1' to disable interrupt for ENDKSGEN event"]
#[inline(always)]
pub fn endksgen(&self) -> ENDKSGEN_R {
ENDKSGEN_R::new((self.bits & 1) != 0)
}
#[doc = "Bit 1 - Write '1' to disable interrupt for ENDCRYPT event"]
#[inline(always)]
pub fn endcrypt(&self) -> ENDCRYPT_R {
ENDCRYPT_R::new(((self.bits >> 1) & 1) != 0)
}
#[doc = "Bit 2 - Write '1' to disable interrupt for ERROR event"]
#[inline(always)]
pub fn error(&self) -> ERROR_R {
ERROR_R::new(((self.bits >> 2) & 1) != 0)
}
}
impl W {
#[doc = "Bit 0 - Write '1' to disable interrupt for ENDKSGEN event"]
#[inline(always)]
pub fn endksgen(&mut self) -> ENDKSGEN_W<0> {
ENDKSGEN_W::new(self)
}
#[doc = "Bit 1 - Write '1' to disable interrupt for ENDCRYPT event"]
#[inline(always)]
pub fn endcrypt(&mut self) -> ENDCRYPT_W<1> {
ENDCRYPT_W::new(self)
}
#[doc = "Bit 2 - Write '1' to disable interrupt for ERROR event"]
#[inline(always)]
pub fn error(&mut self) -> ERROR_W<2> {
ERROR_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Disable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"]
pub struct INTENCLR_SPEC;
impl crate::RegisterSpec for INTENCLR_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [intenclr::R](R) reader structure"]
impl crate::Readable for INTENCLR_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"]
impl crate::Writable for INTENCLR_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets INTENCLR to value 0"]
impl crate::Resettable for INTENCLR_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/ccm/intenset.rs
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#[doc = "Register `INTENSET` reader"]
pub struct R(crate::R<INTENSET_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<INTENSET_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<INTENSET_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<INTENSET_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `INTENSET` writer"]
pub struct W(crate::W<INTENSET_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<INTENSET_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<INTENSET_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<INTENSET_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `ENDKSGEN` reader - Write '1' to enable interrupt for ENDKSGEN event"]
pub type ENDKSGEN_R = crate::BitReader<ENDKSGEN_A>;
#[doc = "Write '1' to enable interrupt for ENDKSGEN event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ENDKSGEN_A {
#[doc = "0: Read: Disabled"]
DISABLED = 0,
#[doc = "1: Read: Enabled"]
ENABLED = 1,
}
impl From<ENDKSGEN_A> for bool {
#[inline(always)]
fn from(variant: ENDKSGEN_A) -> Self {
variant as u8 != 0
}
}
impl ENDKSGEN_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> ENDKSGEN_A {
match self.bits {
false => ENDKSGEN_A::DISABLED,
true => ENDKSGEN_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == ENDKSGEN_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == ENDKSGEN_A::ENABLED
}
}
#[doc = "Write '1' to enable interrupt for ENDKSGEN event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ENDKSGEN_AW {
#[doc = "1: Enable"]
SET = 1,
}
impl From<ENDKSGEN_AW> for bool {
#[inline(always)]
fn from(variant: ENDKSGEN_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `ENDKSGEN` writer - Write '1' to enable interrupt for ENDKSGEN event"]
pub type ENDKSGEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, ENDKSGEN_AW, O>;
impl<'a, const O: u8> ENDKSGEN_W<'a, O> {
#[doc = "Enable"]
#[inline(always)]
pub fn set(self) -> &'a mut W {
self.variant(ENDKSGEN_AW::SET)
}
}
#[doc = "Field `ENDCRYPT` reader - Write '1' to enable interrupt for ENDCRYPT event"]
pub type ENDCRYPT_R = crate::BitReader<ENDCRYPT_A>;
#[doc = "Write '1' to enable interrupt for ENDCRYPT event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ENDCRYPT_A {
#[doc = "0: Read: Disabled"]
DISABLED = 0,
#[doc = "1: Read: Enabled"]
ENABLED = 1,
}
impl From<ENDCRYPT_A> for bool {
#[inline(always)]
fn from(variant: ENDCRYPT_A) -> Self {
variant as u8 != 0
}
}
impl ENDCRYPT_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> ENDCRYPT_A {
match self.bits {
false => ENDCRYPT_A::DISABLED,
true => ENDCRYPT_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == ENDCRYPT_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == ENDCRYPT_A::ENABLED
}
}
#[doc = "Write '1' to enable interrupt for ENDCRYPT event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ENDCRYPT_AW {
#[doc = "1: Enable"]
SET = 1,
}
impl From<ENDCRYPT_AW> for bool {
#[inline(always)]
fn from(variant: ENDCRYPT_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `ENDCRYPT` writer - Write '1' to enable interrupt for ENDCRYPT event"]
pub type ENDCRYPT_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, ENDCRYPT_AW, O>;
impl<'a, const O: u8> ENDCRYPT_W<'a, O> {
#[doc = "Enable"]
#[inline(always)]
pub fn set(self) -> &'a mut W {
self.variant(ENDCRYPT_AW::SET)
}
}
#[doc = "Field `ERROR` reader - Write '1' to enable interrupt for ERROR event"]
pub type ERROR_R = crate::BitReader<ERROR_A>;
#[doc = "Write '1' to enable interrupt for ERROR event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ERROR_A {
#[doc = "0: Read: Disabled"]
DISABLED = 0,
#[doc = "1: Read: Enabled"]
ENABLED = 1,
}
impl From<ERROR_A> for bool {
#[inline(always)]
fn from(variant: ERROR_A) -> Self {
variant as u8 != 0
}
}
impl ERROR_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> ERROR_A {
match self.bits {
false => ERROR_A::DISABLED,
true => ERROR_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == ERROR_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == ERROR_A::ENABLED
}
}
#[doc = "Write '1' to enable interrupt for ERROR event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ERROR_AW {
#[doc = "1: Enable"]
SET = 1,
}
impl From<ERROR_AW> for bool {
#[inline(always)]
fn from(variant: ERROR_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `ERROR` writer - Write '1' to enable interrupt for ERROR event"]
pub type ERROR_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, ERROR_AW, O>;
impl<'a, const O: u8> ERROR_W<'a, O> {
#[doc = "Enable"]
#[inline(always)]
pub fn set(self) -> &'a mut W {
self.variant(ERROR_AW::SET)
}
}
impl R {
#[doc = "Bit 0 - Write '1' to enable interrupt for ENDKSGEN event"]
#[inline(always)]
pub fn endksgen(&self) -> ENDKSGEN_R {
ENDKSGEN_R::new((self.bits & 1) != 0)
}
#[doc = "Bit 1 - Write '1' to enable interrupt for ENDCRYPT event"]
#[inline(always)]
pub fn endcrypt(&self) -> ENDCRYPT_R {
ENDCRYPT_R::new(((self.bits >> 1) & 1) != 0)
}
#[doc = "Bit 2 - Write '1' to enable interrupt for ERROR event"]
#[inline(always)]
pub fn error(&self) -> ERROR_R {
ERROR_R::new(((self.bits >> 2) & 1) != 0)
}
}
impl W {
#[doc = "Bit 0 - Write '1' to enable interrupt for ENDKSGEN event"]
#[inline(always)]
pub fn endksgen(&mut self) -> ENDKSGEN_W<0> {
ENDKSGEN_W::new(self)
}
#[doc = "Bit 1 - Write '1' to enable interrupt for ENDCRYPT event"]
#[inline(always)]
pub fn endcrypt(&mut self) -> ENDCRYPT_W<1> {
ENDCRYPT_W::new(self)
}
#[doc = "Bit 2 - Write '1' to enable interrupt for ERROR event"]
#[inline(always)]
pub fn error(&mut self) -> ERROR_W<2> {
ERROR_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Enable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"]
pub struct INTENSET_SPEC;
impl crate::RegisterSpec for INTENSET_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [intenset::R](R) reader structure"]
impl crate::Readable for INTENSET_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"]
impl crate::Writable for INTENSET_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets INTENSET to value 0"]
impl crate::Resettable for INTENSET_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/ccm/maxpacketsize.rs
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#[doc = "Register `MAXPACKETSIZE` reader"]
pub struct R(crate::R<MAXPACKETSIZE_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<MAXPACKETSIZE_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<MAXPACKETSIZE_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<MAXPACKETSIZE_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `MAXPACKETSIZE` writer"]
pub struct W(crate::W<MAXPACKETSIZE_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<MAXPACKETSIZE_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<MAXPACKETSIZE_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<MAXPACKETSIZE_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `MAXPACKETSIZE` reader - Length of key-stream generated when MODE.LENGTH = Extended. This value must be greater or equal to the subsequent packet payload to be encrypted/decrypted."]
pub type MAXPACKETSIZE_R = crate::FieldReader<u8, u8>;
#[doc = "Field `MAXPACKETSIZE` writer - Length of key-stream generated when MODE.LENGTH = Extended. This value must be greater or equal to the subsequent packet payload to be encrypted/decrypted."]
pub type MAXPACKETSIZE_W<'a, const O: u8> =
crate::FieldWriter<'a, u32, MAXPACKETSIZE_SPEC, u8, u8, 8, O>;
impl R {
#[doc = "Bits 0:7 - Length of key-stream generated when MODE.LENGTH = Extended. This value must be greater or equal to the subsequent packet payload to be encrypted/decrypted."]
#[inline(always)]
pub fn maxpacketsize(&self) -> MAXPACKETSIZE_R {
MAXPACKETSIZE_R::new((self.bits & 0xff) as u8)
}
}
impl W {
#[doc = "Bits 0:7 - Length of key-stream generated when MODE.LENGTH = Extended. This value must be greater or equal to the subsequent packet payload to be encrypted/decrypted."]
#[inline(always)]
pub fn maxpacketsize(&mut self) -> MAXPACKETSIZE_W<0> {
MAXPACKETSIZE_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Length of key-stream generated when MODE.LENGTH = Extended.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [maxpacketsize](index.html) module"]
pub struct MAXPACKETSIZE_SPEC;
impl crate::RegisterSpec for MAXPACKETSIZE_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [maxpacketsize::R](R) reader structure"]
impl crate::Readable for MAXPACKETSIZE_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [maxpacketsize::W](W) writer structure"]
impl crate::Writable for MAXPACKETSIZE_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets MAXPACKETSIZE to value 0xfb"]
impl crate::Resettable for MAXPACKETSIZE_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0xfb
}
}
vendor/nrf52840-pac/src/ccm/micstatus.rs
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#[doc = "Register `MICSTATUS` reader"]
pub struct R(crate::R<MICSTATUS_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<MICSTATUS_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<MICSTATUS_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<MICSTATUS_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Field `MICSTATUS` reader - The result of the MIC check performed during the previous decryption operation"]
pub type MICSTATUS_R = crate::BitReader<MICSTATUS_A>;
#[doc = "The result of the MIC check performed during the previous decryption operation\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum MICSTATUS_A {
#[doc = "0: MIC check failed"]
CHECK_FAILED = 0,
#[doc = "1: MIC check passed"]
CHECK_PASSED = 1,
}
impl From<MICSTATUS_A> for bool {
#[inline(always)]
fn from(variant: MICSTATUS_A) -> Self {
variant as u8 != 0
}
}
impl MICSTATUS_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> MICSTATUS_A {
match self.bits {
false => MICSTATUS_A::CHECK_FAILED,
true => MICSTATUS_A::CHECK_PASSED,
}
}
#[doc = "Checks if the value of the field is `CHECK_FAILED`"]
#[inline(always)]
pub fn is_check_failed(&self) -> bool {
*self == MICSTATUS_A::CHECK_FAILED
}
#[doc = "Checks if the value of the field is `CHECK_PASSED`"]
#[inline(always)]
pub fn is_check_passed(&self) -> bool {
*self == MICSTATUS_A::CHECK_PASSED
}
}
impl R {
#[doc = "Bit 0 - The result of the MIC check performed during the previous decryption operation"]
#[inline(always)]
pub fn micstatus(&self) -> MICSTATUS_R {
MICSTATUS_R::new((self.bits & 1) != 0)
}
}
#[doc = "MIC check result\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [micstatus](index.html) module"]
pub struct MICSTATUS_SPEC;
impl crate::RegisterSpec for MICSTATUS_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [micstatus::R](R) reader structure"]
impl crate::Readable for MICSTATUS_SPEC {
type Reader = R;
}
#[doc = "`reset()` method sets MICSTATUS to value 0"]
impl crate::Resettable for MICSTATUS_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/ccm/mode.rs
Vendored
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#[doc = "Register `MODE` reader"]
pub struct R(crate::R<MODE_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<MODE_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<MODE_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<MODE_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `MODE` writer"]
pub struct W(crate::W<MODE_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<MODE_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<MODE_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<MODE_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `MODE` reader - The mode of operation to be used. The settings in this register apply whenever either the KSGEN or CRYPT tasks are triggered."]
pub type MODE_R = crate::BitReader<MODE_A>;
#[doc = "The mode of operation to be used. The settings in this register apply whenever either the KSGEN or CRYPT tasks are triggered.\n\nValue on reset: 1"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum MODE_A {
#[doc = "0: AES CCM packet encryption mode"]
ENCRYPTION = 0,
#[doc = "1: AES CCM packet decryption mode"]
DECRYPTION = 1,
}
impl From<MODE_A> for bool {
#[inline(always)]
fn from(variant: MODE_A) -> Self {
variant as u8 != 0
}
}
impl MODE_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> MODE_A {
match self.bits {
false => MODE_A::ENCRYPTION,
true => MODE_A::DECRYPTION,
}
}
#[doc = "Checks if the value of the field is `ENCRYPTION`"]
#[inline(always)]
pub fn is_encryption(&self) -> bool {
*self == MODE_A::ENCRYPTION
}
#[doc = "Checks if the value of the field is `DECRYPTION`"]
#[inline(always)]
pub fn is_decryption(&self) -> bool {
*self == MODE_A::DECRYPTION
}
}
#[doc = "Field `MODE` writer - The mode of operation to be used. The settings in this register apply whenever either the KSGEN or CRYPT tasks are triggered."]
pub type MODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, MODE_SPEC, MODE_A, O>;
impl<'a, const O: u8> MODE_W<'a, O> {
#[doc = "AES CCM packet encryption mode"]
#[inline(always)]
pub fn encryption(self) -> &'a mut W {
self.variant(MODE_A::ENCRYPTION)
}
#[doc = "AES CCM packet decryption mode"]
#[inline(always)]
pub fn decryption(self) -> &'a mut W {
self.variant(MODE_A::DECRYPTION)
}
}
#[doc = "Field `DATARATE` reader - Radio data rate that the CCM shall run synchronous with"]
pub type DATARATE_R = crate::FieldReader<u8, DATARATE_A>;
#[doc = "Radio data rate that the CCM shall run synchronous with\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum DATARATE_A {
#[doc = "0: 1 Mbps"]
_1MBIT = 0,
#[doc = "1: 2 Mbps"]
_2MBIT = 1,
#[doc = "2: 125 Kbps"]
_125KBPS = 2,
#[doc = "3: 500 Kbps"]
_500KBPS = 3,
}
impl From<DATARATE_A> for u8 {
#[inline(always)]
fn from(variant: DATARATE_A) -> Self {
variant as _
}
}
impl DATARATE_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> DATARATE_A {
match self.bits {
0 => DATARATE_A::_1MBIT,
1 => DATARATE_A::_2MBIT,
2 => DATARATE_A::_125KBPS,
3 => DATARATE_A::_500KBPS,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `_1MBIT`"]
#[inline(always)]
pub fn is_1mbit(&self) -> bool {
*self == DATARATE_A::_1MBIT
}
#[doc = "Checks if the value of the field is `_2MBIT`"]
#[inline(always)]
pub fn is_2mbit(&self) -> bool {
*self == DATARATE_A::_2MBIT
}
#[doc = "Checks if the value of the field is `_125KBPS`"]
#[inline(always)]
pub fn is_125kbps(&self) -> bool {
*self == DATARATE_A::_125KBPS
}
#[doc = "Checks if the value of the field is `_500KBPS`"]
#[inline(always)]
pub fn is_500kbps(&self) -> bool {
*self == DATARATE_A::_500KBPS
}
}
#[doc = "Field `DATARATE` writer - Radio data rate that the CCM shall run synchronous with"]
pub type DATARATE_W<'a, const O: u8> =
crate::FieldWriterSafe<'a, u32, MODE_SPEC, u8, DATARATE_A, 2, O>;
impl<'a, const O: u8> DATARATE_W<'a, O> {
#[doc = "1 Mbps"]
#[inline(always)]
pub fn _1mbit(self) -> &'a mut W {
self.variant(DATARATE_A::_1MBIT)
}
#[doc = "2 Mbps"]
#[inline(always)]
pub fn _2mbit(self) -> &'a mut W {
self.variant(DATARATE_A::_2MBIT)
}
#[doc = "125 Kbps"]
#[inline(always)]
pub fn _125kbps(self) -> &'a mut W {
self.variant(DATARATE_A::_125KBPS)
}
#[doc = "500 Kbps"]
#[inline(always)]
pub fn _500kbps(self) -> &'a mut W {
self.variant(DATARATE_A::_500KBPS)
}
}
#[doc = "Field `LENGTH` reader - Packet length configuration"]
pub type LENGTH_R = crate::BitReader<LENGTH_A>;
#[doc = "Packet length configuration\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum LENGTH_A {
#[doc = "0: Default length. Effective length of LENGTH field in encrypted/decrypted packet is 5 bits. A key-stream for packet payloads up to 27 bytes will be generated."]
DEFAULT = 0,
#[doc = "1: Extended length. Effective length of LENGTH field in encrypted/decrypted packet is 8 bits. A key-stream for packet payloads up to MAXPACKETSIZE bytes will be generated."]
EXTENDED = 1,
}
impl From<LENGTH_A> for bool {
#[inline(always)]
fn from(variant: LENGTH_A) -> Self {
variant as u8 != 0
}
}
impl LENGTH_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> LENGTH_A {
match self.bits {
false => LENGTH_A::DEFAULT,
true => LENGTH_A::EXTENDED,
}
}
#[doc = "Checks if the value of the field is `DEFAULT`"]
#[inline(always)]
pub fn is_default(&self) -> bool {
*self == LENGTH_A::DEFAULT
}
#[doc = "Checks if the value of the field is `EXTENDED`"]
#[inline(always)]
pub fn is_extended(&self) -> bool {
*self == LENGTH_A::EXTENDED
}
}
#[doc = "Field `LENGTH` writer - Packet length configuration"]
pub type LENGTH_W<'a, const O: u8> = crate::BitWriter<'a, u32, MODE_SPEC, LENGTH_A, O>;
impl<'a, const O: u8> LENGTH_W<'a, O> {
#[doc = "Default length. Effective length of LENGTH field in encrypted/decrypted packet is 5 bits. A key-stream for packet payloads up to 27 bytes will be generated."]
#[inline(always)]
pub fn default(self) -> &'a mut W {
self.variant(LENGTH_A::DEFAULT)
}
#[doc = "Extended length. Effective length of LENGTH field in encrypted/decrypted packet is 8 bits. A key-stream for packet payloads up to MAXPACKETSIZE bytes will be generated."]
#[inline(always)]
pub fn extended(self) -> &'a mut W {
self.variant(LENGTH_A::EXTENDED)
}
}
impl R {
#[doc = "Bit 0 - The mode of operation to be used. The settings in this register apply whenever either the KSGEN or CRYPT tasks are triggered."]
#[inline(always)]
pub fn mode(&self) -> MODE_R {
MODE_R::new((self.bits & 1) != 0)
}
#[doc = "Bits 16:17 - Radio data rate that the CCM shall run synchronous with"]
#[inline(always)]
pub fn datarate(&self) -> DATARATE_R {
DATARATE_R::new(((self.bits >> 16) & 3) as u8)
}
#[doc = "Bit 24 - Packet length configuration"]
#[inline(always)]
pub fn length(&self) -> LENGTH_R {
LENGTH_R::new(((self.bits >> 24) & 1) != 0)
}
}
impl W {
#[doc = "Bit 0 - The mode of operation to be used. The settings in this register apply whenever either the KSGEN or CRYPT tasks are triggered."]
#[inline(always)]
pub fn mode(&mut self) -> MODE_W<0> {
MODE_W::new(self)
}
#[doc = "Bits 16:17 - Radio data rate that the CCM shall run synchronous with"]
#[inline(always)]
pub fn datarate(&mut self) -> DATARATE_W<16> {
DATARATE_W::new(self)
}
#[doc = "Bit 24 - Packet length configuration"]
#[inline(always)]
pub fn length(&mut self) -> LENGTH_W<24> {
LENGTH_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Operation mode\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mode](index.html) module"]
pub struct MODE_SPEC;
impl crate::RegisterSpec for MODE_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [mode::R](R) reader structure"]
impl crate::Readable for MODE_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [mode::W](W) writer structure"]
impl crate::Writable for MODE_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets MODE to value 0x01"]
impl crate::Resettable for MODE_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0x01
}
}
vendor/nrf52840-pac/src/ccm/outptr.rs
Vendored
+80
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@@ -0,0 +1,80 @@
#[doc = "Register `OUTPTR` reader"]
pub struct R(crate::R<OUTPTR_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<OUTPTR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<OUTPTR_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<OUTPTR_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `OUTPTR` writer"]
pub struct W(crate::W<OUTPTR_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<OUTPTR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<OUTPTR_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<OUTPTR_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `OUTPTR` reader - Output pointer"]
pub type OUTPTR_R = crate::FieldReader<u32, u32>;
#[doc = "Field `OUTPTR` writer - Output pointer"]
pub type OUTPTR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, OUTPTR_SPEC, u32, u32, 32, O>;
impl R {
#[doc = "Bits 0:31 - Output pointer"]
#[inline(always)]
pub fn outptr(&self) -> OUTPTR_R {
OUTPTR_R::new(self.bits)
}
}
impl W {
#[doc = "Bits 0:31 - Output pointer"]
#[inline(always)]
pub fn outptr(&mut self) -> OUTPTR_W<0> {
OUTPTR_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Output pointer\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [outptr](index.html) module"]
pub struct OUTPTR_SPEC;
impl crate::RegisterSpec for OUTPTR_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [outptr::R](R) reader structure"]
impl crate::Readable for OUTPTR_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [outptr::W](W) writer structure"]
impl crate::Writable for OUTPTR_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets OUTPTR to value 0"]
impl crate::Resettable for OUTPTR_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/ccm/rateoverride.rs
Vendored
+155
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@@ -0,0 +1,155 @@
#[doc = "Register `RATEOVERRIDE` reader"]
pub struct R(crate::R<RATEOVERRIDE_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<RATEOVERRIDE_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<RATEOVERRIDE_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<RATEOVERRIDE_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `RATEOVERRIDE` writer"]
pub struct W(crate::W<RATEOVERRIDE_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<RATEOVERRIDE_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<RATEOVERRIDE_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<RATEOVERRIDE_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `RATEOVERRIDE` reader - Data rate override setting."]
pub type RATEOVERRIDE_R = crate::FieldReader<u8, RATEOVERRIDE_A>;
#[doc = "Data rate override setting.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum RATEOVERRIDE_A {
#[doc = "0: 1 Mbps"]
_1MBIT = 0,
#[doc = "1: 2 Mbps"]
_2MBIT = 1,
#[doc = "2: 125 Kbps"]
_125KBPS = 2,
#[doc = "3: 500 Kbps"]
_500KBPS = 3,
}
impl From<RATEOVERRIDE_A> for u8 {
#[inline(always)]
fn from(variant: RATEOVERRIDE_A) -> Self {
variant as _
}
}
impl RATEOVERRIDE_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> RATEOVERRIDE_A {
match self.bits {
0 => RATEOVERRIDE_A::_1MBIT,
1 => RATEOVERRIDE_A::_2MBIT,
2 => RATEOVERRIDE_A::_125KBPS,
3 => RATEOVERRIDE_A::_500KBPS,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `_1MBIT`"]
#[inline(always)]
pub fn is_1mbit(&self) -> bool {
*self == RATEOVERRIDE_A::_1MBIT
}
#[doc = "Checks if the value of the field is `_2MBIT`"]
#[inline(always)]
pub fn is_2mbit(&self) -> bool {
*self == RATEOVERRIDE_A::_2MBIT
}
#[doc = "Checks if the value of the field is `_125KBPS`"]
#[inline(always)]
pub fn is_125kbps(&self) -> bool {
*self == RATEOVERRIDE_A::_125KBPS
}
#[doc = "Checks if the value of the field is `_500KBPS`"]
#[inline(always)]
pub fn is_500kbps(&self) -> bool {
*self == RATEOVERRIDE_A::_500KBPS
}
}
#[doc = "Field `RATEOVERRIDE` writer - Data rate override setting."]
pub type RATEOVERRIDE_W<'a, const O: u8> =
crate::FieldWriterSafe<'a, u32, RATEOVERRIDE_SPEC, u8, RATEOVERRIDE_A, 2, O>;
impl<'a, const O: u8> RATEOVERRIDE_W<'a, O> {
#[doc = "1 Mbps"]
#[inline(always)]
pub fn _1mbit(self) -> &'a mut W {
self.variant(RATEOVERRIDE_A::_1MBIT)
}
#[doc = "2 Mbps"]
#[inline(always)]
pub fn _2mbit(self) -> &'a mut W {
self.variant(RATEOVERRIDE_A::_2MBIT)
}
#[doc = "125 Kbps"]
#[inline(always)]
pub fn _125kbps(self) -> &'a mut W {
self.variant(RATEOVERRIDE_A::_125KBPS)
}
#[doc = "500 Kbps"]
#[inline(always)]
pub fn _500kbps(self) -> &'a mut W {
self.variant(RATEOVERRIDE_A::_500KBPS)
}
}
impl R {
#[doc = "Bits 0:1 - Data rate override setting."]
#[inline(always)]
pub fn rateoverride(&self) -> RATEOVERRIDE_R {
RATEOVERRIDE_R::new((self.bits & 3) as u8)
}
}
impl W {
#[doc = "Bits 0:1 - Data rate override setting."]
#[inline(always)]
pub fn rateoverride(&mut self) -> RATEOVERRIDE_W<0> {
RATEOVERRIDE_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Data rate override setting.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rateoverride](index.html) module"]
pub struct RATEOVERRIDE_SPEC;
impl crate::RegisterSpec for RATEOVERRIDE_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [rateoverride::R](R) reader structure"]
impl crate::Readable for RATEOVERRIDE_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [rateoverride::W](W) writer structure"]
impl crate::Writable for RATEOVERRIDE_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets RATEOVERRIDE to value 0"]
impl crate::Resettable for RATEOVERRIDE_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/ccm/scratchptr.rs
Vendored
+81
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@@ -0,0 +1,81 @@
#[doc = "Register `SCRATCHPTR` reader"]
pub struct R(crate::R<SCRATCHPTR_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<SCRATCHPTR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<SCRATCHPTR_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<SCRATCHPTR_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `SCRATCHPTR` writer"]
pub struct W(crate::W<SCRATCHPTR_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<SCRATCHPTR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<SCRATCHPTR_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<SCRATCHPTR_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `SCRATCHPTR` reader - Pointer to a scratch data area used for temporary storage during key-stream generation, MIC generation and encryption/decryption."]
pub type SCRATCHPTR_R = crate::FieldReader<u32, u32>;
#[doc = "Field `SCRATCHPTR` writer - Pointer to a scratch data area used for temporary storage during key-stream generation, MIC generation and encryption/decryption."]
pub type SCRATCHPTR_W<'a, const O: u8> =
crate::FieldWriter<'a, u32, SCRATCHPTR_SPEC, u32, u32, 32, O>;
impl R {
#[doc = "Bits 0:31 - Pointer to a scratch data area used for temporary storage during key-stream generation, MIC generation and encryption/decryption."]
#[inline(always)]
pub fn scratchptr(&self) -> SCRATCHPTR_R {
SCRATCHPTR_R::new(self.bits)
}
}
impl W {
#[doc = "Bits 0:31 - Pointer to a scratch data area used for temporary storage during key-stream generation, MIC generation and encryption/decryption."]
#[inline(always)]
pub fn scratchptr(&mut self) -> SCRATCHPTR_W<0> {
SCRATCHPTR_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Pointer to data area used for temporary storage\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scratchptr](index.html) module"]
pub struct SCRATCHPTR_SPEC;
impl crate::RegisterSpec for SCRATCHPTR_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [scratchptr::R](R) reader structure"]
impl crate::Readable for SCRATCHPTR_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [scratchptr::W](W) writer structure"]
impl crate::Writable for SCRATCHPTR_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets SCRATCHPTR to value 0"]
impl crate::Resettable for SCRATCHPTR_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/ccm/shorts.rs
Vendored
+127
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@@ -0,0 +1,127 @@
#[doc = "Register `SHORTS` reader"]
pub struct R(crate::R<SHORTS_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<SHORTS_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<SHORTS_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<SHORTS_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `SHORTS` writer"]
pub struct W(crate::W<SHORTS_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<SHORTS_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<SHORTS_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<SHORTS_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `ENDKSGEN_CRYPT` reader - Shortcut between ENDKSGEN event and CRYPT task"]
pub type ENDKSGEN_CRYPT_R = crate::BitReader<ENDKSGEN_CRYPT_A>;
#[doc = "Shortcut between ENDKSGEN event and CRYPT task\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ENDKSGEN_CRYPT_A {
#[doc = "0: Disable shortcut"]
DISABLED = 0,
#[doc = "1: Enable shortcut"]
ENABLED = 1,
}
impl From<ENDKSGEN_CRYPT_A> for bool {
#[inline(always)]
fn from(variant: ENDKSGEN_CRYPT_A) -> Self {
variant as u8 != 0
}
}
impl ENDKSGEN_CRYPT_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> ENDKSGEN_CRYPT_A {
match self.bits {
false => ENDKSGEN_CRYPT_A::DISABLED,
true => ENDKSGEN_CRYPT_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == ENDKSGEN_CRYPT_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == ENDKSGEN_CRYPT_A::ENABLED
}
}
#[doc = "Field `ENDKSGEN_CRYPT` writer - Shortcut between ENDKSGEN event and CRYPT task"]
pub type ENDKSGEN_CRYPT_W<'a, const O: u8> =
crate::BitWriter<'a, u32, SHORTS_SPEC, ENDKSGEN_CRYPT_A, O>;
impl<'a, const O: u8> ENDKSGEN_CRYPT_W<'a, O> {
#[doc = "Disable shortcut"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(ENDKSGEN_CRYPT_A::DISABLED)
}
#[doc = "Enable shortcut"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(ENDKSGEN_CRYPT_A::ENABLED)
}
}
impl R {
#[doc = "Bit 0 - Shortcut between ENDKSGEN event and CRYPT task"]
#[inline(always)]
pub fn endksgen_crypt(&self) -> ENDKSGEN_CRYPT_R {
ENDKSGEN_CRYPT_R::new((self.bits & 1) != 0)
}
}
impl W {
#[doc = "Bit 0 - Shortcut between ENDKSGEN event and CRYPT task"]
#[inline(always)]
pub fn endksgen_crypt(&mut self) -> ENDKSGEN_CRYPT_W<0> {
ENDKSGEN_CRYPT_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Shortcut register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [shorts](index.html) module"]
pub struct SHORTS_SPEC;
impl crate::RegisterSpec for SHORTS_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [shorts::R](R) reader structure"]
impl crate::Readable for SHORTS_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [shorts::W](W) writer structure"]
impl crate::Writable for SHORTS_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets SHORTS to value 0"]
impl crate::Resettable for SHORTS_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/ccm/tasks_crypt.rs
Vendored
+52
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@@ -0,0 +1,52 @@
#[doc = "Register `TASKS_CRYPT` writer"]
pub struct W(crate::W<TASKS_CRYPT_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<TASKS_CRYPT_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<TASKS_CRYPT_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<TASKS_CRYPT_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `TASKS_CRYPT` writer - "]
pub type TASKS_CRYPT_W<'a, const O: u8> = crate::BitWriter<'a, u32, TASKS_CRYPT_SPEC, bool, O>;
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn tasks_crypt(&mut self) -> TASKS_CRYPT_W<0> {
TASKS_CRYPT_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Start encryption/decryption. This operation will stop by itself when completed.\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_crypt](index.html) module"]
pub struct TASKS_CRYPT_SPEC;
impl crate::RegisterSpec for TASKS_CRYPT_SPEC {
type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [tasks_crypt::W](W) writer structure"]
impl crate::Writable for TASKS_CRYPT_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets TASKS_CRYPT to value 0"]
impl crate::Resettable for TASKS_CRYPT_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/ccm/tasks_ksgen.rs
Vendored
+52
View File
@@ -0,0 +1,52 @@
#[doc = "Register `TASKS_KSGEN` writer"]
pub struct W(crate::W<TASKS_KSGEN_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<TASKS_KSGEN_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<TASKS_KSGEN_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<TASKS_KSGEN_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `TASKS_KSGEN` writer - "]
pub type TASKS_KSGEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TASKS_KSGEN_SPEC, bool, O>;
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn tasks_ksgen(&mut self) -> TASKS_KSGEN_W<0> {
TASKS_KSGEN_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Start generation of key-stream. This operation will stop by itself when completed.\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_ksgen](index.html) module"]
pub struct TASKS_KSGEN_SPEC;
impl crate::RegisterSpec for TASKS_KSGEN_SPEC {
type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [tasks_ksgen::W](W) writer structure"]
impl crate::Writable for TASKS_KSGEN_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets TASKS_KSGEN to value 0"]
impl crate::Resettable for TASKS_KSGEN_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/ccm/tasks_rateoverride.rs
Vendored
+53
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@@ -0,0 +1,53 @@
#[doc = "Register `TASKS_RATEOVERRIDE` writer"]
pub struct W(crate::W<TASKS_RATEOVERRIDE_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<TASKS_RATEOVERRIDE_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<TASKS_RATEOVERRIDE_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<TASKS_RATEOVERRIDE_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `TASKS_RATEOVERRIDE` writer - "]
pub type TASKS_RATEOVERRIDE_W<'a, const O: u8> =
crate::BitWriter<'a, u32, TASKS_RATEOVERRIDE_SPEC, bool, O>;
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn tasks_rateoverride(&mut self) -> TASKS_RATEOVERRIDE_W<0> {
TASKS_RATEOVERRIDE_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Override DATARATE setting in MODE register with the contents of the RATEOVERRIDE register for any ongoing encryption/decryption\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_rateoverride](index.html) module"]
pub struct TASKS_RATEOVERRIDE_SPEC;
impl crate::RegisterSpec for TASKS_RATEOVERRIDE_SPEC {
type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [tasks_rateoverride::W](W) writer structure"]
impl crate::Writable for TASKS_RATEOVERRIDE_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets TASKS_RATEOVERRIDE to value 0"]
impl crate::Resettable for TASKS_RATEOVERRIDE_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/ccm/tasks_stop.rs
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#[doc = "Register `TASKS_STOP` writer"]
pub struct W(crate::W<TASKS_STOP_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<TASKS_STOP_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<TASKS_STOP_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<TASKS_STOP_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `TASKS_STOP` writer - "]
pub type TASKS_STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, TASKS_STOP_SPEC, bool, O>;
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn tasks_stop(&mut self) -> TASKS_STOP_W<0> {
TASKS_STOP_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Stop encryption/decryption\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_stop](index.html) module"]
pub struct TASKS_STOP_SPEC;
impl crate::RegisterSpec for TASKS_STOP_SPEC {
type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [tasks_stop::W](W) writer structure"]
impl crate::Writable for TASKS_STOP_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets TASKS_STOP to value 0"]
impl crate::Resettable for TASKS_STOP_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/clock.rs
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#[doc = r"Register block"]
#[repr(C)]
pub struct RegisterBlock {
#[doc = "0x00 - Start HFXO crystal oscillator"]
pub tasks_hfclkstart: TASKS_HFCLKSTART,
#[doc = "0x04 - Stop HFXO crystal oscillator"]
pub tasks_hfclkstop: TASKS_HFCLKSTOP,
#[doc = "0x08 - Start LFCLK"]
pub tasks_lfclkstart: TASKS_LFCLKSTART,
#[doc = "0x0c - Stop LFCLK"]
pub tasks_lfclkstop: TASKS_LFCLKSTOP,
#[doc = "0x10 - Start calibration of LFRC"]
pub tasks_cal: TASKS_CAL,
#[doc = "0x14 - Start calibration timer"]
pub tasks_ctstart: TASKS_CTSTART,
#[doc = "0x18 - Stop calibration timer"]
pub tasks_ctstop: TASKS_CTSTOP,
_reserved7: [u8; 0xe4],
#[doc = "0x100 - HFXO crystal oscillator started"]
pub events_hfclkstarted: EVENTS_HFCLKSTARTED,
#[doc = "0x104 - LFCLK started"]
pub events_lfclkstarted: EVENTS_LFCLKSTARTED,
_reserved9: [u8; 0x04],
#[doc = "0x10c - Calibration of LFRC completed"]
pub events_done: EVENTS_DONE,
#[doc = "0x110 - Calibration timer timeout"]
pub events_ctto: EVENTS_CTTO,
_reserved11: [u8; 0x14],
#[doc = "0x128 - Calibration timer has been started and is ready to process new tasks"]
pub events_ctstarted: EVENTS_CTSTARTED,
#[doc = "0x12c - Calibration timer has been stopped and is ready to process new tasks"]
pub events_ctstopped: EVENTS_CTSTOPPED,
_reserved13: [u8; 0x01d4],
#[doc = "0x304 - Enable interrupt"]
pub intenset: INTENSET,
#[doc = "0x308 - Disable interrupt"]
pub intenclr: INTENCLR,
_reserved15: [u8; 0xfc],
#[doc = "0x408 - Status indicating that HFCLKSTART task has been triggered"]
pub hfclkrun: HFCLKRUN,
#[doc = "0x40c - HFCLK status"]
pub hfclkstat: HFCLKSTAT,
_reserved17: [u8; 0x04],
#[doc = "0x414 - Status indicating that LFCLKSTART task has been triggered"]
pub lfclkrun: LFCLKRUN,
#[doc = "0x418 - LFCLK status"]
pub lfclkstat: LFCLKSTAT,
#[doc = "0x41c - Copy of LFCLKSRC register, set when LFCLKSTART task was triggered"]
pub lfclksrccopy: LFCLKSRCCOPY,
_reserved20: [u8; 0xf8],
#[doc = "0x518 - Clock source for the LFCLK"]
pub lfclksrc: LFCLKSRC,
_reserved21: [u8; 0x0c],
#[doc = "0x528 - HFXO debounce time. The HFXO is started by triggering the TASKS_HFCLKSTART task."]
pub hfxodebounce: HFXODEBOUNCE,
_reserved22: [u8; 0x0c],
#[doc = "0x538 - Calibration timer interval"]
pub ctiv: CTIV,
_reserved23: [u8; 0x20],
#[doc = "0x55c - Clocking options for the trace port debug interface"]
pub traceconfig: TRACECONFIG,
_reserved24: [u8; 0x54],
#[doc = "0x5b4 - LFRC mode configuration"]
pub lfrcmode: LFRCMODE,
}
#[doc = "TASKS_HFCLKSTART (w) register accessor: an alias for `Reg<TASKS_HFCLKSTART_SPEC>`"]
pub type TASKS_HFCLKSTART = crate::Reg<tasks_hfclkstart::TASKS_HFCLKSTART_SPEC>;
#[doc = "Start HFXO crystal oscillator"]
pub mod tasks_hfclkstart;
#[doc = "TASKS_HFCLKSTOP (w) register accessor: an alias for `Reg<TASKS_HFCLKSTOP_SPEC>`"]
pub type TASKS_HFCLKSTOP = crate::Reg<tasks_hfclkstop::TASKS_HFCLKSTOP_SPEC>;
#[doc = "Stop HFXO crystal oscillator"]
pub mod tasks_hfclkstop;
#[doc = "TASKS_LFCLKSTART (w) register accessor: an alias for `Reg<TASKS_LFCLKSTART_SPEC>`"]
pub type TASKS_LFCLKSTART = crate::Reg<tasks_lfclkstart::TASKS_LFCLKSTART_SPEC>;
#[doc = "Start LFCLK"]
pub mod tasks_lfclkstart;
#[doc = "TASKS_LFCLKSTOP (w) register accessor: an alias for `Reg<TASKS_LFCLKSTOP_SPEC>`"]
pub type TASKS_LFCLKSTOP = crate::Reg<tasks_lfclkstop::TASKS_LFCLKSTOP_SPEC>;
#[doc = "Stop LFCLK"]
pub mod tasks_lfclkstop;
#[doc = "TASKS_CAL (w) register accessor: an alias for `Reg<TASKS_CAL_SPEC>`"]
pub type TASKS_CAL = crate::Reg<tasks_cal::TASKS_CAL_SPEC>;
#[doc = "Start calibration of LFRC"]
pub mod tasks_cal;
#[doc = "TASKS_CTSTART (w) register accessor: an alias for `Reg<TASKS_CTSTART_SPEC>`"]
pub type TASKS_CTSTART = crate::Reg<tasks_ctstart::TASKS_CTSTART_SPEC>;
#[doc = "Start calibration timer"]
pub mod tasks_ctstart;
#[doc = "TASKS_CTSTOP (w) register accessor: an alias for `Reg<TASKS_CTSTOP_SPEC>`"]
pub type TASKS_CTSTOP = crate::Reg<tasks_ctstop::TASKS_CTSTOP_SPEC>;
#[doc = "Stop calibration timer"]
pub mod tasks_ctstop;
#[doc = "EVENTS_HFCLKSTARTED (rw) register accessor: an alias for `Reg<EVENTS_HFCLKSTARTED_SPEC>`"]
pub type EVENTS_HFCLKSTARTED = crate::Reg<events_hfclkstarted::EVENTS_HFCLKSTARTED_SPEC>;
#[doc = "HFXO crystal oscillator started"]
pub mod events_hfclkstarted;
#[doc = "EVENTS_LFCLKSTARTED (rw) register accessor: an alias for `Reg<EVENTS_LFCLKSTARTED_SPEC>`"]
pub type EVENTS_LFCLKSTARTED = crate::Reg<events_lfclkstarted::EVENTS_LFCLKSTARTED_SPEC>;
#[doc = "LFCLK started"]
pub mod events_lfclkstarted;
#[doc = "EVENTS_DONE (rw) register accessor: an alias for `Reg<EVENTS_DONE_SPEC>`"]
pub type EVENTS_DONE = crate::Reg<events_done::EVENTS_DONE_SPEC>;
#[doc = "Calibration of LFRC completed"]
pub mod events_done;
#[doc = "EVENTS_CTTO (rw) register accessor: an alias for `Reg<EVENTS_CTTO_SPEC>`"]
pub type EVENTS_CTTO = crate::Reg<events_ctto::EVENTS_CTTO_SPEC>;
#[doc = "Calibration timer timeout"]
pub mod events_ctto;
#[doc = "EVENTS_CTSTARTED (rw) register accessor: an alias for `Reg<EVENTS_CTSTARTED_SPEC>`"]
pub type EVENTS_CTSTARTED = crate::Reg<events_ctstarted::EVENTS_CTSTARTED_SPEC>;
#[doc = "Calibration timer has been started and is ready to process new tasks"]
pub mod events_ctstarted;
#[doc = "EVENTS_CTSTOPPED (rw) register accessor: an alias for `Reg<EVENTS_CTSTOPPED_SPEC>`"]
pub type EVENTS_CTSTOPPED = crate::Reg<events_ctstopped::EVENTS_CTSTOPPED_SPEC>;
#[doc = "Calibration timer has been stopped and is ready to process new tasks"]
pub mod events_ctstopped;
#[doc = "INTENSET (rw) register accessor: an alias for `Reg<INTENSET_SPEC>`"]
pub type INTENSET = crate::Reg<intenset::INTENSET_SPEC>;
#[doc = "Enable interrupt"]
pub mod intenset;
#[doc = "INTENCLR (rw) register accessor: an alias for `Reg<INTENCLR_SPEC>`"]
pub type INTENCLR = crate::Reg<intenclr::INTENCLR_SPEC>;
#[doc = "Disable interrupt"]
pub mod intenclr;
#[doc = "HFCLKRUN (r) register accessor: an alias for `Reg<HFCLKRUN_SPEC>`"]
pub type HFCLKRUN = crate::Reg<hfclkrun::HFCLKRUN_SPEC>;
#[doc = "Status indicating that HFCLKSTART task has been triggered"]
pub mod hfclkrun;
#[doc = "HFCLKSTAT (r) register accessor: an alias for `Reg<HFCLKSTAT_SPEC>`"]
pub type HFCLKSTAT = crate::Reg<hfclkstat::HFCLKSTAT_SPEC>;
#[doc = "HFCLK status"]
pub mod hfclkstat;
#[doc = "LFCLKRUN (r) register accessor: an alias for `Reg<LFCLKRUN_SPEC>`"]
pub type LFCLKRUN = crate::Reg<lfclkrun::LFCLKRUN_SPEC>;
#[doc = "Status indicating that LFCLKSTART task has been triggered"]
pub mod lfclkrun;
#[doc = "LFCLKSTAT (r) register accessor: an alias for `Reg<LFCLKSTAT_SPEC>`"]
pub type LFCLKSTAT = crate::Reg<lfclkstat::LFCLKSTAT_SPEC>;
#[doc = "LFCLK status"]
pub mod lfclkstat;
#[doc = "LFCLKSRCCOPY (r) register accessor: an alias for `Reg<LFCLKSRCCOPY_SPEC>`"]
pub type LFCLKSRCCOPY = crate::Reg<lfclksrccopy::LFCLKSRCCOPY_SPEC>;
#[doc = "Copy of LFCLKSRC register, set when LFCLKSTART task was triggered"]
pub mod lfclksrccopy;
#[doc = "LFCLKSRC (rw) register accessor: an alias for `Reg<LFCLKSRC_SPEC>`"]
pub type LFCLKSRC = crate::Reg<lfclksrc::LFCLKSRC_SPEC>;
#[doc = "Clock source for the LFCLK"]
pub mod lfclksrc;
#[doc = "HFXODEBOUNCE (rw) register accessor: an alias for `Reg<HFXODEBOUNCE_SPEC>`"]
pub type HFXODEBOUNCE = crate::Reg<hfxodebounce::HFXODEBOUNCE_SPEC>;
#[doc = "HFXO debounce time. The HFXO is started by triggering the TASKS_HFCLKSTART task."]
pub mod hfxodebounce;
#[doc = "CTIV (rw) register accessor: an alias for `Reg<CTIV_SPEC>`"]
pub type CTIV = crate::Reg<ctiv::CTIV_SPEC>;
#[doc = "Calibration timer interval"]
pub mod ctiv;
#[doc = "TRACECONFIG (rw) register accessor: an alias for `Reg<TRACECONFIG_SPEC>`"]
pub type TRACECONFIG = crate::Reg<traceconfig::TRACECONFIG_SPEC>;
#[doc = "Clocking options for the trace port debug interface"]
pub mod traceconfig;
#[doc = "LFRCMODE (rw) register accessor: an alias for `Reg<LFRCMODE_SPEC>`"]
pub type LFRCMODE = crate::Reg<lfrcmode::LFRCMODE_SPEC>;
#[doc = "LFRC mode configuration"]
pub mod lfrcmode;
vendor/nrf52840-pac/src/clock/ctiv.rs
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#[doc = "Register `CTIV` reader"]
pub struct R(crate::R<CTIV_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<CTIV_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<CTIV_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<CTIV_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `CTIV` writer"]
pub struct W(crate::W<CTIV_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<CTIV_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<CTIV_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<CTIV_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `CTIV` reader - Calibration timer interval in multiple of 0.25 seconds. Range: 0.25 seconds to 31.75 seconds."]
pub type CTIV_R = crate::FieldReader<u8, u8>;
#[doc = "Field `CTIV` writer - Calibration timer interval in multiple of 0.25 seconds. Range: 0.25 seconds to 31.75 seconds."]
pub type CTIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTIV_SPEC, u8, u8, 7, O>;
impl R {
#[doc = "Bits 0:6 - Calibration timer interval in multiple of 0.25 seconds. Range: 0.25 seconds to 31.75 seconds."]
#[inline(always)]
pub fn ctiv(&self) -> CTIV_R {
CTIV_R::new((self.bits & 0x7f) as u8)
}
}
impl W {
#[doc = "Bits 0:6 - Calibration timer interval in multiple of 0.25 seconds. Range: 0.25 seconds to 31.75 seconds."]
#[inline(always)]
pub fn ctiv(&mut self) -> CTIV_W<0> {
CTIV_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Calibration timer interval\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctiv](index.html) module"]
pub struct CTIV_SPEC;
impl crate::RegisterSpec for CTIV_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [ctiv::R](R) reader structure"]
impl crate::Readable for CTIV_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [ctiv::W](W) writer structure"]
impl crate::Writable for CTIV_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets CTIV to value 0"]
impl crate::Resettable for CTIV_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/clock/events_ctstarted.rs
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#[doc = "Register `EVENTS_CTSTARTED` reader"]
pub struct R(crate::R<EVENTS_CTSTARTED_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<EVENTS_CTSTARTED_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<EVENTS_CTSTARTED_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<EVENTS_CTSTARTED_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `EVENTS_CTSTARTED` writer"]
pub struct W(crate::W<EVENTS_CTSTARTED_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<EVENTS_CTSTARTED_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<EVENTS_CTSTARTED_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<EVENTS_CTSTARTED_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `EVENTS_CTSTARTED` reader - "]
pub type EVENTS_CTSTARTED_R = crate::BitReader<bool>;
#[doc = "Field `EVENTS_CTSTARTED` writer - "]
pub type EVENTS_CTSTARTED_W<'a, const O: u8> =
crate::BitWriter<'a, u32, EVENTS_CTSTARTED_SPEC, bool, O>;
impl R {
#[doc = "Bit 0"]
#[inline(always)]
pub fn events_ctstarted(&self) -> EVENTS_CTSTARTED_R {
EVENTS_CTSTARTED_R::new((self.bits & 1) != 0)
}
}
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn events_ctstarted(&mut self) -> EVENTS_CTSTARTED_W<0> {
EVENTS_CTSTARTED_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Calibration timer has been started and is ready to process new tasks\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_ctstarted](index.html) module"]
pub struct EVENTS_CTSTARTED_SPEC;
impl crate::RegisterSpec for EVENTS_CTSTARTED_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [events_ctstarted::R](R) reader structure"]
impl crate::Readable for EVENTS_CTSTARTED_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [events_ctstarted::W](W) writer structure"]
impl crate::Writable for EVENTS_CTSTARTED_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets EVENTS_CTSTARTED to value 0"]
impl crate::Resettable for EVENTS_CTSTARTED_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/clock/events_ctstopped.rs
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#[doc = "Register `EVENTS_CTSTOPPED` reader"]
pub struct R(crate::R<EVENTS_CTSTOPPED_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<EVENTS_CTSTOPPED_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<EVENTS_CTSTOPPED_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<EVENTS_CTSTOPPED_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `EVENTS_CTSTOPPED` writer"]
pub struct W(crate::W<EVENTS_CTSTOPPED_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<EVENTS_CTSTOPPED_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<EVENTS_CTSTOPPED_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<EVENTS_CTSTOPPED_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `EVENTS_CTSTOPPED` reader - "]
pub type EVENTS_CTSTOPPED_R = crate::BitReader<bool>;
#[doc = "Field `EVENTS_CTSTOPPED` writer - "]
pub type EVENTS_CTSTOPPED_W<'a, const O: u8> =
crate::BitWriter<'a, u32, EVENTS_CTSTOPPED_SPEC, bool, O>;
impl R {
#[doc = "Bit 0"]
#[inline(always)]
pub fn events_ctstopped(&self) -> EVENTS_CTSTOPPED_R {
EVENTS_CTSTOPPED_R::new((self.bits & 1) != 0)
}
}
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn events_ctstopped(&mut self) -> EVENTS_CTSTOPPED_W<0> {
EVENTS_CTSTOPPED_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Calibration timer has been stopped and is ready to process new tasks\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_ctstopped](index.html) module"]
pub struct EVENTS_CTSTOPPED_SPEC;
impl crate::RegisterSpec for EVENTS_CTSTOPPED_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [events_ctstopped::R](R) reader structure"]
impl crate::Readable for EVENTS_CTSTOPPED_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [events_ctstopped::W](W) writer structure"]
impl crate::Writable for EVENTS_CTSTOPPED_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets EVENTS_CTSTOPPED to value 0"]
impl crate::Resettable for EVENTS_CTSTOPPED_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/clock/events_ctto.rs
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#[doc = "Register `EVENTS_CTTO` reader"]
pub struct R(crate::R<EVENTS_CTTO_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<EVENTS_CTTO_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<EVENTS_CTTO_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<EVENTS_CTTO_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `EVENTS_CTTO` writer"]
pub struct W(crate::W<EVENTS_CTTO_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<EVENTS_CTTO_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<EVENTS_CTTO_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<EVENTS_CTTO_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `EVENTS_CTTO` reader - "]
pub type EVENTS_CTTO_R = crate::BitReader<bool>;
#[doc = "Field `EVENTS_CTTO` writer - "]
pub type EVENTS_CTTO_W<'a, const O: u8> = crate::BitWriter<'a, u32, EVENTS_CTTO_SPEC, bool, O>;
impl R {
#[doc = "Bit 0"]
#[inline(always)]
pub fn events_ctto(&self) -> EVENTS_CTTO_R {
EVENTS_CTTO_R::new((self.bits & 1) != 0)
}
}
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn events_ctto(&mut self) -> EVENTS_CTTO_W<0> {
EVENTS_CTTO_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Calibration timer timeout\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_ctto](index.html) module"]
pub struct EVENTS_CTTO_SPEC;
impl crate::RegisterSpec for EVENTS_CTTO_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [events_ctto::R](R) reader structure"]
impl crate::Readable for EVENTS_CTTO_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [events_ctto::W](W) writer structure"]
impl crate::Writable for EVENTS_CTTO_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets EVENTS_CTTO to value 0"]
impl crate::Resettable for EVENTS_CTTO_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/clock/events_done.rs
Vendored
+80
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@@ -0,0 +1,80 @@
#[doc = "Register `EVENTS_DONE` reader"]
pub struct R(crate::R<EVENTS_DONE_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<EVENTS_DONE_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<EVENTS_DONE_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<EVENTS_DONE_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `EVENTS_DONE` writer"]
pub struct W(crate::W<EVENTS_DONE_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<EVENTS_DONE_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<EVENTS_DONE_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<EVENTS_DONE_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `EVENTS_DONE` reader - "]
pub type EVENTS_DONE_R = crate::BitReader<bool>;
#[doc = "Field `EVENTS_DONE` writer - "]
pub type EVENTS_DONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, EVENTS_DONE_SPEC, bool, O>;
impl R {
#[doc = "Bit 0"]
#[inline(always)]
pub fn events_done(&self) -> EVENTS_DONE_R {
EVENTS_DONE_R::new((self.bits & 1) != 0)
}
}
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn events_done(&mut self) -> EVENTS_DONE_W<0> {
EVENTS_DONE_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Calibration of LFRC completed\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_done](index.html) module"]
pub struct EVENTS_DONE_SPEC;
impl crate::RegisterSpec for EVENTS_DONE_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [events_done::R](R) reader structure"]
impl crate::Readable for EVENTS_DONE_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [events_done::W](W) writer structure"]
impl crate::Writable for EVENTS_DONE_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets EVENTS_DONE to value 0"]
impl crate::Resettable for EVENTS_DONE_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/clock/events_hfclkstarted.rs
Vendored
+81
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#[doc = "Register `EVENTS_HFCLKSTARTED` reader"]
pub struct R(crate::R<EVENTS_HFCLKSTARTED_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<EVENTS_HFCLKSTARTED_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<EVENTS_HFCLKSTARTED_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<EVENTS_HFCLKSTARTED_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `EVENTS_HFCLKSTARTED` writer"]
pub struct W(crate::W<EVENTS_HFCLKSTARTED_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<EVENTS_HFCLKSTARTED_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<EVENTS_HFCLKSTARTED_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<EVENTS_HFCLKSTARTED_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `EVENTS_HFCLKSTARTED` reader - "]
pub type EVENTS_HFCLKSTARTED_R = crate::BitReader<bool>;
#[doc = "Field `EVENTS_HFCLKSTARTED` writer - "]
pub type EVENTS_HFCLKSTARTED_W<'a, const O: u8> =
crate::BitWriter<'a, u32, EVENTS_HFCLKSTARTED_SPEC, bool, O>;
impl R {
#[doc = "Bit 0"]
#[inline(always)]
pub fn events_hfclkstarted(&self) -> EVENTS_HFCLKSTARTED_R {
EVENTS_HFCLKSTARTED_R::new((self.bits & 1) != 0)
}
}
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn events_hfclkstarted(&mut self) -> EVENTS_HFCLKSTARTED_W<0> {
EVENTS_HFCLKSTARTED_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "HFXO crystal oscillator started\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_hfclkstarted](index.html) module"]
pub struct EVENTS_HFCLKSTARTED_SPEC;
impl crate::RegisterSpec for EVENTS_HFCLKSTARTED_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [events_hfclkstarted::R](R) reader structure"]
impl crate::Readable for EVENTS_HFCLKSTARTED_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [events_hfclkstarted::W](W) writer structure"]
impl crate::Writable for EVENTS_HFCLKSTARTED_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets EVENTS_HFCLKSTARTED to value 0"]
impl crate::Resettable for EVENTS_HFCLKSTARTED_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/clock/events_lfclkstarted.rs
Vendored
+81
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#[doc = "Register `EVENTS_LFCLKSTARTED` reader"]
pub struct R(crate::R<EVENTS_LFCLKSTARTED_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<EVENTS_LFCLKSTARTED_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<EVENTS_LFCLKSTARTED_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<EVENTS_LFCLKSTARTED_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `EVENTS_LFCLKSTARTED` writer"]
pub struct W(crate::W<EVENTS_LFCLKSTARTED_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<EVENTS_LFCLKSTARTED_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<EVENTS_LFCLKSTARTED_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<EVENTS_LFCLKSTARTED_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `EVENTS_LFCLKSTARTED` reader - "]
pub type EVENTS_LFCLKSTARTED_R = crate::BitReader<bool>;
#[doc = "Field `EVENTS_LFCLKSTARTED` writer - "]
pub type EVENTS_LFCLKSTARTED_W<'a, const O: u8> =
crate::BitWriter<'a, u32, EVENTS_LFCLKSTARTED_SPEC, bool, O>;
impl R {
#[doc = "Bit 0"]
#[inline(always)]
pub fn events_lfclkstarted(&self) -> EVENTS_LFCLKSTARTED_R {
EVENTS_LFCLKSTARTED_R::new((self.bits & 1) != 0)
}
}
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn events_lfclkstarted(&mut self) -> EVENTS_LFCLKSTARTED_W<0> {
EVENTS_LFCLKSTARTED_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "LFCLK started\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_lfclkstarted](index.html) module"]
pub struct EVENTS_LFCLKSTARTED_SPEC;
impl crate::RegisterSpec for EVENTS_LFCLKSTARTED_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [events_lfclkstarted::R](R) reader structure"]
impl crate::Readable for EVENTS_LFCLKSTARTED_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [events_lfclkstarted::W](W) writer structure"]
impl crate::Writable for EVENTS_LFCLKSTARTED_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets EVENTS_LFCLKSTARTED to value 0"]
impl crate::Resettable for EVENTS_LFCLKSTARTED_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/clock/hfclkrun.rs
Vendored
+74
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@@ -0,0 +1,74 @@
#[doc = "Register `HFCLKRUN` reader"]
pub struct R(crate::R<HFCLKRUN_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<HFCLKRUN_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<HFCLKRUN_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<HFCLKRUN_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Field `STATUS` reader - HFCLKSTART task triggered or not"]
pub type STATUS_R = crate::BitReader<STATUS_A>;
#[doc = "HFCLKSTART task triggered or not\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum STATUS_A {
#[doc = "0: Task not triggered"]
NOT_TRIGGERED = 0,
#[doc = "1: Task triggered"]
TRIGGERED = 1,
}
impl From<STATUS_A> for bool {
#[inline(always)]
fn from(variant: STATUS_A) -> Self {
variant as u8 != 0
}
}
impl STATUS_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> STATUS_A {
match self.bits {
false => STATUS_A::NOT_TRIGGERED,
true => STATUS_A::TRIGGERED,
}
}
#[doc = "Checks if the value of the field is `NOT_TRIGGERED`"]
#[inline(always)]
pub fn is_not_triggered(&self) -> bool {
*self == STATUS_A::NOT_TRIGGERED
}
#[doc = "Checks if the value of the field is `TRIGGERED`"]
#[inline(always)]
pub fn is_triggered(&self) -> bool {
*self == STATUS_A::TRIGGERED
}
}
impl R {
#[doc = "Bit 0 - HFCLKSTART task triggered or not"]
#[inline(always)]
pub fn status(&self) -> STATUS_R {
STATUS_R::new((self.bits & 1) != 0)
}
}
#[doc = "Status indicating that HFCLKSTART task has been triggered\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclkrun](index.html) module"]
pub struct HFCLKRUN_SPEC;
impl crate::RegisterSpec for HFCLKRUN_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [hfclkrun::R](R) reader structure"]
impl crate::Readable for HFCLKRUN_SPEC {
type Reader = R;
}
#[doc = "`reset()` method sets HFCLKRUN to value 0"]
impl crate::Resettable for HFCLKRUN_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/clock/hfclkstat.rs
Vendored
+115
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#[doc = "Register `HFCLKSTAT` reader"]
pub struct R(crate::R<HFCLKSTAT_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<HFCLKSTAT_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<HFCLKSTAT_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<HFCLKSTAT_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Field `SRC` reader - Source of HFCLK"]
pub type SRC_R = crate::BitReader<SRC_A>;
#[doc = "Source of HFCLK\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum SRC_A {
#[doc = "0: 64 MHz internal oscillator (HFINT)"]
RC = 0,
#[doc = "1: 64 MHz crystal oscillator (HFXO)"]
XTAL = 1,
}
impl From<SRC_A> for bool {
#[inline(always)]
fn from(variant: SRC_A) -> Self {
variant as u8 != 0
}
}
impl SRC_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> SRC_A {
match self.bits {
false => SRC_A::RC,
true => SRC_A::XTAL,
}
}
#[doc = "Checks if the value of the field is `RC`"]
#[inline(always)]
pub fn is_rc(&self) -> bool {
*self == SRC_A::RC
}
#[doc = "Checks if the value of the field is `XTAL`"]
#[inline(always)]
pub fn is_xtal(&self) -> bool {
*self == SRC_A::XTAL
}
}
#[doc = "Field `STATE` reader - HFCLK state"]
pub type STATE_R = crate::BitReader<STATE_A>;
#[doc = "HFCLK state\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum STATE_A {
#[doc = "0: HFCLK not running"]
NOT_RUNNING = 0,
#[doc = "1: HFCLK running"]
RUNNING = 1,
}
impl From<STATE_A> for bool {
#[inline(always)]
fn from(variant: STATE_A) -> Self {
variant as u8 != 0
}
}
impl STATE_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> STATE_A {
match self.bits {
false => STATE_A::NOT_RUNNING,
true => STATE_A::RUNNING,
}
}
#[doc = "Checks if the value of the field is `NOT_RUNNING`"]
#[inline(always)]
pub fn is_not_running(&self) -> bool {
*self == STATE_A::NOT_RUNNING
}
#[doc = "Checks if the value of the field is `RUNNING`"]
#[inline(always)]
pub fn is_running(&self) -> bool {
*self == STATE_A::RUNNING
}
}
impl R {
#[doc = "Bit 0 - Source of HFCLK"]
#[inline(always)]
pub fn src(&self) -> SRC_R {
SRC_R::new((self.bits & 1) != 0)
}
#[doc = "Bit 16 - HFCLK state"]
#[inline(always)]
pub fn state(&self) -> STATE_R {
STATE_R::new(((self.bits >> 16) & 1) != 0)
}
}
#[doc = "HFCLK status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclkstat](index.html) module"]
pub struct HFCLKSTAT_SPEC;
impl crate::RegisterSpec for HFCLKSTAT_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [hfclkstat::R](R) reader structure"]
impl crate::Readable for HFCLKSTAT_SPEC {
type Reader = R;
}
#[doc = "`reset()` method sets HFCLKSTAT to value 0"]
impl crate::Resettable for HFCLKSTAT_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/clock/hfxodebounce.rs
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#[doc = "Register `HFXODEBOUNCE` reader"]
pub struct R(crate::R<HFXODEBOUNCE_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<HFXODEBOUNCE_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<HFXODEBOUNCE_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<HFXODEBOUNCE_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `HFXODEBOUNCE` writer"]
pub struct W(crate::W<HFXODEBOUNCE_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<HFXODEBOUNCE_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<HFXODEBOUNCE_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<HFXODEBOUNCE_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `HFXODEBOUNCE` reader - HFXO debounce time. Debounce time = HFXODEBOUNCE * 16 us."]
pub type HFXODEBOUNCE_R = crate::FieldReader<u8, HFXODEBOUNCE_A>;
#[doc = "HFXO debounce time. Debounce time = HFXODEBOUNCE * 16 us.\n\nValue on reset: 16"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum HFXODEBOUNCE_A {
#[doc = "16: 256 us debounce time. Recommended for TSX-3225, FA-20H and FA-128 crystals."]
DB256US = 16,
#[doc = "64: 1024 us debounce time. Recommended for NX1612AA and NX1210AB crystals."]
DB1024US = 64,
}
impl From<HFXODEBOUNCE_A> for u8 {
#[inline(always)]
fn from(variant: HFXODEBOUNCE_A) -> Self {
variant as _
}
}
impl HFXODEBOUNCE_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> Option<HFXODEBOUNCE_A> {
match self.bits {
16 => Some(HFXODEBOUNCE_A::DB256US),
64 => Some(HFXODEBOUNCE_A::DB1024US),
_ => None,
}
}
#[doc = "Checks if the value of the field is `DB256US`"]
#[inline(always)]
pub fn is_db256us(&self) -> bool {
*self == HFXODEBOUNCE_A::DB256US
}
#[doc = "Checks if the value of the field is `DB1024US`"]
#[inline(always)]
pub fn is_db1024us(&self) -> bool {
*self == HFXODEBOUNCE_A::DB1024US
}
}
#[doc = "Field `HFXODEBOUNCE` writer - HFXO debounce time. Debounce time = HFXODEBOUNCE * 16 us."]
pub type HFXODEBOUNCE_W<'a, const O: u8> =
crate::FieldWriter<'a, u32, HFXODEBOUNCE_SPEC, u8, HFXODEBOUNCE_A, 8, O>;
impl<'a, const O: u8> HFXODEBOUNCE_W<'a, O> {
#[doc = "256 us debounce time. Recommended for TSX-3225, FA-20H and FA-128 crystals."]
#[inline(always)]
pub fn db256us(self) -> &'a mut W {
self.variant(HFXODEBOUNCE_A::DB256US)
}
#[doc = "1024 us debounce time. Recommended for NX1612AA and NX1210AB crystals."]
#[inline(always)]
pub fn db1024us(self) -> &'a mut W {
self.variant(HFXODEBOUNCE_A::DB1024US)
}
}
impl R {
#[doc = "Bits 0:7 - HFXO debounce time. Debounce time = HFXODEBOUNCE * 16 us."]
#[inline(always)]
pub fn hfxodebounce(&self) -> HFXODEBOUNCE_R {
HFXODEBOUNCE_R::new((self.bits & 0xff) as u8)
}
}
impl W {
#[doc = "Bits 0:7 - HFXO debounce time. Debounce time = HFXODEBOUNCE * 16 us."]
#[inline(always)]
pub fn hfxodebounce(&mut self) -> HFXODEBOUNCE_W<0> {
HFXODEBOUNCE_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "HFXO debounce time. The HFXO is started by triggering the TASKS_HFCLKSTART task.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfxodebounce](index.html) module"]
pub struct HFXODEBOUNCE_SPEC;
impl crate::RegisterSpec for HFXODEBOUNCE_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [hfxodebounce::R](R) reader structure"]
impl crate::Readable for HFXODEBOUNCE_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [hfxodebounce::W](W) writer structure"]
impl crate::Writable for HFXODEBOUNCE_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets HFXODEBOUNCE to value 0x10"]
impl crate::Resettable for HFXODEBOUNCE_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0x10
}
}
vendor/nrf52840-pac/src/clock/intenclr.rs
Vendored
+470
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#[doc = "Register `INTENCLR` reader"]
pub struct R(crate::R<INTENCLR_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<INTENCLR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<INTENCLR_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<INTENCLR_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `INTENCLR` writer"]
pub struct W(crate::W<INTENCLR_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<INTENCLR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<INTENCLR_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<INTENCLR_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `HFCLKSTARTED` reader - Write '1' to disable interrupt for HFCLKSTARTED event"]
pub type HFCLKSTARTED_R = crate::BitReader<HFCLKSTARTED_A>;
#[doc = "Write '1' to disable interrupt for HFCLKSTARTED event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum HFCLKSTARTED_A {
#[doc = "0: Read: Disabled"]
DISABLED = 0,
#[doc = "1: Read: Enabled"]
ENABLED = 1,
}
impl From<HFCLKSTARTED_A> for bool {
#[inline(always)]
fn from(variant: HFCLKSTARTED_A) -> Self {
variant as u8 != 0
}
}
impl HFCLKSTARTED_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> HFCLKSTARTED_A {
match self.bits {
false => HFCLKSTARTED_A::DISABLED,
true => HFCLKSTARTED_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == HFCLKSTARTED_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == HFCLKSTARTED_A::ENABLED
}
}
#[doc = "Write '1' to disable interrupt for HFCLKSTARTED event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum HFCLKSTARTED_AW {
#[doc = "1: Disable"]
CLEAR = 1,
}
impl From<HFCLKSTARTED_AW> for bool {
#[inline(always)]
fn from(variant: HFCLKSTARTED_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `HFCLKSTARTED` writer - Write '1' to disable interrupt for HFCLKSTARTED event"]
pub type HFCLKSTARTED_W<'a, const O: u8> =
crate::BitWriter<'a, u32, INTENCLR_SPEC, HFCLKSTARTED_AW, O>;
impl<'a, const O: u8> HFCLKSTARTED_W<'a, O> {
#[doc = "Disable"]
#[inline(always)]
pub fn clear(self) -> &'a mut W {
self.variant(HFCLKSTARTED_AW::CLEAR)
}
}
#[doc = "Field `LFCLKSTARTED` reader - Write '1' to disable interrupt for LFCLKSTARTED event"]
pub type LFCLKSTARTED_R = crate::BitReader<LFCLKSTARTED_A>;
#[doc = "Write '1' to disable interrupt for LFCLKSTARTED event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum LFCLKSTARTED_A {
#[doc = "0: Read: Disabled"]
DISABLED = 0,
#[doc = "1: Read: Enabled"]
ENABLED = 1,
}
impl From<LFCLKSTARTED_A> for bool {
#[inline(always)]
fn from(variant: LFCLKSTARTED_A) -> Self {
variant as u8 != 0
}
}
impl LFCLKSTARTED_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> LFCLKSTARTED_A {
match self.bits {
false => LFCLKSTARTED_A::DISABLED,
true => LFCLKSTARTED_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == LFCLKSTARTED_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == LFCLKSTARTED_A::ENABLED
}
}
#[doc = "Write '1' to disable interrupt for LFCLKSTARTED event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum LFCLKSTARTED_AW {
#[doc = "1: Disable"]
CLEAR = 1,
}
impl From<LFCLKSTARTED_AW> for bool {
#[inline(always)]
fn from(variant: LFCLKSTARTED_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `LFCLKSTARTED` writer - Write '1' to disable interrupt for LFCLKSTARTED event"]
pub type LFCLKSTARTED_W<'a, const O: u8> =
crate::BitWriter<'a, u32, INTENCLR_SPEC, LFCLKSTARTED_AW, O>;
impl<'a, const O: u8> LFCLKSTARTED_W<'a, O> {
#[doc = "Disable"]
#[inline(always)]
pub fn clear(self) -> &'a mut W {
self.variant(LFCLKSTARTED_AW::CLEAR)
}
}
#[doc = "Field `DONE` reader - Write '1' to disable interrupt for DONE event"]
pub type DONE_R = crate::BitReader<DONE_A>;
#[doc = "Write '1' to disable interrupt for DONE event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DONE_A {
#[doc = "0: Read: Disabled"]
DISABLED = 0,
#[doc = "1: Read: Enabled"]
ENABLED = 1,
}
impl From<DONE_A> for bool {
#[inline(always)]
fn from(variant: DONE_A) -> Self {
variant as u8 != 0
}
}
impl DONE_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> DONE_A {
match self.bits {
false => DONE_A::DISABLED,
true => DONE_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == DONE_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == DONE_A::ENABLED
}
}
#[doc = "Write '1' to disable interrupt for DONE event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DONE_AW {
#[doc = "1: Disable"]
CLEAR = 1,
}
impl From<DONE_AW> for bool {
#[inline(always)]
fn from(variant: DONE_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `DONE` writer - Write '1' to disable interrupt for DONE event"]
pub type DONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, DONE_AW, O>;
impl<'a, const O: u8> DONE_W<'a, O> {
#[doc = "Disable"]
#[inline(always)]
pub fn clear(self) -> &'a mut W {
self.variant(DONE_AW::CLEAR)
}
}
#[doc = "Field `CTTO` reader - Write '1' to disable interrupt for CTTO event"]
pub type CTTO_R = crate::BitReader<CTTO_A>;
#[doc = "Write '1' to disable interrupt for CTTO event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CTTO_A {
#[doc = "0: Read: Disabled"]
DISABLED = 0,
#[doc = "1: Read: Enabled"]
ENABLED = 1,
}
impl From<CTTO_A> for bool {
#[inline(always)]
fn from(variant: CTTO_A) -> Self {
variant as u8 != 0
}
}
impl CTTO_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> CTTO_A {
match self.bits {
false => CTTO_A::DISABLED,
true => CTTO_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == CTTO_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == CTTO_A::ENABLED
}
}
#[doc = "Write '1' to disable interrupt for CTTO event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CTTO_AW {
#[doc = "1: Disable"]
CLEAR = 1,
}
impl From<CTTO_AW> for bool {
#[inline(always)]
fn from(variant: CTTO_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `CTTO` writer - Write '1' to disable interrupt for CTTO event"]
pub type CTTO_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, CTTO_AW, O>;
impl<'a, const O: u8> CTTO_W<'a, O> {
#[doc = "Disable"]
#[inline(always)]
pub fn clear(self) -> &'a mut W {
self.variant(CTTO_AW::CLEAR)
}
}
#[doc = "Field `CTSTARTED` reader - Write '1' to disable interrupt for CTSTARTED event"]
pub type CTSTARTED_R = crate::BitReader<CTSTARTED_A>;
#[doc = "Write '1' to disable interrupt for CTSTARTED event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CTSTARTED_A {
#[doc = "0: Read: Disabled"]
DISABLED = 0,
#[doc = "1: Read: Enabled"]
ENABLED = 1,
}
impl From<CTSTARTED_A> for bool {
#[inline(always)]
fn from(variant: CTSTARTED_A) -> Self {
variant as u8 != 0
}
}
impl CTSTARTED_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> CTSTARTED_A {
match self.bits {
false => CTSTARTED_A::DISABLED,
true => CTSTARTED_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == CTSTARTED_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == CTSTARTED_A::ENABLED
}
}
#[doc = "Write '1' to disable interrupt for CTSTARTED event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CTSTARTED_AW {
#[doc = "1: Disable"]
CLEAR = 1,
}
impl From<CTSTARTED_AW> for bool {
#[inline(always)]
fn from(variant: CTSTARTED_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `CTSTARTED` writer - Write '1' to disable interrupt for CTSTARTED event"]
pub type CTSTARTED_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, CTSTARTED_AW, O>;
impl<'a, const O: u8> CTSTARTED_W<'a, O> {
#[doc = "Disable"]
#[inline(always)]
pub fn clear(self) -> &'a mut W {
self.variant(CTSTARTED_AW::CLEAR)
}
}
#[doc = "Field `CTSTOPPED` reader - Write '1' to disable interrupt for CTSTOPPED event"]
pub type CTSTOPPED_R = crate::BitReader<CTSTOPPED_A>;
#[doc = "Write '1' to disable interrupt for CTSTOPPED event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CTSTOPPED_A {
#[doc = "0: Read: Disabled"]
DISABLED = 0,
#[doc = "1: Read: Enabled"]
ENABLED = 1,
}
impl From<CTSTOPPED_A> for bool {
#[inline(always)]
fn from(variant: CTSTOPPED_A) -> Self {
variant as u8 != 0
}
}
impl CTSTOPPED_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> CTSTOPPED_A {
match self.bits {
false => CTSTOPPED_A::DISABLED,
true => CTSTOPPED_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == CTSTOPPED_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == CTSTOPPED_A::ENABLED
}
}
#[doc = "Write '1' to disable interrupt for CTSTOPPED event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CTSTOPPED_AW {
#[doc = "1: Disable"]
CLEAR = 1,
}
impl From<CTSTOPPED_AW> for bool {
#[inline(always)]
fn from(variant: CTSTOPPED_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `CTSTOPPED` writer - Write '1' to disable interrupt for CTSTOPPED event"]
pub type CTSTOPPED_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, CTSTOPPED_AW, O>;
impl<'a, const O: u8> CTSTOPPED_W<'a, O> {
#[doc = "Disable"]
#[inline(always)]
pub fn clear(self) -> &'a mut W {
self.variant(CTSTOPPED_AW::CLEAR)
}
}
impl R {
#[doc = "Bit 0 - Write '1' to disable interrupt for HFCLKSTARTED event"]
#[inline(always)]
pub fn hfclkstarted(&self) -> HFCLKSTARTED_R {
HFCLKSTARTED_R::new((self.bits & 1) != 0)
}
#[doc = "Bit 1 - Write '1' to disable interrupt for LFCLKSTARTED event"]
#[inline(always)]
pub fn lfclkstarted(&self) -> LFCLKSTARTED_R {
LFCLKSTARTED_R::new(((self.bits >> 1) & 1) != 0)
}
#[doc = "Bit 3 - Write '1' to disable interrupt for DONE event"]
#[inline(always)]
pub fn done(&self) -> DONE_R {
DONE_R::new(((self.bits >> 3) & 1) != 0)
}
#[doc = "Bit 4 - Write '1' to disable interrupt for CTTO event"]
#[inline(always)]
pub fn ctto(&self) -> CTTO_R {
CTTO_R::new(((self.bits >> 4) & 1) != 0)
}
#[doc = "Bit 10 - Write '1' to disable interrupt for CTSTARTED event"]
#[inline(always)]
pub fn ctstarted(&self) -> CTSTARTED_R {
CTSTARTED_R::new(((self.bits >> 10) & 1) != 0)
}
#[doc = "Bit 11 - Write '1' to disable interrupt for CTSTOPPED event"]
#[inline(always)]
pub fn ctstopped(&self) -> CTSTOPPED_R {
CTSTOPPED_R::new(((self.bits >> 11) & 1) != 0)
}
}
impl W {
#[doc = "Bit 0 - Write '1' to disable interrupt for HFCLKSTARTED event"]
#[inline(always)]
pub fn hfclkstarted(&mut self) -> HFCLKSTARTED_W<0> {
HFCLKSTARTED_W::new(self)
}
#[doc = "Bit 1 - Write '1' to disable interrupt for LFCLKSTARTED event"]
#[inline(always)]
pub fn lfclkstarted(&mut self) -> LFCLKSTARTED_W<1> {
LFCLKSTARTED_W::new(self)
}
#[doc = "Bit 3 - Write '1' to disable interrupt for DONE event"]
#[inline(always)]
pub fn done(&mut self) -> DONE_W<3> {
DONE_W::new(self)
}
#[doc = "Bit 4 - Write '1' to disable interrupt for CTTO event"]
#[inline(always)]
pub fn ctto(&mut self) -> CTTO_W<4> {
CTTO_W::new(self)
}
#[doc = "Bit 10 - Write '1' to disable interrupt for CTSTARTED event"]
#[inline(always)]
pub fn ctstarted(&mut self) -> CTSTARTED_W<10> {
CTSTARTED_W::new(self)
}
#[doc = "Bit 11 - Write '1' to disable interrupt for CTSTOPPED event"]
#[inline(always)]
pub fn ctstopped(&mut self) -> CTSTOPPED_W<11> {
CTSTOPPED_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Disable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"]
pub struct INTENCLR_SPEC;
impl crate::RegisterSpec for INTENCLR_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [intenclr::R](R) reader structure"]
impl crate::Readable for INTENCLR_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"]
impl crate::Writable for INTENCLR_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets INTENCLR to value 0"]
impl crate::Resettable for INTENCLR_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/clock/intenset.rs
Vendored
+470
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@@ -0,0 +1,470 @@
#[doc = "Register `INTENSET` reader"]
pub struct R(crate::R<INTENSET_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<INTENSET_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<INTENSET_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<INTENSET_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `INTENSET` writer"]
pub struct W(crate::W<INTENSET_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<INTENSET_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<INTENSET_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<INTENSET_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `HFCLKSTARTED` reader - Write '1' to enable interrupt for HFCLKSTARTED event"]
pub type HFCLKSTARTED_R = crate::BitReader<HFCLKSTARTED_A>;
#[doc = "Write '1' to enable interrupt for HFCLKSTARTED event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum HFCLKSTARTED_A {
#[doc = "0: Read: Disabled"]
DISABLED = 0,
#[doc = "1: Read: Enabled"]
ENABLED = 1,
}
impl From<HFCLKSTARTED_A> for bool {
#[inline(always)]
fn from(variant: HFCLKSTARTED_A) -> Self {
variant as u8 != 0
}
}
impl HFCLKSTARTED_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> HFCLKSTARTED_A {
match self.bits {
false => HFCLKSTARTED_A::DISABLED,
true => HFCLKSTARTED_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == HFCLKSTARTED_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == HFCLKSTARTED_A::ENABLED
}
}
#[doc = "Write '1' to enable interrupt for HFCLKSTARTED event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum HFCLKSTARTED_AW {
#[doc = "1: Enable"]
SET = 1,
}
impl From<HFCLKSTARTED_AW> for bool {
#[inline(always)]
fn from(variant: HFCLKSTARTED_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `HFCLKSTARTED` writer - Write '1' to enable interrupt for HFCLKSTARTED event"]
pub type HFCLKSTARTED_W<'a, const O: u8> =
crate::BitWriter<'a, u32, INTENSET_SPEC, HFCLKSTARTED_AW, O>;
impl<'a, const O: u8> HFCLKSTARTED_W<'a, O> {
#[doc = "Enable"]
#[inline(always)]
pub fn set(self) -> &'a mut W {
self.variant(HFCLKSTARTED_AW::SET)
}
}
#[doc = "Field `LFCLKSTARTED` reader - Write '1' to enable interrupt for LFCLKSTARTED event"]
pub type LFCLKSTARTED_R = crate::BitReader<LFCLKSTARTED_A>;
#[doc = "Write '1' to enable interrupt for LFCLKSTARTED event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum LFCLKSTARTED_A {
#[doc = "0: Read: Disabled"]
DISABLED = 0,
#[doc = "1: Read: Enabled"]
ENABLED = 1,
}
impl From<LFCLKSTARTED_A> for bool {
#[inline(always)]
fn from(variant: LFCLKSTARTED_A) -> Self {
variant as u8 != 0
}
}
impl LFCLKSTARTED_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> LFCLKSTARTED_A {
match self.bits {
false => LFCLKSTARTED_A::DISABLED,
true => LFCLKSTARTED_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == LFCLKSTARTED_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == LFCLKSTARTED_A::ENABLED
}
}
#[doc = "Write '1' to enable interrupt for LFCLKSTARTED event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum LFCLKSTARTED_AW {
#[doc = "1: Enable"]
SET = 1,
}
impl From<LFCLKSTARTED_AW> for bool {
#[inline(always)]
fn from(variant: LFCLKSTARTED_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `LFCLKSTARTED` writer - Write '1' to enable interrupt for LFCLKSTARTED event"]
pub type LFCLKSTARTED_W<'a, const O: u8> =
crate::BitWriter<'a, u32, INTENSET_SPEC, LFCLKSTARTED_AW, O>;
impl<'a, const O: u8> LFCLKSTARTED_W<'a, O> {
#[doc = "Enable"]
#[inline(always)]
pub fn set(self) -> &'a mut W {
self.variant(LFCLKSTARTED_AW::SET)
}
}
#[doc = "Field `DONE` reader - Write '1' to enable interrupt for DONE event"]
pub type DONE_R = crate::BitReader<DONE_A>;
#[doc = "Write '1' to enable interrupt for DONE event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DONE_A {
#[doc = "0: Read: Disabled"]
DISABLED = 0,
#[doc = "1: Read: Enabled"]
ENABLED = 1,
}
impl From<DONE_A> for bool {
#[inline(always)]
fn from(variant: DONE_A) -> Self {
variant as u8 != 0
}
}
impl DONE_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> DONE_A {
match self.bits {
false => DONE_A::DISABLED,
true => DONE_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == DONE_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == DONE_A::ENABLED
}
}
#[doc = "Write '1' to enable interrupt for DONE event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DONE_AW {
#[doc = "1: Enable"]
SET = 1,
}
impl From<DONE_AW> for bool {
#[inline(always)]
fn from(variant: DONE_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `DONE` writer - Write '1' to enable interrupt for DONE event"]
pub type DONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, DONE_AW, O>;
impl<'a, const O: u8> DONE_W<'a, O> {
#[doc = "Enable"]
#[inline(always)]
pub fn set(self) -> &'a mut W {
self.variant(DONE_AW::SET)
}
}
#[doc = "Field `CTTO` reader - Write '1' to enable interrupt for CTTO event"]
pub type CTTO_R = crate::BitReader<CTTO_A>;
#[doc = "Write '1' to enable interrupt for CTTO event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CTTO_A {
#[doc = "0: Read: Disabled"]
DISABLED = 0,
#[doc = "1: Read: Enabled"]
ENABLED = 1,
}
impl From<CTTO_A> for bool {
#[inline(always)]
fn from(variant: CTTO_A) -> Self {
variant as u8 != 0
}
}
impl CTTO_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> CTTO_A {
match self.bits {
false => CTTO_A::DISABLED,
true => CTTO_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == CTTO_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == CTTO_A::ENABLED
}
}
#[doc = "Write '1' to enable interrupt for CTTO event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CTTO_AW {
#[doc = "1: Enable"]
SET = 1,
}
impl From<CTTO_AW> for bool {
#[inline(always)]
fn from(variant: CTTO_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `CTTO` writer - Write '1' to enable interrupt for CTTO event"]
pub type CTTO_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, CTTO_AW, O>;
impl<'a, const O: u8> CTTO_W<'a, O> {
#[doc = "Enable"]
#[inline(always)]
pub fn set(self) -> &'a mut W {
self.variant(CTTO_AW::SET)
}
}
#[doc = "Field `CTSTARTED` reader - Write '1' to enable interrupt for CTSTARTED event"]
pub type CTSTARTED_R = crate::BitReader<CTSTARTED_A>;
#[doc = "Write '1' to enable interrupt for CTSTARTED event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CTSTARTED_A {
#[doc = "0: Read: Disabled"]
DISABLED = 0,
#[doc = "1: Read: Enabled"]
ENABLED = 1,
}
impl From<CTSTARTED_A> for bool {
#[inline(always)]
fn from(variant: CTSTARTED_A) -> Self {
variant as u8 != 0
}
}
impl CTSTARTED_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> CTSTARTED_A {
match self.bits {
false => CTSTARTED_A::DISABLED,
true => CTSTARTED_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == CTSTARTED_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == CTSTARTED_A::ENABLED
}
}
#[doc = "Write '1' to enable interrupt for CTSTARTED event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CTSTARTED_AW {
#[doc = "1: Enable"]
SET = 1,
}
impl From<CTSTARTED_AW> for bool {
#[inline(always)]
fn from(variant: CTSTARTED_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `CTSTARTED` writer - Write '1' to enable interrupt for CTSTARTED event"]
pub type CTSTARTED_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, CTSTARTED_AW, O>;
impl<'a, const O: u8> CTSTARTED_W<'a, O> {
#[doc = "Enable"]
#[inline(always)]
pub fn set(self) -> &'a mut W {
self.variant(CTSTARTED_AW::SET)
}
}
#[doc = "Field `CTSTOPPED` reader - Write '1' to enable interrupt for CTSTOPPED event"]
pub type CTSTOPPED_R = crate::BitReader<CTSTOPPED_A>;
#[doc = "Write '1' to enable interrupt for CTSTOPPED event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CTSTOPPED_A {
#[doc = "0: Read: Disabled"]
DISABLED = 0,
#[doc = "1: Read: Enabled"]
ENABLED = 1,
}
impl From<CTSTOPPED_A> for bool {
#[inline(always)]
fn from(variant: CTSTOPPED_A) -> Self {
variant as u8 != 0
}
}
impl CTSTOPPED_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> CTSTOPPED_A {
match self.bits {
false => CTSTOPPED_A::DISABLED,
true => CTSTOPPED_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == CTSTOPPED_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == CTSTOPPED_A::ENABLED
}
}
#[doc = "Write '1' to enable interrupt for CTSTOPPED event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CTSTOPPED_AW {
#[doc = "1: Enable"]
SET = 1,
}
impl From<CTSTOPPED_AW> for bool {
#[inline(always)]
fn from(variant: CTSTOPPED_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `CTSTOPPED` writer - Write '1' to enable interrupt for CTSTOPPED event"]
pub type CTSTOPPED_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, CTSTOPPED_AW, O>;
impl<'a, const O: u8> CTSTOPPED_W<'a, O> {
#[doc = "Enable"]
#[inline(always)]
pub fn set(self) -> &'a mut W {
self.variant(CTSTOPPED_AW::SET)
}
}
impl R {
#[doc = "Bit 0 - Write '1' to enable interrupt for HFCLKSTARTED event"]
#[inline(always)]
pub fn hfclkstarted(&self) -> HFCLKSTARTED_R {
HFCLKSTARTED_R::new((self.bits & 1) != 0)
}
#[doc = "Bit 1 - Write '1' to enable interrupt for LFCLKSTARTED event"]
#[inline(always)]
pub fn lfclkstarted(&self) -> LFCLKSTARTED_R {
LFCLKSTARTED_R::new(((self.bits >> 1) & 1) != 0)
}
#[doc = "Bit 3 - Write '1' to enable interrupt for DONE event"]
#[inline(always)]
pub fn done(&self) -> DONE_R {
DONE_R::new(((self.bits >> 3) & 1) != 0)
}
#[doc = "Bit 4 - Write '1' to enable interrupt for CTTO event"]
#[inline(always)]
pub fn ctto(&self) -> CTTO_R {
CTTO_R::new(((self.bits >> 4) & 1) != 0)
}
#[doc = "Bit 10 - Write '1' to enable interrupt for CTSTARTED event"]
#[inline(always)]
pub fn ctstarted(&self) -> CTSTARTED_R {
CTSTARTED_R::new(((self.bits >> 10) & 1) != 0)
}
#[doc = "Bit 11 - Write '1' to enable interrupt for CTSTOPPED event"]
#[inline(always)]
pub fn ctstopped(&self) -> CTSTOPPED_R {
CTSTOPPED_R::new(((self.bits >> 11) & 1) != 0)
}
}
impl W {
#[doc = "Bit 0 - Write '1' to enable interrupt for HFCLKSTARTED event"]
#[inline(always)]
pub fn hfclkstarted(&mut self) -> HFCLKSTARTED_W<0> {
HFCLKSTARTED_W::new(self)
}
#[doc = "Bit 1 - Write '1' to enable interrupt for LFCLKSTARTED event"]
#[inline(always)]
pub fn lfclkstarted(&mut self) -> LFCLKSTARTED_W<1> {
LFCLKSTARTED_W::new(self)
}
#[doc = "Bit 3 - Write '1' to enable interrupt for DONE event"]
#[inline(always)]
pub fn done(&mut self) -> DONE_W<3> {
DONE_W::new(self)
}
#[doc = "Bit 4 - Write '1' to enable interrupt for CTTO event"]
#[inline(always)]
pub fn ctto(&mut self) -> CTTO_W<4> {
CTTO_W::new(self)
}
#[doc = "Bit 10 - Write '1' to enable interrupt for CTSTARTED event"]
#[inline(always)]
pub fn ctstarted(&mut self) -> CTSTARTED_W<10> {
CTSTARTED_W::new(self)
}
#[doc = "Bit 11 - Write '1' to enable interrupt for CTSTOPPED event"]
#[inline(always)]
pub fn ctstopped(&mut self) -> CTSTOPPED_W<11> {
CTSTOPPED_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Enable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"]
pub struct INTENSET_SPEC;
impl crate::RegisterSpec for INTENSET_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [intenset::R](R) reader structure"]
impl crate::Readable for INTENSET_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"]
impl crate::Writable for INTENSET_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets INTENSET to value 0"]
impl crate::Resettable for INTENSET_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/clock/lfclkrun.rs
Vendored
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#[doc = "Register `LFCLKRUN` reader"]
pub struct R(crate::R<LFCLKRUN_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<LFCLKRUN_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<LFCLKRUN_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<LFCLKRUN_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Field `STATUS` reader - LFCLKSTART task triggered or not"]
pub type STATUS_R = crate::BitReader<STATUS_A>;
#[doc = "LFCLKSTART task triggered or not\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum STATUS_A {
#[doc = "0: Task not triggered"]
NOT_TRIGGERED = 0,
#[doc = "1: Task triggered"]
TRIGGERED = 1,
}
impl From<STATUS_A> for bool {
#[inline(always)]
fn from(variant: STATUS_A) -> Self {
variant as u8 != 0
}
}
impl STATUS_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> STATUS_A {
match self.bits {
false => STATUS_A::NOT_TRIGGERED,
true => STATUS_A::TRIGGERED,
}
}
#[doc = "Checks if the value of the field is `NOT_TRIGGERED`"]
#[inline(always)]
pub fn is_not_triggered(&self) -> bool {
*self == STATUS_A::NOT_TRIGGERED
}
#[doc = "Checks if the value of the field is `TRIGGERED`"]
#[inline(always)]
pub fn is_triggered(&self) -> bool {
*self == STATUS_A::TRIGGERED
}
}
impl R {
#[doc = "Bit 0 - LFCLKSTART task triggered or not"]
#[inline(always)]
pub fn status(&self) -> STATUS_R {
STATUS_R::new((self.bits & 1) != 0)
}
}
#[doc = "Status indicating that LFCLKSTART task has been triggered\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfclkrun](index.html) module"]
pub struct LFCLKRUN_SPEC;
impl crate::RegisterSpec for LFCLKRUN_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [lfclkrun::R](R) reader structure"]
impl crate::Readable for LFCLKRUN_SPEC {
type Reader = R;
}
#[doc = "`reset()` method sets LFCLKRUN to value 0"]
impl crate::Resettable for LFCLKRUN_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/clock/lfclksrc.rs
Vendored
+261
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#[doc = "Register `LFCLKSRC` reader"]
pub struct R(crate::R<LFCLKSRC_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<LFCLKSRC_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<LFCLKSRC_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<LFCLKSRC_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `LFCLKSRC` writer"]
pub struct W(crate::W<LFCLKSRC_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<LFCLKSRC_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<LFCLKSRC_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<LFCLKSRC_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `SRC` reader - Clock source"]
pub type SRC_R = crate::FieldReader<u8, SRC_A>;
#[doc = "Clock source\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum SRC_A {
#[doc = "0: 32.768 kHz RC oscillator (LFRC)"]
RC = 0,
#[doc = "1: 32.768 kHz crystal oscillator (LFXO)"]
XTAL = 1,
#[doc = "2: 32.768 kHz synthesized from HFCLK (LFSYNT)"]
SYNTH = 2,
}
impl From<SRC_A> for u8 {
#[inline(always)]
fn from(variant: SRC_A) -> Self {
variant as _
}
}
impl SRC_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> Option<SRC_A> {
match self.bits {
0 => Some(SRC_A::RC),
1 => Some(SRC_A::XTAL),
2 => Some(SRC_A::SYNTH),
_ => None,
}
}
#[doc = "Checks if the value of the field is `RC`"]
#[inline(always)]
pub fn is_rc(&self) -> bool {
*self == SRC_A::RC
}
#[doc = "Checks if the value of the field is `XTAL`"]
#[inline(always)]
pub fn is_xtal(&self) -> bool {
*self == SRC_A::XTAL
}
#[doc = "Checks if the value of the field is `SYNTH`"]
#[inline(always)]
pub fn is_synth(&self) -> bool {
*self == SRC_A::SYNTH
}
}
#[doc = "Field `SRC` writer - Clock source"]
pub type SRC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, LFCLKSRC_SPEC, u8, SRC_A, 2, O>;
impl<'a, const O: u8> SRC_W<'a, O> {
#[doc = "32.768 kHz RC oscillator (LFRC)"]
#[inline(always)]
pub fn rc(self) -> &'a mut W {
self.variant(SRC_A::RC)
}
#[doc = "32.768 kHz crystal oscillator (LFXO)"]
#[inline(always)]
pub fn xtal(self) -> &'a mut W {
self.variant(SRC_A::XTAL)
}
#[doc = "32.768 kHz synthesized from HFCLK (LFSYNT)"]
#[inline(always)]
pub fn synth(self) -> &'a mut W {
self.variant(SRC_A::SYNTH)
}
}
#[doc = "Field `BYPASS` reader - Enable or disable bypass of LFCLK crystal oscillator with external clock source"]
pub type BYPASS_R = crate::BitReader<BYPASS_A>;
#[doc = "Enable or disable bypass of LFCLK crystal oscillator with external clock source\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum BYPASS_A {
#[doc = "0: Disable (use with Xtal or low-swing external source)"]
DISABLED = 0,
#[doc = "1: Enable (use with rail-to-rail external source)"]
ENABLED = 1,
}
impl From<BYPASS_A> for bool {
#[inline(always)]
fn from(variant: BYPASS_A) -> Self {
variant as u8 != 0
}
}
impl BYPASS_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> BYPASS_A {
match self.bits {
false => BYPASS_A::DISABLED,
true => BYPASS_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == BYPASS_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == BYPASS_A::ENABLED
}
}
#[doc = "Field `BYPASS` writer - Enable or disable bypass of LFCLK crystal oscillator with external clock source"]
pub type BYPASS_W<'a, const O: u8> = crate::BitWriter<'a, u32, LFCLKSRC_SPEC, BYPASS_A, O>;
impl<'a, const O: u8> BYPASS_W<'a, O> {
#[doc = "Disable (use with Xtal or low-swing external source)"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(BYPASS_A::DISABLED)
}
#[doc = "Enable (use with rail-to-rail external source)"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(BYPASS_A::ENABLED)
}
}
#[doc = "Field `EXTERNAL` reader - Enable or disable external source for LFCLK"]
pub type EXTERNAL_R = crate::BitReader<EXTERNAL_A>;
#[doc = "Enable or disable external source for LFCLK\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum EXTERNAL_A {
#[doc = "0: Disable external source (use with Xtal)"]
DISABLED = 0,
#[doc = "1: Enable use of external source instead of Xtal (SRC needs to be set to Xtal)"]
ENABLED = 1,
}
impl From<EXTERNAL_A> for bool {
#[inline(always)]
fn from(variant: EXTERNAL_A) -> Self {
variant as u8 != 0
}
}
impl EXTERNAL_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> EXTERNAL_A {
match self.bits {
false => EXTERNAL_A::DISABLED,
true => EXTERNAL_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == EXTERNAL_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == EXTERNAL_A::ENABLED
}
}
#[doc = "Field `EXTERNAL` writer - Enable or disable external source for LFCLK"]
pub type EXTERNAL_W<'a, const O: u8> = crate::BitWriter<'a, u32, LFCLKSRC_SPEC, EXTERNAL_A, O>;
impl<'a, const O: u8> EXTERNAL_W<'a, O> {
#[doc = "Disable external source (use with Xtal)"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(EXTERNAL_A::DISABLED)
}
#[doc = "Enable use of external source instead of Xtal (SRC needs to be set to Xtal)"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(EXTERNAL_A::ENABLED)
}
}
impl R {
#[doc = "Bits 0:1 - Clock source"]
#[inline(always)]
pub fn src(&self) -> SRC_R {
SRC_R::new((self.bits & 3) as u8)
}
#[doc = "Bit 16 - Enable or disable bypass of LFCLK crystal oscillator with external clock source"]
#[inline(always)]
pub fn bypass(&self) -> BYPASS_R {
BYPASS_R::new(((self.bits >> 16) & 1) != 0)
}
#[doc = "Bit 17 - Enable or disable external source for LFCLK"]
#[inline(always)]
pub fn external(&self) -> EXTERNAL_R {
EXTERNAL_R::new(((self.bits >> 17) & 1) != 0)
}
}
impl W {
#[doc = "Bits 0:1 - Clock source"]
#[inline(always)]
pub fn src(&mut self) -> SRC_W<0> {
SRC_W::new(self)
}
#[doc = "Bit 16 - Enable or disable bypass of LFCLK crystal oscillator with external clock source"]
#[inline(always)]
pub fn bypass(&mut self) -> BYPASS_W<16> {
BYPASS_W::new(self)
}
#[doc = "Bit 17 - Enable or disable external source for LFCLK"]
#[inline(always)]
pub fn external(&mut self) -> EXTERNAL_W<17> {
EXTERNAL_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Clock source for the LFCLK\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfclksrc](index.html) module"]
pub struct LFCLKSRC_SPEC;
impl crate::RegisterSpec for LFCLKSRC_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [lfclksrc::R](R) reader structure"]
impl crate::Readable for LFCLKSRC_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [lfclksrc::W](W) writer structure"]
impl crate::Writable for LFCLKSRC_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets LFCLKSRC to value 0"]
impl crate::Resettable for LFCLKSRC_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/clock/lfclksrccopy.rs
Vendored
+84
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#[doc = "Register `LFCLKSRCCOPY` reader"]
pub struct R(crate::R<LFCLKSRCCOPY_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<LFCLKSRCCOPY_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<LFCLKSRCCOPY_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<LFCLKSRCCOPY_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Field `SRC` reader - Clock source"]
pub type SRC_R = crate::FieldReader<u8, SRC_A>;
#[doc = "Clock source\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum SRC_A {
#[doc = "0: 32.768 kHz RC oscillator (LFRC)"]
RC = 0,
#[doc = "1: 32.768 kHz crystal oscillator (LFXO)"]
XTAL = 1,
#[doc = "2: 32.768 kHz synthesized from HFCLK (LFSYNT)"]
SYNTH = 2,
}
impl From<SRC_A> for u8 {
#[inline(always)]
fn from(variant: SRC_A) -> Self {
variant as _
}
}
impl SRC_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> Option<SRC_A> {
match self.bits {
0 => Some(SRC_A::RC),
1 => Some(SRC_A::XTAL),
2 => Some(SRC_A::SYNTH),
_ => None,
}
}
#[doc = "Checks if the value of the field is `RC`"]
#[inline(always)]
pub fn is_rc(&self) -> bool {
*self == SRC_A::RC
}
#[doc = "Checks if the value of the field is `XTAL`"]
#[inline(always)]
pub fn is_xtal(&self) -> bool {
*self == SRC_A::XTAL
}
#[doc = "Checks if the value of the field is `SYNTH`"]
#[inline(always)]
pub fn is_synth(&self) -> bool {
*self == SRC_A::SYNTH
}
}
impl R {
#[doc = "Bits 0:1 - Clock source"]
#[inline(always)]
pub fn src(&self) -> SRC_R {
SRC_R::new((self.bits & 3) as u8)
}
}
#[doc = "Copy of LFCLKSRC register, set when LFCLKSTART task was triggered\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfclksrccopy](index.html) module"]
pub struct LFCLKSRCCOPY_SPEC;
impl crate::RegisterSpec for LFCLKSRCCOPY_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [lfclksrccopy::R](R) reader structure"]
impl crate::Readable for LFCLKSRCCOPY_SPEC {
type Reader = R;
}
#[doc = "`reset()` method sets LFCLKSRCCOPY to value 0"]
impl crate::Resettable for LFCLKSRCCOPY_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/clock/lfclkstat.rs
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#[doc = "Register `LFCLKSTAT` reader"]
pub struct R(crate::R<LFCLKSTAT_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<LFCLKSTAT_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<LFCLKSTAT_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<LFCLKSTAT_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Field `SRC` reader - Source of LFCLK"]
pub type SRC_R = crate::FieldReader<u8, SRC_A>;
#[doc = "Source of LFCLK\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum SRC_A {
#[doc = "0: 32.768 kHz RC oscillator (LFRC)"]
RC = 0,
#[doc = "1: 32.768 kHz crystal oscillator (LFXO)"]
XTAL = 1,
#[doc = "2: 32.768 kHz synthesized from HFCLK (LFSYNT)"]
SYNTH = 2,
}
impl From<SRC_A> for u8 {
#[inline(always)]
fn from(variant: SRC_A) -> Self {
variant as _
}
}
impl SRC_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> Option<SRC_A> {
match self.bits {
0 => Some(SRC_A::RC),
1 => Some(SRC_A::XTAL),
2 => Some(SRC_A::SYNTH),
_ => None,
}
}
#[doc = "Checks if the value of the field is `RC`"]
#[inline(always)]
pub fn is_rc(&self) -> bool {
*self == SRC_A::RC
}
#[doc = "Checks if the value of the field is `XTAL`"]
#[inline(always)]
pub fn is_xtal(&self) -> bool {
*self == SRC_A::XTAL
}
#[doc = "Checks if the value of the field is `SYNTH`"]
#[inline(always)]
pub fn is_synth(&self) -> bool {
*self == SRC_A::SYNTH
}
}
#[doc = "Field `STATE` reader - LFCLK state"]
pub type STATE_R = crate::BitReader<STATE_A>;
#[doc = "LFCLK state\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum STATE_A {
#[doc = "0: LFCLK not running"]
NOT_RUNNING = 0,
#[doc = "1: LFCLK running"]
RUNNING = 1,
}
impl From<STATE_A> for bool {
#[inline(always)]
fn from(variant: STATE_A) -> Self {
variant as u8 != 0
}
}
impl STATE_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> STATE_A {
match self.bits {
false => STATE_A::NOT_RUNNING,
true => STATE_A::RUNNING,
}
}
#[doc = "Checks if the value of the field is `NOT_RUNNING`"]
#[inline(always)]
pub fn is_not_running(&self) -> bool {
*self == STATE_A::NOT_RUNNING
}
#[doc = "Checks if the value of the field is `RUNNING`"]
#[inline(always)]
pub fn is_running(&self) -> bool {
*self == STATE_A::RUNNING
}
}
impl R {
#[doc = "Bits 0:1 - Source of LFCLK"]
#[inline(always)]
pub fn src(&self) -> SRC_R {
SRC_R::new((self.bits & 3) as u8)
}
#[doc = "Bit 16 - LFCLK state"]
#[inline(always)]
pub fn state(&self) -> STATE_R {
STATE_R::new(((self.bits >> 16) & 1) != 0)
}
}
#[doc = "LFCLK status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfclkstat](index.html) module"]
pub struct LFCLKSTAT_SPEC;
impl crate::RegisterSpec for LFCLKSTAT_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [lfclkstat::R](R) reader structure"]
impl crate::Readable for LFCLKSTAT_SPEC {
type Reader = R;
}
#[doc = "`reset()` method sets LFCLKSTAT to value 0"]
impl crate::Resettable for LFCLKSTAT_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/clock/lfrcmode.rs
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#[doc = "Register `LFRCMODE` reader"]
pub struct R(crate::R<LFRCMODE_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<LFRCMODE_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<LFRCMODE_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<LFRCMODE_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `LFRCMODE` writer"]
pub struct W(crate::W<LFRCMODE_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<LFRCMODE_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<LFRCMODE_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<LFRCMODE_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `MODE` reader - Set LFRC mode"]
pub type MODE_R = crate::BitReader<MODE_A>;
#[doc = "Set LFRC mode\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum MODE_A {
#[doc = "0: Normal mode"]
NORMAL = 0,
#[doc = "1: Ultra-low power mode (ULP)"]
ULP = 1,
}
impl From<MODE_A> for bool {
#[inline(always)]
fn from(variant: MODE_A) -> Self {
variant as u8 != 0
}
}
impl MODE_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> MODE_A {
match self.bits {
false => MODE_A::NORMAL,
true => MODE_A::ULP,
}
}
#[doc = "Checks if the value of the field is `NORMAL`"]
#[inline(always)]
pub fn is_normal(&self) -> bool {
*self == MODE_A::NORMAL
}
#[doc = "Checks if the value of the field is `ULP`"]
#[inline(always)]
pub fn is_ulp(&self) -> bool {
*self == MODE_A::ULP
}
}
#[doc = "Field `MODE` writer - Set LFRC mode"]
pub type MODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, LFRCMODE_SPEC, MODE_A, O>;
impl<'a, const O: u8> MODE_W<'a, O> {
#[doc = "Normal mode"]
#[inline(always)]
pub fn normal(self) -> &'a mut W {
self.variant(MODE_A::NORMAL)
}
#[doc = "Ultra-low power mode (ULP)"]
#[inline(always)]
pub fn ulp(self) -> &'a mut W {
self.variant(MODE_A::ULP)
}
}
#[doc = "Field `STATUS` reader - Active LFRC mode. This field is read only."]
pub type STATUS_R = crate::BitReader<STATUS_A>;
#[doc = "Active LFRC mode. This field is read only.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum STATUS_A {
#[doc = "0: Normal mode"]
NORMAL = 0,
#[doc = "1: Ultra-low power mode (ULP)"]
ULP = 1,
}
impl From<STATUS_A> for bool {
#[inline(always)]
fn from(variant: STATUS_A) -> Self {
variant as u8 != 0
}
}
impl STATUS_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> STATUS_A {
match self.bits {
false => STATUS_A::NORMAL,
true => STATUS_A::ULP,
}
}
#[doc = "Checks if the value of the field is `NORMAL`"]
#[inline(always)]
pub fn is_normal(&self) -> bool {
*self == STATUS_A::NORMAL
}
#[doc = "Checks if the value of the field is `ULP`"]
#[inline(always)]
pub fn is_ulp(&self) -> bool {
*self == STATUS_A::ULP
}
}
#[doc = "Field `STATUS` writer - Active LFRC mode. This field is read only."]
pub type STATUS_W<'a, const O: u8> = crate::BitWriter<'a, u32, LFRCMODE_SPEC, STATUS_A, O>;
impl<'a, const O: u8> STATUS_W<'a, O> {
#[doc = "Normal mode"]
#[inline(always)]
pub fn normal(self) -> &'a mut W {
self.variant(STATUS_A::NORMAL)
}
#[doc = "Ultra-low power mode (ULP)"]
#[inline(always)]
pub fn ulp(self) -> &'a mut W {
self.variant(STATUS_A::ULP)
}
}
impl R {
#[doc = "Bit 0 - Set LFRC mode"]
#[inline(always)]
pub fn mode(&self) -> MODE_R {
MODE_R::new((self.bits & 1) != 0)
}
#[doc = "Bit 16 - Active LFRC mode. This field is read only."]
#[inline(always)]
pub fn status(&self) -> STATUS_R {
STATUS_R::new(((self.bits >> 16) & 1) != 0)
}
}
impl W {
#[doc = "Bit 0 - Set LFRC mode"]
#[inline(always)]
pub fn mode(&mut self) -> MODE_W<0> {
MODE_W::new(self)
}
#[doc = "Bit 16 - Active LFRC mode. This field is read only."]
#[inline(always)]
pub fn status(&mut self) -> STATUS_W<16> {
STATUS_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "LFRC mode configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfrcmode](index.html) module"]
pub struct LFRCMODE_SPEC;
impl crate::RegisterSpec for LFRCMODE_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [lfrcmode::R](R) reader structure"]
impl crate::Readable for LFRCMODE_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [lfrcmode::W](W) writer structure"]
impl crate::Writable for LFRCMODE_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets LFRCMODE to value 0"]
impl crate::Resettable for LFRCMODE_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/clock/tasks_cal.rs
Vendored
+52
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#[doc = "Register `TASKS_CAL` writer"]
pub struct W(crate::W<TASKS_CAL_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<TASKS_CAL_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<TASKS_CAL_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<TASKS_CAL_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `TASKS_CAL` writer - "]
pub type TASKS_CAL_W<'a, const O: u8> = crate::BitWriter<'a, u32, TASKS_CAL_SPEC, bool, O>;
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn tasks_cal(&mut self) -> TASKS_CAL_W<0> {
TASKS_CAL_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Start calibration of LFRC\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_cal](index.html) module"]
pub struct TASKS_CAL_SPEC;
impl crate::RegisterSpec for TASKS_CAL_SPEC {
type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [tasks_cal::W](W) writer structure"]
impl crate::Writable for TASKS_CAL_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets TASKS_CAL to value 0"]
impl crate::Resettable for TASKS_CAL_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/clock/tasks_ctstart.rs
Vendored
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#[doc = "Register `TASKS_CTSTART` writer"]
pub struct W(crate::W<TASKS_CTSTART_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<TASKS_CTSTART_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<TASKS_CTSTART_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<TASKS_CTSTART_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `TASKS_CTSTART` writer - "]
pub type TASKS_CTSTART_W<'a, const O: u8> = crate::BitWriter<'a, u32, TASKS_CTSTART_SPEC, bool, O>;
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn tasks_ctstart(&mut self) -> TASKS_CTSTART_W<0> {
TASKS_CTSTART_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Start calibration timer\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_ctstart](index.html) module"]
pub struct TASKS_CTSTART_SPEC;
impl crate::RegisterSpec for TASKS_CTSTART_SPEC {
type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [tasks_ctstart::W](W) writer structure"]
impl crate::Writable for TASKS_CTSTART_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets TASKS_CTSTART to value 0"]
impl crate::Resettable for TASKS_CTSTART_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/clock/tasks_ctstop.rs
Vendored
+52
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#[doc = "Register `TASKS_CTSTOP` writer"]
pub struct W(crate::W<TASKS_CTSTOP_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<TASKS_CTSTOP_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<TASKS_CTSTOP_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<TASKS_CTSTOP_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `TASKS_CTSTOP` writer - "]
pub type TASKS_CTSTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, TASKS_CTSTOP_SPEC, bool, O>;
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn tasks_ctstop(&mut self) -> TASKS_CTSTOP_W<0> {
TASKS_CTSTOP_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Stop calibration timer\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_ctstop](index.html) module"]
pub struct TASKS_CTSTOP_SPEC;
impl crate::RegisterSpec for TASKS_CTSTOP_SPEC {
type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [tasks_ctstop::W](W) writer structure"]
impl crate::Writable for TASKS_CTSTOP_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets TASKS_CTSTOP to value 0"]
impl crate::Resettable for TASKS_CTSTOP_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/clock/tasks_hfclkstart.rs
Vendored
+53
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@@ -0,0 +1,53 @@
#[doc = "Register `TASKS_HFCLKSTART` writer"]
pub struct W(crate::W<TASKS_HFCLKSTART_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<TASKS_HFCLKSTART_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<TASKS_HFCLKSTART_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<TASKS_HFCLKSTART_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `TASKS_HFCLKSTART` writer - "]
pub type TASKS_HFCLKSTART_W<'a, const O: u8> =
crate::BitWriter<'a, u32, TASKS_HFCLKSTART_SPEC, bool, O>;
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn tasks_hfclkstart(&mut self) -> TASKS_HFCLKSTART_W<0> {
TASKS_HFCLKSTART_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Start HFXO crystal oscillator\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_hfclkstart](index.html) module"]
pub struct TASKS_HFCLKSTART_SPEC;
impl crate::RegisterSpec for TASKS_HFCLKSTART_SPEC {
type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [tasks_hfclkstart::W](W) writer structure"]
impl crate::Writable for TASKS_HFCLKSTART_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets TASKS_HFCLKSTART to value 0"]
impl crate::Resettable for TASKS_HFCLKSTART_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/clock/tasks_hfclkstop.rs
Vendored
+53
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@@ -0,0 +1,53 @@
#[doc = "Register `TASKS_HFCLKSTOP` writer"]
pub struct W(crate::W<TASKS_HFCLKSTOP_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<TASKS_HFCLKSTOP_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<TASKS_HFCLKSTOP_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<TASKS_HFCLKSTOP_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `TASKS_HFCLKSTOP` writer - "]
pub type TASKS_HFCLKSTOP_W<'a, const O: u8> =
crate::BitWriter<'a, u32, TASKS_HFCLKSTOP_SPEC, bool, O>;
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn tasks_hfclkstop(&mut self) -> TASKS_HFCLKSTOP_W<0> {
TASKS_HFCLKSTOP_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Stop HFXO crystal oscillator\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_hfclkstop](index.html) module"]
pub struct TASKS_HFCLKSTOP_SPEC;
impl crate::RegisterSpec for TASKS_HFCLKSTOP_SPEC {
type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [tasks_hfclkstop::W](W) writer structure"]
impl crate::Writable for TASKS_HFCLKSTOP_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets TASKS_HFCLKSTOP to value 0"]
impl crate::Resettable for TASKS_HFCLKSTOP_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/clock/tasks_lfclkstart.rs
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#[doc = "Register `TASKS_LFCLKSTART` writer"]
pub struct W(crate::W<TASKS_LFCLKSTART_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<TASKS_LFCLKSTART_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<TASKS_LFCLKSTART_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<TASKS_LFCLKSTART_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `TASKS_LFCLKSTART` writer - "]
pub type TASKS_LFCLKSTART_W<'a, const O: u8> =
crate::BitWriter<'a, u32, TASKS_LFCLKSTART_SPEC, bool, O>;
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn tasks_lfclkstart(&mut self) -> TASKS_LFCLKSTART_W<0> {
TASKS_LFCLKSTART_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Start LFCLK\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_lfclkstart](index.html) module"]
pub struct TASKS_LFCLKSTART_SPEC;
impl crate::RegisterSpec for TASKS_LFCLKSTART_SPEC {
type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [tasks_lfclkstart::W](W) writer structure"]
impl crate::Writable for TASKS_LFCLKSTART_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets TASKS_LFCLKSTART to value 0"]
impl crate::Resettable for TASKS_LFCLKSTART_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/clock/tasks_lfclkstop.rs
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#[doc = "Register `TASKS_LFCLKSTOP` writer"]
pub struct W(crate::W<TASKS_LFCLKSTOP_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<TASKS_LFCLKSTOP_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<TASKS_LFCLKSTOP_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<TASKS_LFCLKSTOP_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `TASKS_LFCLKSTOP` writer - "]
pub type TASKS_LFCLKSTOP_W<'a, const O: u8> =
crate::BitWriter<'a, u32, TASKS_LFCLKSTOP_SPEC, bool, O>;
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn tasks_lfclkstop(&mut self) -> TASKS_LFCLKSTOP_W<0> {
TASKS_LFCLKSTOP_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Stop LFCLK\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_lfclkstop](index.html) module"]
pub struct TASKS_LFCLKSTOP_SPEC;
impl crate::RegisterSpec for TASKS_LFCLKSTOP_SPEC {
type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [tasks_lfclkstop::W](W) writer structure"]
impl crate::Writable for TASKS_LFCLKSTOP_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets TASKS_LFCLKSTOP to value 0"]
impl crate::Resettable for TASKS_LFCLKSTOP_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/clock/traceconfig.rs
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#[doc = "Register `TRACECONFIG` reader"]
pub struct R(crate::R<TRACECONFIG_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<TRACECONFIG_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<TRACECONFIG_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<TRACECONFIG_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `TRACECONFIG` writer"]
pub struct W(crate::W<TRACECONFIG_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<TRACECONFIG_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<TRACECONFIG_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<TRACECONFIG_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `TRACEPORTSPEED` reader - Speed of trace port clock. Note that the TRACECLK pin will output this clock divided by two."]
pub type TRACEPORTSPEED_R = crate::FieldReader<u8, TRACEPORTSPEED_A>;
#[doc = "Speed of trace port clock. Note that the TRACECLK pin will output this clock divided by two.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum TRACEPORTSPEED_A {
#[doc = "0: 32 MHz trace port clock (TRACECLK = 16 MHz)"]
_32MHZ = 0,
#[doc = "1: 16 MHz trace port clock (TRACECLK = 8 MHz)"]
_16MHZ = 1,
#[doc = "2: 8 MHz trace port clock (TRACECLK = 4 MHz)"]
_8MHZ = 2,
#[doc = "3: 4 MHz trace port clock (TRACECLK = 2 MHz)"]
_4MHZ = 3,
}
impl From<TRACEPORTSPEED_A> for u8 {
#[inline(always)]
fn from(variant: TRACEPORTSPEED_A) -> Self {
variant as _
}
}
impl TRACEPORTSPEED_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> TRACEPORTSPEED_A {
match self.bits {
0 => TRACEPORTSPEED_A::_32MHZ,
1 => TRACEPORTSPEED_A::_16MHZ,
2 => TRACEPORTSPEED_A::_8MHZ,
3 => TRACEPORTSPEED_A::_4MHZ,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `_32MHZ`"]
#[inline(always)]
pub fn is_32mhz(&self) -> bool {
*self == TRACEPORTSPEED_A::_32MHZ
}
#[doc = "Checks if the value of the field is `_16MHZ`"]
#[inline(always)]
pub fn is_16mhz(&self) -> bool {
*self == TRACEPORTSPEED_A::_16MHZ
}
#[doc = "Checks if the value of the field is `_8MHZ`"]
#[inline(always)]
pub fn is_8mhz(&self) -> bool {
*self == TRACEPORTSPEED_A::_8MHZ
}
#[doc = "Checks if the value of the field is `_4MHZ`"]
#[inline(always)]
pub fn is_4mhz(&self) -> bool {
*self == TRACEPORTSPEED_A::_4MHZ
}
}
#[doc = "Field `TRACEPORTSPEED` writer - Speed of trace port clock. Note that the TRACECLK pin will output this clock divided by two."]
pub type TRACEPORTSPEED_W<'a, const O: u8> =
crate::FieldWriterSafe<'a, u32, TRACECONFIG_SPEC, u8, TRACEPORTSPEED_A, 2, O>;
impl<'a, const O: u8> TRACEPORTSPEED_W<'a, O> {
#[doc = "32 MHz trace port clock (TRACECLK = 16 MHz)"]
#[inline(always)]
pub fn _32mhz(self) -> &'a mut W {
self.variant(TRACEPORTSPEED_A::_32MHZ)
}
#[doc = "16 MHz trace port clock (TRACECLK = 8 MHz)"]
#[inline(always)]
pub fn _16mhz(self) -> &'a mut W {
self.variant(TRACEPORTSPEED_A::_16MHZ)
}
#[doc = "8 MHz trace port clock (TRACECLK = 4 MHz)"]
#[inline(always)]
pub fn _8mhz(self) -> &'a mut W {
self.variant(TRACEPORTSPEED_A::_8MHZ)
}
#[doc = "4 MHz trace port clock (TRACECLK = 2 MHz)"]
#[inline(always)]
pub fn _4mhz(self) -> &'a mut W {
self.variant(TRACEPORTSPEED_A::_4MHZ)
}
}
#[doc = "Field `TRACEMUX` reader - Pin multiplexing of trace signals. See pin assignment chapter for more details."]
pub type TRACEMUX_R = crate::FieldReader<u8, TRACEMUX_A>;
#[doc = "Pin multiplexing of trace signals. See pin assignment chapter for more details.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum TRACEMUX_A {
#[doc = "0: No trace signals routed to pins. All pins can be used as regular GPIOs."]
GPIO = 0,
#[doc = "1: SWO trace signal routed to pin. Remaining pins can be used as regular GPIOs."]
SERIAL = 1,
#[doc = "2: All trace signals (TRACECLK and TRACEDATA\\[n\\]) routed to pins."]
PARALLEL = 2,
}
impl From<TRACEMUX_A> for u8 {
#[inline(always)]
fn from(variant: TRACEMUX_A) -> Self {
variant as _
}
}
impl TRACEMUX_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> Option<TRACEMUX_A> {
match self.bits {
0 => Some(TRACEMUX_A::GPIO),
1 => Some(TRACEMUX_A::SERIAL),
2 => Some(TRACEMUX_A::PARALLEL),
_ => None,
}
}
#[doc = "Checks if the value of the field is `GPIO`"]
#[inline(always)]
pub fn is_gpio(&self) -> bool {
*self == TRACEMUX_A::GPIO
}
#[doc = "Checks if the value of the field is `SERIAL`"]
#[inline(always)]
pub fn is_serial(&self) -> bool {
*self == TRACEMUX_A::SERIAL
}
#[doc = "Checks if the value of the field is `PARALLEL`"]
#[inline(always)]
pub fn is_parallel(&self) -> bool {
*self == TRACEMUX_A::PARALLEL
}
}
#[doc = "Field `TRACEMUX` writer - Pin multiplexing of trace signals. See pin assignment chapter for more details."]
pub type TRACEMUX_W<'a, const O: u8> =
crate::FieldWriter<'a, u32, TRACECONFIG_SPEC, u8, TRACEMUX_A, 2, O>;
impl<'a, const O: u8> TRACEMUX_W<'a, O> {
#[doc = "No trace signals routed to pins. All pins can be used as regular GPIOs."]
#[inline(always)]
pub fn gpio(self) -> &'a mut W {
self.variant(TRACEMUX_A::GPIO)
}
#[doc = "SWO trace signal routed to pin. Remaining pins can be used as regular GPIOs."]
#[inline(always)]
pub fn serial(self) -> &'a mut W {
self.variant(TRACEMUX_A::SERIAL)
}
#[doc = "All trace signals (TRACECLK and TRACEDATA\\[n\\]) routed to pins."]
#[inline(always)]
pub fn parallel(self) -> &'a mut W {
self.variant(TRACEMUX_A::PARALLEL)
}
}
impl R {
#[doc = "Bits 0:1 - Speed of trace port clock. Note that the TRACECLK pin will output this clock divided by two."]
#[inline(always)]
pub fn traceportspeed(&self) -> TRACEPORTSPEED_R {
TRACEPORTSPEED_R::new((self.bits & 3) as u8)
}
#[doc = "Bits 16:17 - Pin multiplexing of trace signals. See pin assignment chapter for more details."]
#[inline(always)]
pub fn tracemux(&self) -> TRACEMUX_R {
TRACEMUX_R::new(((self.bits >> 16) & 3) as u8)
}
}
impl W {
#[doc = "Bits 0:1 - Speed of trace port clock. Note that the TRACECLK pin will output this clock divided by two."]
#[inline(always)]
pub fn traceportspeed(&mut self) -> TRACEPORTSPEED_W<0> {
TRACEPORTSPEED_W::new(self)
}
#[doc = "Bits 16:17 - Pin multiplexing of trace signals. See pin assignment chapter for more details."]
#[inline(always)]
pub fn tracemux(&mut self) -> TRACEMUX_W<16> {
TRACEMUX_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Clocking options for the trace port debug interface\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [traceconfig](index.html) module"]
pub struct TRACECONFIG_SPEC;
impl crate::RegisterSpec for TRACECONFIG_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [traceconfig::R](R) reader structure"]
impl crate::Readable for TRACECONFIG_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [traceconfig::W](W) writer structure"]
impl crate::Writable for TRACECONFIG_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets TRACECONFIG to value 0"]
impl crate::Resettable for TRACECONFIG_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/comp.rs
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#[doc = r"Register block"]
#[repr(C)]
pub struct RegisterBlock {
#[doc = "0x00 - Start comparator"]
pub tasks_start: TASKS_START,
#[doc = "0x04 - Stop comparator"]
pub tasks_stop: TASKS_STOP,
#[doc = "0x08 - Sample comparator value"]
pub tasks_sample: TASKS_SAMPLE,
_reserved3: [u8; 0xf4],
#[doc = "0x100 - COMP is ready and output is valid"]
pub events_ready: EVENTS_READY,
#[doc = "0x104 - Downward crossing"]
pub events_down: EVENTS_DOWN,
#[doc = "0x108 - Upward crossing"]
pub events_up: EVENTS_UP,
#[doc = "0x10c - Downward or upward crossing"]
pub events_cross: EVENTS_CROSS,
_reserved7: [u8; 0xf0],
#[doc = "0x200 - Shortcut register"]
pub shorts: SHORTS,
_reserved8: [u8; 0xfc],
#[doc = "0x300 - Enable or disable interrupt"]
pub inten: INTEN,
#[doc = "0x304 - Enable interrupt"]
pub intenset: INTENSET,
#[doc = "0x308 - Disable interrupt"]
pub intenclr: INTENCLR,
_reserved11: [u8; 0xf4],
#[doc = "0x400 - Compare result"]
pub result: RESULT,
_reserved12: [u8; 0xfc],
#[doc = "0x500 - COMP enable"]
pub enable: ENABLE,
#[doc = "0x504 - Pin select"]
pub psel: PSEL,
#[doc = "0x508 - Reference source select for single-ended mode"]
pub refsel: REFSEL,
#[doc = "0x50c - External reference select"]
pub extrefsel: EXTREFSEL,
_reserved16: [u8; 0x20],
#[doc = "0x530 - Threshold configuration for hysteresis unit"]
pub th: TH,
#[doc = "0x534 - Mode configuration"]
pub mode: MODE,
#[doc = "0x538 - Comparator hysteresis enable"]
pub hyst: HYST,
}
#[doc = "TASKS_START (w) register accessor: an alias for `Reg<TASKS_START_SPEC>`"]
pub type TASKS_START = crate::Reg<tasks_start::TASKS_START_SPEC>;
#[doc = "Start comparator"]
pub mod tasks_start;
#[doc = "TASKS_STOP (w) register accessor: an alias for `Reg<TASKS_STOP_SPEC>`"]
pub type TASKS_STOP = crate::Reg<tasks_stop::TASKS_STOP_SPEC>;
#[doc = "Stop comparator"]
pub mod tasks_stop;
#[doc = "TASKS_SAMPLE (w) register accessor: an alias for `Reg<TASKS_SAMPLE_SPEC>`"]
pub type TASKS_SAMPLE = crate::Reg<tasks_sample::TASKS_SAMPLE_SPEC>;
#[doc = "Sample comparator value"]
pub mod tasks_sample;
#[doc = "EVENTS_READY (rw) register accessor: an alias for `Reg<EVENTS_READY_SPEC>`"]
pub type EVENTS_READY = crate::Reg<events_ready::EVENTS_READY_SPEC>;
#[doc = "COMP is ready and output is valid"]
pub mod events_ready;
#[doc = "EVENTS_DOWN (rw) register accessor: an alias for `Reg<EVENTS_DOWN_SPEC>`"]
pub type EVENTS_DOWN = crate::Reg<events_down::EVENTS_DOWN_SPEC>;
#[doc = "Downward crossing"]
pub mod events_down;
#[doc = "EVENTS_UP (rw) register accessor: an alias for `Reg<EVENTS_UP_SPEC>`"]
pub type EVENTS_UP = crate::Reg<events_up::EVENTS_UP_SPEC>;
#[doc = "Upward crossing"]
pub mod events_up;
#[doc = "EVENTS_CROSS (rw) register accessor: an alias for `Reg<EVENTS_CROSS_SPEC>`"]
pub type EVENTS_CROSS = crate::Reg<events_cross::EVENTS_CROSS_SPEC>;
#[doc = "Downward or upward crossing"]
pub mod events_cross;
#[doc = "SHORTS (rw) register accessor: an alias for `Reg<SHORTS_SPEC>`"]
pub type SHORTS = crate::Reg<shorts::SHORTS_SPEC>;
#[doc = "Shortcut register"]
pub mod shorts;
#[doc = "INTEN (rw) register accessor: an alias for `Reg<INTEN_SPEC>`"]
pub type INTEN = crate::Reg<inten::INTEN_SPEC>;
#[doc = "Enable or disable interrupt"]
pub mod inten;
#[doc = "INTENSET (rw) register accessor: an alias for `Reg<INTENSET_SPEC>`"]
pub type INTENSET = crate::Reg<intenset::INTENSET_SPEC>;
#[doc = "Enable interrupt"]
pub mod intenset;
#[doc = "INTENCLR (rw) register accessor: an alias for `Reg<INTENCLR_SPEC>`"]
pub type INTENCLR = crate::Reg<intenclr::INTENCLR_SPEC>;
#[doc = "Disable interrupt"]
pub mod intenclr;
#[doc = "RESULT (r) register accessor: an alias for `Reg<RESULT_SPEC>`"]
pub type RESULT = crate::Reg<result::RESULT_SPEC>;
#[doc = "Compare result"]
pub mod result;
#[doc = "ENABLE (rw) register accessor: an alias for `Reg<ENABLE_SPEC>`"]
pub type ENABLE = crate::Reg<enable::ENABLE_SPEC>;
#[doc = "COMP enable"]
pub mod enable;
#[doc = "PSEL (rw) register accessor: an alias for `Reg<PSEL_SPEC>`"]
pub type PSEL = crate::Reg<psel::PSEL_SPEC>;
#[doc = "Pin select"]
pub mod psel;
#[doc = "REFSEL (rw) register accessor: an alias for `Reg<REFSEL_SPEC>`"]
pub type REFSEL = crate::Reg<refsel::REFSEL_SPEC>;
#[doc = "Reference source select for single-ended mode"]
pub mod refsel;
#[doc = "EXTREFSEL (rw) register accessor: an alias for `Reg<EXTREFSEL_SPEC>`"]
pub type EXTREFSEL = crate::Reg<extrefsel::EXTREFSEL_SPEC>;
#[doc = "External reference select"]
pub mod extrefsel;
#[doc = "TH (rw) register accessor: an alias for `Reg<TH_SPEC>`"]
pub type TH = crate::Reg<th::TH_SPEC>;
#[doc = "Threshold configuration for hysteresis unit"]
pub mod th;
#[doc = "MODE (rw) register accessor: an alias for `Reg<MODE_SPEC>`"]
pub type MODE = crate::Reg<mode::MODE_SPEC>;
#[doc = "Mode configuration"]
pub mod mode;
#[doc = "HYST (rw) register accessor: an alias for `Reg<HYST_SPEC>`"]
pub type HYST = crate::Reg<hyst::HYST_SPEC>;
#[doc = "Comparator hysteresis enable"]
pub mod hyst;
vendor/nrf52840-pac/src/comp/enable.rs
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#[doc = "Register `ENABLE` reader"]
pub struct R(crate::R<ENABLE_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<ENABLE_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<ENABLE_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<ENABLE_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `ENABLE` writer"]
pub struct W(crate::W<ENABLE_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<ENABLE_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<ENABLE_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<ENABLE_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `ENABLE` reader - Enable or disable COMP"]
pub type ENABLE_R = crate::FieldReader<u8, ENABLE_A>;
#[doc = "Enable or disable COMP\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum ENABLE_A {
#[doc = "0: Disable"]
DISABLED = 0,
#[doc = "2: Enable"]
ENABLED = 2,
}
impl From<ENABLE_A> for u8 {
#[inline(always)]
fn from(variant: ENABLE_A) -> Self {
variant as _
}
}
impl ENABLE_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> Option<ENABLE_A> {
match self.bits {
0 => Some(ENABLE_A::DISABLED),
2 => Some(ENABLE_A::ENABLED),
_ => None,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == ENABLE_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == ENABLE_A::ENABLED
}
}
#[doc = "Field `ENABLE` writer - Enable or disable COMP"]
pub type ENABLE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ENABLE_SPEC, u8, ENABLE_A, 2, O>;
impl<'a, const O: u8> ENABLE_W<'a, O> {
#[doc = "Disable"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(ENABLE_A::DISABLED)
}
#[doc = "Enable"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(ENABLE_A::ENABLED)
}
}
impl R {
#[doc = "Bits 0:1 - Enable or disable COMP"]
#[inline(always)]
pub fn enable(&self) -> ENABLE_R {
ENABLE_R::new((self.bits & 3) as u8)
}
}
impl W {
#[doc = "Bits 0:1 - Enable or disable COMP"]
#[inline(always)]
pub fn enable(&mut self) -> ENABLE_W<0> {
ENABLE_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "COMP enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [enable](index.html) module"]
pub struct ENABLE_SPEC;
impl crate::RegisterSpec for ENABLE_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [enable::R](R) reader structure"]
impl crate::Readable for ENABLE_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [enable::W](W) writer structure"]
impl crate::Writable for ENABLE_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets ENABLE to value 0"]
impl crate::Resettable for ENABLE_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/comp/events_cross.rs
Vendored
+80
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#[doc = "Register `EVENTS_CROSS` reader"]
pub struct R(crate::R<EVENTS_CROSS_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<EVENTS_CROSS_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<EVENTS_CROSS_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<EVENTS_CROSS_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `EVENTS_CROSS` writer"]
pub struct W(crate::W<EVENTS_CROSS_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<EVENTS_CROSS_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<EVENTS_CROSS_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<EVENTS_CROSS_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `EVENTS_CROSS` reader - "]
pub type EVENTS_CROSS_R = crate::BitReader<bool>;
#[doc = "Field `EVENTS_CROSS` writer - "]
pub type EVENTS_CROSS_W<'a, const O: u8> = crate::BitWriter<'a, u32, EVENTS_CROSS_SPEC, bool, O>;
impl R {
#[doc = "Bit 0"]
#[inline(always)]
pub fn events_cross(&self) -> EVENTS_CROSS_R {
EVENTS_CROSS_R::new((self.bits & 1) != 0)
}
}
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn events_cross(&mut self) -> EVENTS_CROSS_W<0> {
EVENTS_CROSS_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Downward or upward crossing\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_cross](index.html) module"]
pub struct EVENTS_CROSS_SPEC;
impl crate::RegisterSpec for EVENTS_CROSS_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [events_cross::R](R) reader structure"]
impl crate::Readable for EVENTS_CROSS_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [events_cross::W](W) writer structure"]
impl crate::Writable for EVENTS_CROSS_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets EVENTS_CROSS to value 0"]
impl crate::Resettable for EVENTS_CROSS_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/comp/events_down.rs
Vendored
+80
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#[doc = "Register `EVENTS_DOWN` reader"]
pub struct R(crate::R<EVENTS_DOWN_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<EVENTS_DOWN_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<EVENTS_DOWN_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<EVENTS_DOWN_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `EVENTS_DOWN` writer"]
pub struct W(crate::W<EVENTS_DOWN_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<EVENTS_DOWN_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<EVENTS_DOWN_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<EVENTS_DOWN_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `EVENTS_DOWN` reader - "]
pub type EVENTS_DOWN_R = crate::BitReader<bool>;
#[doc = "Field `EVENTS_DOWN` writer - "]
pub type EVENTS_DOWN_W<'a, const O: u8> = crate::BitWriter<'a, u32, EVENTS_DOWN_SPEC, bool, O>;
impl R {
#[doc = "Bit 0"]
#[inline(always)]
pub fn events_down(&self) -> EVENTS_DOWN_R {
EVENTS_DOWN_R::new((self.bits & 1) != 0)
}
}
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn events_down(&mut self) -> EVENTS_DOWN_W<0> {
EVENTS_DOWN_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Downward crossing\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_down](index.html) module"]
pub struct EVENTS_DOWN_SPEC;
impl crate::RegisterSpec for EVENTS_DOWN_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [events_down::R](R) reader structure"]
impl crate::Readable for EVENTS_DOWN_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [events_down::W](W) writer structure"]
impl crate::Writable for EVENTS_DOWN_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets EVENTS_DOWN to value 0"]
impl crate::Resettable for EVENTS_DOWN_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/comp/events_ready.rs
Vendored
+80
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#[doc = "Register `EVENTS_READY` reader"]
pub struct R(crate::R<EVENTS_READY_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<EVENTS_READY_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<EVENTS_READY_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<EVENTS_READY_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `EVENTS_READY` writer"]
pub struct W(crate::W<EVENTS_READY_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<EVENTS_READY_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<EVENTS_READY_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<EVENTS_READY_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `EVENTS_READY` reader - "]
pub type EVENTS_READY_R = crate::BitReader<bool>;
#[doc = "Field `EVENTS_READY` writer - "]
pub type EVENTS_READY_W<'a, const O: u8> = crate::BitWriter<'a, u32, EVENTS_READY_SPEC, bool, O>;
impl R {
#[doc = "Bit 0"]
#[inline(always)]
pub fn events_ready(&self) -> EVENTS_READY_R {
EVENTS_READY_R::new((self.bits & 1) != 0)
}
}
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn events_ready(&mut self) -> EVENTS_READY_W<0> {
EVENTS_READY_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "COMP is ready and output is valid\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_ready](index.html) module"]
pub struct EVENTS_READY_SPEC;
impl crate::RegisterSpec for EVENTS_READY_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [events_ready::R](R) reader structure"]
impl crate::Readable for EVENTS_READY_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [events_ready::W](W) writer structure"]
impl crate::Writable for EVENTS_READY_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets EVENTS_READY to value 0"]
impl crate::Resettable for EVENTS_READY_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/comp/events_up.rs
Vendored
+80
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#[doc = "Register `EVENTS_UP` reader"]
pub struct R(crate::R<EVENTS_UP_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<EVENTS_UP_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<EVENTS_UP_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<EVENTS_UP_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `EVENTS_UP` writer"]
pub struct W(crate::W<EVENTS_UP_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<EVENTS_UP_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<EVENTS_UP_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<EVENTS_UP_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `EVENTS_UP` reader - "]
pub type EVENTS_UP_R = crate::BitReader<bool>;
#[doc = "Field `EVENTS_UP` writer - "]
pub type EVENTS_UP_W<'a, const O: u8> = crate::BitWriter<'a, u32, EVENTS_UP_SPEC, bool, O>;
impl R {
#[doc = "Bit 0"]
#[inline(always)]
pub fn events_up(&self) -> EVENTS_UP_R {
EVENTS_UP_R::new((self.bits & 1) != 0)
}
}
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn events_up(&mut self) -> EVENTS_UP_W<0> {
EVENTS_UP_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Upward crossing\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_up](index.html) module"]
pub struct EVENTS_UP_SPEC;
impl crate::RegisterSpec for EVENTS_UP_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [events_up::R](R) reader structure"]
impl crate::Readable for EVENTS_UP_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [events_up::W](W) writer structure"]
impl crate::Writable for EVENTS_UP_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets EVENTS_UP to value 0"]
impl crate::Resettable for EVENTS_UP_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/comp/extrefsel.rs
Vendored
+207
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#[doc = "Register `EXTREFSEL` reader"]
pub struct R(crate::R<EXTREFSEL_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<EXTREFSEL_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<EXTREFSEL_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<EXTREFSEL_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `EXTREFSEL` writer"]
pub struct W(crate::W<EXTREFSEL_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<EXTREFSEL_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<EXTREFSEL_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<EXTREFSEL_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `EXTREFSEL` reader - External analog reference select"]
pub type EXTREFSEL_R = crate::FieldReader<u8, EXTREFSEL_A>;
#[doc = "External analog reference select\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum EXTREFSEL_A {
#[doc = "0: Use AIN0 as external analog reference"]
ANALOG_REFERENCE0 = 0,
#[doc = "1: Use AIN1 as external analog reference"]
ANALOG_REFERENCE1 = 1,
#[doc = "2: Use AIN2 as external analog reference"]
ANALOG_REFERENCE2 = 2,
#[doc = "3: Use AIN3 as external analog reference"]
ANALOG_REFERENCE3 = 3,
#[doc = "4: Use AIN4 as external analog reference"]
ANALOG_REFERENCE4 = 4,
#[doc = "5: Use AIN5 as external analog reference"]
ANALOG_REFERENCE5 = 5,
#[doc = "6: Use AIN6 as external analog reference"]
ANALOG_REFERENCE6 = 6,
#[doc = "7: Use AIN7 as external analog reference"]
ANALOG_REFERENCE7 = 7,
}
impl From<EXTREFSEL_A> for u8 {
#[inline(always)]
fn from(variant: EXTREFSEL_A) -> Self {
variant as _
}
}
impl EXTREFSEL_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> EXTREFSEL_A {
match self.bits {
0 => EXTREFSEL_A::ANALOG_REFERENCE0,
1 => EXTREFSEL_A::ANALOG_REFERENCE1,
2 => EXTREFSEL_A::ANALOG_REFERENCE2,
3 => EXTREFSEL_A::ANALOG_REFERENCE3,
4 => EXTREFSEL_A::ANALOG_REFERENCE4,
5 => EXTREFSEL_A::ANALOG_REFERENCE5,
6 => EXTREFSEL_A::ANALOG_REFERENCE6,
7 => EXTREFSEL_A::ANALOG_REFERENCE7,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `ANALOG_REFERENCE0`"]
#[inline(always)]
pub fn is_analog_reference0(&self) -> bool {
*self == EXTREFSEL_A::ANALOG_REFERENCE0
}
#[doc = "Checks if the value of the field is `ANALOG_REFERENCE1`"]
#[inline(always)]
pub fn is_analog_reference1(&self) -> bool {
*self == EXTREFSEL_A::ANALOG_REFERENCE1
}
#[doc = "Checks if the value of the field is `ANALOG_REFERENCE2`"]
#[inline(always)]
pub fn is_analog_reference2(&self) -> bool {
*self == EXTREFSEL_A::ANALOG_REFERENCE2
}
#[doc = "Checks if the value of the field is `ANALOG_REFERENCE3`"]
#[inline(always)]
pub fn is_analog_reference3(&self) -> bool {
*self == EXTREFSEL_A::ANALOG_REFERENCE3
}
#[doc = "Checks if the value of the field is `ANALOG_REFERENCE4`"]
#[inline(always)]
pub fn is_analog_reference4(&self) -> bool {
*self == EXTREFSEL_A::ANALOG_REFERENCE4
}
#[doc = "Checks if the value of the field is `ANALOG_REFERENCE5`"]
#[inline(always)]
pub fn is_analog_reference5(&self) -> bool {
*self == EXTREFSEL_A::ANALOG_REFERENCE5
}
#[doc = "Checks if the value of the field is `ANALOG_REFERENCE6`"]
#[inline(always)]
pub fn is_analog_reference6(&self) -> bool {
*self == EXTREFSEL_A::ANALOG_REFERENCE6
}
#[doc = "Checks if the value of the field is `ANALOG_REFERENCE7`"]
#[inline(always)]
pub fn is_analog_reference7(&self) -> bool {
*self == EXTREFSEL_A::ANALOG_REFERENCE7
}
}
#[doc = "Field `EXTREFSEL` writer - External analog reference select"]
pub type EXTREFSEL_W<'a, const O: u8> =
crate::FieldWriterSafe<'a, u32, EXTREFSEL_SPEC, u8, EXTREFSEL_A, 3, O>;
impl<'a, const O: u8> EXTREFSEL_W<'a, O> {
#[doc = "Use AIN0 as external analog reference"]
#[inline(always)]
pub fn analog_reference0(self) -> &'a mut W {
self.variant(EXTREFSEL_A::ANALOG_REFERENCE0)
}
#[doc = "Use AIN1 as external analog reference"]
#[inline(always)]
pub fn analog_reference1(self) -> &'a mut W {
self.variant(EXTREFSEL_A::ANALOG_REFERENCE1)
}
#[doc = "Use AIN2 as external analog reference"]
#[inline(always)]
pub fn analog_reference2(self) -> &'a mut W {
self.variant(EXTREFSEL_A::ANALOG_REFERENCE2)
}
#[doc = "Use AIN3 as external analog reference"]
#[inline(always)]
pub fn analog_reference3(self) -> &'a mut W {
self.variant(EXTREFSEL_A::ANALOG_REFERENCE3)
}
#[doc = "Use AIN4 as external analog reference"]
#[inline(always)]
pub fn analog_reference4(self) -> &'a mut W {
self.variant(EXTREFSEL_A::ANALOG_REFERENCE4)
}
#[doc = "Use AIN5 as external analog reference"]
#[inline(always)]
pub fn analog_reference5(self) -> &'a mut W {
self.variant(EXTREFSEL_A::ANALOG_REFERENCE5)
}
#[doc = "Use AIN6 as external analog reference"]
#[inline(always)]
pub fn analog_reference6(self) -> &'a mut W {
self.variant(EXTREFSEL_A::ANALOG_REFERENCE6)
}
#[doc = "Use AIN7 as external analog reference"]
#[inline(always)]
pub fn analog_reference7(self) -> &'a mut W {
self.variant(EXTREFSEL_A::ANALOG_REFERENCE7)
}
}
impl R {
#[doc = "Bits 0:2 - External analog reference select"]
#[inline(always)]
pub fn extrefsel(&self) -> EXTREFSEL_R {
EXTREFSEL_R::new((self.bits & 7) as u8)
}
}
impl W {
#[doc = "Bits 0:2 - External analog reference select"]
#[inline(always)]
pub fn extrefsel(&mut self) -> EXTREFSEL_W<0> {
EXTREFSEL_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "External reference select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [extrefsel](index.html) module"]
pub struct EXTREFSEL_SPEC;
impl crate::RegisterSpec for EXTREFSEL_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [extrefsel::R](R) reader structure"]
impl crate::Readable for EXTREFSEL_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [extrefsel::W](W) writer structure"]
impl crate::Writable for EXTREFSEL_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets EXTREFSEL to value 0"]
impl crate::Resettable for EXTREFSEL_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/comp/hyst.rs
Vendored
+126
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#[doc = "Register `HYST` reader"]
pub struct R(crate::R<HYST_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<HYST_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<HYST_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<HYST_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `HYST` writer"]
pub struct W(crate::W<HYST_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<HYST_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<HYST_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<HYST_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `HYST` reader - Comparator hysteresis"]
pub type HYST_R = crate::BitReader<HYST_A>;
#[doc = "Comparator hysteresis\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum HYST_A {
#[doc = "0: Comparator hysteresis disabled"]
NO_HYST = 0,
#[doc = "1: Comparator hysteresis enabled"]
HYST50M_V = 1,
}
impl From<HYST_A> for bool {
#[inline(always)]
fn from(variant: HYST_A) -> Self {
variant as u8 != 0
}
}
impl HYST_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> HYST_A {
match self.bits {
false => HYST_A::NO_HYST,
true => HYST_A::HYST50M_V,
}
}
#[doc = "Checks if the value of the field is `NO_HYST`"]
#[inline(always)]
pub fn is_no_hyst(&self) -> bool {
*self == HYST_A::NO_HYST
}
#[doc = "Checks if the value of the field is `HYST50M_V`"]
#[inline(always)]
pub fn is_hyst50m_v(&self) -> bool {
*self == HYST_A::HYST50M_V
}
}
#[doc = "Field `HYST` writer - Comparator hysteresis"]
pub type HYST_W<'a, const O: u8> = crate::BitWriter<'a, u32, HYST_SPEC, HYST_A, O>;
impl<'a, const O: u8> HYST_W<'a, O> {
#[doc = "Comparator hysteresis disabled"]
#[inline(always)]
pub fn no_hyst(self) -> &'a mut W {
self.variant(HYST_A::NO_HYST)
}
#[doc = "Comparator hysteresis enabled"]
#[inline(always)]
pub fn hyst50m_v(self) -> &'a mut W {
self.variant(HYST_A::HYST50M_V)
}
}
impl R {
#[doc = "Bit 0 - Comparator hysteresis"]
#[inline(always)]
pub fn hyst(&self) -> HYST_R {
HYST_R::new((self.bits & 1) != 0)
}
}
impl W {
#[doc = "Bit 0 - Comparator hysteresis"]
#[inline(always)]
pub fn hyst(&mut self) -> HYST_W<0> {
HYST_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Comparator hysteresis enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hyst](index.html) module"]
pub struct HYST_SPEC;
impl crate::RegisterSpec for HYST_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [hyst::R](R) reader structure"]
impl crate::Readable for HYST_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [hyst::W](W) writer structure"]
impl crate::Writable for HYST_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets HYST to value 0"]
impl crate::Resettable for HYST_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/comp/inten.rs
Vendored
+306
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#[doc = "Register `INTEN` reader"]
pub struct R(crate::R<INTEN_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<INTEN_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<INTEN_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<INTEN_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `INTEN` writer"]
pub struct W(crate::W<INTEN_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<INTEN_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<INTEN_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<INTEN_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `READY` reader - Enable or disable interrupt for READY event"]
pub type READY_R = crate::BitReader<READY_A>;
#[doc = "Enable or disable interrupt for READY event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum READY_A {
#[doc = "0: Disable"]
DISABLED = 0,
#[doc = "1: Enable"]
ENABLED = 1,
}
impl From<READY_A> for bool {
#[inline(always)]
fn from(variant: READY_A) -> Self {
variant as u8 != 0
}
}
impl READY_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> READY_A {
match self.bits {
false => READY_A::DISABLED,
true => READY_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == READY_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == READY_A::ENABLED
}
}
#[doc = "Field `READY` writer - Enable or disable interrupt for READY event"]
pub type READY_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, READY_A, O>;
impl<'a, const O: u8> READY_W<'a, O> {
#[doc = "Disable"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(READY_A::DISABLED)
}
#[doc = "Enable"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(READY_A::ENABLED)
}
}
#[doc = "Field `DOWN` reader - Enable or disable interrupt for DOWN event"]
pub type DOWN_R = crate::BitReader<DOWN_A>;
#[doc = "Enable or disable interrupt for DOWN event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DOWN_A {
#[doc = "0: Disable"]
DISABLED = 0,
#[doc = "1: Enable"]
ENABLED = 1,
}
impl From<DOWN_A> for bool {
#[inline(always)]
fn from(variant: DOWN_A) -> Self {
variant as u8 != 0
}
}
impl DOWN_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> DOWN_A {
match self.bits {
false => DOWN_A::DISABLED,
true => DOWN_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == DOWN_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == DOWN_A::ENABLED
}
}
#[doc = "Field `DOWN` writer - Enable or disable interrupt for DOWN event"]
pub type DOWN_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, DOWN_A, O>;
impl<'a, const O: u8> DOWN_W<'a, O> {
#[doc = "Disable"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(DOWN_A::DISABLED)
}
#[doc = "Enable"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(DOWN_A::ENABLED)
}
}
#[doc = "Field `UP` reader - Enable or disable interrupt for UP event"]
pub type UP_R = crate::BitReader<UP_A>;
#[doc = "Enable or disable interrupt for UP event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum UP_A {
#[doc = "0: Disable"]
DISABLED = 0,
#[doc = "1: Enable"]
ENABLED = 1,
}
impl From<UP_A> for bool {
#[inline(always)]
fn from(variant: UP_A) -> Self {
variant as u8 != 0
}
}
impl UP_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> UP_A {
match self.bits {
false => UP_A::DISABLED,
true => UP_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == UP_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == UP_A::ENABLED
}
}
#[doc = "Field `UP` writer - Enable or disable interrupt for UP event"]
pub type UP_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, UP_A, O>;
impl<'a, const O: u8> UP_W<'a, O> {
#[doc = "Disable"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(UP_A::DISABLED)
}
#[doc = "Enable"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(UP_A::ENABLED)
}
}
#[doc = "Field `CROSS` reader - Enable or disable interrupt for CROSS event"]
pub type CROSS_R = crate::BitReader<CROSS_A>;
#[doc = "Enable or disable interrupt for CROSS event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CROSS_A {
#[doc = "0: Disable"]
DISABLED = 0,
#[doc = "1: Enable"]
ENABLED = 1,
}
impl From<CROSS_A> for bool {
#[inline(always)]
fn from(variant: CROSS_A) -> Self {
variant as u8 != 0
}
}
impl CROSS_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> CROSS_A {
match self.bits {
false => CROSS_A::DISABLED,
true => CROSS_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == CROSS_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == CROSS_A::ENABLED
}
}
#[doc = "Field `CROSS` writer - Enable or disable interrupt for CROSS event"]
pub type CROSS_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, CROSS_A, O>;
impl<'a, const O: u8> CROSS_W<'a, O> {
#[doc = "Disable"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(CROSS_A::DISABLED)
}
#[doc = "Enable"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(CROSS_A::ENABLED)
}
}
impl R {
#[doc = "Bit 0 - Enable or disable interrupt for READY event"]
#[inline(always)]
pub fn ready(&self) -> READY_R {
READY_R::new((self.bits & 1) != 0)
}
#[doc = "Bit 1 - Enable or disable interrupt for DOWN event"]
#[inline(always)]
pub fn down(&self) -> DOWN_R {
DOWN_R::new(((self.bits >> 1) & 1) != 0)
}
#[doc = "Bit 2 - Enable or disable interrupt for UP event"]
#[inline(always)]
pub fn up(&self) -> UP_R {
UP_R::new(((self.bits >> 2) & 1) != 0)
}
#[doc = "Bit 3 - Enable or disable interrupt for CROSS event"]
#[inline(always)]
pub fn cross(&self) -> CROSS_R {
CROSS_R::new(((self.bits >> 3) & 1) != 0)
}
}
impl W {
#[doc = "Bit 0 - Enable or disable interrupt for READY event"]
#[inline(always)]
pub fn ready(&mut self) -> READY_W<0> {
READY_W::new(self)
}
#[doc = "Bit 1 - Enable or disable interrupt for DOWN event"]
#[inline(always)]
pub fn down(&mut self) -> DOWN_W<1> {
DOWN_W::new(self)
}
#[doc = "Bit 2 - Enable or disable interrupt for UP event"]
#[inline(always)]
pub fn up(&mut self) -> UP_W<2> {
UP_W::new(self)
}
#[doc = "Bit 3 - Enable or disable interrupt for CROSS event"]
#[inline(always)]
pub fn cross(&mut self) -> CROSS_W<3> {
CROSS_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Enable or disable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [inten](index.html) module"]
pub struct INTEN_SPEC;
impl crate::RegisterSpec for INTEN_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [inten::R](R) reader structure"]
impl crate::Readable for INTEN_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [inten::W](W) writer structure"]
impl crate::Writable for INTEN_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets INTEN to value 0"]
impl crate::Resettable for INTEN_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/comp/intenclr.rs
Vendored
+334
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#[doc = "Register `INTENCLR` reader"]
pub struct R(crate::R<INTENCLR_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<INTENCLR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<INTENCLR_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<INTENCLR_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `INTENCLR` writer"]
pub struct W(crate::W<INTENCLR_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<INTENCLR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<INTENCLR_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<INTENCLR_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `READY` reader - Write '1' to disable interrupt for READY event"]
pub type READY_R = crate::BitReader<READY_A>;
#[doc = "Write '1' to disable interrupt for READY event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum READY_A {
#[doc = "0: Read: Disabled"]
DISABLED = 0,
#[doc = "1: Read: Enabled"]
ENABLED = 1,
}
impl From<READY_A> for bool {
#[inline(always)]
fn from(variant: READY_A) -> Self {
variant as u8 != 0
}
}
impl READY_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> READY_A {
match self.bits {
false => READY_A::DISABLED,
true => READY_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == READY_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == READY_A::ENABLED
}
}
#[doc = "Write '1' to disable interrupt for READY event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum READY_AW {
#[doc = "1: Disable"]
CLEAR = 1,
}
impl From<READY_AW> for bool {
#[inline(always)]
fn from(variant: READY_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `READY` writer - Write '1' to disable interrupt for READY event"]
pub type READY_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, READY_AW, O>;
impl<'a, const O: u8> READY_W<'a, O> {
#[doc = "Disable"]
#[inline(always)]
pub fn clear(self) -> &'a mut W {
self.variant(READY_AW::CLEAR)
}
}
#[doc = "Field `DOWN` reader - Write '1' to disable interrupt for DOWN event"]
pub type DOWN_R = crate::BitReader<DOWN_A>;
#[doc = "Write '1' to disable interrupt for DOWN event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DOWN_A {
#[doc = "0: Read: Disabled"]
DISABLED = 0,
#[doc = "1: Read: Enabled"]
ENABLED = 1,
}
impl From<DOWN_A> for bool {
#[inline(always)]
fn from(variant: DOWN_A) -> Self {
variant as u8 != 0
}
}
impl DOWN_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> DOWN_A {
match self.bits {
false => DOWN_A::DISABLED,
true => DOWN_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == DOWN_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == DOWN_A::ENABLED
}
}
#[doc = "Write '1' to disable interrupt for DOWN event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DOWN_AW {
#[doc = "1: Disable"]
CLEAR = 1,
}
impl From<DOWN_AW> for bool {
#[inline(always)]
fn from(variant: DOWN_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `DOWN` writer - Write '1' to disable interrupt for DOWN event"]
pub type DOWN_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, DOWN_AW, O>;
impl<'a, const O: u8> DOWN_W<'a, O> {
#[doc = "Disable"]
#[inline(always)]
pub fn clear(self) -> &'a mut W {
self.variant(DOWN_AW::CLEAR)
}
}
#[doc = "Field `UP` reader - Write '1' to disable interrupt for UP event"]
pub type UP_R = crate::BitReader<UP_A>;
#[doc = "Write '1' to disable interrupt for UP event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum UP_A {
#[doc = "0: Read: Disabled"]
DISABLED = 0,
#[doc = "1: Read: Enabled"]
ENABLED = 1,
}
impl From<UP_A> for bool {
#[inline(always)]
fn from(variant: UP_A) -> Self {
variant as u8 != 0
}
}
impl UP_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> UP_A {
match self.bits {
false => UP_A::DISABLED,
true => UP_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == UP_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == UP_A::ENABLED
}
}
#[doc = "Write '1' to disable interrupt for UP event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum UP_AW {
#[doc = "1: Disable"]
CLEAR = 1,
}
impl From<UP_AW> for bool {
#[inline(always)]
fn from(variant: UP_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `UP` writer - Write '1' to disable interrupt for UP event"]
pub type UP_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, UP_AW, O>;
impl<'a, const O: u8> UP_W<'a, O> {
#[doc = "Disable"]
#[inline(always)]
pub fn clear(self) -> &'a mut W {
self.variant(UP_AW::CLEAR)
}
}
#[doc = "Field `CROSS` reader - Write '1' to disable interrupt for CROSS event"]
pub type CROSS_R = crate::BitReader<CROSS_A>;
#[doc = "Write '1' to disable interrupt for CROSS event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CROSS_A {
#[doc = "0: Read: Disabled"]
DISABLED = 0,
#[doc = "1: Read: Enabled"]
ENABLED = 1,
}
impl From<CROSS_A> for bool {
#[inline(always)]
fn from(variant: CROSS_A) -> Self {
variant as u8 != 0
}
}
impl CROSS_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> CROSS_A {
match self.bits {
false => CROSS_A::DISABLED,
true => CROSS_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == CROSS_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == CROSS_A::ENABLED
}
}
#[doc = "Write '1' to disable interrupt for CROSS event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CROSS_AW {
#[doc = "1: Disable"]
CLEAR = 1,
}
impl From<CROSS_AW> for bool {
#[inline(always)]
fn from(variant: CROSS_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `CROSS` writer - Write '1' to disable interrupt for CROSS event"]
pub type CROSS_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, CROSS_AW, O>;
impl<'a, const O: u8> CROSS_W<'a, O> {
#[doc = "Disable"]
#[inline(always)]
pub fn clear(self) -> &'a mut W {
self.variant(CROSS_AW::CLEAR)
}
}
impl R {
#[doc = "Bit 0 - Write '1' to disable interrupt for READY event"]
#[inline(always)]
pub fn ready(&self) -> READY_R {
READY_R::new((self.bits & 1) != 0)
}
#[doc = "Bit 1 - Write '1' to disable interrupt for DOWN event"]
#[inline(always)]
pub fn down(&self) -> DOWN_R {
DOWN_R::new(((self.bits >> 1) & 1) != 0)
}
#[doc = "Bit 2 - Write '1' to disable interrupt for UP event"]
#[inline(always)]
pub fn up(&self) -> UP_R {
UP_R::new(((self.bits >> 2) & 1) != 0)
}
#[doc = "Bit 3 - Write '1' to disable interrupt for CROSS event"]
#[inline(always)]
pub fn cross(&self) -> CROSS_R {
CROSS_R::new(((self.bits >> 3) & 1) != 0)
}
}
impl W {
#[doc = "Bit 0 - Write '1' to disable interrupt for READY event"]
#[inline(always)]
pub fn ready(&mut self) -> READY_W<0> {
READY_W::new(self)
}
#[doc = "Bit 1 - Write '1' to disable interrupt for DOWN event"]
#[inline(always)]
pub fn down(&mut self) -> DOWN_W<1> {
DOWN_W::new(self)
}
#[doc = "Bit 2 - Write '1' to disable interrupt for UP event"]
#[inline(always)]
pub fn up(&mut self) -> UP_W<2> {
UP_W::new(self)
}
#[doc = "Bit 3 - Write '1' to disable interrupt for CROSS event"]
#[inline(always)]
pub fn cross(&mut self) -> CROSS_W<3> {
CROSS_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Disable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"]
pub struct INTENCLR_SPEC;
impl crate::RegisterSpec for INTENCLR_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [intenclr::R](R) reader structure"]
impl crate::Readable for INTENCLR_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"]
impl crate::Writable for INTENCLR_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets INTENCLR to value 0"]
impl crate::Resettable for INTENCLR_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/comp/intenset.rs
Vendored
+334
View File
@@ -0,0 +1,334 @@
#[doc = "Register `INTENSET` reader"]
pub struct R(crate::R<INTENSET_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<INTENSET_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<INTENSET_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<INTENSET_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `INTENSET` writer"]
pub struct W(crate::W<INTENSET_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<INTENSET_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<INTENSET_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<INTENSET_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `READY` reader - Write '1' to enable interrupt for READY event"]
pub type READY_R = crate::BitReader<READY_A>;
#[doc = "Write '1' to enable interrupt for READY event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum READY_A {
#[doc = "0: Read: Disabled"]
DISABLED = 0,
#[doc = "1: Read: Enabled"]
ENABLED = 1,
}
impl From<READY_A> for bool {
#[inline(always)]
fn from(variant: READY_A) -> Self {
variant as u8 != 0
}
}
impl READY_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> READY_A {
match self.bits {
false => READY_A::DISABLED,
true => READY_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == READY_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == READY_A::ENABLED
}
}
#[doc = "Write '1' to enable interrupt for READY event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum READY_AW {
#[doc = "1: Enable"]
SET = 1,
}
impl From<READY_AW> for bool {
#[inline(always)]
fn from(variant: READY_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `READY` writer - Write '1' to enable interrupt for READY event"]
pub type READY_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, READY_AW, O>;
impl<'a, const O: u8> READY_W<'a, O> {
#[doc = "Enable"]
#[inline(always)]
pub fn set(self) -> &'a mut W {
self.variant(READY_AW::SET)
}
}
#[doc = "Field `DOWN` reader - Write '1' to enable interrupt for DOWN event"]
pub type DOWN_R = crate::BitReader<DOWN_A>;
#[doc = "Write '1' to enable interrupt for DOWN event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DOWN_A {
#[doc = "0: Read: Disabled"]
DISABLED = 0,
#[doc = "1: Read: Enabled"]
ENABLED = 1,
}
impl From<DOWN_A> for bool {
#[inline(always)]
fn from(variant: DOWN_A) -> Self {
variant as u8 != 0
}
}
impl DOWN_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> DOWN_A {
match self.bits {
false => DOWN_A::DISABLED,
true => DOWN_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == DOWN_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == DOWN_A::ENABLED
}
}
#[doc = "Write '1' to enable interrupt for DOWN event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DOWN_AW {
#[doc = "1: Enable"]
SET = 1,
}
impl From<DOWN_AW> for bool {
#[inline(always)]
fn from(variant: DOWN_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `DOWN` writer - Write '1' to enable interrupt for DOWN event"]
pub type DOWN_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, DOWN_AW, O>;
impl<'a, const O: u8> DOWN_W<'a, O> {
#[doc = "Enable"]
#[inline(always)]
pub fn set(self) -> &'a mut W {
self.variant(DOWN_AW::SET)
}
}
#[doc = "Field `UP` reader - Write '1' to enable interrupt for UP event"]
pub type UP_R = crate::BitReader<UP_A>;
#[doc = "Write '1' to enable interrupt for UP event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum UP_A {
#[doc = "0: Read: Disabled"]
DISABLED = 0,
#[doc = "1: Read: Enabled"]
ENABLED = 1,
}
impl From<UP_A> for bool {
#[inline(always)]
fn from(variant: UP_A) -> Self {
variant as u8 != 0
}
}
impl UP_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> UP_A {
match self.bits {
false => UP_A::DISABLED,
true => UP_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == UP_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == UP_A::ENABLED
}
}
#[doc = "Write '1' to enable interrupt for UP event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum UP_AW {
#[doc = "1: Enable"]
SET = 1,
}
impl From<UP_AW> for bool {
#[inline(always)]
fn from(variant: UP_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `UP` writer - Write '1' to enable interrupt for UP event"]
pub type UP_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, UP_AW, O>;
impl<'a, const O: u8> UP_W<'a, O> {
#[doc = "Enable"]
#[inline(always)]
pub fn set(self) -> &'a mut W {
self.variant(UP_AW::SET)
}
}
#[doc = "Field `CROSS` reader - Write '1' to enable interrupt for CROSS event"]
pub type CROSS_R = crate::BitReader<CROSS_A>;
#[doc = "Write '1' to enable interrupt for CROSS event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CROSS_A {
#[doc = "0: Read: Disabled"]
DISABLED = 0,
#[doc = "1: Read: Enabled"]
ENABLED = 1,
}
impl From<CROSS_A> for bool {
#[inline(always)]
fn from(variant: CROSS_A) -> Self {
variant as u8 != 0
}
}
impl CROSS_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> CROSS_A {
match self.bits {
false => CROSS_A::DISABLED,
true => CROSS_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == CROSS_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == CROSS_A::ENABLED
}
}
#[doc = "Write '1' to enable interrupt for CROSS event\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CROSS_AW {
#[doc = "1: Enable"]
SET = 1,
}
impl From<CROSS_AW> for bool {
#[inline(always)]
fn from(variant: CROSS_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `CROSS` writer - Write '1' to enable interrupt for CROSS event"]
pub type CROSS_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, CROSS_AW, O>;
impl<'a, const O: u8> CROSS_W<'a, O> {
#[doc = "Enable"]
#[inline(always)]
pub fn set(self) -> &'a mut W {
self.variant(CROSS_AW::SET)
}
}
impl R {
#[doc = "Bit 0 - Write '1' to enable interrupt for READY event"]
#[inline(always)]
pub fn ready(&self) -> READY_R {
READY_R::new((self.bits & 1) != 0)
}
#[doc = "Bit 1 - Write '1' to enable interrupt for DOWN event"]
#[inline(always)]
pub fn down(&self) -> DOWN_R {
DOWN_R::new(((self.bits >> 1) & 1) != 0)
}
#[doc = "Bit 2 - Write '1' to enable interrupt for UP event"]
#[inline(always)]
pub fn up(&self) -> UP_R {
UP_R::new(((self.bits >> 2) & 1) != 0)
}
#[doc = "Bit 3 - Write '1' to enable interrupt for CROSS event"]
#[inline(always)]
pub fn cross(&self) -> CROSS_R {
CROSS_R::new(((self.bits >> 3) & 1) != 0)
}
}
impl W {
#[doc = "Bit 0 - Write '1' to enable interrupt for READY event"]
#[inline(always)]
pub fn ready(&mut self) -> READY_W<0> {
READY_W::new(self)
}
#[doc = "Bit 1 - Write '1' to enable interrupt for DOWN event"]
#[inline(always)]
pub fn down(&mut self) -> DOWN_W<1> {
DOWN_W::new(self)
}
#[doc = "Bit 2 - Write '1' to enable interrupt for UP event"]
#[inline(always)]
pub fn up(&mut self) -> UP_W<2> {
UP_W::new(self)
}
#[doc = "Bit 3 - Write '1' to enable interrupt for CROSS event"]
#[inline(always)]
pub fn cross(&mut self) -> CROSS_W<3> {
CROSS_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Enable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"]
pub struct INTENSET_SPEC;
impl crate::RegisterSpec for INTENSET_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [intenset::R](R) reader structure"]
impl crate::Readable for INTENSET_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"]
impl crate::Writable for INTENSET_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets INTENSET to value 0"]
impl crate::Resettable for INTENSET_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/comp/mode.rs
Vendored
+201
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#[doc = "Register `MODE` reader"]
pub struct R(crate::R<MODE_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<MODE_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<MODE_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<MODE_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `MODE` writer"]
pub struct W(crate::W<MODE_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<MODE_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<MODE_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<MODE_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `SP` reader - Speed and power modes"]
pub type SP_R = crate::FieldReader<u8, SP_A>;
#[doc = "Speed and power modes\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum SP_A {
#[doc = "0: Low-power mode"]
LOW = 0,
#[doc = "1: Normal mode"]
NORMAL = 1,
#[doc = "2: High-speed mode"]
HIGH = 2,
}
impl From<SP_A> for u8 {
#[inline(always)]
fn from(variant: SP_A) -> Self {
variant as _
}
}
impl SP_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> Option<SP_A> {
match self.bits {
0 => Some(SP_A::LOW),
1 => Some(SP_A::NORMAL),
2 => Some(SP_A::HIGH),
_ => None,
}
}
#[doc = "Checks if the value of the field is `LOW`"]
#[inline(always)]
pub fn is_low(&self) -> bool {
*self == SP_A::LOW
}
#[doc = "Checks if the value of the field is `NORMAL`"]
#[inline(always)]
pub fn is_normal(&self) -> bool {
*self == SP_A::NORMAL
}
#[doc = "Checks if the value of the field is `HIGH`"]
#[inline(always)]
pub fn is_high(&self) -> bool {
*self == SP_A::HIGH
}
}
#[doc = "Field `SP` writer - Speed and power modes"]
pub type SP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, MODE_SPEC, u8, SP_A, 2, O>;
impl<'a, const O: u8> SP_W<'a, O> {
#[doc = "Low-power mode"]
#[inline(always)]
pub fn low(self) -> &'a mut W {
self.variant(SP_A::LOW)
}
#[doc = "Normal mode"]
#[inline(always)]
pub fn normal(self) -> &'a mut W {
self.variant(SP_A::NORMAL)
}
#[doc = "High-speed mode"]
#[inline(always)]
pub fn high(self) -> &'a mut W {
self.variant(SP_A::HIGH)
}
}
#[doc = "Field `MAIN` reader - Main operation modes"]
pub type MAIN_R = crate::BitReader<MAIN_A>;
#[doc = "Main operation modes\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum MAIN_A {
#[doc = "0: Single-ended mode"]
SE = 0,
#[doc = "1: Differential mode"]
DIFF = 1,
}
impl From<MAIN_A> for bool {
#[inline(always)]
fn from(variant: MAIN_A) -> Self {
variant as u8 != 0
}
}
impl MAIN_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> MAIN_A {
match self.bits {
false => MAIN_A::SE,
true => MAIN_A::DIFF,
}
}
#[doc = "Checks if the value of the field is `SE`"]
#[inline(always)]
pub fn is_se(&self) -> bool {
*self == MAIN_A::SE
}
#[doc = "Checks if the value of the field is `DIFF`"]
#[inline(always)]
pub fn is_diff(&self) -> bool {
*self == MAIN_A::DIFF
}
}
#[doc = "Field `MAIN` writer - Main operation modes"]
pub type MAIN_W<'a, const O: u8> = crate::BitWriter<'a, u32, MODE_SPEC, MAIN_A, O>;
impl<'a, const O: u8> MAIN_W<'a, O> {
#[doc = "Single-ended mode"]
#[inline(always)]
pub fn se(self) -> &'a mut W {
self.variant(MAIN_A::SE)
}
#[doc = "Differential mode"]
#[inline(always)]
pub fn diff(self) -> &'a mut W {
self.variant(MAIN_A::DIFF)
}
}
impl R {
#[doc = "Bits 0:1 - Speed and power modes"]
#[inline(always)]
pub fn sp(&self) -> SP_R {
SP_R::new((self.bits & 3) as u8)
}
#[doc = "Bit 8 - Main operation modes"]
#[inline(always)]
pub fn main(&self) -> MAIN_R {
MAIN_R::new(((self.bits >> 8) & 1) != 0)
}
}
impl W {
#[doc = "Bits 0:1 - Speed and power modes"]
#[inline(always)]
pub fn sp(&mut self) -> SP_W<0> {
SP_W::new(self)
}
#[doc = "Bit 8 - Main operation modes"]
#[inline(always)]
pub fn main(&mut self) -> MAIN_W<8> {
MAIN_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Mode configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mode](index.html) module"]
pub struct MODE_SPEC;
impl crate::RegisterSpec for MODE_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [mode::R](R) reader structure"]
impl crate::Readable for MODE_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [mode::W](W) writer structure"]
impl crate::Writable for MODE_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets MODE to value 0"]
impl crate::Resettable for MODE_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/comp/psel.rs
Vendored
+206
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@@ -0,0 +1,206 @@
#[doc = "Register `PSEL` reader"]
pub struct R(crate::R<PSEL_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<PSEL_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<PSEL_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<PSEL_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `PSEL` writer"]
pub struct W(crate::W<PSEL_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<PSEL_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<PSEL_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<PSEL_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `PSEL` reader - Analog pin select"]
pub type PSEL_R = crate::FieldReader<u8, PSEL_A>;
#[doc = "Analog pin select\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum PSEL_A {
#[doc = "0: AIN0 selected as analog input"]
ANALOG_INPUT0 = 0,
#[doc = "1: AIN1 selected as analog input"]
ANALOG_INPUT1 = 1,
#[doc = "2: AIN2 selected as analog input"]
ANALOG_INPUT2 = 2,
#[doc = "3: AIN3 selected as analog input"]
ANALOG_INPUT3 = 3,
#[doc = "4: AIN4 selected as analog input"]
ANALOG_INPUT4 = 4,
#[doc = "5: AIN5 selected as analog input"]
ANALOG_INPUT5 = 5,
#[doc = "6: AIN6 selected as analog input"]
ANALOG_INPUT6 = 6,
#[doc = "7: AIN7 selected as analog input"]
ANALOG_INPUT7 = 7,
}
impl From<PSEL_A> for u8 {
#[inline(always)]
fn from(variant: PSEL_A) -> Self {
variant as _
}
}
impl PSEL_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> PSEL_A {
match self.bits {
0 => PSEL_A::ANALOG_INPUT0,
1 => PSEL_A::ANALOG_INPUT1,
2 => PSEL_A::ANALOG_INPUT2,
3 => PSEL_A::ANALOG_INPUT3,
4 => PSEL_A::ANALOG_INPUT4,
5 => PSEL_A::ANALOG_INPUT5,
6 => PSEL_A::ANALOG_INPUT6,
7 => PSEL_A::ANALOG_INPUT7,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `ANALOG_INPUT0`"]
#[inline(always)]
pub fn is_analog_input0(&self) -> bool {
*self == PSEL_A::ANALOG_INPUT0
}
#[doc = "Checks if the value of the field is `ANALOG_INPUT1`"]
#[inline(always)]
pub fn is_analog_input1(&self) -> bool {
*self == PSEL_A::ANALOG_INPUT1
}
#[doc = "Checks if the value of the field is `ANALOG_INPUT2`"]
#[inline(always)]
pub fn is_analog_input2(&self) -> bool {
*self == PSEL_A::ANALOG_INPUT2
}
#[doc = "Checks if the value of the field is `ANALOG_INPUT3`"]
#[inline(always)]
pub fn is_analog_input3(&self) -> bool {
*self == PSEL_A::ANALOG_INPUT3
}
#[doc = "Checks if the value of the field is `ANALOG_INPUT4`"]
#[inline(always)]
pub fn is_analog_input4(&self) -> bool {
*self == PSEL_A::ANALOG_INPUT4
}
#[doc = "Checks if the value of the field is `ANALOG_INPUT5`"]
#[inline(always)]
pub fn is_analog_input5(&self) -> bool {
*self == PSEL_A::ANALOG_INPUT5
}
#[doc = "Checks if the value of the field is `ANALOG_INPUT6`"]
#[inline(always)]
pub fn is_analog_input6(&self) -> bool {
*self == PSEL_A::ANALOG_INPUT6
}
#[doc = "Checks if the value of the field is `ANALOG_INPUT7`"]
#[inline(always)]
pub fn is_analog_input7(&self) -> bool {
*self == PSEL_A::ANALOG_INPUT7
}
}
#[doc = "Field `PSEL` writer - Analog pin select"]
pub type PSEL_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, PSEL_SPEC, u8, PSEL_A, 3, O>;
impl<'a, const O: u8> PSEL_W<'a, O> {
#[doc = "AIN0 selected as analog input"]
#[inline(always)]
pub fn analog_input0(self) -> &'a mut W {
self.variant(PSEL_A::ANALOG_INPUT0)
}
#[doc = "AIN1 selected as analog input"]
#[inline(always)]
pub fn analog_input1(self) -> &'a mut W {
self.variant(PSEL_A::ANALOG_INPUT1)
}
#[doc = "AIN2 selected as analog input"]
#[inline(always)]
pub fn analog_input2(self) -> &'a mut W {
self.variant(PSEL_A::ANALOG_INPUT2)
}
#[doc = "AIN3 selected as analog input"]
#[inline(always)]
pub fn analog_input3(self) -> &'a mut W {
self.variant(PSEL_A::ANALOG_INPUT3)
}
#[doc = "AIN4 selected as analog input"]
#[inline(always)]
pub fn analog_input4(self) -> &'a mut W {
self.variant(PSEL_A::ANALOG_INPUT4)
}
#[doc = "AIN5 selected as analog input"]
#[inline(always)]
pub fn analog_input5(self) -> &'a mut W {
self.variant(PSEL_A::ANALOG_INPUT5)
}
#[doc = "AIN6 selected as analog input"]
#[inline(always)]
pub fn analog_input6(self) -> &'a mut W {
self.variant(PSEL_A::ANALOG_INPUT6)
}
#[doc = "AIN7 selected as analog input"]
#[inline(always)]
pub fn analog_input7(self) -> &'a mut W {
self.variant(PSEL_A::ANALOG_INPUT7)
}
}
impl R {
#[doc = "Bits 0:2 - Analog pin select"]
#[inline(always)]
pub fn psel(&self) -> PSEL_R {
PSEL_R::new((self.bits & 7) as u8)
}
}
impl W {
#[doc = "Bits 0:2 - Analog pin select"]
#[inline(always)]
pub fn psel(&mut self) -> PSEL_W<0> {
PSEL_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [psel](index.html) module"]
pub struct PSEL_SPEC;
impl crate::RegisterSpec for PSEL_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [psel::R](R) reader structure"]
impl crate::Readable for PSEL_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [psel::W](W) writer structure"]
impl crate::Writable for PSEL_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets PSEL to value 0"]
impl crate::Resettable for PSEL_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/comp/refsel.rs
Vendored
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#[doc = "Register `REFSEL` reader"]
pub struct R(crate::R<REFSEL_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<REFSEL_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<REFSEL_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<REFSEL_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `REFSEL` writer"]
pub struct W(crate::W<REFSEL_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<REFSEL_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<REFSEL_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<REFSEL_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `REFSEL` reader - Reference select"]
pub type REFSEL_R = crate::FieldReader<u8, REFSEL_A>;
#[doc = "Reference select\n\nValue on reset: 4"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum REFSEL_A {
#[doc = "0: VREF = internal 1.2 V reference (VDD &gt;= 1.7 V)"]
INT1V2 = 0,
#[doc = "1: VREF = internal 1.8 V reference (VDD &gt;= VREF + 0.2 V)"]
INT1V8 = 1,
#[doc = "2: VREF = internal 2.4 V reference (VDD &gt;= VREF + 0.2 V)"]
INT2V4 = 2,
#[doc = "4: VREF = VDD"]
VDD = 4,
#[doc = "5: VREF = AREF (VDD &gt;= VREF &gt;= AREFMIN)"]
AREF = 5,
}
impl From<REFSEL_A> for u8 {
#[inline(always)]
fn from(variant: REFSEL_A) -> Self {
variant as _
}
}
impl REFSEL_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> Option<REFSEL_A> {
match self.bits {
0 => Some(REFSEL_A::INT1V2),
1 => Some(REFSEL_A::INT1V8),
2 => Some(REFSEL_A::INT2V4),
4 => Some(REFSEL_A::VDD),
5 => Some(REFSEL_A::AREF),
_ => None,
}
}
#[doc = "Checks if the value of the field is `INT1V2`"]
#[inline(always)]
pub fn is_int1v2(&self) -> bool {
*self == REFSEL_A::INT1V2
}
#[doc = "Checks if the value of the field is `INT1V8`"]
#[inline(always)]
pub fn is_int1v8(&self) -> bool {
*self == REFSEL_A::INT1V8
}
#[doc = "Checks if the value of the field is `INT2V4`"]
#[inline(always)]
pub fn is_int2v4(&self) -> bool {
*self == REFSEL_A::INT2V4
}
#[doc = "Checks if the value of the field is `VDD`"]
#[inline(always)]
pub fn is_vdd(&self) -> bool {
*self == REFSEL_A::VDD
}
#[doc = "Checks if the value of the field is `AREF`"]
#[inline(always)]
pub fn is_aref(&self) -> bool {
*self == REFSEL_A::AREF
}
}
#[doc = "Field `REFSEL` writer - Reference select"]
pub type REFSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, REFSEL_SPEC, u8, REFSEL_A, 3, O>;
impl<'a, const O: u8> REFSEL_W<'a, O> {
#[doc = "VREF = internal 1.2 V reference (VDD &gt;= 1.7 V)"]
#[inline(always)]
pub fn int1v2(self) -> &'a mut W {
self.variant(REFSEL_A::INT1V2)
}
#[doc = "VREF = internal 1.8 V reference (VDD &gt;= VREF + 0.2 V)"]
#[inline(always)]
pub fn int1v8(self) -> &'a mut W {
self.variant(REFSEL_A::INT1V8)
}
#[doc = "VREF = internal 2.4 V reference (VDD &gt;= VREF + 0.2 V)"]
#[inline(always)]
pub fn int2v4(self) -> &'a mut W {
self.variant(REFSEL_A::INT2V4)
}
#[doc = "VREF = VDD"]
#[inline(always)]
pub fn vdd(self) -> &'a mut W {
self.variant(REFSEL_A::VDD)
}
#[doc = "VREF = AREF (VDD &gt;= VREF &gt;= AREFMIN)"]
#[inline(always)]
pub fn aref(self) -> &'a mut W {
self.variant(REFSEL_A::AREF)
}
}
impl R {
#[doc = "Bits 0:2 - Reference select"]
#[inline(always)]
pub fn refsel(&self) -> REFSEL_R {
REFSEL_R::new((self.bits & 7) as u8)
}
}
impl W {
#[doc = "Bits 0:2 - Reference select"]
#[inline(always)]
pub fn refsel(&mut self) -> REFSEL_W<0> {
REFSEL_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Reference source select for single-ended mode\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [refsel](index.html) module"]
pub struct REFSEL_SPEC;
impl crate::RegisterSpec for REFSEL_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [refsel::R](R) reader structure"]
impl crate::Readable for REFSEL_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [refsel::W](W) writer structure"]
impl crate::Writable for REFSEL_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets REFSEL to value 0x04"]
impl crate::Resettable for REFSEL_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0x04
}
}
vendor/nrf52840-pac/src/comp/result.rs
Vendored
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#[doc = "Register `RESULT` reader"]
pub struct R(crate::R<RESULT_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<RESULT_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<RESULT_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<RESULT_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Field `RESULT` reader - Result of last compare. Decision point SAMPLE task."]
pub type RESULT_R = crate::BitReader<RESULT_A>;
#[doc = "Result of last compare. Decision point SAMPLE task.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RESULT_A {
#[doc = "0: Input voltage is below the threshold (VIN+ &lt; VIN-)"]
BELOW = 0,
#[doc = "1: Input voltage is above the threshold (VIN+ &gt; VIN-)"]
ABOVE = 1,
}
impl From<RESULT_A> for bool {
#[inline(always)]
fn from(variant: RESULT_A) -> Self {
variant as u8 != 0
}
}
impl RESULT_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> RESULT_A {
match self.bits {
false => RESULT_A::BELOW,
true => RESULT_A::ABOVE,
}
}
#[doc = "Checks if the value of the field is `BELOW`"]
#[inline(always)]
pub fn is_below(&self) -> bool {
*self == RESULT_A::BELOW
}
#[doc = "Checks if the value of the field is `ABOVE`"]
#[inline(always)]
pub fn is_above(&self) -> bool {
*self == RESULT_A::ABOVE
}
}
impl R {
#[doc = "Bit 0 - Result of last compare. Decision point SAMPLE task."]
#[inline(always)]
pub fn result(&self) -> RESULT_R {
RESULT_R::new((self.bits & 1) != 0)
}
}
#[doc = "Compare result\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [result](index.html) module"]
pub struct RESULT_SPEC;
impl crate::RegisterSpec for RESULT_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [result::R](R) reader structure"]
impl crate::Readable for RESULT_SPEC {
type Reader = R;
}
#[doc = "`reset()` method sets RESULT to value 0"]
impl crate::Resettable for RESULT_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/comp/shorts.rs
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+367
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#[doc = "Register `SHORTS` reader"]
pub struct R(crate::R<SHORTS_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<SHORTS_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<SHORTS_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<SHORTS_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `SHORTS` writer"]
pub struct W(crate::W<SHORTS_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<SHORTS_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<SHORTS_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<SHORTS_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `READY_SAMPLE` reader - Shortcut between READY event and SAMPLE task"]
pub type READY_SAMPLE_R = crate::BitReader<READY_SAMPLE_A>;
#[doc = "Shortcut between READY event and SAMPLE task\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum READY_SAMPLE_A {
#[doc = "0: Disable shortcut"]
DISABLED = 0,
#[doc = "1: Enable shortcut"]
ENABLED = 1,
}
impl From<READY_SAMPLE_A> for bool {
#[inline(always)]
fn from(variant: READY_SAMPLE_A) -> Self {
variant as u8 != 0
}
}
impl READY_SAMPLE_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> READY_SAMPLE_A {
match self.bits {
false => READY_SAMPLE_A::DISABLED,
true => READY_SAMPLE_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == READY_SAMPLE_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == READY_SAMPLE_A::ENABLED
}
}
#[doc = "Field `READY_SAMPLE` writer - Shortcut between READY event and SAMPLE task"]
pub type READY_SAMPLE_W<'a, const O: u8> =
crate::BitWriter<'a, u32, SHORTS_SPEC, READY_SAMPLE_A, O>;
impl<'a, const O: u8> READY_SAMPLE_W<'a, O> {
#[doc = "Disable shortcut"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(READY_SAMPLE_A::DISABLED)
}
#[doc = "Enable shortcut"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(READY_SAMPLE_A::ENABLED)
}
}
#[doc = "Field `READY_STOP` reader - Shortcut between READY event and STOP task"]
pub type READY_STOP_R = crate::BitReader<READY_STOP_A>;
#[doc = "Shortcut between READY event and STOP task\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum READY_STOP_A {
#[doc = "0: Disable shortcut"]
DISABLED = 0,
#[doc = "1: Enable shortcut"]
ENABLED = 1,
}
impl From<READY_STOP_A> for bool {
#[inline(always)]
fn from(variant: READY_STOP_A) -> Self {
variant as u8 != 0
}
}
impl READY_STOP_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> READY_STOP_A {
match self.bits {
false => READY_STOP_A::DISABLED,
true => READY_STOP_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == READY_STOP_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == READY_STOP_A::ENABLED
}
}
#[doc = "Field `READY_STOP` writer - Shortcut between READY event and STOP task"]
pub type READY_STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SHORTS_SPEC, READY_STOP_A, O>;
impl<'a, const O: u8> READY_STOP_W<'a, O> {
#[doc = "Disable shortcut"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(READY_STOP_A::DISABLED)
}
#[doc = "Enable shortcut"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(READY_STOP_A::ENABLED)
}
}
#[doc = "Field `DOWN_STOP` reader - Shortcut between DOWN event and STOP task"]
pub type DOWN_STOP_R = crate::BitReader<DOWN_STOP_A>;
#[doc = "Shortcut between DOWN event and STOP task\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DOWN_STOP_A {
#[doc = "0: Disable shortcut"]
DISABLED = 0,
#[doc = "1: Enable shortcut"]
ENABLED = 1,
}
impl From<DOWN_STOP_A> for bool {
#[inline(always)]
fn from(variant: DOWN_STOP_A) -> Self {
variant as u8 != 0
}
}
impl DOWN_STOP_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> DOWN_STOP_A {
match self.bits {
false => DOWN_STOP_A::DISABLED,
true => DOWN_STOP_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == DOWN_STOP_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == DOWN_STOP_A::ENABLED
}
}
#[doc = "Field `DOWN_STOP` writer - Shortcut between DOWN event and STOP task"]
pub type DOWN_STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SHORTS_SPEC, DOWN_STOP_A, O>;
impl<'a, const O: u8> DOWN_STOP_W<'a, O> {
#[doc = "Disable shortcut"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(DOWN_STOP_A::DISABLED)
}
#[doc = "Enable shortcut"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(DOWN_STOP_A::ENABLED)
}
}
#[doc = "Field `UP_STOP` reader - Shortcut between UP event and STOP task"]
pub type UP_STOP_R = crate::BitReader<UP_STOP_A>;
#[doc = "Shortcut between UP event and STOP task\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum UP_STOP_A {
#[doc = "0: Disable shortcut"]
DISABLED = 0,
#[doc = "1: Enable shortcut"]
ENABLED = 1,
}
impl From<UP_STOP_A> for bool {
#[inline(always)]
fn from(variant: UP_STOP_A) -> Self {
variant as u8 != 0
}
}
impl UP_STOP_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> UP_STOP_A {
match self.bits {
false => UP_STOP_A::DISABLED,
true => UP_STOP_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == UP_STOP_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == UP_STOP_A::ENABLED
}
}
#[doc = "Field `UP_STOP` writer - Shortcut between UP event and STOP task"]
pub type UP_STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SHORTS_SPEC, UP_STOP_A, O>;
impl<'a, const O: u8> UP_STOP_W<'a, O> {
#[doc = "Disable shortcut"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(UP_STOP_A::DISABLED)
}
#[doc = "Enable shortcut"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(UP_STOP_A::ENABLED)
}
}
#[doc = "Field `CROSS_STOP` reader - Shortcut between CROSS event and STOP task"]
pub type CROSS_STOP_R = crate::BitReader<CROSS_STOP_A>;
#[doc = "Shortcut between CROSS event and STOP task\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CROSS_STOP_A {
#[doc = "0: Disable shortcut"]
DISABLED = 0,
#[doc = "1: Enable shortcut"]
ENABLED = 1,
}
impl From<CROSS_STOP_A> for bool {
#[inline(always)]
fn from(variant: CROSS_STOP_A) -> Self {
variant as u8 != 0
}
}
impl CROSS_STOP_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> CROSS_STOP_A {
match self.bits {
false => CROSS_STOP_A::DISABLED,
true => CROSS_STOP_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == CROSS_STOP_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == CROSS_STOP_A::ENABLED
}
}
#[doc = "Field `CROSS_STOP` writer - Shortcut between CROSS event and STOP task"]
pub type CROSS_STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SHORTS_SPEC, CROSS_STOP_A, O>;
impl<'a, const O: u8> CROSS_STOP_W<'a, O> {
#[doc = "Disable shortcut"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(CROSS_STOP_A::DISABLED)
}
#[doc = "Enable shortcut"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(CROSS_STOP_A::ENABLED)
}
}
impl R {
#[doc = "Bit 0 - Shortcut between READY event and SAMPLE task"]
#[inline(always)]
pub fn ready_sample(&self) -> READY_SAMPLE_R {
READY_SAMPLE_R::new((self.bits & 1) != 0)
}
#[doc = "Bit 1 - Shortcut between READY event and STOP task"]
#[inline(always)]
pub fn ready_stop(&self) -> READY_STOP_R {
READY_STOP_R::new(((self.bits >> 1) & 1) != 0)
}
#[doc = "Bit 2 - Shortcut between DOWN event and STOP task"]
#[inline(always)]
pub fn down_stop(&self) -> DOWN_STOP_R {
DOWN_STOP_R::new(((self.bits >> 2) & 1) != 0)
}
#[doc = "Bit 3 - Shortcut between UP event and STOP task"]
#[inline(always)]
pub fn up_stop(&self) -> UP_STOP_R {
UP_STOP_R::new(((self.bits >> 3) & 1) != 0)
}
#[doc = "Bit 4 - Shortcut between CROSS event and STOP task"]
#[inline(always)]
pub fn cross_stop(&self) -> CROSS_STOP_R {
CROSS_STOP_R::new(((self.bits >> 4) & 1) != 0)
}
}
impl W {
#[doc = "Bit 0 - Shortcut between READY event and SAMPLE task"]
#[inline(always)]
pub fn ready_sample(&mut self) -> READY_SAMPLE_W<0> {
READY_SAMPLE_W::new(self)
}
#[doc = "Bit 1 - Shortcut between READY event and STOP task"]
#[inline(always)]
pub fn ready_stop(&mut self) -> READY_STOP_W<1> {
READY_STOP_W::new(self)
}
#[doc = "Bit 2 - Shortcut between DOWN event and STOP task"]
#[inline(always)]
pub fn down_stop(&mut self) -> DOWN_STOP_W<2> {
DOWN_STOP_W::new(self)
}
#[doc = "Bit 3 - Shortcut between UP event and STOP task"]
#[inline(always)]
pub fn up_stop(&mut self) -> UP_STOP_W<3> {
UP_STOP_W::new(self)
}
#[doc = "Bit 4 - Shortcut between CROSS event and STOP task"]
#[inline(always)]
pub fn cross_stop(&mut self) -> CROSS_STOP_W<4> {
CROSS_STOP_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Shortcut register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [shorts](index.html) module"]
pub struct SHORTS_SPEC;
impl crate::RegisterSpec for SHORTS_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [shorts::R](R) reader structure"]
impl crate::Readable for SHORTS_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [shorts::W](W) writer structure"]
impl crate::Writable for SHORTS_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets SHORTS to value 0"]
impl crate::Resettable for SHORTS_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/comp/tasks_sample.rs
Vendored
+52
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@@ -0,0 +1,52 @@
#[doc = "Register `TASKS_SAMPLE` writer"]
pub struct W(crate::W<TASKS_SAMPLE_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<TASKS_SAMPLE_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<TASKS_SAMPLE_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<TASKS_SAMPLE_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `TASKS_SAMPLE` writer - "]
pub type TASKS_SAMPLE_W<'a, const O: u8> = crate::BitWriter<'a, u32, TASKS_SAMPLE_SPEC, bool, O>;
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn tasks_sample(&mut self) -> TASKS_SAMPLE_W<0> {
TASKS_SAMPLE_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Sample comparator value\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_sample](index.html) module"]
pub struct TASKS_SAMPLE_SPEC;
impl crate::RegisterSpec for TASKS_SAMPLE_SPEC {
type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [tasks_sample::W](W) writer structure"]
impl crate::Writable for TASKS_SAMPLE_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets TASKS_SAMPLE to value 0"]
impl crate::Resettable for TASKS_SAMPLE_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/comp/tasks_start.rs
Vendored
+52
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@@ -0,0 +1,52 @@
#[doc = "Register `TASKS_START` writer"]
pub struct W(crate::W<TASKS_START_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<TASKS_START_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<TASKS_START_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<TASKS_START_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `TASKS_START` writer - "]
pub type TASKS_START_W<'a, const O: u8> = crate::BitWriter<'a, u32, TASKS_START_SPEC, bool, O>;
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn tasks_start(&mut self) -> TASKS_START_W<0> {
TASKS_START_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Start comparator\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_start](index.html) module"]
pub struct TASKS_START_SPEC;
impl crate::RegisterSpec for TASKS_START_SPEC {
type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [tasks_start::W](W) writer structure"]
impl crate::Writable for TASKS_START_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets TASKS_START to value 0"]
impl crate::Resettable for TASKS_START_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/comp/tasks_stop.rs
Vendored
+52
View File
@@ -0,0 +1,52 @@
#[doc = "Register `TASKS_STOP` writer"]
pub struct W(crate::W<TASKS_STOP_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<TASKS_STOP_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<TASKS_STOP_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<TASKS_STOP_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `TASKS_STOP` writer - "]
pub type TASKS_STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, TASKS_STOP_SPEC, bool, O>;
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn tasks_stop(&mut self) -> TASKS_STOP_W<0> {
TASKS_STOP_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Stop comparator\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_stop](index.html) module"]
pub struct TASKS_STOP_SPEC;
impl crate::RegisterSpec for TASKS_STOP_SPEC {
type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [tasks_stop::W](W) writer structure"]
impl crate::Writable for TASKS_STOP_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets TASKS_STOP to value 0"]
impl crate::Resettable for TASKS_STOP_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
vendor/nrf52840-pac/src/comp/th.rs
Vendored
+94
View File
@@ -0,0 +1,94 @@
#[doc = "Register `TH` reader"]
pub struct R(crate::R<TH_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<TH_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<TH_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<TH_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `TH` writer"]
pub struct W(crate::W<TH_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<TH_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<TH_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<TH_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `THDOWN` reader - VDOWN = (THDOWN+1)/64*VREF"]
pub type THDOWN_R = crate::FieldReader<u8, u8>;
#[doc = "Field `THDOWN` writer - VDOWN = (THDOWN+1)/64*VREF"]
pub type THDOWN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TH_SPEC, u8, u8, 6, O>;
#[doc = "Field `THUP` reader - VUP = (THUP+1)/64*VREF"]
pub type THUP_R = crate::FieldReader<u8, u8>;
#[doc = "Field `THUP` writer - VUP = (THUP+1)/64*VREF"]
pub type THUP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TH_SPEC, u8, u8, 6, O>;
impl R {
#[doc = "Bits 0:5 - VDOWN = (THDOWN+1)/64*VREF"]
#[inline(always)]
pub fn thdown(&self) -> THDOWN_R {
THDOWN_R::new((self.bits & 0x3f) as u8)
}
#[doc = "Bits 8:13 - VUP = (THUP+1)/64*VREF"]
#[inline(always)]
pub fn thup(&self) -> THUP_R {
THUP_R::new(((self.bits >> 8) & 0x3f) as u8)
}
}
impl W {
#[doc = "Bits 0:5 - VDOWN = (THDOWN+1)/64*VREF"]
#[inline(always)]
pub fn thdown(&mut self) -> THDOWN_W<0> {
THDOWN_W::new(self)
}
#[doc = "Bits 8:13 - VUP = (THUP+1)/64*VREF"]
#[inline(always)]
pub fn thup(&mut self) -> THUP_W<8> {
THUP_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Threshold configuration for hysteresis unit\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [th](index.html) module"]
pub struct TH_SPEC;
impl crate::RegisterSpec for TH_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [th::R](R) reader structure"]
impl crate::Readable for TH_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [th::W](W) writer structure"]
impl crate::Writable for TH_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets TH to value 0"]
impl crate::Resettable for TH_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
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