feat: add display UI with splash screen, dashboard, and RSSI sparkline

Implement full SSD1306 OLED display support:
- Splash screen on boot (1.5s) with project name, version, board
- Dashboard showing radio state, config, counters, RSSI/SNR
- RSSI history sparkline (64-sample ring buffer, 2px-wide bars)
- DisplayOn/DisplayOff host commands routed via dedicated channel
- Pure render functions against generic DrawTarget (no hardware coupling)
- Display on/off control bypasses radio task entirely

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>

vendor/nrf5340-app-pac/src/cache_s.rs

@@ -0,0 +1,70 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct RegisterBlock {
+    _reserved0: [u8; 0x0400],
+    #[doc = "0x400..0x410 - Unspecified"]
+    pub profiling0: PROFILING,
+    _reserved1: [u8; 0x10],
+    #[doc = "0x420..0x430 - Unspecified"]
+    pub profiling1: PROFILING,
+    _reserved2: [u8; 0xd0],
+    #[doc = "0x500 - Enable cache."]
+    pub enable: ENABLE,
+    #[doc = "0x504 - Invalidate the cache."]
+    pub invalidate: INVALIDATE,
+    #[doc = "0x508 - Erase the cache."]
+    pub erase: ERASE,
+    #[doc = "0x50c - Enable the profiling counters."]
+    pub profilingenable: PROFILINGENABLE,
+    #[doc = "0x510 - Clear the profiling counters."]
+    pub profilingclear: PROFILINGCLEAR,
+    #[doc = "0x514 - Cache mode. Switching from Cache to Ram mode causes the RAM to be cleared. Switching from RAM to Cache mode causes the cache to be invalidated."]
+    pub mode: MODE,
+    #[doc = "0x518 - Lock debug mode."]
+    pub debuglock: DEBUGLOCK,
+    #[doc = "0x51c - Cache erase status."]
+    pub erasestatus: ERASESTATUS,
+    #[doc = "0x520 - Lock cache updates. Prevents updating of cache content on cache misses, but will continue to lookup instruction/data fetches in content already present in the cache. Ignored in RAM mode."]
+    pub writelock: WRITELOCK,
+}
+#[doc = "Unspecified"]
+pub use profiling::PROFILING;
+#[doc = r"Cluster"]
+#[doc = "Unspecified"]
+pub mod profiling;
+#[doc = "ENABLE (rw) register accessor: an alias for `Reg<ENABLE_SPEC>`"]
+pub type ENABLE = crate::Reg<enable::ENABLE_SPEC>;
+#[doc = "Enable cache."]
+pub mod enable;
+#[doc = "INVALIDATE (w) register accessor: an alias for `Reg<INVALIDATE_SPEC>`"]
+pub type INVALIDATE = crate::Reg<invalidate::INVALIDATE_SPEC>;
+#[doc = "Invalidate the cache."]
+pub mod invalidate;
+#[doc = "ERASE (w) register accessor: an alias for `Reg<ERASE_SPEC>`"]
+pub type ERASE = crate::Reg<erase::ERASE_SPEC>;
+#[doc = "Erase the cache."]
+pub mod erase;
+#[doc = "PROFILINGENABLE (rw) register accessor: an alias for `Reg<PROFILINGENABLE_SPEC>`"]
+pub type PROFILINGENABLE = crate::Reg<profilingenable::PROFILINGENABLE_SPEC>;
+#[doc = "Enable the profiling counters."]
+pub mod profilingenable;
+#[doc = "PROFILINGCLEAR (w) register accessor: an alias for `Reg<PROFILINGCLEAR_SPEC>`"]
+pub type PROFILINGCLEAR = crate::Reg<profilingclear::PROFILINGCLEAR_SPEC>;
+#[doc = "Clear the profiling counters."]
+pub mod profilingclear;
+#[doc = "MODE (rw) register accessor: an alias for `Reg<MODE_SPEC>`"]
+pub type MODE = crate::Reg<mode::MODE_SPEC>;
+#[doc = "Cache mode. Switching from Cache to Ram mode causes the RAM to be cleared. Switching from RAM to Cache mode causes the cache to be invalidated."]
+pub mod mode;
+#[doc = "DEBUGLOCK (rw) register accessor: an alias for `Reg<DEBUGLOCK_SPEC>`"]
+pub type DEBUGLOCK = crate::Reg<debuglock::DEBUGLOCK_SPEC>;
+#[doc = "Lock debug mode."]
+pub mod debuglock;
+#[doc = "ERASESTATUS (rw) register accessor: an alias for `Reg<ERASESTATUS_SPEC>`"]
+pub type ERASESTATUS = crate::Reg<erasestatus::ERASESTATUS_SPEC>;
+#[doc = "Cache erase status."]
+pub mod erasestatus;
+#[doc = "WRITELOCK (rw) register accessor: an alias for `Reg<WRITELOCK_SPEC>`"]
+pub type WRITELOCK = crate::Reg<writelock::WRITELOCK_SPEC>;
+#[doc = "Lock cache updates. Prevents updating of cache content on cache misses, but will continue to lookup instruction/data fetches in content already present in the cache. Ignored in RAM mode."]
+pub mod writelock;

vendor/nrf5340-app-pac/src/cache_s/debuglock.rs

@@ -0,0 +1,126 @@
+#[doc = "Register `DEBUGLOCK` reader"]
+pub struct R(crate::R<DEBUGLOCK_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<DEBUGLOCK_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<DEBUGLOCK_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<DEBUGLOCK_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `DEBUGLOCK` writer"]
+pub struct W(crate::W<DEBUGLOCK_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<DEBUGLOCK_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<DEBUGLOCK_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<DEBUGLOCK_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `DEBUGLOCK` reader - Lock debug mode"]
+pub type DEBUGLOCK_R = crate::BitReader<DEBUGLOCK_A>;
+#[doc = "Lock debug mode\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum DEBUGLOCK_A {
+    #[doc = "0: Debug mode unlocked"]
+    UNLOCKED = 0,
+    #[doc = "1: Debug mode locked"]
+    LOCKED = 1,
+}
+impl From<DEBUGLOCK_A> for bool {
+    #[inline(always)]
+    fn from(variant: DEBUGLOCK_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl DEBUGLOCK_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DEBUGLOCK_A {
+        match self.bits {
+            false => DEBUGLOCK_A::UNLOCKED,
+            true => DEBUGLOCK_A::LOCKED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `UNLOCKED`"]
+    #[inline(always)]
+    pub fn is_unlocked(&self) -> bool {
+        *self == DEBUGLOCK_A::UNLOCKED
+    }
+    #[doc = "Checks if the value of the field is `LOCKED`"]
+    #[inline(always)]
+    pub fn is_locked(&self) -> bool {
+        *self == DEBUGLOCK_A::LOCKED
+    }
+}
+#[doc = "Field `DEBUGLOCK` writer - Lock debug mode"]
+pub type DEBUGLOCK_W<'a, const O: u8> = crate::BitWriter<'a, u32, DEBUGLOCK_SPEC, DEBUGLOCK_A, O>;
+impl<'a, const O: u8> DEBUGLOCK_W<'a, O> {
+    #[doc = "Debug mode unlocked"]
+    #[inline(always)]
+    pub fn unlocked(self) -> &'a mut W {
+        self.variant(DEBUGLOCK_A::UNLOCKED)
+    }
+    #[doc = "Debug mode locked"]
+    #[inline(always)]
+    pub fn locked(self) -> &'a mut W {
+        self.variant(DEBUGLOCK_A::LOCKED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Lock debug mode"]
+    #[inline(always)]
+    pub fn debuglock(&self) -> DEBUGLOCK_R {
+        DEBUGLOCK_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Lock debug mode"]
+    #[inline(always)]
+    pub fn debuglock(&mut self) -> DEBUGLOCK_W<0> {
+        DEBUGLOCK_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Lock debug mode.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [debuglock](index.html) module"]
+pub struct DEBUGLOCK_SPEC;
+impl crate::RegisterSpec for DEBUGLOCK_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [debuglock::R](R) reader structure"]
+impl crate::Readable for DEBUGLOCK_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [debuglock::W](W) writer structure"]
+impl crate::Writable for DEBUGLOCK_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets DEBUGLOCK to value 0"]
+impl crate::Resettable for DEBUGLOCK_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/cache_s/enable.rs

@@ -0,0 +1,126 @@
+#[doc = "Register `ENABLE` reader"]
+pub struct R(crate::R<ENABLE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ENABLE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ENABLE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ENABLE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ENABLE` writer"]
+pub struct W(crate::W<ENABLE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ENABLE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ENABLE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ENABLE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ENABLE` reader - Enable cache"]
+pub type ENABLE_R = crate::BitReader<ENABLE_A>;
+#[doc = "Enable cache\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ENABLE_A {
+    #[doc = "0: Disable cache"]
+    DISABLED = 0,
+    #[doc = "1: Enable cache"]
+    ENABLED = 1,
+}
+impl From<ENABLE_A> for bool {
+    #[inline(always)]
+    fn from(variant: ENABLE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ENABLE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ENABLE_A {
+        match self.bits {
+            false => ENABLE_A::DISABLED,
+            true => ENABLE_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == ENABLE_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == ENABLE_A::ENABLED
+    }
+}
+#[doc = "Field `ENABLE` writer - Enable cache"]
+pub type ENABLE_W<'a, const O: u8> = crate::BitWriter<'a, u32, ENABLE_SPEC, ENABLE_A, O>;
+impl<'a, const O: u8> ENABLE_W<'a, O> {
+    #[doc = "Disable cache"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(ENABLE_A::DISABLED)
+    }
+    #[doc = "Enable cache"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(ENABLE_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Enable cache"]
+    #[inline(always)]
+    pub fn enable(&self) -> ENABLE_R {
+        ENABLE_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Enable cache"]
+    #[inline(always)]
+    pub fn enable(&mut self) -> ENABLE_W<0> {
+        ENABLE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Enable cache.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [enable](index.html) module"]
+pub struct ENABLE_SPEC;
+impl crate::RegisterSpec for ENABLE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [enable::R](R) reader structure"]
+impl crate::Readable for ENABLE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [enable::W](W) writer structure"]
+impl crate::Writable for ENABLE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets ENABLE to value 0"]
+impl crate::Resettable for ENABLE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/cache_s/erase.rs

@@ -0,0 +1,71 @@
+#[doc = "Register `ERASE` writer"]
+pub struct W(crate::W<ERASE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ERASE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ERASE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ERASE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Erase the cache\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ERASE_AW {
+    #[doc = "1: Erase cache"]
+    ERASE = 1,
+}
+impl From<ERASE_AW> for bool {
+    #[inline(always)]
+    fn from(variant: ERASE_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `ERASE` writer - Erase the cache"]
+pub type ERASE_W<'a, const O: u8> = crate::BitWriter<'a, u32, ERASE_SPEC, ERASE_AW, O>;
+impl<'a, const O: u8> ERASE_W<'a, O> {
+    #[doc = "Erase cache"]
+    #[inline(always)]
+    pub fn erase(self) -> &'a mut W {
+        self.variant(ERASE_AW::ERASE)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Erase the cache"]
+    #[inline(always)]
+    pub fn erase(&mut self) -> ERASE_W<0> {
+        ERASE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Erase the cache.\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [erase](index.html) module"]
+pub struct ERASE_SPEC;
+impl crate::RegisterSpec for ERASE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [erase::W](W) writer structure"]
+impl crate::Writable for ERASE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets ERASE to value 0"]
+impl crate::Resettable for ERASE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/cache_s/erasestatus.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `ERASESTATUS` reader"]
+pub struct R(crate::R<ERASESTATUS_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ERASESTATUS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ERASESTATUS_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ERASESTATUS_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ERASESTATUS` writer"]
+pub struct W(crate::W<ERASESTATUS_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ERASESTATUS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ERASESTATUS_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ERASESTATUS_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ERASESTATUS` reader - Cache erase status"]
+pub type ERASESTATUS_R = crate::BitReader<ERASESTATUS_A>;
+#[doc = "Cache erase status\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ERASESTATUS_A {
+    #[doc = "0: Erase is not complete or hasn't started"]
+    IDLE = 0,
+    #[doc = "1: Cache erase is finished"]
+    FINISHED = 1,
+}
+impl From<ERASESTATUS_A> for bool {
+    #[inline(always)]
+    fn from(variant: ERASESTATUS_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ERASESTATUS_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ERASESTATUS_A {
+        match self.bits {
+            false => ERASESTATUS_A::IDLE,
+            true => ERASESTATUS_A::FINISHED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `IDLE`"]
+    #[inline(always)]
+    pub fn is_idle(&self) -> bool {
+        *self == ERASESTATUS_A::IDLE
+    }
+    #[doc = "Checks if the value of the field is `FINISHED`"]
+    #[inline(always)]
+    pub fn is_finished(&self) -> bool {
+        *self == ERASESTATUS_A::FINISHED
+    }
+}
+#[doc = "Field `ERASESTATUS` writer - Cache erase status"]
+pub type ERASESTATUS_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, ERASESTATUS_SPEC, ERASESTATUS_A, O>;
+impl<'a, const O: u8> ERASESTATUS_W<'a, O> {
+    #[doc = "Erase is not complete or hasn't started"]
+    #[inline(always)]
+    pub fn idle(self) -> &'a mut W {
+        self.variant(ERASESTATUS_A::IDLE)
+    }
+    #[doc = "Cache erase is finished"]
+    #[inline(always)]
+    pub fn finished(self) -> &'a mut W {
+        self.variant(ERASESTATUS_A::FINISHED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Cache erase status"]
+    #[inline(always)]
+    pub fn erasestatus(&self) -> ERASESTATUS_R {
+        ERASESTATUS_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Cache erase status"]
+    #[inline(always)]
+    pub fn erasestatus(&mut self) -> ERASESTATUS_W<0> {
+        ERASESTATUS_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Cache erase status.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [erasestatus](index.html) module"]
+pub struct ERASESTATUS_SPEC;
+impl crate::RegisterSpec for ERASESTATUS_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [erasestatus::R](R) reader structure"]
+impl crate::Readable for ERASESTATUS_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [erasestatus::W](W) writer structure"]
+impl crate::Writable for ERASESTATUS_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets ERASESTATUS to value 0"]
+impl crate::Resettable for ERASESTATUS_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/cache_s/invalidate.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `INVALIDATE` writer"]
+pub struct W(crate::W<INVALIDATE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INVALIDATE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INVALIDATE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INVALIDATE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Invalidate the cache\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum INVALIDATE_AW {
+    #[doc = "1: Invalidate the cache"]
+    INVALIDATE = 1,
+}
+impl From<INVALIDATE_AW> for bool {
+    #[inline(always)]
+    fn from(variant: INVALIDATE_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `INVALIDATE` writer - Invalidate the cache"]
+pub type INVALIDATE_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INVALIDATE_SPEC, INVALIDATE_AW, O>;
+impl<'a, const O: u8> INVALIDATE_W<'a, O> {
+    #[doc = "Invalidate the cache"]
+    #[inline(always)]
+    pub fn invalidate(self) -> &'a mut W {
+        self.variant(INVALIDATE_AW::INVALIDATE)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Invalidate the cache"]
+    #[inline(always)]
+    pub fn invalidate(&mut self) -> INVALIDATE_W<0> {
+        INVALIDATE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Invalidate the cache.\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [invalidate](index.html) module"]
+pub struct INVALIDATE_SPEC;
+impl crate::RegisterSpec for INVALIDATE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [invalidate::W](W) writer structure"]
+impl crate::Writable for INVALIDATE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INVALIDATE to value 0"]
+impl crate::Resettable for INVALIDATE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/cache_s/mode.rs

@@ -0,0 +1,126 @@
+#[doc = "Register `MODE` reader"]
+pub struct R(crate::R<MODE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<MODE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<MODE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<MODE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `MODE` writer"]
+pub struct W(crate::W<MODE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<MODE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<MODE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<MODE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `MODE` reader - Cache mode"]
+pub type MODE_R = crate::BitReader<MODE_A>;
+#[doc = "Cache mode\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum MODE_A {
+    #[doc = "0: Cache mode"]
+    CACHE = 0,
+    #[doc = "1: RAM mode"]
+    RAM = 1,
+}
+impl From<MODE_A> for bool {
+    #[inline(always)]
+    fn from(variant: MODE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl MODE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> MODE_A {
+        match self.bits {
+            false => MODE_A::CACHE,
+            true => MODE_A::RAM,
+        }
+    }
+    #[doc = "Checks if the value of the field is `CACHE`"]
+    #[inline(always)]
+    pub fn is_cache(&self) -> bool {
+        *self == MODE_A::CACHE
+    }
+    #[doc = "Checks if the value of the field is `RAM`"]
+    #[inline(always)]
+    pub fn is_ram(&self) -> bool {
+        *self == MODE_A::RAM
+    }
+}
+#[doc = "Field `MODE` writer - Cache mode"]
+pub type MODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, MODE_SPEC, MODE_A, O>;
+impl<'a, const O: u8> MODE_W<'a, O> {
+    #[doc = "Cache mode"]
+    #[inline(always)]
+    pub fn cache(self) -> &'a mut W {
+        self.variant(MODE_A::CACHE)
+    }
+    #[doc = "RAM mode"]
+    #[inline(always)]
+    pub fn ram(self) -> &'a mut W {
+        self.variant(MODE_A::RAM)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Cache mode"]
+    #[inline(always)]
+    pub fn mode(&self) -> MODE_R {
+        MODE_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Cache mode"]
+    #[inline(always)]
+    pub fn mode(&mut self) -> MODE_W<0> {
+        MODE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Cache mode. Switching from Cache to Ram mode causes the RAM to be cleared. Switching from RAM to Cache mode causes the cache to be invalidated.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mode](index.html) module"]
+pub struct MODE_SPEC;
+impl crate::RegisterSpec for MODE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [mode::R](R) reader structure"]
+impl crate::Readable for MODE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [mode::W](W) writer structure"]
+impl crate::Writable for MODE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets MODE to value 0"]
+impl crate::Resettable for MODE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/cache_s/profiling.rs

@@ -0,0 +1,28 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct PROFILING {
+    #[doc = "0x00 - Description cluster: Instruction fetch cache hit counter for cache region n, where n=0 means Flash and n=1 means XIP."]
+    pub ihit: IHIT,
+    #[doc = "0x04 - Description cluster: Instruction fetch cache miss counter for cache region n, where n=0 means Flash and n=1 means XIP."]
+    pub imiss: IMISS,
+    #[doc = "0x08 - Description cluster: Data fetch cache hit counter for cache region n, where n=0 means Flash and n=1 means XIP."]
+    pub dhit: DHIT,
+    #[doc = "0x0c - Description cluster: Data fetch cache miss counter for cache region n, where n=0 means Flash and n=1 means XIP."]
+    pub dmiss: DMISS,
+}
+#[doc = "IHIT (r) register accessor: an alias for `Reg<IHIT_SPEC>`"]
+pub type IHIT = crate::Reg<ihit::IHIT_SPEC>;
+#[doc = "Description cluster: Instruction fetch cache hit counter for cache region n, where n=0 means Flash and n=1 means XIP."]
+pub mod ihit;
+#[doc = "IMISS (r) register accessor: an alias for `Reg<IMISS_SPEC>`"]
+pub type IMISS = crate::Reg<imiss::IMISS_SPEC>;
+#[doc = "Description cluster: Instruction fetch cache miss counter for cache region n, where n=0 means Flash and n=1 means XIP."]
+pub mod imiss;
+#[doc = "DHIT (r) register accessor: an alias for `Reg<DHIT_SPEC>`"]
+pub type DHIT = crate::Reg<dhit::DHIT_SPEC>;
+#[doc = "Description cluster: Data fetch cache hit counter for cache region n, where n=0 means Flash and n=1 means XIP."]
+pub mod dhit;
+#[doc = "DMISS (r) register accessor: an alias for `Reg<DMISS_SPEC>`"]
+pub type DMISS = crate::Reg<dmiss::DMISS_SPEC>;
+#[doc = "Description cluster: Data fetch cache miss counter for cache region n, where n=0 means Flash and n=1 means XIP."]
+pub mod dmiss;

vendor/nrf5340-app-pac/src/cache_s/profiling/dhit.rs

@@ -0,0 +1,40 @@
+#[doc = "Register `DHIT` reader"]
+pub struct R(crate::R<DHIT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<DHIT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<DHIT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<DHIT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `HITS` reader - Number of data cache hits"]
+pub type HITS_R = crate::FieldReader<u32, u32>;
+impl R {
+    #[doc = "Bits 0:31 - Number of data cache hits"]
+    #[inline(always)]
+    pub fn hits(&self) -> HITS_R {
+        HITS_R::new(self.bits)
+    }
+}
+#[doc = "Description cluster: Data fetch cache hit counter for cache region n, where n=0 means Flash and n=1 means XIP.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dhit](index.html) module"]
+pub struct DHIT_SPEC;
+impl crate::RegisterSpec for DHIT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [dhit::R](R) reader structure"]
+impl crate::Readable for DHIT_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets DHIT to value 0"]
+impl crate::Resettable for DHIT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/cache_s/profiling/dmiss.rs

@@ -0,0 +1,40 @@
+#[doc = "Register `DMISS` reader"]
+pub struct R(crate::R<DMISS_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<DMISS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<DMISS_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<DMISS_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `MISSES` reader - Number of data cache misses"]
+pub type MISSES_R = crate::FieldReader<u32, u32>;
+impl R {
+    #[doc = "Bits 0:31 - Number of data cache misses"]
+    #[inline(always)]
+    pub fn misses(&self) -> MISSES_R {
+        MISSES_R::new(self.bits)
+    }
+}
+#[doc = "Description cluster: Data fetch cache miss counter for cache region n, where n=0 means Flash and n=1 means XIP.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmiss](index.html) module"]
+pub struct DMISS_SPEC;
+impl crate::RegisterSpec for DMISS_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [dmiss::R](R) reader structure"]
+impl crate::Readable for DMISS_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets DMISS to value 0"]
+impl crate::Resettable for DMISS_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/cache_s/profiling/ihit.rs

@@ -0,0 +1,40 @@
+#[doc = "Register `IHIT` reader"]
+pub struct R(crate::R<IHIT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<IHIT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<IHIT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<IHIT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `HITS` reader - Number of instruction cache hits"]
+pub type HITS_R = crate::FieldReader<u32, u32>;
+impl R {
+    #[doc = "Bits 0:31 - Number of instruction cache hits"]
+    #[inline(always)]
+    pub fn hits(&self) -> HITS_R {
+        HITS_R::new(self.bits)
+    }
+}
+#[doc = "Description cluster: Instruction fetch cache hit counter for cache region n, where n=0 means Flash and n=1 means XIP.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ihit](index.html) module"]
+pub struct IHIT_SPEC;
+impl crate::RegisterSpec for IHIT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ihit::R](R) reader structure"]
+impl crate::Readable for IHIT_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets IHIT to value 0"]
+impl crate::Resettable for IHIT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/cache_s/profiling/imiss.rs

@@ -0,0 +1,40 @@
+#[doc = "Register `IMISS` reader"]
+pub struct R(crate::R<IMISS_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<IMISS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<IMISS_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<IMISS_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `MISSES` reader - Number of instruction cache misses"]
+pub type MISSES_R = crate::FieldReader<u32, u32>;
+impl R {
+    #[doc = "Bits 0:31 - Number of instruction cache misses"]
+    #[inline(always)]
+    pub fn misses(&self) -> MISSES_R {
+        MISSES_R::new(self.bits)
+    }
+}
+#[doc = "Description cluster: Instruction fetch cache miss counter for cache region n, where n=0 means Flash and n=1 means XIP.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [imiss](index.html) module"]
+pub struct IMISS_SPEC;
+impl crate::RegisterSpec for IMISS_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [imiss::R](R) reader structure"]
+impl crate::Readable for IMISS_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets IMISS to value 0"]
+impl crate::Resettable for IMISS_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/cache_s/profilingclear.rs

@@ -0,0 +1,71 @@
+#[doc = "Register `PROFILINGCLEAR` writer"]
+pub struct W(crate::W<PROFILINGCLEAR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PROFILINGCLEAR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PROFILINGCLEAR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PROFILINGCLEAR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Clearing the profiling counters\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CLEAR_AW {
+    #[doc = "1: Clear the profiling counters"]
+    CLEAR = 1,
+}
+impl From<CLEAR_AW> for bool {
+    #[inline(always)]
+    fn from(variant: CLEAR_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `CLEAR` writer - Clearing the profiling counters"]
+pub type CLEAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, PROFILINGCLEAR_SPEC, CLEAR_AW, O>;
+impl<'a, const O: u8> CLEAR_W<'a, O> {
+    #[doc = "Clear the profiling counters"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(CLEAR_AW::CLEAR)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Clearing the profiling counters"]
+    #[inline(always)]
+    pub fn clear(&mut self) -> CLEAR_W<0> {
+        CLEAR_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Clear the profiling counters.\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [profilingclear](index.html) module"]
+pub struct PROFILINGCLEAR_SPEC;
+impl crate::RegisterSpec for PROFILINGCLEAR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [profilingclear::W](W) writer structure"]
+impl crate::Writable for PROFILINGCLEAR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PROFILINGCLEAR to value 0"]
+impl crate::Resettable for PROFILINGCLEAR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/cache_s/profilingenable.rs

@@ -0,0 +1,126 @@
+#[doc = "Register `PROFILINGENABLE` reader"]
+pub struct R(crate::R<PROFILINGENABLE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PROFILINGENABLE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PROFILINGENABLE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PROFILINGENABLE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PROFILINGENABLE` writer"]
+pub struct W(crate::W<PROFILINGENABLE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PROFILINGENABLE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PROFILINGENABLE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PROFILINGENABLE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ENABLE` reader - Enable the profiling counters"]
+pub type ENABLE_R = crate::BitReader<ENABLE_A>;
+#[doc = "Enable the profiling counters\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ENABLE_A {
+    #[doc = "0: Disable profiling"]
+    DISABLE = 0,
+    #[doc = "1: Enable profiling"]
+    ENABLE = 1,
+}
+impl From<ENABLE_A> for bool {
+    #[inline(always)]
+    fn from(variant: ENABLE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ENABLE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ENABLE_A {
+        match self.bits {
+            false => ENABLE_A::DISABLE,
+            true => ENABLE_A::ENABLE,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLE`"]
+    #[inline(always)]
+    pub fn is_disable(&self) -> bool {
+        *self == ENABLE_A::DISABLE
+    }
+    #[doc = "Checks if the value of the field is `ENABLE`"]
+    #[inline(always)]
+    pub fn is_enable(&self) -> bool {
+        *self == ENABLE_A::ENABLE
+    }
+}
+#[doc = "Field `ENABLE` writer - Enable the profiling counters"]
+pub type ENABLE_W<'a, const O: u8> = crate::BitWriter<'a, u32, PROFILINGENABLE_SPEC, ENABLE_A, O>;
+impl<'a, const O: u8> ENABLE_W<'a, O> {
+    #[doc = "Disable profiling"]
+    #[inline(always)]
+    pub fn disable(self) -> &'a mut W {
+        self.variant(ENABLE_A::DISABLE)
+    }
+    #[doc = "Enable profiling"]
+    #[inline(always)]
+    pub fn enable(self) -> &'a mut W {
+        self.variant(ENABLE_A::ENABLE)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Enable the profiling counters"]
+    #[inline(always)]
+    pub fn enable(&self) -> ENABLE_R {
+        ENABLE_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Enable the profiling counters"]
+    #[inline(always)]
+    pub fn enable(&mut self) -> ENABLE_W<0> {
+        ENABLE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Enable the profiling counters.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [profilingenable](index.html) module"]
+pub struct PROFILINGENABLE_SPEC;
+impl crate::RegisterSpec for PROFILINGENABLE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [profilingenable::R](R) reader structure"]
+impl crate::Readable for PROFILINGENABLE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [profilingenable::W](W) writer structure"]
+impl crate::Writable for PROFILINGENABLE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PROFILINGENABLE to value 0"]
+impl crate::Resettable for PROFILINGENABLE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/cache_s/writelock.rs

@@ -0,0 +1,126 @@
+#[doc = "Register `WRITELOCK` reader"]
+pub struct R(crate::R<WRITELOCK_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<WRITELOCK_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<WRITELOCK_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<WRITELOCK_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `WRITELOCK` writer"]
+pub struct W(crate::W<WRITELOCK_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<WRITELOCK_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<WRITELOCK_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<WRITELOCK_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `WRITELOCK` reader - Lock cache updates"]
+pub type WRITELOCK_R = crate::BitReader<WRITELOCK_A>;
+#[doc = "Lock cache updates\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum WRITELOCK_A {
+    #[doc = "0: Cache updates unlocked"]
+    UNLOCKED = 0,
+    #[doc = "1: Cache updates locked"]
+    LOCKED = 1,
+}
+impl From<WRITELOCK_A> for bool {
+    #[inline(always)]
+    fn from(variant: WRITELOCK_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl WRITELOCK_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> WRITELOCK_A {
+        match self.bits {
+            false => WRITELOCK_A::UNLOCKED,
+            true => WRITELOCK_A::LOCKED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `UNLOCKED`"]
+    #[inline(always)]
+    pub fn is_unlocked(&self) -> bool {
+        *self == WRITELOCK_A::UNLOCKED
+    }
+    #[doc = "Checks if the value of the field is `LOCKED`"]
+    #[inline(always)]
+    pub fn is_locked(&self) -> bool {
+        *self == WRITELOCK_A::LOCKED
+    }
+}
+#[doc = "Field `WRITELOCK` writer - Lock cache updates"]
+pub type WRITELOCK_W<'a, const O: u8> = crate::BitWriter<'a, u32, WRITELOCK_SPEC, WRITELOCK_A, O>;
+impl<'a, const O: u8> WRITELOCK_W<'a, O> {
+    #[doc = "Cache updates unlocked"]
+    #[inline(always)]
+    pub fn unlocked(self) -> &'a mut W {
+        self.variant(WRITELOCK_A::UNLOCKED)
+    }
+    #[doc = "Cache updates locked"]
+    #[inline(always)]
+    pub fn locked(self) -> &'a mut W {
+        self.variant(WRITELOCK_A::LOCKED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Lock cache updates"]
+    #[inline(always)]
+    pub fn writelock(&self) -> WRITELOCK_R {
+        WRITELOCK_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Lock cache updates"]
+    #[inline(always)]
+    pub fn writelock(&mut self) -> WRITELOCK_W<0> {
+        WRITELOCK_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Lock cache updates. Prevents updating of cache content on cache misses, but will continue to lookup instruction/data fetches in content already present in the cache. Ignored in RAM mode.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [writelock](index.html) module"]
+pub struct WRITELOCK_SPEC;
+impl crate::RegisterSpec for WRITELOCK_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [writelock::R](R) reader structure"]
+impl crate::Readable for WRITELOCK_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [writelock::W](W) writer structure"]
+impl crate::Writable for WRITELOCK_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets WRITELOCK to value 0"]
+impl crate::Resettable for WRITELOCK_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/cachedata_s.rs

@@ -0,0 +1,11 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct RegisterBlock {
+    #[doc = "0x00..0x2000 - Unspecified"]
+    pub set: [SET; 256],
+}
+#[doc = "Unspecified"]
+pub use set::SET;
+#[doc = r"Cluster"]
+#[doc = "Unspecified"]
+pub mod set;

vendor/nrf5340-app-pac/src/cachedata_s/set.rs

@@ -0,0 +1,11 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct SET {
+    #[doc = "0x00..0x20 - Unspecified"]
+    pub way: [WAY; 2],
+}
+#[doc = "Unspecified"]
+pub use way::WAY;
+#[doc = r"Cluster"]
+#[doc = "Unspecified"]
+pub mod way;

vendor/nrf5340-app-pac/src/cachedata_s/set/way.rs

@@ -0,0 +1,36 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct WAY {
+    #[doc = "0x00 - Description cluster: Cache data bits \\[31:0\\]
+of SET\\[n\\], WAY\\[o\\]."]
+    pub data0: DATA0,
+    #[doc = "0x04 - Description cluster: Cache data bits \\[63:32\\]
+of SET\\[n\\], WAY\\[o\\]."]
+    pub data1: DATA1,
+    #[doc = "0x08 - Description cluster: Cache data bits \\[95:64\\]
+of SET\\[n\\], WAY\\[o\\]."]
+    pub data2: DATA2,
+    #[doc = "0x0c - Description cluster: Cache data bits \\[127:96\\]
+of SET\\[n\\], WAY\\[o\\]."]
+    pub data3: DATA3,
+}
+#[doc = "DATA0 (rw) register accessor: an alias for `Reg<DATA0_SPEC>`"]
+pub type DATA0 = crate::Reg<data0::DATA0_SPEC>;
+#[doc = "Description cluster: Cache data bits \\[31:0\\]
+of SET\\[n\\], WAY\\[o\\]."]
+pub mod data0;
+#[doc = "DATA1 (rw) register accessor: an alias for `Reg<DATA1_SPEC>`"]
+pub type DATA1 = crate::Reg<data1::DATA1_SPEC>;
+#[doc = "Description cluster: Cache data bits \\[63:32\\]
+of SET\\[n\\], WAY\\[o\\]."]
+pub mod data1;
+#[doc = "DATA2 (rw) register accessor: an alias for `Reg<DATA2_SPEC>`"]
+pub type DATA2 = crate::Reg<data2::DATA2_SPEC>;
+#[doc = "Description cluster: Cache data bits \\[95:64\\]
+of SET\\[n\\], WAY\\[o\\]."]
+pub mod data2;
+#[doc = "DATA3 (rw) register accessor: an alias for `Reg<DATA3_SPEC>`"]
+pub type DATA3 = crate::Reg<data3::DATA3_SPEC>;
+#[doc = "Description cluster: Cache data bits \\[127:96\\]
+of SET\\[n\\], WAY\\[o\\]."]
+pub mod data3;

vendor/nrf5340-app-pac/src/cachedata_s/set/way/data0.rs

@@ -0,0 +1,81 @@
+#[doc = "Register `DATA0` reader"]
+pub struct R(crate::R<DATA0_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<DATA0_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<DATA0_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<DATA0_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `DATA0` writer"]
+pub struct W(crate::W<DATA0_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<DATA0_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<DATA0_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<DATA0_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `Data` reader - Data"]
+pub type DATA_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `Data` writer - Data"]
+pub type DATA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DATA0_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - Data"]
+    #[inline(always)]
+    pub fn data(&self) -> DATA_R {
+        DATA_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Data"]
+    #[inline(always)]
+    pub fn data(&mut self) -> DATA_W<0> {
+        DATA_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description cluster: Cache data bits \\[31:0\\]
+of SET\\[n\\], WAY\\[o\\].\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data0](index.html) module"]
+pub struct DATA0_SPEC;
+impl crate::RegisterSpec for DATA0_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [data0::R](R) reader structure"]
+impl crate::Readable for DATA0_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [data0::W](W) writer structure"]
+impl crate::Writable for DATA0_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets DATA0 to value 0"]
+impl crate::Resettable for DATA0_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/cachedata_s/set/way/data1.rs

@@ -0,0 +1,81 @@
+#[doc = "Register `DATA1` reader"]
+pub struct R(crate::R<DATA1_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<DATA1_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<DATA1_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<DATA1_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `DATA1` writer"]
+pub struct W(crate::W<DATA1_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<DATA1_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<DATA1_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<DATA1_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `Data` reader - Data"]
+pub type DATA_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `Data` writer - Data"]
+pub type DATA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DATA1_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - Data"]
+    #[inline(always)]
+    pub fn data(&self) -> DATA_R {
+        DATA_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Data"]
+    #[inline(always)]
+    pub fn data(&mut self) -> DATA_W<0> {
+        DATA_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description cluster: Cache data bits \\[63:32\\]
+of SET\\[n\\], WAY\\[o\\].\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data1](index.html) module"]
+pub struct DATA1_SPEC;
+impl crate::RegisterSpec for DATA1_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [data1::R](R) reader structure"]
+impl crate::Readable for DATA1_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [data1::W](W) writer structure"]
+impl crate::Writable for DATA1_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets DATA1 to value 0"]
+impl crate::Resettable for DATA1_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/cachedata_s/set/way/data2.rs

@@ -0,0 +1,81 @@
+#[doc = "Register `DATA2` reader"]
+pub struct R(crate::R<DATA2_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<DATA2_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<DATA2_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<DATA2_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `DATA2` writer"]
+pub struct W(crate::W<DATA2_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<DATA2_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<DATA2_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<DATA2_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `Data` reader - Data"]
+pub type DATA_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `Data` writer - Data"]
+pub type DATA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DATA2_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - Data"]
+    #[inline(always)]
+    pub fn data(&self) -> DATA_R {
+        DATA_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Data"]
+    #[inline(always)]
+    pub fn data(&mut self) -> DATA_W<0> {
+        DATA_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description cluster: Cache data bits \\[95:64\\]
+of SET\\[n\\], WAY\\[o\\].\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data2](index.html) module"]
+pub struct DATA2_SPEC;
+impl crate::RegisterSpec for DATA2_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [data2::R](R) reader structure"]
+impl crate::Readable for DATA2_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [data2::W](W) writer structure"]
+impl crate::Writable for DATA2_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets DATA2 to value 0"]
+impl crate::Resettable for DATA2_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/cachedata_s/set/way/data3.rs

@@ -0,0 +1,81 @@
+#[doc = "Register `DATA3` reader"]
+pub struct R(crate::R<DATA3_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<DATA3_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<DATA3_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<DATA3_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `DATA3` writer"]
+pub struct W(crate::W<DATA3_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<DATA3_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<DATA3_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<DATA3_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `Data` reader - Data"]
+pub type DATA_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `Data` writer - Data"]
+pub type DATA_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DATA3_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - Data"]
+    #[inline(always)]
+    pub fn data(&self) -> DATA_R {
+        DATA_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Data"]
+    #[inline(always)]
+    pub fn data(&mut self) -> DATA_W<0> {
+        DATA_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description cluster: Cache data bits \\[127:96\\]
+of SET\\[n\\], WAY\\[o\\].\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data3](index.html) module"]
+pub struct DATA3_SPEC;
+impl crate::RegisterSpec for DATA3_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [data3::R](R) reader structure"]
+impl crate::Readable for DATA3_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [data3::W](W) writer structure"]
+impl crate::Writable for DATA3_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets DATA3 to value 0"]
+impl crate::Resettable for DATA3_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/cacheinfo_s.rs

@@ -0,0 +1,11 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct RegisterBlock {
+    #[doc = "0x00..0x800 - Unspecified"]
+    pub set: [SET; 256],
+}
+#[doc = "Unspecified"]
+pub use set::SET;
+#[doc = r"Cluster"]
+#[doc = "Unspecified"]
+pub mod set;

vendor/nrf5340-app-pac/src/cacheinfo_s/set.rs

@@ -0,0 +1,10 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct SET {
+    #[doc = "0x00..0x08 - Description collection: Cache information for SET\\[n\\], WAY\\[o\\]."]
+    pub way: [WAY; 2],
+}
+#[doc = "WAY (rw) register accessor: an alias for `Reg<WAY_SPEC>`"]
+pub type WAY = crate::Reg<way::WAY_SPEC>;
+#[doc = "Description collection: Cache information for SET\\[n\\], WAY\\[o\\]."]
+pub mod way;

vendor/nrf5340-app-pac/src/cacheinfo_s/set/way.rs

@@ -0,0 +1,163 @@
+#[doc = "Register `WAY[%s]` reader"]
+pub struct R(crate::R<WAY_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<WAY_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<WAY_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<WAY_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `WAY[%s]` writer"]
+pub struct W(crate::W<WAY_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<WAY_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<WAY_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<WAY_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `TAG` reader - Cache tag."]
+pub type TAG_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `TAG` writer - Cache tag."]
+pub type TAG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, WAY_SPEC, u32, u32, 17, O>;
+#[doc = "Field `V` reader - Valid bit"]
+pub type V_R = crate::BitReader<V_A>;
+#[doc = "Valid bit\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum V_A {
+    #[doc = "0: Invalid cache line"]
+    INVALID = 0,
+    #[doc = "1: Valid cache line"]
+    VALID = 1,
+}
+impl From<V_A> for bool {
+    #[inline(always)]
+    fn from(variant: V_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl V_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> V_A {
+        match self.bits {
+            false => V_A::INVALID,
+            true => V_A::VALID,
+        }
+    }
+    #[doc = "Checks if the value of the field is `INVALID`"]
+    #[inline(always)]
+    pub fn is_invalid(&self) -> bool {
+        *self == V_A::INVALID
+    }
+    #[doc = "Checks if the value of the field is `VALID`"]
+    #[inline(always)]
+    pub fn is_valid(&self) -> bool {
+        *self == V_A::VALID
+    }
+}
+#[doc = "Field `MRU` reader - Most recently used way."]
+pub type MRU_R = crate::BitReader<MRU_A>;
+#[doc = "Most recently used way.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum MRU_A {
+    #[doc = "0: Way0 was most recently used"]
+    WAY0 = 0,
+    #[doc = "1: Way1 was most recently used"]
+    WAY1 = 1,
+}
+impl From<MRU_A> for bool {
+    #[inline(always)]
+    fn from(variant: MRU_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl MRU_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> MRU_A {
+        match self.bits {
+            false => MRU_A::WAY0,
+            true => MRU_A::WAY1,
+        }
+    }
+    #[doc = "Checks if the value of the field is `WAY0`"]
+    #[inline(always)]
+    pub fn is_way0(&self) -> bool {
+        *self == MRU_A::WAY0
+    }
+    #[doc = "Checks if the value of the field is `WAY1`"]
+    #[inline(always)]
+    pub fn is_way1(&self) -> bool {
+        *self == MRU_A::WAY1
+    }
+}
+impl R {
+    #[doc = "Bits 0:16 - Cache tag."]
+    #[inline(always)]
+    pub fn tag(&self) -> TAG_R {
+        TAG_R::new((self.bits & 0x0001_ffff) as u32)
+    }
+    #[doc = "Bit 30 - Valid bit"]
+    #[inline(always)]
+    pub fn v(&self) -> V_R {
+        V_R::new(((self.bits >> 30) & 1) != 0)
+    }
+    #[doc = "Bit 31 - Most recently used way."]
+    #[inline(always)]
+    pub fn mru(&self) -> MRU_R {
+        MRU_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:16 - Cache tag."]
+    #[inline(always)]
+    pub fn tag(&mut self) -> TAG_W<0> {
+        TAG_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description collection: Cache information for SET\\[n\\], WAY\\[o\\].\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [way](index.html) module"]
+pub struct WAY_SPEC;
+impl crate::RegisterSpec for WAY_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [way::R](R) reader structure"]
+impl crate::Readable for WAY_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [way::W](W) writer structure"]
+impl crate::Writable for WAY_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets WAY[%s]
+to value 0"]
+impl crate::Resettable for WAY_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns.rs

@@ -0,0 +1,335 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct RegisterBlock {
+    #[doc = "0x00 - Start HFCLK128M/HFCLK64M source as selected in HFCLKSRC"]
+    pub tasks_hfclkstart: TASKS_HFCLKSTART,
+    #[doc = "0x04 - Stop HFCLK128M/HFCLK64M source"]
+    pub tasks_hfclkstop: TASKS_HFCLKSTOP,
+    #[doc = "0x08 - Start LFCLK source as selected in LFCLKSRC"]
+    pub tasks_lfclkstart: TASKS_LFCLKSTART,
+    #[doc = "0x0c - Stop LFCLK source"]
+    pub tasks_lfclkstop: TASKS_LFCLKSTOP,
+    #[doc = "0x10 - Start calibration of LFRC oscillator"]
+    pub tasks_cal: TASKS_CAL,
+    _reserved5: [u8; 0x04],
+    #[doc = "0x18 - Start HFCLKAUDIO source"]
+    pub tasks_hfclkaudiostart: TASKS_HFCLKAUDIOSTART,
+    #[doc = "0x1c - Stop HFCLKAUDIO source"]
+    pub tasks_hfclkaudiostop: TASKS_HFCLKAUDIOSTOP,
+    #[doc = "0x20 - Start HFCLK192M source as selected in HFCLK192MSRC"]
+    pub tasks_hfclk192mstart: TASKS_HFCLK192MSTART,
+    #[doc = "0x24 - Stop HFCLK192M source"]
+    pub tasks_hfclk192mstop: TASKS_HFCLK192MSTOP,
+    _reserved9: [u8; 0x58],
+    #[doc = "0x80 - Subscribe configuration for task HFCLKSTART"]
+    pub subscribe_hfclkstart: SUBSCRIBE_HFCLKSTART,
+    #[doc = "0x84 - Subscribe configuration for task HFCLKSTOP"]
+    pub subscribe_hfclkstop: SUBSCRIBE_HFCLKSTOP,
+    #[doc = "0x88 - Subscribe configuration for task LFCLKSTART"]
+    pub subscribe_lfclkstart: SUBSCRIBE_LFCLKSTART,
+    #[doc = "0x8c - Subscribe configuration for task LFCLKSTOP"]
+    pub subscribe_lfclkstop: SUBSCRIBE_LFCLKSTOP,
+    #[doc = "0x90 - Subscribe configuration for task CAL"]
+    pub subscribe_cal: SUBSCRIBE_CAL,
+    _reserved14: [u8; 0x04],
+    #[doc = "0x98 - Subscribe configuration for task HFCLKAUDIOSTART"]
+    pub subscribe_hfclkaudiostart: SUBSCRIBE_HFCLKAUDIOSTART,
+    #[doc = "0x9c - Subscribe configuration for task HFCLKAUDIOSTOP"]
+    pub subscribe_hfclkaudiostop: SUBSCRIBE_HFCLKAUDIOSTOP,
+    #[doc = "0xa0 - Subscribe configuration for task HFCLK192MSTART"]
+    pub subscribe_hfclk192mstart: SUBSCRIBE_HFCLK192MSTART,
+    #[doc = "0xa4 - Subscribe configuration for task HFCLK192MSTOP"]
+    pub subscribe_hfclk192mstop: SUBSCRIBE_HFCLK192MSTOP,
+    _reserved18: [u8; 0x58],
+    #[doc = "0x100 - HFCLK128M/HFCLK64M source started"]
+    pub events_hfclkstarted: EVENTS_HFCLKSTARTED,
+    #[doc = "0x104 - LFCLK source started"]
+    pub events_lfclkstarted: EVENTS_LFCLKSTARTED,
+    _reserved20: [u8; 0x14],
+    #[doc = "0x11c - Calibration of LFRC oscillator complete event"]
+    pub events_done: EVENTS_DONE,
+    #[doc = "0x120 - HFCLKAUDIO source started"]
+    pub events_hfclkaudiostarted: EVENTS_HFCLKAUDIOSTARTED,
+    #[doc = "0x124 - HFCLK192M source started"]
+    pub events_hfclk192mstarted: EVENTS_HFCLK192MSTARTED,
+    _reserved23: [u8; 0x58],
+    #[doc = "0x180 - Publish configuration for event HFCLKSTARTED"]
+    pub publish_hfclkstarted: PUBLISH_HFCLKSTARTED,
+    #[doc = "0x184 - Publish configuration for event LFCLKSTARTED"]
+    pub publish_lfclkstarted: PUBLISH_LFCLKSTARTED,
+    _reserved25: [u8; 0x14],
+    #[doc = "0x19c - Publish configuration for event DONE"]
+    pub publish_done: PUBLISH_DONE,
+    #[doc = "0x1a0 - Publish configuration for event HFCLKAUDIOSTARTED"]
+    pub publish_hfclkaudiostarted: PUBLISH_HFCLKAUDIOSTARTED,
+    #[doc = "0x1a4 - Publish configuration for event HFCLK192MSTARTED"]
+    pub publish_hfclk192mstarted: PUBLISH_HFCLK192MSTARTED,
+    _reserved28: [u8; 0x0158],
+    #[doc = "0x300 - Enable or disable interrupt"]
+    pub inten: INTEN,
+    #[doc = "0x304 - Enable interrupt"]
+    pub intenset: INTENSET,
+    #[doc = "0x308 - Disable interrupt"]
+    pub intenclr: INTENCLR,
+    #[doc = "0x30c - Pending interrupts"]
+    pub intpend: INTPEND,
+    _reserved32: [u8; 0xf8],
+    #[doc = "0x408 - Status indicating that HFCLKSTART task has been triggered"]
+    pub hfclkrun: HFCLKRUN,
+    #[doc = "0x40c - Status indicating which HFCLK128M/HFCLK64M source is running This register value in any CLOCK instance reflects status only due to configurations/actions in that CLOCK instance."]
+    pub hfclkstat: HFCLKSTAT,
+    _reserved34: [u8; 0x04],
+    #[doc = "0x414 - Status indicating that LFCLKSTART task has been triggered"]
+    pub lfclkrun: LFCLKRUN,
+    #[doc = "0x418 - Status indicating which LFCLK source is running This register value in any CLOCK instance reflects status only due to configurations/actions in that CLOCK instance."]
+    pub lfclkstat: LFCLKSTAT,
+    #[doc = "0x41c - Copy of LFCLKSRC register, set when LFCLKSTART task was triggered"]
+    pub lfclksrccopy: LFCLKSRCCOPY,
+    _reserved37: [u8; 0x30],
+    #[doc = "0x450 - Status indicating that HFCLKAUDIOSTART task has been triggered"]
+    pub hfclkaudiorun: HFCLKAUDIORUN,
+    #[doc = "0x454 - Status indicating which HFCLKAUDIO source is running"]
+    pub hfclkaudiostat: HFCLKAUDIOSTAT,
+    #[doc = "0x458 - Status indicating that HFCLK192MSTART task has been triggered"]
+    pub hfclk192mrun: HFCLK192MRUN,
+    #[doc = "0x45c - Status indicating which HFCLK192M source is running"]
+    pub hfclk192mstat: HFCLK192MSTAT,
+    _reserved41: [u8; 0xb4],
+    #[doc = "0x514 - Clock source for HFCLK128M/HFCLK64M"]
+    pub hfclksrc: HFCLKSRC,
+    #[doc = "0x518 - Clock source for LFCLK"]
+    pub lfclksrc: LFCLKSRC,
+    _reserved43: [u8; 0x3c],
+    #[doc = "0x558 - HFCLK128M frequency configuration"]
+    pub hfclkctrl: HFCLKCTRL,
+    #[doc = "0x55c - Unspecified"]
+    pub hfclkaudio: HFCLKAUDIO,
+    _reserved45: [u8; 0x10],
+    #[doc = "0x570 - Automatic or manual control of HFCLK128M/HFCLK64M"]
+    pub hfclkalwaysrun: HFCLKALWAYSRUN,
+    #[doc = "0x574 - Automatic or manual control of LFCLK"]
+    pub lfclkalwaysrun: LFCLKALWAYSRUN,
+    _reserved47: [u8; 0x04],
+    #[doc = "0x57c - Automatic or manual control of HFCLKAUDIO"]
+    pub hfclkaudioalwaysrun: HFCLKAUDIOALWAYSRUN,
+    #[doc = "0x580 - Clock source for HFCLK192M"]
+    pub hfclk192msrc: HFCLK192MSRC,
+    #[doc = "0x584 - Automatic or manual control of HFCLK192M"]
+    pub hfclk192malwaysrun: HFCLK192MALWAYSRUN,
+    _reserved50: [u8; 0x30],
+    #[doc = "0x5b8 - HFCLK192M frequency configuration"]
+    pub hfclk192mctrl: HFCLK192MCTRL,
+}
+#[doc = "TASKS_HFCLKSTART (w) register accessor: an alias for `Reg<TASKS_HFCLKSTART_SPEC>`"]
+pub type TASKS_HFCLKSTART = crate::Reg<tasks_hfclkstart::TASKS_HFCLKSTART_SPEC>;
+#[doc = "Start HFCLK128M/HFCLK64M source as selected in HFCLKSRC"]
+pub mod tasks_hfclkstart;
+#[doc = "TASKS_HFCLKSTOP (w) register accessor: an alias for `Reg<TASKS_HFCLKSTOP_SPEC>`"]
+pub type TASKS_HFCLKSTOP = crate::Reg<tasks_hfclkstop::TASKS_HFCLKSTOP_SPEC>;
+#[doc = "Stop HFCLK128M/HFCLK64M source"]
+pub mod tasks_hfclkstop;
+#[doc = "TASKS_LFCLKSTART (w) register accessor: an alias for `Reg<TASKS_LFCLKSTART_SPEC>`"]
+pub type TASKS_LFCLKSTART = crate::Reg<tasks_lfclkstart::TASKS_LFCLKSTART_SPEC>;
+#[doc = "Start LFCLK source as selected in LFCLKSRC"]
+pub mod tasks_lfclkstart;
+#[doc = "TASKS_LFCLKSTOP (w) register accessor: an alias for `Reg<TASKS_LFCLKSTOP_SPEC>`"]
+pub type TASKS_LFCLKSTOP = crate::Reg<tasks_lfclkstop::TASKS_LFCLKSTOP_SPEC>;
+#[doc = "Stop LFCLK source"]
+pub mod tasks_lfclkstop;
+#[doc = "TASKS_CAL (w) register accessor: an alias for `Reg<TASKS_CAL_SPEC>`"]
+pub type TASKS_CAL = crate::Reg<tasks_cal::TASKS_CAL_SPEC>;
+#[doc = "Start calibration of LFRC oscillator"]
+pub mod tasks_cal;
+#[doc = "TASKS_HFCLKAUDIOSTART (w) register accessor: an alias for `Reg<TASKS_HFCLKAUDIOSTART_SPEC>`"]
+pub type TASKS_HFCLKAUDIOSTART = crate::Reg<tasks_hfclkaudiostart::TASKS_HFCLKAUDIOSTART_SPEC>;
+#[doc = "Start HFCLKAUDIO source"]
+pub mod tasks_hfclkaudiostart;
+#[doc = "TASKS_HFCLKAUDIOSTOP (w) register accessor: an alias for `Reg<TASKS_HFCLKAUDIOSTOP_SPEC>`"]
+pub type TASKS_HFCLKAUDIOSTOP = crate::Reg<tasks_hfclkaudiostop::TASKS_HFCLKAUDIOSTOP_SPEC>;
+#[doc = "Stop HFCLKAUDIO source"]
+pub mod tasks_hfclkaudiostop;
+#[doc = "TASKS_HFCLK192MSTART (w) register accessor: an alias for `Reg<TASKS_HFCLK192MSTART_SPEC>`"]
+pub type TASKS_HFCLK192MSTART = crate::Reg<tasks_hfclk192mstart::TASKS_HFCLK192MSTART_SPEC>;
+#[doc = "Start HFCLK192M source as selected in HFCLK192MSRC"]
+pub mod tasks_hfclk192mstart;
+#[doc = "TASKS_HFCLK192MSTOP (w) register accessor: an alias for `Reg<TASKS_HFCLK192MSTOP_SPEC>`"]
+pub type TASKS_HFCLK192MSTOP = crate::Reg<tasks_hfclk192mstop::TASKS_HFCLK192MSTOP_SPEC>;
+#[doc = "Stop HFCLK192M source"]
+pub mod tasks_hfclk192mstop;
+#[doc = "SUBSCRIBE_HFCLKSTART (rw) register accessor: an alias for `Reg<SUBSCRIBE_HFCLKSTART_SPEC>`"]
+pub type SUBSCRIBE_HFCLKSTART = crate::Reg<subscribe_hfclkstart::SUBSCRIBE_HFCLKSTART_SPEC>;
+#[doc = "Subscribe configuration for task HFCLKSTART"]
+pub mod subscribe_hfclkstart;
+#[doc = "SUBSCRIBE_HFCLKSTOP (rw) register accessor: an alias for `Reg<SUBSCRIBE_HFCLKSTOP_SPEC>`"]
+pub type SUBSCRIBE_HFCLKSTOP = crate::Reg<subscribe_hfclkstop::SUBSCRIBE_HFCLKSTOP_SPEC>;
+#[doc = "Subscribe configuration for task HFCLKSTOP"]
+pub mod subscribe_hfclkstop;
+#[doc = "SUBSCRIBE_LFCLKSTART (rw) register accessor: an alias for `Reg<SUBSCRIBE_LFCLKSTART_SPEC>`"]
+pub type SUBSCRIBE_LFCLKSTART = crate::Reg<subscribe_lfclkstart::SUBSCRIBE_LFCLKSTART_SPEC>;
+#[doc = "Subscribe configuration for task LFCLKSTART"]
+pub mod subscribe_lfclkstart;
+#[doc = "SUBSCRIBE_LFCLKSTOP (rw) register accessor: an alias for `Reg<SUBSCRIBE_LFCLKSTOP_SPEC>`"]
+pub type SUBSCRIBE_LFCLKSTOP = crate::Reg<subscribe_lfclkstop::SUBSCRIBE_LFCLKSTOP_SPEC>;
+#[doc = "Subscribe configuration for task LFCLKSTOP"]
+pub mod subscribe_lfclkstop;
+#[doc = "SUBSCRIBE_CAL (rw) register accessor: an alias for `Reg<SUBSCRIBE_CAL_SPEC>`"]
+pub type SUBSCRIBE_CAL = crate::Reg<subscribe_cal::SUBSCRIBE_CAL_SPEC>;
+#[doc = "Subscribe configuration for task CAL"]
+pub mod subscribe_cal;
+#[doc = "SUBSCRIBE_HFCLKAUDIOSTART (rw) register accessor: an alias for `Reg<SUBSCRIBE_HFCLKAUDIOSTART_SPEC>`"]
+pub type SUBSCRIBE_HFCLKAUDIOSTART =
+    crate::Reg<subscribe_hfclkaudiostart::SUBSCRIBE_HFCLKAUDIOSTART_SPEC>;
+#[doc = "Subscribe configuration for task HFCLKAUDIOSTART"]
+pub mod subscribe_hfclkaudiostart;
+#[doc = "SUBSCRIBE_HFCLKAUDIOSTOP (rw) register accessor: an alias for `Reg<SUBSCRIBE_HFCLKAUDIOSTOP_SPEC>`"]
+pub type SUBSCRIBE_HFCLKAUDIOSTOP =
+    crate::Reg<subscribe_hfclkaudiostop::SUBSCRIBE_HFCLKAUDIOSTOP_SPEC>;
+#[doc = "Subscribe configuration for task HFCLKAUDIOSTOP"]
+pub mod subscribe_hfclkaudiostop;
+#[doc = "SUBSCRIBE_HFCLK192MSTART (rw) register accessor: an alias for `Reg<SUBSCRIBE_HFCLK192MSTART_SPEC>`"]
+pub type SUBSCRIBE_HFCLK192MSTART =
+    crate::Reg<subscribe_hfclk192mstart::SUBSCRIBE_HFCLK192MSTART_SPEC>;
+#[doc = "Subscribe configuration for task HFCLK192MSTART"]
+pub mod subscribe_hfclk192mstart;
+#[doc = "SUBSCRIBE_HFCLK192MSTOP (rw) register accessor: an alias for `Reg<SUBSCRIBE_HFCLK192MSTOP_SPEC>`"]
+pub type SUBSCRIBE_HFCLK192MSTOP =
+    crate::Reg<subscribe_hfclk192mstop::SUBSCRIBE_HFCLK192MSTOP_SPEC>;
+#[doc = "Subscribe configuration for task HFCLK192MSTOP"]
+pub mod subscribe_hfclk192mstop;
+#[doc = "EVENTS_HFCLKSTARTED (rw) register accessor: an alias for `Reg<EVENTS_HFCLKSTARTED_SPEC>`"]
+pub type EVENTS_HFCLKSTARTED = crate::Reg<events_hfclkstarted::EVENTS_HFCLKSTARTED_SPEC>;
+#[doc = "HFCLK128M/HFCLK64M source started"]
+pub mod events_hfclkstarted;
+#[doc = "EVENTS_LFCLKSTARTED (rw) register accessor: an alias for `Reg<EVENTS_LFCLKSTARTED_SPEC>`"]
+pub type EVENTS_LFCLKSTARTED = crate::Reg<events_lfclkstarted::EVENTS_LFCLKSTARTED_SPEC>;
+#[doc = "LFCLK source started"]
+pub mod events_lfclkstarted;
+#[doc = "EVENTS_DONE (rw) register accessor: an alias for `Reg<EVENTS_DONE_SPEC>`"]
+pub type EVENTS_DONE = crate::Reg<events_done::EVENTS_DONE_SPEC>;
+#[doc = "Calibration of LFRC oscillator complete event"]
+pub mod events_done;
+#[doc = "EVENTS_HFCLKAUDIOSTARTED (rw) register accessor: an alias for `Reg<EVENTS_HFCLKAUDIOSTARTED_SPEC>`"]
+pub type EVENTS_HFCLKAUDIOSTARTED =
+    crate::Reg<events_hfclkaudiostarted::EVENTS_HFCLKAUDIOSTARTED_SPEC>;
+#[doc = "HFCLKAUDIO source started"]
+pub mod events_hfclkaudiostarted;
+#[doc = "EVENTS_HFCLK192MSTARTED (rw) register accessor: an alias for `Reg<EVENTS_HFCLK192MSTARTED_SPEC>`"]
+pub type EVENTS_HFCLK192MSTARTED =
+    crate::Reg<events_hfclk192mstarted::EVENTS_HFCLK192MSTARTED_SPEC>;
+#[doc = "HFCLK192M source started"]
+pub mod events_hfclk192mstarted;
+#[doc = "PUBLISH_HFCLKSTARTED (rw) register accessor: an alias for `Reg<PUBLISH_HFCLKSTARTED_SPEC>`"]
+pub type PUBLISH_HFCLKSTARTED = crate::Reg<publish_hfclkstarted::PUBLISH_HFCLKSTARTED_SPEC>;
+#[doc = "Publish configuration for event HFCLKSTARTED"]
+pub mod publish_hfclkstarted;
+#[doc = "PUBLISH_LFCLKSTARTED (rw) register accessor: an alias for `Reg<PUBLISH_LFCLKSTARTED_SPEC>`"]
+pub type PUBLISH_LFCLKSTARTED = crate::Reg<publish_lfclkstarted::PUBLISH_LFCLKSTARTED_SPEC>;
+#[doc = "Publish configuration for event LFCLKSTARTED"]
+pub mod publish_lfclkstarted;
+#[doc = "PUBLISH_DONE (rw) register accessor: an alias for `Reg<PUBLISH_DONE_SPEC>`"]
+pub type PUBLISH_DONE = crate::Reg<publish_done::PUBLISH_DONE_SPEC>;
+#[doc = "Publish configuration for event DONE"]
+pub mod publish_done;
+#[doc = "PUBLISH_HFCLKAUDIOSTARTED (rw) register accessor: an alias for `Reg<PUBLISH_HFCLKAUDIOSTARTED_SPEC>`"]
+pub type PUBLISH_HFCLKAUDIOSTARTED =
+    crate::Reg<publish_hfclkaudiostarted::PUBLISH_HFCLKAUDIOSTARTED_SPEC>;
+#[doc = "Publish configuration for event HFCLKAUDIOSTARTED"]
+pub mod publish_hfclkaudiostarted;
+#[doc = "PUBLISH_HFCLK192MSTARTED (rw) register accessor: an alias for `Reg<PUBLISH_HFCLK192MSTARTED_SPEC>`"]
+pub type PUBLISH_HFCLK192MSTARTED =
+    crate::Reg<publish_hfclk192mstarted::PUBLISH_HFCLK192MSTARTED_SPEC>;
+#[doc = "Publish configuration for event HFCLK192MSTARTED"]
+pub mod publish_hfclk192mstarted;
+#[doc = "INTEN (rw) register accessor: an alias for `Reg<INTEN_SPEC>`"]
+pub type INTEN = crate::Reg<inten::INTEN_SPEC>;
+#[doc = "Enable or disable interrupt"]
+pub mod inten;
+#[doc = "INTENSET (rw) register accessor: an alias for `Reg<INTENSET_SPEC>`"]
+pub type INTENSET = crate::Reg<intenset::INTENSET_SPEC>;
+#[doc = "Enable interrupt"]
+pub mod intenset;
+#[doc = "INTENCLR (rw) register accessor: an alias for `Reg<INTENCLR_SPEC>`"]
+pub type INTENCLR = crate::Reg<intenclr::INTENCLR_SPEC>;
+#[doc = "Disable interrupt"]
+pub mod intenclr;
+#[doc = "INTPEND (r) register accessor: an alias for `Reg<INTPEND_SPEC>`"]
+pub type INTPEND = crate::Reg<intpend::INTPEND_SPEC>;
+#[doc = "Pending interrupts"]
+pub mod intpend;
+#[doc = "HFCLKRUN (r) register accessor: an alias for `Reg<HFCLKRUN_SPEC>`"]
+pub type HFCLKRUN = crate::Reg<hfclkrun::HFCLKRUN_SPEC>;
+#[doc = "Status indicating that HFCLKSTART task has been triggered"]
+pub mod hfclkrun;
+#[doc = "HFCLKSTAT (r) register accessor: an alias for `Reg<HFCLKSTAT_SPEC>`"]
+pub type HFCLKSTAT = crate::Reg<hfclkstat::HFCLKSTAT_SPEC>;
+#[doc = "Status indicating which HFCLK128M/HFCLK64M source is running This register value in any CLOCK instance reflects status only due to configurations/actions in that CLOCK instance."]
+pub mod hfclkstat;
+#[doc = "LFCLKRUN (r) register accessor: an alias for `Reg<LFCLKRUN_SPEC>`"]
+pub type LFCLKRUN = crate::Reg<lfclkrun::LFCLKRUN_SPEC>;
+#[doc = "Status indicating that LFCLKSTART task has been triggered"]
+pub mod lfclkrun;
+#[doc = "LFCLKSTAT (r) register accessor: an alias for `Reg<LFCLKSTAT_SPEC>`"]
+pub type LFCLKSTAT = crate::Reg<lfclkstat::LFCLKSTAT_SPEC>;
+#[doc = "Status indicating which LFCLK source is running This register value in any CLOCK instance reflects status only due to configurations/actions in that CLOCK instance."]
+pub mod lfclkstat;
+#[doc = "LFCLKSRCCOPY (r) register accessor: an alias for `Reg<LFCLKSRCCOPY_SPEC>`"]
+pub type LFCLKSRCCOPY = crate::Reg<lfclksrccopy::LFCLKSRCCOPY_SPEC>;
+#[doc = "Copy of LFCLKSRC register, set when LFCLKSTART task was triggered"]
+pub mod lfclksrccopy;
+#[doc = "HFCLKAUDIORUN (r) register accessor: an alias for `Reg<HFCLKAUDIORUN_SPEC>`"]
+pub type HFCLKAUDIORUN = crate::Reg<hfclkaudiorun::HFCLKAUDIORUN_SPEC>;
+#[doc = "Status indicating that HFCLKAUDIOSTART task has been triggered"]
+pub mod hfclkaudiorun;
+#[doc = "HFCLKAUDIOSTAT (r) register accessor: an alias for `Reg<HFCLKAUDIOSTAT_SPEC>`"]
+pub type HFCLKAUDIOSTAT = crate::Reg<hfclkaudiostat::HFCLKAUDIOSTAT_SPEC>;
+#[doc = "Status indicating which HFCLKAUDIO source is running"]
+pub mod hfclkaudiostat;
+#[doc = "HFCLK192MRUN (r) register accessor: an alias for `Reg<HFCLK192MRUN_SPEC>`"]
+pub type HFCLK192MRUN = crate::Reg<hfclk192mrun::HFCLK192MRUN_SPEC>;
+#[doc = "Status indicating that HFCLK192MSTART task has been triggered"]
+pub mod hfclk192mrun;
+#[doc = "HFCLK192MSTAT (r) register accessor: an alias for `Reg<HFCLK192MSTAT_SPEC>`"]
+pub type HFCLK192MSTAT = crate::Reg<hfclk192mstat::HFCLK192MSTAT_SPEC>;
+#[doc = "Status indicating which HFCLK192M source is running"]
+pub mod hfclk192mstat;
+#[doc = "HFCLKSRC (rw) register accessor: an alias for `Reg<HFCLKSRC_SPEC>`"]
+pub type HFCLKSRC = crate::Reg<hfclksrc::HFCLKSRC_SPEC>;
+#[doc = "Clock source for HFCLK128M/HFCLK64M"]
+pub mod hfclksrc;
+#[doc = "LFCLKSRC (rw) register accessor: an alias for `Reg<LFCLKSRC_SPEC>`"]
+pub type LFCLKSRC = crate::Reg<lfclksrc::LFCLKSRC_SPEC>;
+#[doc = "Clock source for LFCLK"]
+pub mod lfclksrc;
+#[doc = "HFCLKCTRL (rw) register accessor: an alias for `Reg<HFCLKCTRL_SPEC>`"]
+pub type HFCLKCTRL = crate::Reg<hfclkctrl::HFCLKCTRL_SPEC>;
+#[doc = "HFCLK128M frequency configuration"]
+pub mod hfclkctrl;
+#[doc = "Unspecified"]
+pub use hfclkaudio::HFCLKAUDIO;
+#[doc = r"Cluster"]
+#[doc = "Unspecified"]
+pub mod hfclkaudio;
+#[doc = "HFCLKALWAYSRUN (rw) register accessor: an alias for `Reg<HFCLKALWAYSRUN_SPEC>`"]
+pub type HFCLKALWAYSRUN = crate::Reg<hfclkalwaysrun::HFCLKALWAYSRUN_SPEC>;
+#[doc = "Automatic or manual control of HFCLK128M/HFCLK64M"]
+pub mod hfclkalwaysrun;
+#[doc = "LFCLKALWAYSRUN (rw) register accessor: an alias for `Reg<LFCLKALWAYSRUN_SPEC>`"]
+pub type LFCLKALWAYSRUN = crate::Reg<lfclkalwaysrun::LFCLKALWAYSRUN_SPEC>;
+#[doc = "Automatic or manual control of LFCLK"]
+pub mod lfclkalwaysrun;
+#[doc = "HFCLKAUDIOALWAYSRUN (rw) register accessor: an alias for `Reg<HFCLKAUDIOALWAYSRUN_SPEC>`"]
+pub type HFCLKAUDIOALWAYSRUN = crate::Reg<hfclkaudioalwaysrun::HFCLKAUDIOALWAYSRUN_SPEC>;
+#[doc = "Automatic or manual control of HFCLKAUDIO"]
+pub mod hfclkaudioalwaysrun;
+#[doc = "HFCLK192MSRC (rw) register accessor: an alias for `Reg<HFCLK192MSRC_SPEC>`"]
+pub type HFCLK192MSRC = crate::Reg<hfclk192msrc::HFCLK192MSRC_SPEC>;
+#[doc = "Clock source for HFCLK192M"]
+pub mod hfclk192msrc;
+#[doc = "HFCLK192MALWAYSRUN (rw) register accessor: an alias for `Reg<HFCLK192MALWAYSRUN_SPEC>`"]
+pub type HFCLK192MALWAYSRUN = crate::Reg<hfclk192malwaysrun::HFCLK192MALWAYSRUN_SPEC>;
+#[doc = "Automatic or manual control of HFCLK192M"]
+pub mod hfclk192malwaysrun;
+#[doc = "HFCLK192MCTRL (rw) register accessor: an alias for `Reg<HFCLK192MCTRL_SPEC>`"]
+pub type HFCLK192MCTRL = crate::Reg<hfclk192mctrl::HFCLK192MCTRL_SPEC>;
+#[doc = "HFCLK192M frequency configuration"]
+pub mod hfclk192mctrl;

vendor/nrf5340-app-pac/src/clock_ns/events_done.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_DONE` reader"]
+pub struct R(crate::R<EVENTS_DONE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_DONE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_DONE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_DONE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_DONE` writer"]
+pub struct W(crate::W<EVENTS_DONE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_DONE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_DONE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_DONE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_DONE` reader - Calibration of LFRC oscillator complete event"]
+pub type EVENTS_DONE_R = crate::BitReader<EVENTS_DONE_A>;
+#[doc = "Calibration of LFRC oscillator complete event\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_DONE_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_DONE_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_DONE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_DONE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_DONE_A {
+        match self.bits {
+            false => EVENTS_DONE_A::NOT_GENERATED,
+            true => EVENTS_DONE_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_DONE_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_DONE_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_DONE` writer - Calibration of LFRC oscillator complete event"]
+pub type EVENTS_DONE_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_DONE_SPEC, EVENTS_DONE_A, O>;
+impl<'a, const O: u8> EVENTS_DONE_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_DONE_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_DONE_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Calibration of LFRC oscillator complete event"]
+    #[inline(always)]
+    pub fn events_done(&self) -> EVENTS_DONE_R {
+        EVENTS_DONE_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Calibration of LFRC oscillator complete event"]
+    #[inline(always)]
+    pub fn events_done(&mut self) -> EVENTS_DONE_W<0> {
+        EVENTS_DONE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Calibration of LFRC oscillator complete event\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_done](index.html) module"]
+pub struct EVENTS_DONE_SPEC;
+impl crate::RegisterSpec for EVENTS_DONE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_done::R](R) reader structure"]
+impl crate::Readable for EVENTS_DONE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_done::W](W) writer structure"]
+impl crate::Writable for EVENTS_DONE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_DONE to value 0"]
+impl crate::Resettable for EVENTS_DONE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/events_hfclk192mstarted.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_HFCLK192MSTARTED` reader"]
+pub struct R(crate::R<EVENTS_HFCLK192MSTARTED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_HFCLK192MSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_HFCLK192MSTARTED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_HFCLK192MSTARTED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_HFCLK192MSTARTED` writer"]
+pub struct W(crate::W<EVENTS_HFCLK192MSTARTED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_HFCLK192MSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_HFCLK192MSTARTED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_HFCLK192MSTARTED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_HFCLK192MSTARTED` reader - HFCLK192M source started"]
+pub type EVENTS_HFCLK192MSTARTED_R = crate::BitReader<EVENTS_HFCLK192MSTARTED_A>;
+#[doc = "HFCLK192M source started\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_HFCLK192MSTARTED_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_HFCLK192MSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_HFCLK192MSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_HFCLK192MSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_HFCLK192MSTARTED_A {
+        match self.bits {
+            false => EVENTS_HFCLK192MSTARTED_A::NOT_GENERATED,
+            true => EVENTS_HFCLK192MSTARTED_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_HFCLK192MSTARTED_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_HFCLK192MSTARTED_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_HFCLK192MSTARTED` writer - HFCLK192M source started"]
+pub type EVENTS_HFCLK192MSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_HFCLK192MSTARTED_SPEC, EVENTS_HFCLK192MSTARTED_A, O>;
+impl<'a, const O: u8> EVENTS_HFCLK192MSTARTED_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_HFCLK192MSTARTED_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_HFCLK192MSTARTED_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - HFCLK192M source started"]
+    #[inline(always)]
+    pub fn events_hfclk192mstarted(&self) -> EVENTS_HFCLK192MSTARTED_R {
+        EVENTS_HFCLK192MSTARTED_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - HFCLK192M source started"]
+    #[inline(always)]
+    pub fn events_hfclk192mstarted(&mut self) -> EVENTS_HFCLK192MSTARTED_W<0> {
+        EVENTS_HFCLK192MSTARTED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "HFCLK192M source started\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_hfclk192mstarted](index.html) module"]
+pub struct EVENTS_HFCLK192MSTARTED_SPEC;
+impl crate::RegisterSpec for EVENTS_HFCLK192MSTARTED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_hfclk192mstarted::R](R) reader structure"]
+impl crate::Readable for EVENTS_HFCLK192MSTARTED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_hfclk192mstarted::W](W) writer structure"]
+impl crate::Writable for EVENTS_HFCLK192MSTARTED_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_HFCLK192MSTARTED to value 0"]
+impl crate::Resettable for EVENTS_HFCLK192MSTARTED_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/events_hfclkaudiostarted.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_HFCLKAUDIOSTARTED` reader"]
+pub struct R(crate::R<EVENTS_HFCLKAUDIOSTARTED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_HFCLKAUDIOSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_HFCLKAUDIOSTARTED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_HFCLKAUDIOSTARTED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_HFCLKAUDIOSTARTED` writer"]
+pub struct W(crate::W<EVENTS_HFCLKAUDIOSTARTED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_HFCLKAUDIOSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_HFCLKAUDIOSTARTED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_HFCLKAUDIOSTARTED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_HFCLKAUDIOSTARTED` reader - HFCLKAUDIO source started"]
+pub type EVENTS_HFCLKAUDIOSTARTED_R = crate::BitReader<EVENTS_HFCLKAUDIOSTARTED_A>;
+#[doc = "HFCLKAUDIO source started\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_HFCLKAUDIOSTARTED_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_HFCLKAUDIOSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_HFCLKAUDIOSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_HFCLKAUDIOSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_HFCLKAUDIOSTARTED_A {
+        match self.bits {
+            false => EVENTS_HFCLKAUDIOSTARTED_A::NOT_GENERATED,
+            true => EVENTS_HFCLKAUDIOSTARTED_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_HFCLKAUDIOSTARTED_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_HFCLKAUDIOSTARTED_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_HFCLKAUDIOSTARTED` writer - HFCLKAUDIO source started"]
+pub type EVENTS_HFCLKAUDIOSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_HFCLKAUDIOSTARTED_SPEC, EVENTS_HFCLKAUDIOSTARTED_A, O>;
+impl<'a, const O: u8> EVENTS_HFCLKAUDIOSTARTED_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_HFCLKAUDIOSTARTED_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_HFCLKAUDIOSTARTED_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - HFCLKAUDIO source started"]
+    #[inline(always)]
+    pub fn events_hfclkaudiostarted(&self) -> EVENTS_HFCLKAUDIOSTARTED_R {
+        EVENTS_HFCLKAUDIOSTARTED_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - HFCLKAUDIO source started"]
+    #[inline(always)]
+    pub fn events_hfclkaudiostarted(&mut self) -> EVENTS_HFCLKAUDIOSTARTED_W<0> {
+        EVENTS_HFCLKAUDIOSTARTED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "HFCLKAUDIO source started\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_hfclkaudiostarted](index.html) module"]
+pub struct EVENTS_HFCLKAUDIOSTARTED_SPEC;
+impl crate::RegisterSpec for EVENTS_HFCLKAUDIOSTARTED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_hfclkaudiostarted::R](R) reader structure"]
+impl crate::Readable for EVENTS_HFCLKAUDIOSTARTED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_hfclkaudiostarted::W](W) writer structure"]
+impl crate::Writable for EVENTS_HFCLKAUDIOSTARTED_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_HFCLKAUDIOSTARTED to value 0"]
+impl crate::Resettable for EVENTS_HFCLKAUDIOSTARTED_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/events_hfclkstarted.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_HFCLKSTARTED` reader"]
+pub struct R(crate::R<EVENTS_HFCLKSTARTED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_HFCLKSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_HFCLKSTARTED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_HFCLKSTARTED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_HFCLKSTARTED` writer"]
+pub struct W(crate::W<EVENTS_HFCLKSTARTED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_HFCLKSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_HFCLKSTARTED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_HFCLKSTARTED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_HFCLKSTARTED` reader - HFCLK128M/HFCLK64M source started"]
+pub type EVENTS_HFCLKSTARTED_R = crate::BitReader<EVENTS_HFCLKSTARTED_A>;
+#[doc = "HFCLK128M/HFCLK64M source started\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_HFCLKSTARTED_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_HFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_HFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_HFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_HFCLKSTARTED_A {
+        match self.bits {
+            false => EVENTS_HFCLKSTARTED_A::NOT_GENERATED,
+            true => EVENTS_HFCLKSTARTED_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_HFCLKSTARTED_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_HFCLKSTARTED_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_HFCLKSTARTED` writer - HFCLK128M/HFCLK64M source started"]
+pub type EVENTS_HFCLKSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_HFCLKSTARTED_SPEC, EVENTS_HFCLKSTARTED_A, O>;
+impl<'a, const O: u8> EVENTS_HFCLKSTARTED_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_HFCLKSTARTED_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_HFCLKSTARTED_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - HFCLK128M/HFCLK64M source started"]
+    #[inline(always)]
+    pub fn events_hfclkstarted(&self) -> EVENTS_HFCLKSTARTED_R {
+        EVENTS_HFCLKSTARTED_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - HFCLK128M/HFCLK64M source started"]
+    #[inline(always)]
+    pub fn events_hfclkstarted(&mut self) -> EVENTS_HFCLKSTARTED_W<0> {
+        EVENTS_HFCLKSTARTED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "HFCLK128M/HFCLK64M source started\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_hfclkstarted](index.html) module"]
+pub struct EVENTS_HFCLKSTARTED_SPEC;
+impl crate::RegisterSpec for EVENTS_HFCLKSTARTED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_hfclkstarted::R](R) reader structure"]
+impl crate::Readable for EVENTS_HFCLKSTARTED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_hfclkstarted::W](W) writer structure"]
+impl crate::Writable for EVENTS_HFCLKSTARTED_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_HFCLKSTARTED to value 0"]
+impl crate::Resettable for EVENTS_HFCLKSTARTED_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/events_lfclkstarted.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_LFCLKSTARTED` reader"]
+pub struct R(crate::R<EVENTS_LFCLKSTARTED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_LFCLKSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_LFCLKSTARTED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_LFCLKSTARTED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_LFCLKSTARTED` writer"]
+pub struct W(crate::W<EVENTS_LFCLKSTARTED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_LFCLKSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_LFCLKSTARTED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_LFCLKSTARTED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_LFCLKSTARTED` reader - LFCLK source started"]
+pub type EVENTS_LFCLKSTARTED_R = crate::BitReader<EVENTS_LFCLKSTARTED_A>;
+#[doc = "LFCLK source started\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_LFCLKSTARTED_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_LFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_LFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_LFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_LFCLKSTARTED_A {
+        match self.bits {
+            false => EVENTS_LFCLKSTARTED_A::NOT_GENERATED,
+            true => EVENTS_LFCLKSTARTED_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_LFCLKSTARTED_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_LFCLKSTARTED_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_LFCLKSTARTED` writer - LFCLK source started"]
+pub type EVENTS_LFCLKSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_LFCLKSTARTED_SPEC, EVENTS_LFCLKSTARTED_A, O>;
+impl<'a, const O: u8> EVENTS_LFCLKSTARTED_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_LFCLKSTARTED_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_LFCLKSTARTED_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - LFCLK source started"]
+    #[inline(always)]
+    pub fn events_lfclkstarted(&self) -> EVENTS_LFCLKSTARTED_R {
+        EVENTS_LFCLKSTARTED_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - LFCLK source started"]
+    #[inline(always)]
+    pub fn events_lfclkstarted(&mut self) -> EVENTS_LFCLKSTARTED_W<0> {
+        EVENTS_LFCLKSTARTED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "LFCLK source started\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_lfclkstarted](index.html) module"]
+pub struct EVENTS_LFCLKSTARTED_SPEC;
+impl crate::RegisterSpec for EVENTS_LFCLKSTARTED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_lfclkstarted::R](R) reader structure"]
+impl crate::Readable for EVENTS_LFCLKSTARTED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_lfclkstarted::W](W) writer structure"]
+impl crate::Writable for EVENTS_LFCLKSTARTED_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_LFCLKSTARTED to value 0"]
+impl crate::Resettable for EVENTS_LFCLKSTARTED_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/hfclk192malwaysrun.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `HFCLK192MALWAYSRUN` reader"]
+pub struct R(crate::R<HFCLK192MALWAYSRUN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFCLK192MALWAYSRUN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFCLK192MALWAYSRUN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFCLK192MALWAYSRUN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `HFCLK192MALWAYSRUN` writer"]
+pub struct W(crate::W<HFCLK192MALWAYSRUN_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<HFCLK192MALWAYSRUN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<HFCLK192MALWAYSRUN_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<HFCLK192MALWAYSRUN_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ALWAYSRUN` reader - Ensure clock is always running"]
+pub type ALWAYSRUN_R = crate::BitReader<ALWAYSRUN_A>;
+#[doc = "Ensure clock is always running\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ALWAYSRUN_A {
+    #[doc = "0: Use automatic clock control"]
+    AUTOMATIC = 0,
+    #[doc = "1: Ensure clock is always running"]
+    ALWAYS_RUN = 1,
+}
+impl From<ALWAYSRUN_A> for bool {
+    #[inline(always)]
+    fn from(variant: ALWAYSRUN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ALWAYSRUN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ALWAYSRUN_A {
+        match self.bits {
+            false => ALWAYSRUN_A::AUTOMATIC,
+            true => ALWAYSRUN_A::ALWAYS_RUN,
+        }
+    }
+    #[doc = "Checks if the value of the field is `AUTOMATIC`"]
+    #[inline(always)]
+    pub fn is_automatic(&self) -> bool {
+        *self == ALWAYSRUN_A::AUTOMATIC
+    }
+    #[doc = "Checks if the value of the field is `ALWAYS_RUN`"]
+    #[inline(always)]
+    pub fn is_always_run(&self) -> bool {
+        *self == ALWAYSRUN_A::ALWAYS_RUN
+    }
+}
+#[doc = "Field `ALWAYSRUN` writer - Ensure clock is always running"]
+pub type ALWAYSRUN_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, HFCLK192MALWAYSRUN_SPEC, ALWAYSRUN_A, O>;
+impl<'a, const O: u8> ALWAYSRUN_W<'a, O> {
+    #[doc = "Use automatic clock control"]
+    #[inline(always)]
+    pub fn automatic(self) -> &'a mut W {
+        self.variant(ALWAYSRUN_A::AUTOMATIC)
+    }
+    #[doc = "Ensure clock is always running"]
+    #[inline(always)]
+    pub fn always_run(self) -> &'a mut W {
+        self.variant(ALWAYSRUN_A::ALWAYS_RUN)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Ensure clock is always running"]
+    #[inline(always)]
+    pub fn alwaysrun(&self) -> ALWAYSRUN_R {
+        ALWAYSRUN_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Ensure clock is always running"]
+    #[inline(always)]
+    pub fn alwaysrun(&mut self) -> ALWAYSRUN_W<0> {
+        ALWAYSRUN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Automatic or manual control of HFCLK192M\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclk192malwaysrun](index.html) module"]
+pub struct HFCLK192MALWAYSRUN_SPEC;
+impl crate::RegisterSpec for HFCLK192MALWAYSRUN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfclk192malwaysrun::R](R) reader structure"]
+impl crate::Readable for HFCLK192MALWAYSRUN_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [hfclk192malwaysrun::W](W) writer structure"]
+impl crate::Writable for HFCLK192MALWAYSRUN_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets HFCLK192MALWAYSRUN to value 0"]
+impl crate::Resettable for HFCLK192MALWAYSRUN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/hfclk192mctrl.rs

@@ -0,0 +1,142 @@
+#[doc = "Register `HFCLK192MCTRL` reader"]
+pub struct R(crate::R<HFCLK192MCTRL_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFCLK192MCTRL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFCLK192MCTRL_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFCLK192MCTRL_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `HFCLK192MCTRL` writer"]
+pub struct W(crate::W<HFCLK192MCTRL_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<HFCLK192MCTRL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<HFCLK192MCTRL_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<HFCLK192MCTRL_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `HCLK192M` reader - High frequency clock HCLK192M"]
+pub type HCLK192M_R = crate::FieldReader<u8, HCLK192M_A>;
+#[doc = "High frequency clock HCLK192M\n\nValue on reset: 2"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum HCLK192M_A {
+    #[doc = "0: Divide HFCLK192M by 1"]
+    DIV1 = 0,
+    #[doc = "1: Divide HFCLK192M by 2"]
+    DIV2 = 1,
+    #[doc = "2: Divide HFCLK192M by 4"]
+    DIV4 = 2,
+}
+impl From<HCLK192M_A> for u8 {
+    #[inline(always)]
+    fn from(variant: HCLK192M_A) -> Self {
+        variant as _
+    }
+}
+impl HCLK192M_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<HCLK192M_A> {
+        match self.bits {
+            0 => Some(HCLK192M_A::DIV1),
+            1 => Some(HCLK192M_A::DIV2),
+            2 => Some(HCLK192M_A::DIV4),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DIV1`"]
+    #[inline(always)]
+    pub fn is_div1(&self) -> bool {
+        *self == HCLK192M_A::DIV1
+    }
+    #[doc = "Checks if the value of the field is `DIV2`"]
+    #[inline(always)]
+    pub fn is_div2(&self) -> bool {
+        *self == HCLK192M_A::DIV2
+    }
+    #[doc = "Checks if the value of the field is `DIV4`"]
+    #[inline(always)]
+    pub fn is_div4(&self) -> bool {
+        *self == HCLK192M_A::DIV4
+    }
+}
+#[doc = "Field `HCLK192M` writer - High frequency clock HCLK192M"]
+pub type HCLK192M_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, HFCLK192MCTRL_SPEC, u8, HCLK192M_A, 2, O>;
+impl<'a, const O: u8> HCLK192M_W<'a, O> {
+    #[doc = "Divide HFCLK192M by 1"]
+    #[inline(always)]
+    pub fn div1(self) -> &'a mut W {
+        self.variant(HCLK192M_A::DIV1)
+    }
+    #[doc = "Divide HFCLK192M by 2"]
+    #[inline(always)]
+    pub fn div2(self) -> &'a mut W {
+        self.variant(HCLK192M_A::DIV2)
+    }
+    #[doc = "Divide HFCLK192M by 4"]
+    #[inline(always)]
+    pub fn div4(self) -> &'a mut W {
+        self.variant(HCLK192M_A::DIV4)
+    }
+}
+impl R {
+    #[doc = "Bits 0:1 - High frequency clock HCLK192M"]
+    #[inline(always)]
+    pub fn hclk192m(&self) -> HCLK192M_R {
+        HCLK192M_R::new((self.bits & 3) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:1 - High frequency clock HCLK192M"]
+    #[inline(always)]
+    pub fn hclk192m(&mut self) -> HCLK192M_W<0> {
+        HCLK192M_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "HFCLK192M frequency configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclk192mctrl](index.html) module"]
+pub struct HFCLK192MCTRL_SPEC;
+impl crate::RegisterSpec for HFCLK192MCTRL_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfclk192mctrl::R](R) reader structure"]
+impl crate::Readable for HFCLK192MCTRL_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [hfclk192mctrl::W](W) writer structure"]
+impl crate::Writable for HFCLK192MCTRL_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets HFCLK192MCTRL to value 0x02"]
+impl crate::Resettable for HFCLK192MCTRL_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x02
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/hfclk192mrun.rs

@@ -0,0 +1,74 @@
+#[doc = "Register `HFCLK192MRUN` reader"]
+pub struct R(crate::R<HFCLK192MRUN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFCLK192MRUN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFCLK192MRUN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFCLK192MRUN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `STATUS` reader - HFCLK192MSTART task triggered or not"]
+pub type STATUS_R = crate::BitReader<STATUS_A>;
+#[doc = "HFCLK192MSTART task triggered or not\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STATUS_A {
+    #[doc = "0: Task not triggered"]
+    NOT_TRIGGERED = 0,
+    #[doc = "1: Task triggered"]
+    TRIGGERED = 1,
+}
+impl From<STATUS_A> for bool {
+    #[inline(always)]
+    fn from(variant: STATUS_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STATUS_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STATUS_A {
+        match self.bits {
+            false => STATUS_A::NOT_TRIGGERED,
+            true => STATUS_A::TRIGGERED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_TRIGGERED`"]
+    #[inline(always)]
+    pub fn is_not_triggered(&self) -> bool {
+        *self == STATUS_A::NOT_TRIGGERED
+    }
+    #[doc = "Checks if the value of the field is `TRIGGERED`"]
+    #[inline(always)]
+    pub fn is_triggered(&self) -> bool {
+        *self == STATUS_A::TRIGGERED
+    }
+}
+impl R {
+    #[doc = "Bit 0 - HFCLK192MSTART task triggered or not"]
+    #[inline(always)]
+    pub fn status(&self) -> STATUS_R {
+        STATUS_R::new((self.bits & 1) != 0)
+    }
+}
+#[doc = "Status indicating that HFCLK192MSTART task has been triggered\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclk192mrun](index.html) module"]
+pub struct HFCLK192MRUN_SPEC;
+impl crate::RegisterSpec for HFCLK192MRUN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfclk192mrun::R](R) reader structure"]
+impl crate::Readable for HFCLK192MRUN_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets HFCLK192MRUN to value 0"]
+impl crate::Resettable for HFCLK192MRUN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/hfclk192msrc.rs

@@ -0,0 +1,126 @@
+#[doc = "Register `HFCLK192MSRC` reader"]
+pub struct R(crate::R<HFCLK192MSRC_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFCLK192MSRC_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFCLK192MSRC_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFCLK192MSRC_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `HFCLK192MSRC` writer"]
+pub struct W(crate::W<HFCLK192MSRC_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<HFCLK192MSRC_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<HFCLK192MSRC_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<HFCLK192MSRC_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `SRC` reader - Select which HFCLK192M source is started by the HFCLK192MSTART task"]
+pub type SRC_R = crate::BitReader<SRC_A>;
+#[doc = "Select which HFCLK192M source is started by the HFCLK192MSTART task\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SRC_A {
+    #[doc = "0: HFCLK192MSTART task starts HFINT oscillator"]
+    HFINT = 0,
+    #[doc = "1: HFCLK192MSTART task starts HFXO oscillator"]
+    HFXO = 1,
+}
+impl From<SRC_A> for bool {
+    #[inline(always)]
+    fn from(variant: SRC_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl SRC_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> SRC_A {
+        match self.bits {
+            false => SRC_A::HFINT,
+            true => SRC_A::HFXO,
+        }
+    }
+    #[doc = "Checks if the value of the field is `HFINT`"]
+    #[inline(always)]
+    pub fn is_hfint(&self) -> bool {
+        *self == SRC_A::HFINT
+    }
+    #[doc = "Checks if the value of the field is `HFXO`"]
+    #[inline(always)]
+    pub fn is_hfxo(&self) -> bool {
+        *self == SRC_A::HFXO
+    }
+}
+#[doc = "Field `SRC` writer - Select which HFCLK192M source is started by the HFCLK192MSTART task"]
+pub type SRC_W<'a, const O: u8> = crate::BitWriter<'a, u32, HFCLK192MSRC_SPEC, SRC_A, O>;
+impl<'a, const O: u8> SRC_W<'a, O> {
+    #[doc = "HFCLK192MSTART task starts HFINT oscillator"]
+    #[inline(always)]
+    pub fn hfint(self) -> &'a mut W {
+        self.variant(SRC_A::HFINT)
+    }
+    #[doc = "HFCLK192MSTART task starts HFXO oscillator"]
+    #[inline(always)]
+    pub fn hfxo(self) -> &'a mut W {
+        self.variant(SRC_A::HFXO)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Select which HFCLK192M source is started by the HFCLK192MSTART task"]
+    #[inline(always)]
+    pub fn src(&self) -> SRC_R {
+        SRC_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Select which HFCLK192M source is started by the HFCLK192MSTART task"]
+    #[inline(always)]
+    pub fn src(&mut self) -> SRC_W<0> {
+        SRC_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Clock source for HFCLK192M\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclk192msrc](index.html) module"]
+pub struct HFCLK192MSRC_SPEC;
+impl crate::RegisterSpec for HFCLK192MSRC_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfclk192msrc::R](R) reader structure"]
+impl crate::Readable for HFCLK192MSRC_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [hfclk192msrc::W](W) writer structure"]
+impl crate::Writable for HFCLK192MSRC_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets HFCLK192MSRC to value 0x01"]
+impl crate::Resettable for HFCLK192MSRC_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x01
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/hfclk192mstat.rs

@@ -0,0 +1,156 @@
+#[doc = "Register `HFCLK192MSTAT` reader"]
+pub struct R(crate::R<HFCLK192MSTAT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFCLK192MSTAT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFCLK192MSTAT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFCLK192MSTAT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `SRC` reader - Active clock source"]
+pub type SRC_R = crate::BitReader<SRC_A>;
+#[doc = "Active clock source\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SRC_A {
+    #[doc = "0: Clock source: HFINT - on-chip oscillator"]
+    HFINT = 0,
+    #[doc = "1: Clock source: HFXO - derived from external 32 MHz crystal oscillator"]
+    HFXO = 1,
+}
+impl From<SRC_A> for bool {
+    #[inline(always)]
+    fn from(variant: SRC_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl SRC_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> SRC_A {
+        match self.bits {
+            false => SRC_A::HFINT,
+            true => SRC_A::HFXO,
+        }
+    }
+    #[doc = "Checks if the value of the field is `HFINT`"]
+    #[inline(always)]
+    pub fn is_hfint(&self) -> bool {
+        *self == SRC_A::HFINT
+    }
+    #[doc = "Checks if the value of the field is `HFXO`"]
+    #[inline(always)]
+    pub fn is_hfxo(&self) -> bool {
+        *self == SRC_A::HFXO
+    }
+}
+#[doc = "Field `ALWAYSRUNNING` reader - ALWAYSRUN activated"]
+pub type ALWAYSRUNNING_R = crate::BitReader<ALWAYSRUNNING_A>;
+#[doc = "ALWAYSRUN activated\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ALWAYSRUNNING_A {
+    #[doc = "0: Automatic clock control enabled"]
+    NOT_RUNNING = 0,
+    #[doc = "1: Oscillator is always running"]
+    RUNNING = 1,
+}
+impl From<ALWAYSRUNNING_A> for bool {
+    #[inline(always)]
+    fn from(variant: ALWAYSRUNNING_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ALWAYSRUNNING_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ALWAYSRUNNING_A {
+        match self.bits {
+            false => ALWAYSRUNNING_A::NOT_RUNNING,
+            true => ALWAYSRUNNING_A::RUNNING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_RUNNING`"]
+    #[inline(always)]
+    pub fn is_not_running(&self) -> bool {
+        *self == ALWAYSRUNNING_A::NOT_RUNNING
+    }
+    #[doc = "Checks if the value of the field is `RUNNING`"]
+    #[inline(always)]
+    pub fn is_running(&self) -> bool {
+        *self == ALWAYSRUNNING_A::RUNNING
+    }
+}
+#[doc = "Field `STATE` reader - HFCLK192M state"]
+pub type STATE_R = crate::BitReader<STATE_A>;
+#[doc = "HFCLK192M state\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STATE_A {
+    #[doc = "0: HFCLK192M not running"]
+    NOT_RUNNING = 0,
+    #[doc = "1: HFCLK192M running"]
+    RUNNING = 1,
+}
+impl From<STATE_A> for bool {
+    #[inline(always)]
+    fn from(variant: STATE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STATE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STATE_A {
+        match self.bits {
+            false => STATE_A::NOT_RUNNING,
+            true => STATE_A::RUNNING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_RUNNING`"]
+    #[inline(always)]
+    pub fn is_not_running(&self) -> bool {
+        *self == STATE_A::NOT_RUNNING
+    }
+    #[doc = "Checks if the value of the field is `RUNNING`"]
+    #[inline(always)]
+    pub fn is_running(&self) -> bool {
+        *self == STATE_A::RUNNING
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Active clock source"]
+    #[inline(always)]
+    pub fn src(&self) -> SRC_R {
+        SRC_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 4 - ALWAYSRUN activated"]
+    #[inline(always)]
+    pub fn alwaysrunning(&self) -> ALWAYSRUNNING_R {
+        ALWAYSRUNNING_R::new(((self.bits >> 4) & 1) != 0)
+    }
+    #[doc = "Bit 16 - HFCLK192M state"]
+    #[inline(always)]
+    pub fn state(&self) -> STATE_R {
+        STATE_R::new(((self.bits >> 16) & 1) != 0)
+    }
+}
+#[doc = "Status indicating which HFCLK192M source is running\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclk192mstat](index.html) module"]
+pub struct HFCLK192MSTAT_SPEC;
+impl crate::RegisterSpec for HFCLK192MSTAT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfclk192mstat::R](R) reader structure"]
+impl crate::Readable for HFCLK192MSTAT_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets HFCLK192MSTAT to value 0"]
+impl crate::Resettable for HFCLK192MSTAT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/hfclkalwaysrun.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `HFCLKALWAYSRUN` reader"]
+pub struct R(crate::R<HFCLKALWAYSRUN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFCLKALWAYSRUN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFCLKALWAYSRUN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFCLKALWAYSRUN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `HFCLKALWAYSRUN` writer"]
+pub struct W(crate::W<HFCLKALWAYSRUN_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<HFCLKALWAYSRUN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<HFCLKALWAYSRUN_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<HFCLKALWAYSRUN_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ALWAYSRUN` reader - Ensure clock is always running"]
+pub type ALWAYSRUN_R = crate::BitReader<ALWAYSRUN_A>;
+#[doc = "Ensure clock is always running\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ALWAYSRUN_A {
+    #[doc = "0: Use automatic clock control"]
+    AUTOMATIC = 0,
+    #[doc = "1: Ensure clock is always running"]
+    ALWAYS_RUN = 1,
+}
+impl From<ALWAYSRUN_A> for bool {
+    #[inline(always)]
+    fn from(variant: ALWAYSRUN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ALWAYSRUN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ALWAYSRUN_A {
+        match self.bits {
+            false => ALWAYSRUN_A::AUTOMATIC,
+            true => ALWAYSRUN_A::ALWAYS_RUN,
+        }
+    }
+    #[doc = "Checks if the value of the field is `AUTOMATIC`"]
+    #[inline(always)]
+    pub fn is_automatic(&self) -> bool {
+        *self == ALWAYSRUN_A::AUTOMATIC
+    }
+    #[doc = "Checks if the value of the field is `ALWAYS_RUN`"]
+    #[inline(always)]
+    pub fn is_always_run(&self) -> bool {
+        *self == ALWAYSRUN_A::ALWAYS_RUN
+    }
+}
+#[doc = "Field `ALWAYSRUN` writer - Ensure clock is always running"]
+pub type ALWAYSRUN_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, HFCLKALWAYSRUN_SPEC, ALWAYSRUN_A, O>;
+impl<'a, const O: u8> ALWAYSRUN_W<'a, O> {
+    #[doc = "Use automatic clock control"]
+    #[inline(always)]
+    pub fn automatic(self) -> &'a mut W {
+        self.variant(ALWAYSRUN_A::AUTOMATIC)
+    }
+    #[doc = "Ensure clock is always running"]
+    #[inline(always)]
+    pub fn always_run(self) -> &'a mut W {
+        self.variant(ALWAYSRUN_A::ALWAYS_RUN)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Ensure clock is always running"]
+    #[inline(always)]
+    pub fn alwaysrun(&self) -> ALWAYSRUN_R {
+        ALWAYSRUN_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Ensure clock is always running"]
+    #[inline(always)]
+    pub fn alwaysrun(&mut self) -> ALWAYSRUN_W<0> {
+        ALWAYSRUN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Automatic or manual control of HFCLK128M/HFCLK64M\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclkalwaysrun](index.html) module"]
+pub struct HFCLKALWAYSRUN_SPEC;
+impl crate::RegisterSpec for HFCLKALWAYSRUN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfclkalwaysrun::R](R) reader structure"]
+impl crate::Readable for HFCLKALWAYSRUN_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [hfclkalwaysrun::W](W) writer structure"]
+impl crate::Writable for HFCLKALWAYSRUN_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets HFCLKALWAYSRUN to value 0"]
+impl crate::Resettable for HFCLKALWAYSRUN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/hfclkaudio.rs

@@ -0,0 +1,10 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct HFCLKAUDIO {
+    #[doc = "0x00 - Audio PLL frequency in 11.176 MHz - 11.402 MHz or 12.165 MHz - 12.411 MHz frequency bands"]
+    pub frequency: FREQUENCY,
+}
+#[doc = "FREQUENCY (rw) register accessor: an alias for `Reg<FREQUENCY_SPEC>`"]
+pub type FREQUENCY = crate::Reg<frequency::FREQUENCY_SPEC>;
+#[doc = "Audio PLL frequency in 11.176 MHz - 11.402 MHz or 12.165 MHz - 12.411 MHz frequency bands"]
+pub mod frequency;

vendor/nrf5340-app-pac/src/clock_ns/hfclkaudio/frequency.rs

@@ -0,0 +1,81 @@
+#[doc = "Register `FREQUENCY` reader"]
+pub struct R(crate::R<FREQUENCY_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<FREQUENCY_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<FREQUENCY_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<FREQUENCY_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `FREQUENCY` writer"]
+pub struct W(crate::W<FREQUENCY_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<FREQUENCY_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<FREQUENCY_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<FREQUENCY_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `FREQUENCY` reader - Frequency 0: 10.666 MHz 65535: 13.333 MHz"]
+pub type FREQUENCY_R = crate::FieldReader<u16, u16>;
+#[doc = "Field `FREQUENCY` writer - Frequency 0: 10.666 MHz 65535: 13.333 MHz"]
+pub type FREQUENCY_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, FREQUENCY_SPEC, u16, u16, 16, O>;
+impl R {
+    #[doc = "Bits 0:15 - Frequency 0: 10.666 MHz 65535: 13.333 MHz"]
+    #[inline(always)]
+    pub fn frequency(&self) -> FREQUENCY_R {
+        FREQUENCY_R::new((self.bits & 0xffff) as u16)
+    }
+}
+impl W {
+    #[doc = "Bits 0:15 - Frequency 0: 10.666 MHz 65535: 13.333 MHz"]
+    #[inline(always)]
+    pub fn frequency(&mut self) -> FREQUENCY_W<0> {
+        FREQUENCY_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Audio PLL frequency in 11.176 MHz - 11.402 MHz or 12.165 MHz - 12.411 MHz frequency bands\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [frequency](index.html) module"]
+pub struct FREQUENCY_SPEC;
+impl crate::RegisterSpec for FREQUENCY_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [frequency::R](R) reader structure"]
+impl crate::Readable for FREQUENCY_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [frequency::W](W) writer structure"]
+impl crate::Writable for FREQUENCY_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets FREQUENCY to value 0x9bae"]
+impl crate::Resettable for FREQUENCY_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x9bae
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/hfclkaudioalwaysrun.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `HFCLKAUDIOALWAYSRUN` reader"]
+pub struct R(crate::R<HFCLKAUDIOALWAYSRUN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFCLKAUDIOALWAYSRUN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFCLKAUDIOALWAYSRUN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFCLKAUDIOALWAYSRUN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `HFCLKAUDIOALWAYSRUN` writer"]
+pub struct W(crate::W<HFCLKAUDIOALWAYSRUN_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<HFCLKAUDIOALWAYSRUN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<HFCLKAUDIOALWAYSRUN_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<HFCLKAUDIOALWAYSRUN_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ALWAYSRUN` reader - Ensure clock is always running"]
+pub type ALWAYSRUN_R = crate::BitReader<ALWAYSRUN_A>;
+#[doc = "Ensure clock is always running\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ALWAYSRUN_A {
+    #[doc = "0: Use automatic clock control"]
+    AUTOMATIC = 0,
+    #[doc = "1: Ensure clock is always running"]
+    ALWAYS_RUN = 1,
+}
+impl From<ALWAYSRUN_A> for bool {
+    #[inline(always)]
+    fn from(variant: ALWAYSRUN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ALWAYSRUN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ALWAYSRUN_A {
+        match self.bits {
+            false => ALWAYSRUN_A::AUTOMATIC,
+            true => ALWAYSRUN_A::ALWAYS_RUN,
+        }
+    }
+    #[doc = "Checks if the value of the field is `AUTOMATIC`"]
+    #[inline(always)]
+    pub fn is_automatic(&self) -> bool {
+        *self == ALWAYSRUN_A::AUTOMATIC
+    }
+    #[doc = "Checks if the value of the field is `ALWAYS_RUN`"]
+    #[inline(always)]
+    pub fn is_always_run(&self) -> bool {
+        *self == ALWAYSRUN_A::ALWAYS_RUN
+    }
+}
+#[doc = "Field `ALWAYSRUN` writer - Ensure clock is always running"]
+pub type ALWAYSRUN_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, HFCLKAUDIOALWAYSRUN_SPEC, ALWAYSRUN_A, O>;
+impl<'a, const O: u8> ALWAYSRUN_W<'a, O> {
+    #[doc = "Use automatic clock control"]
+    #[inline(always)]
+    pub fn automatic(self) -> &'a mut W {
+        self.variant(ALWAYSRUN_A::AUTOMATIC)
+    }
+    #[doc = "Ensure clock is always running"]
+    #[inline(always)]
+    pub fn always_run(self) -> &'a mut W {
+        self.variant(ALWAYSRUN_A::ALWAYS_RUN)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Ensure clock is always running"]
+    #[inline(always)]
+    pub fn alwaysrun(&self) -> ALWAYSRUN_R {
+        ALWAYSRUN_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Ensure clock is always running"]
+    #[inline(always)]
+    pub fn alwaysrun(&mut self) -> ALWAYSRUN_W<0> {
+        ALWAYSRUN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Automatic or manual control of HFCLKAUDIO\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclkaudioalwaysrun](index.html) module"]
+pub struct HFCLKAUDIOALWAYSRUN_SPEC;
+impl crate::RegisterSpec for HFCLKAUDIOALWAYSRUN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfclkaudioalwaysrun::R](R) reader structure"]
+impl crate::Readable for HFCLKAUDIOALWAYSRUN_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [hfclkaudioalwaysrun::W](W) writer structure"]
+impl crate::Writable for HFCLKAUDIOALWAYSRUN_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets HFCLKAUDIOALWAYSRUN to value 0"]
+impl crate::Resettable for HFCLKAUDIOALWAYSRUN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/hfclkaudiorun.rs

@@ -0,0 +1,74 @@
+#[doc = "Register `HFCLKAUDIORUN` reader"]
+pub struct R(crate::R<HFCLKAUDIORUN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFCLKAUDIORUN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFCLKAUDIORUN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFCLKAUDIORUN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `STATUS` reader - HFCLKAUDIOSTART task triggered or not"]
+pub type STATUS_R = crate::BitReader<STATUS_A>;
+#[doc = "HFCLKAUDIOSTART task triggered or not\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STATUS_A {
+    #[doc = "0: Task not triggered"]
+    NOT_TRIGGERED = 0,
+    #[doc = "1: Task triggered"]
+    TRIGGERED = 1,
+}
+impl From<STATUS_A> for bool {
+    #[inline(always)]
+    fn from(variant: STATUS_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STATUS_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STATUS_A {
+        match self.bits {
+            false => STATUS_A::NOT_TRIGGERED,
+            true => STATUS_A::TRIGGERED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_TRIGGERED`"]
+    #[inline(always)]
+    pub fn is_not_triggered(&self) -> bool {
+        *self == STATUS_A::NOT_TRIGGERED
+    }
+    #[doc = "Checks if the value of the field is `TRIGGERED`"]
+    #[inline(always)]
+    pub fn is_triggered(&self) -> bool {
+        *self == STATUS_A::TRIGGERED
+    }
+}
+impl R {
+    #[doc = "Bit 0 - HFCLKAUDIOSTART task triggered or not"]
+    #[inline(always)]
+    pub fn status(&self) -> STATUS_R {
+        STATUS_R::new((self.bits & 1) != 0)
+    }
+}
+#[doc = "Status indicating that HFCLKAUDIOSTART task has been triggered\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclkaudiorun](index.html) module"]
+pub struct HFCLKAUDIORUN_SPEC;
+impl crate::RegisterSpec for HFCLKAUDIORUN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfclkaudiorun::R](R) reader structure"]
+impl crate::Readable for HFCLKAUDIORUN_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets HFCLKAUDIORUN to value 0"]
+impl crate::Resettable for HFCLKAUDIORUN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/hfclkaudiostat.rs

@@ -0,0 +1,115 @@
+#[doc = "Register `HFCLKAUDIOSTAT` reader"]
+pub struct R(crate::R<HFCLKAUDIOSTAT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFCLKAUDIOSTAT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFCLKAUDIOSTAT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFCLKAUDIOSTAT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `ALWAYSRUNNING` reader - ALWAYSRUN activated"]
+pub type ALWAYSRUNNING_R = crate::BitReader<ALWAYSRUNNING_A>;
+#[doc = "ALWAYSRUN activated\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ALWAYSRUNNING_A {
+    #[doc = "0: Automatic clock control enabled"]
+    NOT_RUNNING = 0,
+    #[doc = "1: Oscillator is always running"]
+    RUNNING = 1,
+}
+impl From<ALWAYSRUNNING_A> for bool {
+    #[inline(always)]
+    fn from(variant: ALWAYSRUNNING_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ALWAYSRUNNING_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ALWAYSRUNNING_A {
+        match self.bits {
+            false => ALWAYSRUNNING_A::NOT_RUNNING,
+            true => ALWAYSRUNNING_A::RUNNING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_RUNNING`"]
+    #[inline(always)]
+    pub fn is_not_running(&self) -> bool {
+        *self == ALWAYSRUNNING_A::NOT_RUNNING
+    }
+    #[doc = "Checks if the value of the field is `RUNNING`"]
+    #[inline(always)]
+    pub fn is_running(&self) -> bool {
+        *self == ALWAYSRUNNING_A::RUNNING
+    }
+}
+#[doc = "Field `STATE` reader - HFCLKAUDIO state"]
+pub type STATE_R = crate::BitReader<STATE_A>;
+#[doc = "HFCLKAUDIO state\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STATE_A {
+    #[doc = "0: HFCLKAUDIO not running"]
+    NOT_RUNNING = 0,
+    #[doc = "1: HFCLKAUDIO running"]
+    RUNNING = 1,
+}
+impl From<STATE_A> for bool {
+    #[inline(always)]
+    fn from(variant: STATE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STATE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STATE_A {
+        match self.bits {
+            false => STATE_A::NOT_RUNNING,
+            true => STATE_A::RUNNING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_RUNNING`"]
+    #[inline(always)]
+    pub fn is_not_running(&self) -> bool {
+        *self == STATE_A::NOT_RUNNING
+    }
+    #[doc = "Checks if the value of the field is `RUNNING`"]
+    #[inline(always)]
+    pub fn is_running(&self) -> bool {
+        *self == STATE_A::RUNNING
+    }
+}
+impl R {
+    #[doc = "Bit 4 - ALWAYSRUN activated"]
+    #[inline(always)]
+    pub fn alwaysrunning(&self) -> ALWAYSRUNNING_R {
+        ALWAYSRUNNING_R::new(((self.bits >> 4) & 1) != 0)
+    }
+    #[doc = "Bit 16 - HFCLKAUDIO state"]
+    #[inline(always)]
+    pub fn state(&self) -> STATE_R {
+        STATE_R::new(((self.bits >> 16) & 1) != 0)
+    }
+}
+#[doc = "Status indicating which HFCLKAUDIO source is running\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclkaudiostat](index.html) module"]
+pub struct HFCLKAUDIOSTAT_SPEC;
+impl crate::RegisterSpec for HFCLKAUDIOSTAT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfclkaudiostat::R](R) reader structure"]
+impl crate::Readable for HFCLKAUDIOSTAT_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets HFCLKAUDIOSTAT to value 0"]
+impl crate::Resettable for HFCLKAUDIOSTAT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/hfclkctrl.rs

@@ -0,0 +1,128 @@
+#[doc = "Register `HFCLKCTRL` reader"]
+pub struct R(crate::R<HFCLKCTRL_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFCLKCTRL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFCLKCTRL_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFCLKCTRL_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `HFCLKCTRL` writer"]
+pub struct W(crate::W<HFCLKCTRL_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<HFCLKCTRL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<HFCLKCTRL_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<HFCLKCTRL_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `HCLK` reader - High frequency clock HCLK"]
+pub type HCLK_R = crate::FieldReader<u8, HCLK_A>;
+#[doc = "High frequency clock HCLK\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum HCLK_A {
+    #[doc = "0: Divide HFCLK by 1"]
+    DIV1 = 0,
+    #[doc = "1: Divide HFCLK by 2"]
+    DIV2 = 1,
+}
+impl From<HCLK_A> for u8 {
+    #[inline(always)]
+    fn from(variant: HCLK_A) -> Self {
+        variant as _
+    }
+}
+impl HCLK_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<HCLK_A> {
+        match self.bits {
+            0 => Some(HCLK_A::DIV1),
+            1 => Some(HCLK_A::DIV2),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DIV1`"]
+    #[inline(always)]
+    pub fn is_div1(&self) -> bool {
+        *self == HCLK_A::DIV1
+    }
+    #[doc = "Checks if the value of the field is `DIV2`"]
+    #[inline(always)]
+    pub fn is_div2(&self) -> bool {
+        *self == HCLK_A::DIV2
+    }
+}
+#[doc = "Field `HCLK` writer - High frequency clock HCLK"]
+pub type HCLK_W<'a, const O: u8> = crate::FieldWriter<'a, u32, HFCLKCTRL_SPEC, u8, HCLK_A, 2, O>;
+impl<'a, const O: u8> HCLK_W<'a, O> {
+    #[doc = "Divide HFCLK by 1"]
+    #[inline(always)]
+    pub fn div1(self) -> &'a mut W {
+        self.variant(HCLK_A::DIV1)
+    }
+    #[doc = "Divide HFCLK by 2"]
+    #[inline(always)]
+    pub fn div2(self) -> &'a mut W {
+        self.variant(HCLK_A::DIV2)
+    }
+}
+impl R {
+    #[doc = "Bits 0:1 - High frequency clock HCLK"]
+    #[inline(always)]
+    pub fn hclk(&self) -> HCLK_R {
+        HCLK_R::new((self.bits & 3) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:1 - High frequency clock HCLK"]
+    #[inline(always)]
+    pub fn hclk(&mut self) -> HCLK_W<0> {
+        HCLK_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "HFCLK128M frequency configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclkctrl](index.html) module"]
+pub struct HFCLKCTRL_SPEC;
+impl crate::RegisterSpec for HFCLKCTRL_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfclkctrl::R](R) reader structure"]
+impl crate::Readable for HFCLKCTRL_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [hfclkctrl::W](W) writer structure"]
+impl crate::Writable for HFCLKCTRL_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets HFCLKCTRL to value 0x01"]
+impl crate::Resettable for HFCLKCTRL_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x01
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/hfclkrun.rs

@@ -0,0 +1,74 @@
+#[doc = "Register `HFCLKRUN` reader"]
+pub struct R(crate::R<HFCLKRUN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFCLKRUN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFCLKRUN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFCLKRUN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `STATUS` reader - HFCLKSTART task triggered or not"]
+pub type STATUS_R = crate::BitReader<STATUS_A>;
+#[doc = "HFCLKSTART task triggered or not\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STATUS_A {
+    #[doc = "0: Task not triggered"]
+    NOT_TRIGGERED = 0,
+    #[doc = "1: Task triggered"]
+    TRIGGERED = 1,
+}
+impl From<STATUS_A> for bool {
+    #[inline(always)]
+    fn from(variant: STATUS_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STATUS_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STATUS_A {
+        match self.bits {
+            false => STATUS_A::NOT_TRIGGERED,
+            true => STATUS_A::TRIGGERED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_TRIGGERED`"]
+    #[inline(always)]
+    pub fn is_not_triggered(&self) -> bool {
+        *self == STATUS_A::NOT_TRIGGERED
+    }
+    #[doc = "Checks if the value of the field is `TRIGGERED`"]
+    #[inline(always)]
+    pub fn is_triggered(&self) -> bool {
+        *self == STATUS_A::TRIGGERED
+    }
+}
+impl R {
+    #[doc = "Bit 0 - HFCLKSTART task triggered or not"]
+    #[inline(always)]
+    pub fn status(&self) -> STATUS_R {
+        STATUS_R::new((self.bits & 1) != 0)
+    }
+}
+#[doc = "Status indicating that HFCLKSTART task has been triggered\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclkrun](index.html) module"]
+pub struct HFCLKRUN_SPEC;
+impl crate::RegisterSpec for HFCLKRUN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfclkrun::R](R) reader structure"]
+impl crate::Readable for HFCLKRUN_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets HFCLKRUN to value 0"]
+impl crate::Resettable for HFCLKRUN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/hfclksrc.rs

@@ -0,0 +1,126 @@
+#[doc = "Register `HFCLKSRC` reader"]
+pub struct R(crate::R<HFCLKSRC_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFCLKSRC_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFCLKSRC_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFCLKSRC_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `HFCLKSRC` writer"]
+pub struct W(crate::W<HFCLKSRC_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<HFCLKSRC_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<HFCLKSRC_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<HFCLKSRC_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `SRC` reader - Select which HFCLK source is started by the HFCLKSTART task"]
+pub type SRC_R = crate::BitReader<SRC_A>;
+#[doc = "Select which HFCLK source is started by the HFCLKSTART task\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SRC_A {
+    #[doc = "0: HFCLKSTART task starts HFINT oscillator"]
+    HFINT = 0,
+    #[doc = "1: HFCLKSTART task starts HFXO oscillator"]
+    HFXO = 1,
+}
+impl From<SRC_A> for bool {
+    #[inline(always)]
+    fn from(variant: SRC_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl SRC_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> SRC_A {
+        match self.bits {
+            false => SRC_A::HFINT,
+            true => SRC_A::HFXO,
+        }
+    }
+    #[doc = "Checks if the value of the field is `HFINT`"]
+    #[inline(always)]
+    pub fn is_hfint(&self) -> bool {
+        *self == SRC_A::HFINT
+    }
+    #[doc = "Checks if the value of the field is `HFXO`"]
+    #[inline(always)]
+    pub fn is_hfxo(&self) -> bool {
+        *self == SRC_A::HFXO
+    }
+}
+#[doc = "Field `SRC` writer - Select which HFCLK source is started by the HFCLKSTART task"]
+pub type SRC_W<'a, const O: u8> = crate::BitWriter<'a, u32, HFCLKSRC_SPEC, SRC_A, O>;
+impl<'a, const O: u8> SRC_W<'a, O> {
+    #[doc = "HFCLKSTART task starts HFINT oscillator"]
+    #[inline(always)]
+    pub fn hfint(self) -> &'a mut W {
+        self.variant(SRC_A::HFINT)
+    }
+    #[doc = "HFCLKSTART task starts HFXO oscillator"]
+    #[inline(always)]
+    pub fn hfxo(self) -> &'a mut W {
+        self.variant(SRC_A::HFXO)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Select which HFCLK source is started by the HFCLKSTART task"]
+    #[inline(always)]
+    pub fn src(&self) -> SRC_R {
+        SRC_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Select which HFCLK source is started by the HFCLKSTART task"]
+    #[inline(always)]
+    pub fn src(&mut self) -> SRC_W<0> {
+        SRC_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Clock source for HFCLK128M/HFCLK64M\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclksrc](index.html) module"]
+pub struct HFCLKSRC_SPEC;
+impl crate::RegisterSpec for HFCLKSRC_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfclksrc::R](R) reader structure"]
+impl crate::Readable for HFCLKSRC_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [hfclksrc::W](W) writer structure"]
+impl crate::Writable for HFCLKSRC_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets HFCLKSRC to value 0x01"]
+impl crate::Resettable for HFCLKSRC_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x01
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/hfclkstat.rs

@@ -0,0 +1,156 @@
+#[doc = "Register `HFCLKSTAT` reader"]
+pub struct R(crate::R<HFCLKSTAT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFCLKSTAT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFCLKSTAT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFCLKSTAT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `SRC` reader - Active clock source"]
+pub type SRC_R = crate::BitReader<SRC_A>;
+#[doc = "Active clock source\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SRC_A {
+    #[doc = "0: Clock source: HFINT - 128 MHz on-chip oscillator"]
+    HFINT = 0,
+    #[doc = "1: Clock source: HFXO - 128 MHz clock derived from external 32 MHz crystal oscillator"]
+    HFXO = 1,
+}
+impl From<SRC_A> for bool {
+    #[inline(always)]
+    fn from(variant: SRC_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl SRC_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> SRC_A {
+        match self.bits {
+            false => SRC_A::HFINT,
+            true => SRC_A::HFXO,
+        }
+    }
+    #[doc = "Checks if the value of the field is `HFINT`"]
+    #[inline(always)]
+    pub fn is_hfint(&self) -> bool {
+        *self == SRC_A::HFINT
+    }
+    #[doc = "Checks if the value of the field is `HFXO`"]
+    #[inline(always)]
+    pub fn is_hfxo(&self) -> bool {
+        *self == SRC_A::HFXO
+    }
+}
+#[doc = "Field `ALWAYSRUNNING` reader - ALWAYSRUN activated"]
+pub type ALWAYSRUNNING_R = crate::BitReader<ALWAYSRUNNING_A>;
+#[doc = "ALWAYSRUN activated\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ALWAYSRUNNING_A {
+    #[doc = "0: Automatic clock control enabled"]
+    NOT_RUNNING = 0,
+    #[doc = "1: Oscillator is always running"]
+    RUNNING = 1,
+}
+impl From<ALWAYSRUNNING_A> for bool {
+    #[inline(always)]
+    fn from(variant: ALWAYSRUNNING_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ALWAYSRUNNING_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ALWAYSRUNNING_A {
+        match self.bits {
+            false => ALWAYSRUNNING_A::NOT_RUNNING,
+            true => ALWAYSRUNNING_A::RUNNING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_RUNNING`"]
+    #[inline(always)]
+    pub fn is_not_running(&self) -> bool {
+        *self == ALWAYSRUNNING_A::NOT_RUNNING
+    }
+    #[doc = "Checks if the value of the field is `RUNNING`"]
+    #[inline(always)]
+    pub fn is_running(&self) -> bool {
+        *self == ALWAYSRUNNING_A::RUNNING
+    }
+}
+#[doc = "Field `STATE` reader - HFCLK state"]
+pub type STATE_R = crate::BitReader<STATE_A>;
+#[doc = "HFCLK state\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STATE_A {
+    #[doc = "0: HFCLK not running"]
+    NOT_RUNNING = 0,
+    #[doc = "1: HFCLK running"]
+    RUNNING = 1,
+}
+impl From<STATE_A> for bool {
+    #[inline(always)]
+    fn from(variant: STATE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STATE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STATE_A {
+        match self.bits {
+            false => STATE_A::NOT_RUNNING,
+            true => STATE_A::RUNNING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_RUNNING`"]
+    #[inline(always)]
+    pub fn is_not_running(&self) -> bool {
+        *self == STATE_A::NOT_RUNNING
+    }
+    #[doc = "Checks if the value of the field is `RUNNING`"]
+    #[inline(always)]
+    pub fn is_running(&self) -> bool {
+        *self == STATE_A::RUNNING
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Active clock source"]
+    #[inline(always)]
+    pub fn src(&self) -> SRC_R {
+        SRC_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 4 - ALWAYSRUN activated"]
+    #[inline(always)]
+    pub fn alwaysrunning(&self) -> ALWAYSRUNNING_R {
+        ALWAYSRUNNING_R::new(((self.bits >> 4) & 1) != 0)
+    }
+    #[doc = "Bit 16 - HFCLK state"]
+    #[inline(always)]
+    pub fn state(&self) -> STATE_R {
+        STATE_R::new(((self.bits >> 16) & 1) != 0)
+    }
+}
+#[doc = "Status indicating which HFCLK128M/HFCLK64M source is running This register value in any CLOCK instance reflects status only due to configurations/actions in that CLOCK instance.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclkstat](index.html) module"]
+pub struct HFCLKSTAT_SPEC;
+impl crate::RegisterSpec for HFCLKSTAT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfclkstat::R](R) reader structure"]
+impl crate::Readable for HFCLKSTAT_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets HFCLKSTAT to value 0"]
+impl crate::Resettable for HFCLKSTAT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/inten.rs

@@ -0,0 +1,368 @@
+#[doc = "Register `INTEN` reader"]
+pub struct R(crate::R<INTEN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTEN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTEN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTEN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTEN` writer"]
+pub struct W(crate::W<INTEN_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTEN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTEN_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTEN_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `HFCLKSTARTED` reader - Enable or disable interrupt for event HFCLKSTARTED"]
+pub type HFCLKSTARTED_R = crate::BitReader<HFCLKSTARTED_A>;
+#[doc = "Enable or disable interrupt for event HFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLKSTARTED_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "1: Enable"]
+    ENABLED = 1,
+}
+impl From<HFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl HFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> HFCLKSTARTED_A {
+        match self.bits {
+            false => HFCLKSTARTED_A::DISABLED,
+            true => HFCLKSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == HFCLKSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == HFCLKSTARTED_A::ENABLED
+    }
+}
+#[doc = "Field `HFCLKSTARTED` writer - Enable or disable interrupt for event HFCLKSTARTED"]
+pub type HFCLKSTARTED_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, HFCLKSTARTED_A, O>;
+impl<'a, const O: u8> HFCLKSTARTED_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(HFCLKSTARTED_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(HFCLKSTARTED_A::ENABLED)
+    }
+}
+#[doc = "Field `LFCLKSTARTED` reader - Enable or disable interrupt for event LFCLKSTARTED"]
+pub type LFCLKSTARTED_R = crate::BitReader<LFCLKSTARTED_A>;
+#[doc = "Enable or disable interrupt for event LFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum LFCLKSTARTED_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "1: Enable"]
+    ENABLED = 1,
+}
+impl From<LFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: LFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl LFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> LFCLKSTARTED_A {
+        match self.bits {
+            false => LFCLKSTARTED_A::DISABLED,
+            true => LFCLKSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == LFCLKSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == LFCLKSTARTED_A::ENABLED
+    }
+}
+#[doc = "Field `LFCLKSTARTED` writer - Enable or disable interrupt for event LFCLKSTARTED"]
+pub type LFCLKSTARTED_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, LFCLKSTARTED_A, O>;
+impl<'a, const O: u8> LFCLKSTARTED_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(LFCLKSTARTED_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(LFCLKSTARTED_A::ENABLED)
+    }
+}
+#[doc = "Field `DONE` reader - Enable or disable interrupt for event DONE"]
+pub type DONE_R = crate::BitReader<DONE_A>;
+#[doc = "Enable or disable interrupt for event DONE\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum DONE_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "1: Enable"]
+    ENABLED = 1,
+}
+impl From<DONE_A> for bool {
+    #[inline(always)]
+    fn from(variant: DONE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl DONE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DONE_A {
+        match self.bits {
+            false => DONE_A::DISABLED,
+            true => DONE_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == DONE_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == DONE_A::ENABLED
+    }
+}
+#[doc = "Field `DONE` writer - Enable or disable interrupt for event DONE"]
+pub type DONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, DONE_A, O>;
+impl<'a, const O: u8> DONE_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(DONE_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(DONE_A::ENABLED)
+    }
+}
+#[doc = "Field `HFCLKAUDIOSTARTED` reader - Enable or disable interrupt for event HFCLKAUDIOSTARTED"]
+pub type HFCLKAUDIOSTARTED_R = crate::BitReader<HFCLKAUDIOSTARTED_A>;
+#[doc = "Enable or disable interrupt for event HFCLKAUDIOSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLKAUDIOSTARTED_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "1: Enable"]
+    ENABLED = 1,
+}
+impl From<HFCLKAUDIOSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKAUDIOSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl HFCLKAUDIOSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> HFCLKAUDIOSTARTED_A {
+        match self.bits {
+            false => HFCLKAUDIOSTARTED_A::DISABLED,
+            true => HFCLKAUDIOSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == HFCLKAUDIOSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == HFCLKAUDIOSTARTED_A::ENABLED
+    }
+}
+#[doc = "Field `HFCLKAUDIOSTARTED` writer - Enable or disable interrupt for event HFCLKAUDIOSTARTED"]
+pub type HFCLKAUDIOSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTEN_SPEC, HFCLKAUDIOSTARTED_A, O>;
+impl<'a, const O: u8> HFCLKAUDIOSTARTED_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(HFCLKAUDIOSTARTED_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(HFCLKAUDIOSTARTED_A::ENABLED)
+    }
+}
+#[doc = "Field `HFCLK192MSTARTED` reader - Enable or disable interrupt for event HFCLK192MSTARTED"]
+pub type HFCLK192MSTARTED_R = crate::BitReader<HFCLK192MSTARTED_A>;
+#[doc = "Enable or disable interrupt for event HFCLK192MSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLK192MSTARTED_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "1: Enable"]
+    ENABLED = 1,
+}
+impl From<HFCLK192MSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLK192MSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl HFCLK192MSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> HFCLK192MSTARTED_A {
+        match self.bits {
+            false => HFCLK192MSTARTED_A::DISABLED,
+            true => HFCLK192MSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == HFCLK192MSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == HFCLK192MSTARTED_A::ENABLED
+    }
+}
+#[doc = "Field `HFCLK192MSTARTED` writer - Enable or disable interrupt for event HFCLK192MSTARTED"]
+pub type HFCLK192MSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTEN_SPEC, HFCLK192MSTARTED_A, O>;
+impl<'a, const O: u8> HFCLK192MSTARTED_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(HFCLK192MSTARTED_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(HFCLK192MSTARTED_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Enable or disable interrupt for event HFCLKSTARTED"]
+    #[inline(always)]
+    pub fn hfclkstarted(&self) -> HFCLKSTARTED_R {
+        HFCLKSTARTED_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Enable or disable interrupt for event LFCLKSTARTED"]
+    #[inline(always)]
+    pub fn lfclkstarted(&self) -> LFCLKSTARTED_R {
+        LFCLKSTARTED_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 7 - Enable or disable interrupt for event DONE"]
+    #[inline(always)]
+    pub fn done(&self) -> DONE_R {
+        DONE_R::new(((self.bits >> 7) & 1) != 0)
+    }
+    #[doc = "Bit 8 - Enable or disable interrupt for event HFCLKAUDIOSTARTED"]
+    #[inline(always)]
+    pub fn hfclkaudiostarted(&self) -> HFCLKAUDIOSTARTED_R {
+        HFCLKAUDIOSTARTED_R::new(((self.bits >> 8) & 1) != 0)
+    }
+    #[doc = "Bit 9 - Enable or disable interrupt for event HFCLK192MSTARTED"]
+    #[inline(always)]
+    pub fn hfclk192mstarted(&self) -> HFCLK192MSTARTED_R {
+        HFCLK192MSTARTED_R::new(((self.bits >> 9) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Enable or disable interrupt for event HFCLKSTARTED"]
+    #[inline(always)]
+    pub fn hfclkstarted(&mut self) -> HFCLKSTARTED_W<0> {
+        HFCLKSTARTED_W::new(self)
+    }
+    #[doc = "Bit 1 - Enable or disable interrupt for event LFCLKSTARTED"]
+    #[inline(always)]
+    pub fn lfclkstarted(&mut self) -> LFCLKSTARTED_W<1> {
+        LFCLKSTARTED_W::new(self)
+    }
+    #[doc = "Bit 7 - Enable or disable interrupt for event DONE"]
+    #[inline(always)]
+    pub fn done(&mut self) -> DONE_W<7> {
+        DONE_W::new(self)
+    }
+    #[doc = "Bit 8 - Enable or disable interrupt for event HFCLKAUDIOSTARTED"]
+    #[inline(always)]
+    pub fn hfclkaudiostarted(&mut self) -> HFCLKAUDIOSTARTED_W<8> {
+        HFCLKAUDIOSTARTED_W::new(self)
+    }
+    #[doc = "Bit 9 - Enable or disable interrupt for event HFCLK192MSTARTED"]
+    #[inline(always)]
+    pub fn hfclk192mstarted(&mut self) -> HFCLK192MSTARTED_W<9> {
+        HFCLK192MSTARTED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Enable or disable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [inten](index.html) module"]
+pub struct INTEN_SPEC;
+impl crate::RegisterSpec for INTEN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [inten::R](R) reader structure"]
+impl crate::Readable for INTEN_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [inten::W](W) writer structure"]
+impl crate::Writable for INTEN_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTEN to value 0"]
+impl crate::Resettable for INTEN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/intenclr.rs

@@ -0,0 +1,405 @@
+#[doc = "Register `INTENCLR` reader"]
+pub struct R(crate::R<INTENCLR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENCLR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENCLR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENCLR` writer"]
+pub struct W(crate::W<INTENCLR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENCLR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENCLR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `HFCLKSTARTED` reader - Write '1' to disable interrupt for event HFCLKSTARTED"]
+pub type HFCLKSTARTED_R = crate::BitReader<HFCLKSTARTED_A>;
+#[doc = "Write '1' to disable interrupt for event HFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLKSTARTED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<HFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl HFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> HFCLKSTARTED_A {
+        match self.bits {
+            false => HFCLKSTARTED_A::DISABLED,
+            true => HFCLKSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == HFCLKSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == HFCLKSTARTED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event HFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLKSTARTED_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<HFCLKSTARTED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKSTARTED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `HFCLKSTARTED` writer - Write '1' to disable interrupt for event HFCLKSTARTED"]
+pub type HFCLKSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENCLR_SPEC, HFCLKSTARTED_AW, O>;
+impl<'a, const O: u8> HFCLKSTARTED_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(HFCLKSTARTED_AW::CLEAR)
+    }
+}
+#[doc = "Field `LFCLKSTARTED` reader - Write '1' to disable interrupt for event LFCLKSTARTED"]
+pub type LFCLKSTARTED_R = crate::BitReader<LFCLKSTARTED_A>;
+#[doc = "Write '1' to disable interrupt for event LFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum LFCLKSTARTED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<LFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: LFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl LFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> LFCLKSTARTED_A {
+        match self.bits {
+            false => LFCLKSTARTED_A::DISABLED,
+            true => LFCLKSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == LFCLKSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == LFCLKSTARTED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event LFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum LFCLKSTARTED_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<LFCLKSTARTED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: LFCLKSTARTED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `LFCLKSTARTED` writer - Write '1' to disable interrupt for event LFCLKSTARTED"]
+pub type LFCLKSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENCLR_SPEC, LFCLKSTARTED_AW, O>;
+impl<'a, const O: u8> LFCLKSTARTED_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(LFCLKSTARTED_AW::CLEAR)
+    }
+}
+#[doc = "Field `DONE` reader - Write '1' to disable interrupt for event DONE"]
+pub type DONE_R = crate::BitReader<DONE_A>;
+#[doc = "Write '1' to disable interrupt for event DONE\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum DONE_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<DONE_A> for bool {
+    #[inline(always)]
+    fn from(variant: DONE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl DONE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DONE_A {
+        match self.bits {
+            false => DONE_A::DISABLED,
+            true => DONE_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == DONE_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == DONE_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event DONE\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum DONE_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<DONE_AW> for bool {
+    #[inline(always)]
+    fn from(variant: DONE_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `DONE` writer - Write '1' to disable interrupt for event DONE"]
+pub type DONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, DONE_AW, O>;
+impl<'a, const O: u8> DONE_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(DONE_AW::CLEAR)
+    }
+}
+#[doc = "Field `HFCLKAUDIOSTARTED` reader - Write '1' to disable interrupt for event HFCLKAUDIOSTARTED"]
+pub type HFCLKAUDIOSTARTED_R = crate::BitReader<HFCLKAUDIOSTARTED_A>;
+#[doc = "Write '1' to disable interrupt for event HFCLKAUDIOSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLKAUDIOSTARTED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<HFCLKAUDIOSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKAUDIOSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl HFCLKAUDIOSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> HFCLKAUDIOSTARTED_A {
+        match self.bits {
+            false => HFCLKAUDIOSTARTED_A::DISABLED,
+            true => HFCLKAUDIOSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == HFCLKAUDIOSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == HFCLKAUDIOSTARTED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event HFCLKAUDIOSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLKAUDIOSTARTED_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<HFCLKAUDIOSTARTED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKAUDIOSTARTED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `HFCLKAUDIOSTARTED` writer - Write '1' to disable interrupt for event HFCLKAUDIOSTARTED"]
+pub type HFCLKAUDIOSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENCLR_SPEC, HFCLKAUDIOSTARTED_AW, O>;
+impl<'a, const O: u8> HFCLKAUDIOSTARTED_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(HFCLKAUDIOSTARTED_AW::CLEAR)
+    }
+}
+#[doc = "Field `HFCLK192MSTARTED` reader - Write '1' to disable interrupt for event HFCLK192MSTARTED"]
+pub type HFCLK192MSTARTED_R = crate::BitReader<HFCLK192MSTARTED_A>;
+#[doc = "Write '1' to disable interrupt for event HFCLK192MSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLK192MSTARTED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<HFCLK192MSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLK192MSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl HFCLK192MSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> HFCLK192MSTARTED_A {
+        match self.bits {
+            false => HFCLK192MSTARTED_A::DISABLED,
+            true => HFCLK192MSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == HFCLK192MSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == HFCLK192MSTARTED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event HFCLK192MSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLK192MSTARTED_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<HFCLK192MSTARTED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLK192MSTARTED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `HFCLK192MSTARTED` writer - Write '1' to disable interrupt for event HFCLK192MSTARTED"]
+pub type HFCLK192MSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENCLR_SPEC, HFCLK192MSTARTED_AW, O>;
+impl<'a, const O: u8> HFCLK192MSTARTED_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(HFCLK192MSTARTED_AW::CLEAR)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Write '1' to disable interrupt for event HFCLKSTARTED"]
+    #[inline(always)]
+    pub fn hfclkstarted(&self) -> HFCLKSTARTED_R {
+        HFCLKSTARTED_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Write '1' to disable interrupt for event LFCLKSTARTED"]
+    #[inline(always)]
+    pub fn lfclkstarted(&self) -> LFCLKSTARTED_R {
+        LFCLKSTARTED_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 7 - Write '1' to disable interrupt for event DONE"]
+    #[inline(always)]
+    pub fn done(&self) -> DONE_R {
+        DONE_R::new(((self.bits >> 7) & 1) != 0)
+    }
+    #[doc = "Bit 8 - Write '1' to disable interrupt for event HFCLKAUDIOSTARTED"]
+    #[inline(always)]
+    pub fn hfclkaudiostarted(&self) -> HFCLKAUDIOSTARTED_R {
+        HFCLKAUDIOSTARTED_R::new(((self.bits >> 8) & 1) != 0)
+    }
+    #[doc = "Bit 9 - Write '1' to disable interrupt for event HFCLK192MSTARTED"]
+    #[inline(always)]
+    pub fn hfclk192mstarted(&self) -> HFCLK192MSTARTED_R {
+        HFCLK192MSTARTED_R::new(((self.bits >> 9) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Write '1' to disable interrupt for event HFCLKSTARTED"]
+    #[inline(always)]
+    pub fn hfclkstarted(&mut self) -> HFCLKSTARTED_W<0> {
+        HFCLKSTARTED_W::new(self)
+    }
+    #[doc = "Bit 1 - Write '1' to disable interrupt for event LFCLKSTARTED"]
+    #[inline(always)]
+    pub fn lfclkstarted(&mut self) -> LFCLKSTARTED_W<1> {
+        LFCLKSTARTED_W::new(self)
+    }
+    #[doc = "Bit 7 - Write '1' to disable interrupt for event DONE"]
+    #[inline(always)]
+    pub fn done(&mut self) -> DONE_W<7> {
+        DONE_W::new(self)
+    }
+    #[doc = "Bit 8 - Write '1' to disable interrupt for event HFCLKAUDIOSTARTED"]
+    #[inline(always)]
+    pub fn hfclkaudiostarted(&mut self) -> HFCLKAUDIOSTARTED_W<8> {
+        HFCLKAUDIOSTARTED_W::new(self)
+    }
+    #[doc = "Bit 9 - Write '1' to disable interrupt for event HFCLK192MSTARTED"]
+    #[inline(always)]
+    pub fn hfclk192mstarted(&mut self) -> HFCLK192MSTARTED_W<9> {
+        HFCLK192MSTARTED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Disable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"]
+pub struct INTENCLR_SPEC;
+impl crate::RegisterSpec for INTENCLR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [intenclr::R](R) reader structure"]
+impl crate::Readable for INTENCLR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"]
+impl crate::Writable for INTENCLR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTENCLR to value 0"]
+impl crate::Resettable for INTENCLR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/intenset.rs

@@ -0,0 +1,405 @@
+#[doc = "Register `INTENSET` reader"]
+pub struct R(crate::R<INTENSET_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENSET_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENSET_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENSET` writer"]
+pub struct W(crate::W<INTENSET_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENSET_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENSET_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `HFCLKSTARTED` reader - Write '1' to enable interrupt for event HFCLKSTARTED"]
+pub type HFCLKSTARTED_R = crate::BitReader<HFCLKSTARTED_A>;
+#[doc = "Write '1' to enable interrupt for event HFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLKSTARTED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<HFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl HFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> HFCLKSTARTED_A {
+        match self.bits {
+            false => HFCLKSTARTED_A::DISABLED,
+            true => HFCLKSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == HFCLKSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == HFCLKSTARTED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event HFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLKSTARTED_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<HFCLKSTARTED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKSTARTED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `HFCLKSTARTED` writer - Write '1' to enable interrupt for event HFCLKSTARTED"]
+pub type HFCLKSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENSET_SPEC, HFCLKSTARTED_AW, O>;
+impl<'a, const O: u8> HFCLKSTARTED_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(HFCLKSTARTED_AW::SET)
+    }
+}
+#[doc = "Field `LFCLKSTARTED` reader - Write '1' to enable interrupt for event LFCLKSTARTED"]
+pub type LFCLKSTARTED_R = crate::BitReader<LFCLKSTARTED_A>;
+#[doc = "Write '1' to enable interrupt for event LFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum LFCLKSTARTED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<LFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: LFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl LFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> LFCLKSTARTED_A {
+        match self.bits {
+            false => LFCLKSTARTED_A::DISABLED,
+            true => LFCLKSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == LFCLKSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == LFCLKSTARTED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event LFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum LFCLKSTARTED_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<LFCLKSTARTED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: LFCLKSTARTED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `LFCLKSTARTED` writer - Write '1' to enable interrupt for event LFCLKSTARTED"]
+pub type LFCLKSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENSET_SPEC, LFCLKSTARTED_AW, O>;
+impl<'a, const O: u8> LFCLKSTARTED_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(LFCLKSTARTED_AW::SET)
+    }
+}
+#[doc = "Field `DONE` reader - Write '1' to enable interrupt for event DONE"]
+pub type DONE_R = crate::BitReader<DONE_A>;
+#[doc = "Write '1' to enable interrupt for event DONE\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum DONE_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<DONE_A> for bool {
+    #[inline(always)]
+    fn from(variant: DONE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl DONE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DONE_A {
+        match self.bits {
+            false => DONE_A::DISABLED,
+            true => DONE_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == DONE_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == DONE_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event DONE\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum DONE_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<DONE_AW> for bool {
+    #[inline(always)]
+    fn from(variant: DONE_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `DONE` writer - Write '1' to enable interrupt for event DONE"]
+pub type DONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, DONE_AW, O>;
+impl<'a, const O: u8> DONE_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(DONE_AW::SET)
+    }
+}
+#[doc = "Field `HFCLKAUDIOSTARTED` reader - Write '1' to enable interrupt for event HFCLKAUDIOSTARTED"]
+pub type HFCLKAUDIOSTARTED_R = crate::BitReader<HFCLKAUDIOSTARTED_A>;
+#[doc = "Write '1' to enable interrupt for event HFCLKAUDIOSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLKAUDIOSTARTED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<HFCLKAUDIOSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKAUDIOSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl HFCLKAUDIOSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> HFCLKAUDIOSTARTED_A {
+        match self.bits {
+            false => HFCLKAUDIOSTARTED_A::DISABLED,
+            true => HFCLKAUDIOSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == HFCLKAUDIOSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == HFCLKAUDIOSTARTED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event HFCLKAUDIOSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLKAUDIOSTARTED_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<HFCLKAUDIOSTARTED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKAUDIOSTARTED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `HFCLKAUDIOSTARTED` writer - Write '1' to enable interrupt for event HFCLKAUDIOSTARTED"]
+pub type HFCLKAUDIOSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENSET_SPEC, HFCLKAUDIOSTARTED_AW, O>;
+impl<'a, const O: u8> HFCLKAUDIOSTARTED_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(HFCLKAUDIOSTARTED_AW::SET)
+    }
+}
+#[doc = "Field `HFCLK192MSTARTED` reader - Write '1' to enable interrupt for event HFCLK192MSTARTED"]
+pub type HFCLK192MSTARTED_R = crate::BitReader<HFCLK192MSTARTED_A>;
+#[doc = "Write '1' to enable interrupt for event HFCLK192MSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLK192MSTARTED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<HFCLK192MSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLK192MSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl HFCLK192MSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> HFCLK192MSTARTED_A {
+        match self.bits {
+            false => HFCLK192MSTARTED_A::DISABLED,
+            true => HFCLK192MSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == HFCLK192MSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == HFCLK192MSTARTED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event HFCLK192MSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLK192MSTARTED_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<HFCLK192MSTARTED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLK192MSTARTED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `HFCLK192MSTARTED` writer - Write '1' to enable interrupt for event HFCLK192MSTARTED"]
+pub type HFCLK192MSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENSET_SPEC, HFCLK192MSTARTED_AW, O>;
+impl<'a, const O: u8> HFCLK192MSTARTED_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(HFCLK192MSTARTED_AW::SET)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Write '1' to enable interrupt for event HFCLKSTARTED"]
+    #[inline(always)]
+    pub fn hfclkstarted(&self) -> HFCLKSTARTED_R {
+        HFCLKSTARTED_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Write '1' to enable interrupt for event LFCLKSTARTED"]
+    #[inline(always)]
+    pub fn lfclkstarted(&self) -> LFCLKSTARTED_R {
+        LFCLKSTARTED_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 7 - Write '1' to enable interrupt for event DONE"]
+    #[inline(always)]
+    pub fn done(&self) -> DONE_R {
+        DONE_R::new(((self.bits >> 7) & 1) != 0)
+    }
+    #[doc = "Bit 8 - Write '1' to enable interrupt for event HFCLKAUDIOSTARTED"]
+    #[inline(always)]
+    pub fn hfclkaudiostarted(&self) -> HFCLKAUDIOSTARTED_R {
+        HFCLKAUDIOSTARTED_R::new(((self.bits >> 8) & 1) != 0)
+    }
+    #[doc = "Bit 9 - Write '1' to enable interrupt for event HFCLK192MSTARTED"]
+    #[inline(always)]
+    pub fn hfclk192mstarted(&self) -> HFCLK192MSTARTED_R {
+        HFCLK192MSTARTED_R::new(((self.bits >> 9) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Write '1' to enable interrupt for event HFCLKSTARTED"]
+    #[inline(always)]
+    pub fn hfclkstarted(&mut self) -> HFCLKSTARTED_W<0> {
+        HFCLKSTARTED_W::new(self)
+    }
+    #[doc = "Bit 1 - Write '1' to enable interrupt for event LFCLKSTARTED"]
+    #[inline(always)]
+    pub fn lfclkstarted(&mut self) -> LFCLKSTARTED_W<1> {
+        LFCLKSTARTED_W::new(self)
+    }
+    #[doc = "Bit 7 - Write '1' to enable interrupt for event DONE"]
+    #[inline(always)]
+    pub fn done(&mut self) -> DONE_W<7> {
+        DONE_W::new(self)
+    }
+    #[doc = "Bit 8 - Write '1' to enable interrupt for event HFCLKAUDIOSTARTED"]
+    #[inline(always)]
+    pub fn hfclkaudiostarted(&mut self) -> HFCLKAUDIOSTARTED_W<8> {
+        HFCLKAUDIOSTARTED_W::new(self)
+    }
+    #[doc = "Bit 9 - Write '1' to enable interrupt for event HFCLK192MSTARTED"]
+    #[inline(always)]
+    pub fn hfclk192mstarted(&mut self) -> HFCLK192MSTARTED_W<9> {
+        HFCLK192MSTARTED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Enable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"]
+pub struct INTENSET_SPEC;
+impl crate::RegisterSpec for INTENSET_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [intenset::R](R) reader structure"]
+impl crate::Readable for INTENSET_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"]
+impl crate::Writable for INTENSET_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTENSET to value 0"]
+impl crate::Resettable for INTENSET_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/intpend.rs

@@ -0,0 +1,238 @@
+#[doc = "Register `INTPEND` reader"]
+pub struct R(crate::R<INTPEND_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTPEND_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTPEND_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTPEND_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `HFCLKSTARTED` reader - Read pending status of interrupt for event HFCLKSTARTED"]
+pub type HFCLKSTARTED_R = crate::BitReader<HFCLKSTARTED_A>;
+#[doc = "Read pending status of interrupt for event HFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLKSTARTED_A {
+    #[doc = "0: Read: Not pending"]
+    NOT_PENDING = 0,
+    #[doc = "1: Read: Pending"]
+    PENDING = 1,
+}
+impl From<HFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl HFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> HFCLKSTARTED_A {
+        match self.bits {
+            false => HFCLKSTARTED_A::NOT_PENDING,
+            true => HFCLKSTARTED_A::PENDING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_PENDING`"]
+    #[inline(always)]
+    pub fn is_not_pending(&self) -> bool {
+        *self == HFCLKSTARTED_A::NOT_PENDING
+    }
+    #[doc = "Checks if the value of the field is `PENDING`"]
+    #[inline(always)]
+    pub fn is_pending(&self) -> bool {
+        *self == HFCLKSTARTED_A::PENDING
+    }
+}
+#[doc = "Field `LFCLKSTARTED` reader - Read pending status of interrupt for event LFCLKSTARTED"]
+pub type LFCLKSTARTED_R = crate::BitReader<LFCLKSTARTED_A>;
+#[doc = "Read pending status of interrupt for event LFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum LFCLKSTARTED_A {
+    #[doc = "0: Read: Not pending"]
+    NOT_PENDING = 0,
+    #[doc = "1: Read: Pending"]
+    PENDING = 1,
+}
+impl From<LFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: LFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl LFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> LFCLKSTARTED_A {
+        match self.bits {
+            false => LFCLKSTARTED_A::NOT_PENDING,
+            true => LFCLKSTARTED_A::PENDING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_PENDING`"]
+    #[inline(always)]
+    pub fn is_not_pending(&self) -> bool {
+        *self == LFCLKSTARTED_A::NOT_PENDING
+    }
+    #[doc = "Checks if the value of the field is `PENDING`"]
+    #[inline(always)]
+    pub fn is_pending(&self) -> bool {
+        *self == LFCLKSTARTED_A::PENDING
+    }
+}
+#[doc = "Field `DONE` reader - Read pending status of interrupt for event DONE"]
+pub type DONE_R = crate::BitReader<DONE_A>;
+#[doc = "Read pending status of interrupt for event DONE\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum DONE_A {
+    #[doc = "0: Read: Not pending"]
+    NOT_PENDING = 0,
+    #[doc = "1: Read: Pending"]
+    PENDING = 1,
+}
+impl From<DONE_A> for bool {
+    #[inline(always)]
+    fn from(variant: DONE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl DONE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DONE_A {
+        match self.bits {
+            false => DONE_A::NOT_PENDING,
+            true => DONE_A::PENDING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_PENDING`"]
+    #[inline(always)]
+    pub fn is_not_pending(&self) -> bool {
+        *self == DONE_A::NOT_PENDING
+    }
+    #[doc = "Checks if the value of the field is `PENDING`"]
+    #[inline(always)]
+    pub fn is_pending(&self) -> bool {
+        *self == DONE_A::PENDING
+    }
+}
+#[doc = "Field `HFCLKAUDIOSTARTED` reader - Read pending status of interrupt for event HFCLKAUDIOSTARTED"]
+pub type HFCLKAUDIOSTARTED_R = crate::BitReader<HFCLKAUDIOSTARTED_A>;
+#[doc = "Read pending status of interrupt for event HFCLKAUDIOSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLKAUDIOSTARTED_A {
+    #[doc = "0: Read: Not pending"]
+    NOT_PENDING = 0,
+    #[doc = "1: Read: Pending"]
+    PENDING = 1,
+}
+impl From<HFCLKAUDIOSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKAUDIOSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl HFCLKAUDIOSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> HFCLKAUDIOSTARTED_A {
+        match self.bits {
+            false => HFCLKAUDIOSTARTED_A::NOT_PENDING,
+            true => HFCLKAUDIOSTARTED_A::PENDING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_PENDING`"]
+    #[inline(always)]
+    pub fn is_not_pending(&self) -> bool {
+        *self == HFCLKAUDIOSTARTED_A::NOT_PENDING
+    }
+    #[doc = "Checks if the value of the field is `PENDING`"]
+    #[inline(always)]
+    pub fn is_pending(&self) -> bool {
+        *self == HFCLKAUDIOSTARTED_A::PENDING
+    }
+}
+#[doc = "Field `HFCLK192MSTARTED` reader - Read pending status of interrupt for event HFCLK192MSTARTED"]
+pub type HFCLK192MSTARTED_R = crate::BitReader<HFCLK192MSTARTED_A>;
+#[doc = "Read pending status of interrupt for event HFCLK192MSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLK192MSTARTED_A {
+    #[doc = "0: Read: Not pending"]
+    NOT_PENDING = 0,
+    #[doc = "1: Read: Pending"]
+    PENDING = 1,
+}
+impl From<HFCLK192MSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLK192MSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl HFCLK192MSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> HFCLK192MSTARTED_A {
+        match self.bits {
+            false => HFCLK192MSTARTED_A::NOT_PENDING,
+            true => HFCLK192MSTARTED_A::PENDING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_PENDING`"]
+    #[inline(always)]
+    pub fn is_not_pending(&self) -> bool {
+        *self == HFCLK192MSTARTED_A::NOT_PENDING
+    }
+    #[doc = "Checks if the value of the field is `PENDING`"]
+    #[inline(always)]
+    pub fn is_pending(&self) -> bool {
+        *self == HFCLK192MSTARTED_A::PENDING
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Read pending status of interrupt for event HFCLKSTARTED"]
+    #[inline(always)]
+    pub fn hfclkstarted(&self) -> HFCLKSTARTED_R {
+        HFCLKSTARTED_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Read pending status of interrupt for event LFCLKSTARTED"]
+    #[inline(always)]
+    pub fn lfclkstarted(&self) -> LFCLKSTARTED_R {
+        LFCLKSTARTED_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 7 - Read pending status of interrupt for event DONE"]
+    #[inline(always)]
+    pub fn done(&self) -> DONE_R {
+        DONE_R::new(((self.bits >> 7) & 1) != 0)
+    }
+    #[doc = "Bit 8 - Read pending status of interrupt for event HFCLKAUDIOSTARTED"]
+    #[inline(always)]
+    pub fn hfclkaudiostarted(&self) -> HFCLKAUDIOSTARTED_R {
+        HFCLKAUDIOSTARTED_R::new(((self.bits >> 8) & 1) != 0)
+    }
+    #[doc = "Bit 9 - Read pending status of interrupt for event HFCLK192MSTARTED"]
+    #[inline(always)]
+    pub fn hfclk192mstarted(&self) -> HFCLK192MSTARTED_R {
+        HFCLK192MSTARTED_R::new(((self.bits >> 9) & 1) != 0)
+    }
+}
+#[doc = "Pending interrupts\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intpend](index.html) module"]
+pub struct INTPEND_SPEC;
+impl crate::RegisterSpec for INTPEND_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [intpend::R](R) reader structure"]
+impl crate::Readable for INTPEND_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets INTPEND to value 0"]
+impl crate::Resettable for INTPEND_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/lfclkalwaysrun.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `LFCLKALWAYSRUN` reader"]
+pub struct R(crate::R<LFCLKALWAYSRUN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<LFCLKALWAYSRUN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<LFCLKALWAYSRUN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<LFCLKALWAYSRUN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `LFCLKALWAYSRUN` writer"]
+pub struct W(crate::W<LFCLKALWAYSRUN_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<LFCLKALWAYSRUN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<LFCLKALWAYSRUN_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<LFCLKALWAYSRUN_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ALWAYSRUN` reader - Ensure clock is always running"]
+pub type ALWAYSRUN_R = crate::BitReader<ALWAYSRUN_A>;
+#[doc = "Ensure clock is always running\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ALWAYSRUN_A {
+    #[doc = "0: Use automatic clock control"]
+    AUTOMATIC = 0,
+    #[doc = "1: Ensure clock is always running"]
+    ALWAYS_RUN = 1,
+}
+impl From<ALWAYSRUN_A> for bool {
+    #[inline(always)]
+    fn from(variant: ALWAYSRUN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ALWAYSRUN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ALWAYSRUN_A {
+        match self.bits {
+            false => ALWAYSRUN_A::AUTOMATIC,
+            true => ALWAYSRUN_A::ALWAYS_RUN,
+        }
+    }
+    #[doc = "Checks if the value of the field is `AUTOMATIC`"]
+    #[inline(always)]
+    pub fn is_automatic(&self) -> bool {
+        *self == ALWAYSRUN_A::AUTOMATIC
+    }
+    #[doc = "Checks if the value of the field is `ALWAYS_RUN`"]
+    #[inline(always)]
+    pub fn is_always_run(&self) -> bool {
+        *self == ALWAYSRUN_A::ALWAYS_RUN
+    }
+}
+#[doc = "Field `ALWAYSRUN` writer - Ensure clock is always running"]
+pub type ALWAYSRUN_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, LFCLKALWAYSRUN_SPEC, ALWAYSRUN_A, O>;
+impl<'a, const O: u8> ALWAYSRUN_W<'a, O> {
+    #[doc = "Use automatic clock control"]
+    #[inline(always)]
+    pub fn automatic(self) -> &'a mut W {
+        self.variant(ALWAYSRUN_A::AUTOMATIC)
+    }
+    #[doc = "Ensure clock is always running"]
+    #[inline(always)]
+    pub fn always_run(self) -> &'a mut W {
+        self.variant(ALWAYSRUN_A::ALWAYS_RUN)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Ensure clock is always running"]
+    #[inline(always)]
+    pub fn alwaysrun(&self) -> ALWAYSRUN_R {
+        ALWAYSRUN_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Ensure clock is always running"]
+    #[inline(always)]
+    pub fn alwaysrun(&mut self) -> ALWAYSRUN_W<0> {
+        ALWAYSRUN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Automatic or manual control of LFCLK\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfclkalwaysrun](index.html) module"]
+pub struct LFCLKALWAYSRUN_SPEC;
+impl crate::RegisterSpec for LFCLKALWAYSRUN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [lfclkalwaysrun::R](R) reader structure"]
+impl crate::Readable for LFCLKALWAYSRUN_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [lfclkalwaysrun::W](W) writer structure"]
+impl crate::Writable for LFCLKALWAYSRUN_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets LFCLKALWAYSRUN to value 0"]
+impl crate::Resettable for LFCLKALWAYSRUN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/lfclkrun.rs

@@ -0,0 +1,74 @@
+#[doc = "Register `LFCLKRUN` reader"]
+pub struct R(crate::R<LFCLKRUN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<LFCLKRUN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<LFCLKRUN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<LFCLKRUN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `STATUS` reader - LFCLKSTART task triggered or not"]
+pub type STATUS_R = crate::BitReader<STATUS_A>;
+#[doc = "LFCLKSTART task triggered or not\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STATUS_A {
+    #[doc = "0: Task not triggered"]
+    NOT_TRIGGERED = 0,
+    #[doc = "1: Task triggered"]
+    TRIGGERED = 1,
+}
+impl From<STATUS_A> for bool {
+    #[inline(always)]
+    fn from(variant: STATUS_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STATUS_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STATUS_A {
+        match self.bits {
+            false => STATUS_A::NOT_TRIGGERED,
+            true => STATUS_A::TRIGGERED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_TRIGGERED`"]
+    #[inline(always)]
+    pub fn is_not_triggered(&self) -> bool {
+        *self == STATUS_A::NOT_TRIGGERED
+    }
+    #[doc = "Checks if the value of the field is `TRIGGERED`"]
+    #[inline(always)]
+    pub fn is_triggered(&self) -> bool {
+        *self == STATUS_A::TRIGGERED
+    }
+}
+impl R {
+    #[doc = "Bit 0 - LFCLKSTART task triggered or not"]
+    #[inline(always)]
+    pub fn status(&self) -> STATUS_R {
+        STATUS_R::new((self.bits & 1) != 0)
+    }
+}
+#[doc = "Status indicating that LFCLKSTART task has been triggered\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfclkrun](index.html) module"]
+pub struct LFCLKRUN_SPEC;
+impl crate::RegisterSpec for LFCLKRUN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [lfclkrun::R](R) reader structure"]
+impl crate::Readable for LFCLKRUN_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets LFCLKRUN to value 0"]
+impl crate::Resettable for LFCLKRUN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/lfclksrc.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `LFCLKSRC` reader"]
+pub struct R(crate::R<LFCLKSRC_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<LFCLKSRC_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<LFCLKSRC_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<LFCLKSRC_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `LFCLKSRC` writer"]
+pub struct W(crate::W<LFCLKSRC_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<LFCLKSRC_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<LFCLKSRC_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<LFCLKSRC_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `SRC` reader - Select which LFCLK source is started by the LFCLKSTART task"]
+pub type SRC_R = crate::FieldReader<u8, SRC_A>;
+#[doc = "Select which LFCLK source is started by the LFCLKSTART task\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum SRC_A {
+    #[doc = "1: 32.768 kHz RC oscillator"]
+    LFRC = 1,
+    #[doc = "2: 32.768 kHz crystal oscillator"]
+    LFXO = 2,
+    #[doc = "3: 32.768 kHz synthesized from HFCLK"]
+    LFSYNT = 3,
+}
+impl From<SRC_A> for u8 {
+    #[inline(always)]
+    fn from(variant: SRC_A) -> Self {
+        variant as _
+    }
+}
+impl SRC_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<SRC_A> {
+        match self.bits {
+            1 => Some(SRC_A::LFRC),
+            2 => Some(SRC_A::LFXO),
+            3 => Some(SRC_A::LFSYNT),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `LFRC`"]
+    #[inline(always)]
+    pub fn is_lfrc(&self) -> bool {
+        *self == SRC_A::LFRC
+    }
+    #[doc = "Checks if the value of the field is `LFXO`"]
+    #[inline(always)]
+    pub fn is_lfxo(&self) -> bool {
+        *self == SRC_A::LFXO
+    }
+    #[doc = "Checks if the value of the field is `LFSYNT`"]
+    #[inline(always)]
+    pub fn is_lfsynt(&self) -> bool {
+        *self == SRC_A::LFSYNT
+    }
+}
+#[doc = "Field `SRC` writer - Select which LFCLK source is started by the LFCLKSTART task"]
+pub type SRC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, LFCLKSRC_SPEC, u8, SRC_A, 2, O>;
+impl<'a, const O: u8> SRC_W<'a, O> {
+    #[doc = "32.768 kHz RC oscillator"]
+    #[inline(always)]
+    pub fn lfrc(self) -> &'a mut W {
+        self.variant(SRC_A::LFRC)
+    }
+    #[doc = "32.768 kHz crystal oscillator"]
+    #[inline(always)]
+    pub fn lfxo(self) -> &'a mut W {
+        self.variant(SRC_A::LFXO)
+    }
+    #[doc = "32.768 kHz synthesized from HFCLK"]
+    #[inline(always)]
+    pub fn lfsynt(self) -> &'a mut W {
+        self.variant(SRC_A::LFSYNT)
+    }
+}
+impl R {
+    #[doc = "Bits 0:1 - Select which LFCLK source is started by the LFCLKSTART task"]
+    #[inline(always)]
+    pub fn src(&self) -> SRC_R {
+        SRC_R::new((self.bits & 3) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:1 - Select which LFCLK source is started by the LFCLKSTART task"]
+    #[inline(always)]
+    pub fn src(&mut self) -> SRC_W<0> {
+        SRC_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Clock source for LFCLK\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfclksrc](index.html) module"]
+pub struct LFCLKSRC_SPEC;
+impl crate::RegisterSpec for LFCLKSRC_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [lfclksrc::R](R) reader structure"]
+impl crate::Readable for LFCLKSRC_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [lfclksrc::W](W) writer structure"]
+impl crate::Writable for LFCLKSRC_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets LFCLKSRC to value 0x01"]
+impl crate::Resettable for LFCLKSRC_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x01
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/lfclksrccopy.rs

@@ -0,0 +1,84 @@
+#[doc = "Register `LFCLKSRCCOPY` reader"]
+pub struct R(crate::R<LFCLKSRCCOPY_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<LFCLKSRCCOPY_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<LFCLKSRCCOPY_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<LFCLKSRCCOPY_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `SRC` reader - Clock source"]
+pub type SRC_R = crate::FieldReader<u8, SRC_A>;
+#[doc = "Clock source\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum SRC_A {
+    #[doc = "1: 32.768 kHz RC oscillator"]
+    LFRC = 1,
+    #[doc = "2: 32.768 kHz crystal oscillator"]
+    LFXO = 2,
+    #[doc = "3: 32.768 kHz synthesized from HFCLK"]
+    LFSYNT = 3,
+}
+impl From<SRC_A> for u8 {
+    #[inline(always)]
+    fn from(variant: SRC_A) -> Self {
+        variant as _
+    }
+}
+impl SRC_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<SRC_A> {
+        match self.bits {
+            1 => Some(SRC_A::LFRC),
+            2 => Some(SRC_A::LFXO),
+            3 => Some(SRC_A::LFSYNT),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `LFRC`"]
+    #[inline(always)]
+    pub fn is_lfrc(&self) -> bool {
+        *self == SRC_A::LFRC
+    }
+    #[doc = "Checks if the value of the field is `LFXO`"]
+    #[inline(always)]
+    pub fn is_lfxo(&self) -> bool {
+        *self == SRC_A::LFXO
+    }
+    #[doc = "Checks if the value of the field is `LFSYNT`"]
+    #[inline(always)]
+    pub fn is_lfsynt(&self) -> bool {
+        *self == SRC_A::LFSYNT
+    }
+}
+impl R {
+    #[doc = "Bits 0:1 - Clock source"]
+    #[inline(always)]
+    pub fn src(&self) -> SRC_R {
+        SRC_R::new((self.bits & 3) as u8)
+    }
+}
+#[doc = "Copy of LFCLKSRC register, set when LFCLKSTART task was triggered\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfclksrccopy](index.html) module"]
+pub struct LFCLKSRCCOPY_SPEC;
+impl crate::RegisterSpec for LFCLKSRCCOPY_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [lfclksrccopy::R](R) reader structure"]
+impl crate::Readable for LFCLKSRCCOPY_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets LFCLKSRCCOPY to value 0x01"]
+impl crate::Resettable for LFCLKSRCCOPY_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x01
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/lfclkstat.rs

@@ -0,0 +1,166 @@
+#[doc = "Register `LFCLKSTAT` reader"]
+pub struct R(crate::R<LFCLKSTAT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<LFCLKSTAT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<LFCLKSTAT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<LFCLKSTAT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `SRC` reader - Active clock source"]
+pub type SRC_R = crate::FieldReader<u8, SRC_A>;
+#[doc = "Active clock source\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum SRC_A {
+    #[doc = "1: 32.768 kHz RC oscillator"]
+    LFRC = 1,
+    #[doc = "2: 32.768 kHz crystal oscillator"]
+    LFXO = 2,
+    #[doc = "3: 32.768 kHz synthesized from HFCLK"]
+    LFSYNT = 3,
+}
+impl From<SRC_A> for u8 {
+    #[inline(always)]
+    fn from(variant: SRC_A) -> Self {
+        variant as _
+    }
+}
+impl SRC_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<SRC_A> {
+        match self.bits {
+            1 => Some(SRC_A::LFRC),
+            2 => Some(SRC_A::LFXO),
+            3 => Some(SRC_A::LFSYNT),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `LFRC`"]
+    #[inline(always)]
+    pub fn is_lfrc(&self) -> bool {
+        *self == SRC_A::LFRC
+    }
+    #[doc = "Checks if the value of the field is `LFXO`"]
+    #[inline(always)]
+    pub fn is_lfxo(&self) -> bool {
+        *self == SRC_A::LFXO
+    }
+    #[doc = "Checks if the value of the field is `LFSYNT`"]
+    #[inline(always)]
+    pub fn is_lfsynt(&self) -> bool {
+        *self == SRC_A::LFSYNT
+    }
+}
+#[doc = "Field `ALWAYSRUNNING` reader - ALWAYSRUN activated"]
+pub type ALWAYSRUNNING_R = crate::BitReader<ALWAYSRUNNING_A>;
+#[doc = "ALWAYSRUN activated\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ALWAYSRUNNING_A {
+    #[doc = "0: Automatic clock control enabled"]
+    NOT_RUNNING = 0,
+    #[doc = "1: Oscillator is always running"]
+    RUNNING = 1,
+}
+impl From<ALWAYSRUNNING_A> for bool {
+    #[inline(always)]
+    fn from(variant: ALWAYSRUNNING_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ALWAYSRUNNING_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ALWAYSRUNNING_A {
+        match self.bits {
+            false => ALWAYSRUNNING_A::NOT_RUNNING,
+            true => ALWAYSRUNNING_A::RUNNING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_RUNNING`"]
+    #[inline(always)]
+    pub fn is_not_running(&self) -> bool {
+        *self == ALWAYSRUNNING_A::NOT_RUNNING
+    }
+    #[doc = "Checks if the value of the field is `RUNNING`"]
+    #[inline(always)]
+    pub fn is_running(&self) -> bool {
+        *self == ALWAYSRUNNING_A::RUNNING
+    }
+}
+#[doc = "Field `STATE` reader - LFCLK state"]
+pub type STATE_R = crate::BitReader<STATE_A>;
+#[doc = "LFCLK state\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STATE_A {
+    #[doc = "0: LFCLK not running"]
+    NOT_RUNNING = 0,
+    #[doc = "1: LFCLK running"]
+    RUNNING = 1,
+}
+impl From<STATE_A> for bool {
+    #[inline(always)]
+    fn from(variant: STATE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STATE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STATE_A {
+        match self.bits {
+            false => STATE_A::NOT_RUNNING,
+            true => STATE_A::RUNNING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_RUNNING`"]
+    #[inline(always)]
+    pub fn is_not_running(&self) -> bool {
+        *self == STATE_A::NOT_RUNNING
+    }
+    #[doc = "Checks if the value of the field is `RUNNING`"]
+    #[inline(always)]
+    pub fn is_running(&self) -> bool {
+        *self == STATE_A::RUNNING
+    }
+}
+impl R {
+    #[doc = "Bits 0:1 - Active clock source"]
+    #[inline(always)]
+    pub fn src(&self) -> SRC_R {
+        SRC_R::new((self.bits & 3) as u8)
+    }
+    #[doc = "Bit 4 - ALWAYSRUN activated"]
+    #[inline(always)]
+    pub fn alwaysrunning(&self) -> ALWAYSRUNNING_R {
+        ALWAYSRUNNING_R::new(((self.bits >> 4) & 1) != 0)
+    }
+    #[doc = "Bit 16 - LFCLK state"]
+    #[inline(always)]
+    pub fn state(&self) -> STATE_R {
+        STATE_R::new(((self.bits >> 16) & 1) != 0)
+    }
+}
+#[doc = "Status indicating which LFCLK source is running This register value in any CLOCK instance reflects status only due to configurations/actions in that CLOCK instance.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfclkstat](index.html) module"]
+pub struct LFCLKSTAT_SPEC;
+impl crate::RegisterSpec for LFCLKSTAT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [lfclkstat::R](R) reader structure"]
+impl crate::Readable for LFCLKSTAT_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets LFCLKSTAT to value 0"]
+impl crate::Resettable for LFCLKSTAT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/publish_done.rs

@@ -0,0 +1,140 @@
+#[doc = "Register `PUBLISH_DONE` reader"]
+pub struct R(crate::R<PUBLISH_DONE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PUBLISH_DONE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PUBLISH_DONE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PUBLISH_DONE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PUBLISH_DONE` writer"]
+pub struct W(crate::W<PUBLISH_DONE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PUBLISH_DONE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PUBLISH_DONE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PUBLISH_DONE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that event DONE will publish to."]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that event DONE will publish to."]
+pub type CHIDX_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PUBLISH_DONE_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable publishing"]
+    DISABLED = 0,
+    #[doc = "1: Enable publishing"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PUBLISH_DONE_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable publishing"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable publishing"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that event DONE will publish to."]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that event DONE will publish to."]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Publish configuration for event DONE\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [publish_done](index.html) module"]
+pub struct PUBLISH_DONE_SPEC;
+impl crate::RegisterSpec for PUBLISH_DONE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [publish_done::R](R) reader structure"]
+impl crate::Readable for PUBLISH_DONE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [publish_done::W](W) writer structure"]
+impl crate::Writable for PUBLISH_DONE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PUBLISH_DONE to value 0"]
+impl crate::Resettable for PUBLISH_DONE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/publish_hfclk192mstarted.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `PUBLISH_HFCLK192MSTARTED` reader"]
+pub struct R(crate::R<PUBLISH_HFCLK192MSTARTED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PUBLISH_HFCLK192MSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PUBLISH_HFCLK192MSTARTED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PUBLISH_HFCLK192MSTARTED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PUBLISH_HFCLK192MSTARTED` writer"]
+pub struct W(crate::W<PUBLISH_HFCLK192MSTARTED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PUBLISH_HFCLK192MSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PUBLISH_HFCLK192MSTARTED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PUBLISH_HFCLK192MSTARTED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that event HFCLK192MSTARTED will publish to."]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that event HFCLK192MSTARTED will publish to."]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, PUBLISH_HFCLK192MSTARTED_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable publishing"]
+    DISABLED = 0,
+    #[doc = "1: Enable publishing"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PUBLISH_HFCLK192MSTARTED_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable publishing"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable publishing"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that event HFCLK192MSTARTED will publish to."]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that event HFCLK192MSTARTED will publish to."]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Publish configuration for event HFCLK192MSTARTED\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [publish_hfclk192mstarted](index.html) module"]
+pub struct PUBLISH_HFCLK192MSTARTED_SPEC;
+impl crate::RegisterSpec for PUBLISH_HFCLK192MSTARTED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [publish_hfclk192mstarted::R](R) reader structure"]
+impl crate::Readable for PUBLISH_HFCLK192MSTARTED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [publish_hfclk192mstarted::W](W) writer structure"]
+impl crate::Writable for PUBLISH_HFCLK192MSTARTED_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PUBLISH_HFCLK192MSTARTED to value 0"]
+impl crate::Resettable for PUBLISH_HFCLK192MSTARTED_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/publish_hfclkaudiostarted.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `PUBLISH_HFCLKAUDIOSTARTED` reader"]
+pub struct R(crate::R<PUBLISH_HFCLKAUDIOSTARTED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PUBLISH_HFCLKAUDIOSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PUBLISH_HFCLKAUDIOSTARTED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PUBLISH_HFCLKAUDIOSTARTED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PUBLISH_HFCLKAUDIOSTARTED` writer"]
+pub struct W(crate::W<PUBLISH_HFCLKAUDIOSTARTED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PUBLISH_HFCLKAUDIOSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PUBLISH_HFCLKAUDIOSTARTED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PUBLISH_HFCLKAUDIOSTARTED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that event HFCLKAUDIOSTARTED will publish to."]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that event HFCLKAUDIOSTARTED will publish to."]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, PUBLISH_HFCLKAUDIOSTARTED_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable publishing"]
+    DISABLED = 0,
+    #[doc = "1: Enable publishing"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PUBLISH_HFCLKAUDIOSTARTED_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable publishing"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable publishing"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that event HFCLKAUDIOSTARTED will publish to."]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that event HFCLKAUDIOSTARTED will publish to."]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Publish configuration for event HFCLKAUDIOSTARTED\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [publish_hfclkaudiostarted](index.html) module"]
+pub struct PUBLISH_HFCLKAUDIOSTARTED_SPEC;
+impl crate::RegisterSpec for PUBLISH_HFCLKAUDIOSTARTED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [publish_hfclkaudiostarted::R](R) reader structure"]
+impl crate::Readable for PUBLISH_HFCLKAUDIOSTARTED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [publish_hfclkaudiostarted::W](W) writer structure"]
+impl crate::Writable for PUBLISH_HFCLKAUDIOSTARTED_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PUBLISH_HFCLKAUDIOSTARTED to value 0"]
+impl crate::Resettable for PUBLISH_HFCLKAUDIOSTARTED_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/publish_hfclkstarted.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `PUBLISH_HFCLKSTARTED` reader"]
+pub struct R(crate::R<PUBLISH_HFCLKSTARTED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PUBLISH_HFCLKSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PUBLISH_HFCLKSTARTED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PUBLISH_HFCLKSTARTED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PUBLISH_HFCLKSTARTED` writer"]
+pub struct W(crate::W<PUBLISH_HFCLKSTARTED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PUBLISH_HFCLKSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PUBLISH_HFCLKSTARTED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PUBLISH_HFCLKSTARTED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that event HFCLKSTARTED will publish to."]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that event HFCLKSTARTED will publish to."]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, PUBLISH_HFCLKSTARTED_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable publishing"]
+    DISABLED = 0,
+    #[doc = "1: Enable publishing"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PUBLISH_HFCLKSTARTED_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable publishing"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable publishing"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that event HFCLKSTARTED will publish to."]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that event HFCLKSTARTED will publish to."]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Publish configuration for event HFCLKSTARTED\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [publish_hfclkstarted](index.html) module"]
+pub struct PUBLISH_HFCLKSTARTED_SPEC;
+impl crate::RegisterSpec for PUBLISH_HFCLKSTARTED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [publish_hfclkstarted::R](R) reader structure"]
+impl crate::Readable for PUBLISH_HFCLKSTARTED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [publish_hfclkstarted::W](W) writer structure"]
+impl crate::Writable for PUBLISH_HFCLKSTARTED_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PUBLISH_HFCLKSTARTED to value 0"]
+impl crate::Resettable for PUBLISH_HFCLKSTARTED_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/publish_lfclkstarted.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `PUBLISH_LFCLKSTARTED` reader"]
+pub struct R(crate::R<PUBLISH_LFCLKSTARTED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PUBLISH_LFCLKSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PUBLISH_LFCLKSTARTED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PUBLISH_LFCLKSTARTED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PUBLISH_LFCLKSTARTED` writer"]
+pub struct W(crate::W<PUBLISH_LFCLKSTARTED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PUBLISH_LFCLKSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PUBLISH_LFCLKSTARTED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PUBLISH_LFCLKSTARTED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that event LFCLKSTARTED will publish to."]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that event LFCLKSTARTED will publish to."]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, PUBLISH_LFCLKSTARTED_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable publishing"]
+    DISABLED = 0,
+    #[doc = "1: Enable publishing"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PUBLISH_LFCLKSTARTED_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable publishing"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable publishing"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that event LFCLKSTARTED will publish to."]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that event LFCLKSTARTED will publish to."]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Publish configuration for event LFCLKSTARTED\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [publish_lfclkstarted](index.html) module"]
+pub struct PUBLISH_LFCLKSTARTED_SPEC;
+impl crate::RegisterSpec for PUBLISH_LFCLKSTARTED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [publish_lfclkstarted::R](R) reader structure"]
+impl crate::Readable for PUBLISH_LFCLKSTARTED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [publish_lfclkstarted::W](W) writer structure"]
+impl crate::Writable for PUBLISH_LFCLKSTARTED_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PUBLISH_LFCLKSTARTED to value 0"]
+impl crate::Resettable for PUBLISH_LFCLKSTARTED_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/subscribe_cal.rs

@@ -0,0 +1,140 @@
+#[doc = "Register `SUBSCRIBE_CAL` reader"]
+pub struct R(crate::R<SUBSCRIBE_CAL_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_CAL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_CAL_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_CAL_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_CAL` writer"]
+pub struct W(crate::W<SUBSCRIBE_CAL_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_CAL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_CAL_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_CAL_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that task CAL will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that task CAL will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SUBSCRIBE_CAL_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_CAL_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that task CAL will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that task CAL will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task CAL\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_cal](index.html) module"]
+pub struct SUBSCRIBE_CAL_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_CAL_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_cal::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_CAL_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_cal::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_CAL_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_CAL to value 0"]
+impl crate::Resettable for SUBSCRIBE_CAL_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/subscribe_hfclk192mstart.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `SUBSCRIBE_HFCLK192MSTART` reader"]
+pub struct R(crate::R<SUBSCRIBE_HFCLK192MSTART_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_HFCLK192MSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_HFCLK192MSTART_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_HFCLK192MSTART_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_HFCLK192MSTART` writer"]
+pub struct W(crate::W<SUBSCRIBE_HFCLK192MSTART_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_HFCLK192MSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_HFCLK192MSTART_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_HFCLK192MSTART_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that task HFCLK192MSTART will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that task HFCLK192MSTART will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, SUBSCRIBE_HFCLK192MSTART_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_HFCLK192MSTART_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that task HFCLK192MSTART will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that task HFCLK192MSTART will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task HFCLK192MSTART\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_hfclk192mstart](index.html) module"]
+pub struct SUBSCRIBE_HFCLK192MSTART_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_HFCLK192MSTART_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_hfclk192mstart::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_HFCLK192MSTART_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_hfclk192mstart::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_HFCLK192MSTART_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_HFCLK192MSTART to value 0"]
+impl crate::Resettable for SUBSCRIBE_HFCLK192MSTART_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/subscribe_hfclk192mstop.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `SUBSCRIBE_HFCLK192MSTOP` reader"]
+pub struct R(crate::R<SUBSCRIBE_HFCLK192MSTOP_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_HFCLK192MSTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_HFCLK192MSTOP_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_HFCLK192MSTOP_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_HFCLK192MSTOP` writer"]
+pub struct W(crate::W<SUBSCRIBE_HFCLK192MSTOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_HFCLK192MSTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_HFCLK192MSTOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_HFCLK192MSTOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that task HFCLK192MSTOP will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that task HFCLK192MSTOP will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, SUBSCRIBE_HFCLK192MSTOP_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_HFCLK192MSTOP_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that task HFCLK192MSTOP will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that task HFCLK192MSTOP will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task HFCLK192MSTOP\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_hfclk192mstop](index.html) module"]
+pub struct SUBSCRIBE_HFCLK192MSTOP_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_HFCLK192MSTOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_hfclk192mstop::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_HFCLK192MSTOP_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_hfclk192mstop::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_HFCLK192MSTOP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_HFCLK192MSTOP to value 0"]
+impl crate::Resettable for SUBSCRIBE_HFCLK192MSTOP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/subscribe_hfclkaudiostart.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `SUBSCRIBE_HFCLKAUDIOSTART` reader"]
+pub struct R(crate::R<SUBSCRIBE_HFCLKAUDIOSTART_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_HFCLKAUDIOSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_HFCLKAUDIOSTART_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_HFCLKAUDIOSTART_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_HFCLKAUDIOSTART` writer"]
+pub struct W(crate::W<SUBSCRIBE_HFCLKAUDIOSTART_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_HFCLKAUDIOSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_HFCLKAUDIOSTART_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_HFCLKAUDIOSTART_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that task HFCLKAUDIOSTART will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that task HFCLKAUDIOSTART will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, SUBSCRIBE_HFCLKAUDIOSTART_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_HFCLKAUDIOSTART_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that task HFCLKAUDIOSTART will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that task HFCLKAUDIOSTART will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task HFCLKAUDIOSTART\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_hfclkaudiostart](index.html) module"]
+pub struct SUBSCRIBE_HFCLKAUDIOSTART_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_HFCLKAUDIOSTART_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_hfclkaudiostart::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_HFCLKAUDIOSTART_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_hfclkaudiostart::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_HFCLKAUDIOSTART_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_HFCLKAUDIOSTART to value 0"]
+impl crate::Resettable for SUBSCRIBE_HFCLKAUDIOSTART_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/subscribe_hfclkaudiostop.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `SUBSCRIBE_HFCLKAUDIOSTOP` reader"]
+pub struct R(crate::R<SUBSCRIBE_HFCLKAUDIOSTOP_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_HFCLKAUDIOSTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_HFCLKAUDIOSTOP_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_HFCLKAUDIOSTOP_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_HFCLKAUDIOSTOP` writer"]
+pub struct W(crate::W<SUBSCRIBE_HFCLKAUDIOSTOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_HFCLKAUDIOSTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_HFCLKAUDIOSTOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_HFCLKAUDIOSTOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that task HFCLKAUDIOSTOP will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that task HFCLKAUDIOSTOP will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, SUBSCRIBE_HFCLKAUDIOSTOP_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_HFCLKAUDIOSTOP_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that task HFCLKAUDIOSTOP will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that task HFCLKAUDIOSTOP will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task HFCLKAUDIOSTOP\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_hfclkaudiostop](index.html) module"]
+pub struct SUBSCRIBE_HFCLKAUDIOSTOP_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_HFCLKAUDIOSTOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_hfclkaudiostop::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_HFCLKAUDIOSTOP_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_hfclkaudiostop::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_HFCLKAUDIOSTOP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_HFCLKAUDIOSTOP to value 0"]
+impl crate::Resettable for SUBSCRIBE_HFCLKAUDIOSTOP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/subscribe_hfclkstart.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `SUBSCRIBE_HFCLKSTART` reader"]
+pub struct R(crate::R<SUBSCRIBE_HFCLKSTART_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_HFCLKSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_HFCLKSTART_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_HFCLKSTART_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_HFCLKSTART` writer"]
+pub struct W(crate::W<SUBSCRIBE_HFCLKSTART_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_HFCLKSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_HFCLKSTART_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_HFCLKSTART_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that task HFCLKSTART will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that task HFCLKSTART will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, SUBSCRIBE_HFCLKSTART_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_HFCLKSTART_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that task HFCLKSTART will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that task HFCLKSTART will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task HFCLKSTART\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_hfclkstart](index.html) module"]
+pub struct SUBSCRIBE_HFCLKSTART_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_HFCLKSTART_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_hfclkstart::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_HFCLKSTART_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_hfclkstart::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_HFCLKSTART_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_HFCLKSTART to value 0"]
+impl crate::Resettable for SUBSCRIBE_HFCLKSTART_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/subscribe_hfclkstop.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `SUBSCRIBE_HFCLKSTOP` reader"]
+pub struct R(crate::R<SUBSCRIBE_HFCLKSTOP_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_HFCLKSTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_HFCLKSTOP_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_HFCLKSTOP_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_HFCLKSTOP` writer"]
+pub struct W(crate::W<SUBSCRIBE_HFCLKSTOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_HFCLKSTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_HFCLKSTOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_HFCLKSTOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that task HFCLKSTOP will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that task HFCLKSTOP will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, SUBSCRIBE_HFCLKSTOP_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_HFCLKSTOP_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that task HFCLKSTOP will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that task HFCLKSTOP will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task HFCLKSTOP\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_hfclkstop](index.html) module"]
+pub struct SUBSCRIBE_HFCLKSTOP_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_HFCLKSTOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_hfclkstop::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_HFCLKSTOP_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_hfclkstop::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_HFCLKSTOP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_HFCLKSTOP to value 0"]
+impl crate::Resettable for SUBSCRIBE_HFCLKSTOP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/subscribe_lfclkstart.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `SUBSCRIBE_LFCLKSTART` reader"]
+pub struct R(crate::R<SUBSCRIBE_LFCLKSTART_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_LFCLKSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_LFCLKSTART_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_LFCLKSTART_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_LFCLKSTART` writer"]
+pub struct W(crate::W<SUBSCRIBE_LFCLKSTART_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_LFCLKSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_LFCLKSTART_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_LFCLKSTART_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that task LFCLKSTART will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that task LFCLKSTART will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, SUBSCRIBE_LFCLKSTART_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_LFCLKSTART_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that task LFCLKSTART will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that task LFCLKSTART will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task LFCLKSTART\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_lfclkstart](index.html) module"]
+pub struct SUBSCRIBE_LFCLKSTART_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_LFCLKSTART_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_lfclkstart::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_LFCLKSTART_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_lfclkstart::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_LFCLKSTART_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_LFCLKSTART to value 0"]
+impl crate::Resettable for SUBSCRIBE_LFCLKSTART_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/subscribe_lfclkstop.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `SUBSCRIBE_LFCLKSTOP` reader"]
+pub struct R(crate::R<SUBSCRIBE_LFCLKSTOP_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_LFCLKSTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_LFCLKSTOP_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_LFCLKSTOP_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_LFCLKSTOP` writer"]
+pub struct W(crate::W<SUBSCRIBE_LFCLKSTOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_LFCLKSTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_LFCLKSTOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_LFCLKSTOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that task LFCLKSTOP will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that task LFCLKSTOP will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, SUBSCRIBE_LFCLKSTOP_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_LFCLKSTOP_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that task LFCLKSTOP will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that task LFCLKSTOP will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task LFCLKSTOP\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_lfclkstop](index.html) module"]
+pub struct SUBSCRIBE_LFCLKSTOP_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_LFCLKSTOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_lfclkstop::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_LFCLKSTOP_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_lfclkstop::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_LFCLKSTOP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_LFCLKSTOP to value 0"]
+impl crate::Resettable for SUBSCRIBE_LFCLKSTOP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/tasks_cal.rs

@@ -0,0 +1,71 @@
+#[doc = "Register `TASKS_CAL` writer"]
+pub struct W(crate::W<TASKS_CAL_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_CAL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_CAL_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_CAL_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Start calibration of LFRC oscillator\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_CAL_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_CAL_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_CAL_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_CAL` writer - Start calibration of LFRC oscillator"]
+pub type TASKS_CAL_W<'a, const O: u8> = crate::BitWriter<'a, u32, TASKS_CAL_SPEC, TASKS_CAL_AW, O>;
+impl<'a, const O: u8> TASKS_CAL_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_CAL_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Start calibration of LFRC oscillator"]
+    #[inline(always)]
+    pub fn tasks_cal(&mut self) -> TASKS_CAL_W<0> {
+        TASKS_CAL_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Start calibration of LFRC oscillator\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_cal](index.html) module"]
+pub struct TASKS_CAL_SPEC;
+impl crate::RegisterSpec for TASKS_CAL_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_cal::W](W) writer structure"]
+impl crate::Writable for TASKS_CAL_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_CAL to value 0"]
+impl crate::Resettable for TASKS_CAL_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/tasks_hfclk192mstart.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_HFCLK192MSTART` writer"]
+pub struct W(crate::W<TASKS_HFCLK192MSTART_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_HFCLK192MSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_HFCLK192MSTART_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_HFCLK192MSTART_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Start HFCLK192M source as selected in HFCLK192MSRC\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_HFCLK192MSTART_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_HFCLK192MSTART_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_HFCLK192MSTART_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_HFCLK192MSTART` writer - Start HFCLK192M source as selected in HFCLK192MSRC"]
+pub type TASKS_HFCLK192MSTART_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_HFCLK192MSTART_SPEC, TASKS_HFCLK192MSTART_AW, O>;
+impl<'a, const O: u8> TASKS_HFCLK192MSTART_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_HFCLK192MSTART_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Start HFCLK192M source as selected in HFCLK192MSRC"]
+    #[inline(always)]
+    pub fn tasks_hfclk192mstart(&mut self) -> TASKS_HFCLK192MSTART_W<0> {
+        TASKS_HFCLK192MSTART_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Start HFCLK192M source as selected in HFCLK192MSRC\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_hfclk192mstart](index.html) module"]
+pub struct TASKS_HFCLK192MSTART_SPEC;
+impl crate::RegisterSpec for TASKS_HFCLK192MSTART_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_hfclk192mstart::W](W) writer structure"]
+impl crate::Writable for TASKS_HFCLK192MSTART_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_HFCLK192MSTART to value 0"]
+impl crate::Resettable for TASKS_HFCLK192MSTART_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/tasks_hfclk192mstop.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_HFCLK192MSTOP` writer"]
+pub struct W(crate::W<TASKS_HFCLK192MSTOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_HFCLK192MSTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_HFCLK192MSTOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_HFCLK192MSTOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Stop HFCLK192M source\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_HFCLK192MSTOP_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_HFCLK192MSTOP_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_HFCLK192MSTOP_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_HFCLK192MSTOP` writer - Stop HFCLK192M source"]
+pub type TASKS_HFCLK192MSTOP_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_HFCLK192MSTOP_SPEC, TASKS_HFCLK192MSTOP_AW, O>;
+impl<'a, const O: u8> TASKS_HFCLK192MSTOP_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_HFCLK192MSTOP_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Stop HFCLK192M source"]
+    #[inline(always)]
+    pub fn tasks_hfclk192mstop(&mut self) -> TASKS_HFCLK192MSTOP_W<0> {
+        TASKS_HFCLK192MSTOP_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Stop HFCLK192M source\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_hfclk192mstop](index.html) module"]
+pub struct TASKS_HFCLK192MSTOP_SPEC;
+impl crate::RegisterSpec for TASKS_HFCLK192MSTOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_hfclk192mstop::W](W) writer structure"]
+impl crate::Writable for TASKS_HFCLK192MSTOP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_HFCLK192MSTOP to value 0"]
+impl crate::Resettable for TASKS_HFCLK192MSTOP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/tasks_hfclkaudiostart.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_HFCLKAUDIOSTART` writer"]
+pub struct W(crate::W<TASKS_HFCLKAUDIOSTART_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_HFCLKAUDIOSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_HFCLKAUDIOSTART_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_HFCLKAUDIOSTART_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Start HFCLKAUDIO source\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_HFCLKAUDIOSTART_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_HFCLKAUDIOSTART_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_HFCLKAUDIOSTART_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_HFCLKAUDIOSTART` writer - Start HFCLKAUDIO source"]
+pub type TASKS_HFCLKAUDIOSTART_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_HFCLKAUDIOSTART_SPEC, TASKS_HFCLKAUDIOSTART_AW, O>;
+impl<'a, const O: u8> TASKS_HFCLKAUDIOSTART_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_HFCLKAUDIOSTART_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Start HFCLKAUDIO source"]
+    #[inline(always)]
+    pub fn tasks_hfclkaudiostart(&mut self) -> TASKS_HFCLKAUDIOSTART_W<0> {
+        TASKS_HFCLKAUDIOSTART_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Start HFCLKAUDIO source\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_hfclkaudiostart](index.html) module"]
+pub struct TASKS_HFCLKAUDIOSTART_SPEC;
+impl crate::RegisterSpec for TASKS_HFCLKAUDIOSTART_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_hfclkaudiostart::W](W) writer structure"]
+impl crate::Writable for TASKS_HFCLKAUDIOSTART_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_HFCLKAUDIOSTART to value 0"]
+impl crate::Resettable for TASKS_HFCLKAUDIOSTART_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/tasks_hfclkaudiostop.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_HFCLKAUDIOSTOP` writer"]
+pub struct W(crate::W<TASKS_HFCLKAUDIOSTOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_HFCLKAUDIOSTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_HFCLKAUDIOSTOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_HFCLKAUDIOSTOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Stop HFCLKAUDIO source\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_HFCLKAUDIOSTOP_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_HFCLKAUDIOSTOP_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_HFCLKAUDIOSTOP_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_HFCLKAUDIOSTOP` writer - Stop HFCLKAUDIO source"]
+pub type TASKS_HFCLKAUDIOSTOP_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_HFCLKAUDIOSTOP_SPEC, TASKS_HFCLKAUDIOSTOP_AW, O>;
+impl<'a, const O: u8> TASKS_HFCLKAUDIOSTOP_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_HFCLKAUDIOSTOP_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Stop HFCLKAUDIO source"]
+    #[inline(always)]
+    pub fn tasks_hfclkaudiostop(&mut self) -> TASKS_HFCLKAUDIOSTOP_W<0> {
+        TASKS_HFCLKAUDIOSTOP_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Stop HFCLKAUDIO source\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_hfclkaudiostop](index.html) module"]
+pub struct TASKS_HFCLKAUDIOSTOP_SPEC;
+impl crate::RegisterSpec for TASKS_HFCLKAUDIOSTOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_hfclkaudiostop::W](W) writer structure"]
+impl crate::Writable for TASKS_HFCLKAUDIOSTOP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_HFCLKAUDIOSTOP to value 0"]
+impl crate::Resettable for TASKS_HFCLKAUDIOSTOP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/tasks_hfclkstart.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_HFCLKSTART` writer"]
+pub struct W(crate::W<TASKS_HFCLKSTART_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_HFCLKSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_HFCLKSTART_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_HFCLKSTART_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Start HFCLK128M/HFCLK64M source as selected in HFCLKSRC\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_HFCLKSTART_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_HFCLKSTART_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_HFCLKSTART_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_HFCLKSTART` writer - Start HFCLK128M/HFCLK64M source as selected in HFCLKSRC"]
+pub type TASKS_HFCLKSTART_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_HFCLKSTART_SPEC, TASKS_HFCLKSTART_AW, O>;
+impl<'a, const O: u8> TASKS_HFCLKSTART_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_HFCLKSTART_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Start HFCLK128M/HFCLK64M source as selected in HFCLKSRC"]
+    #[inline(always)]
+    pub fn tasks_hfclkstart(&mut self) -> TASKS_HFCLKSTART_W<0> {
+        TASKS_HFCLKSTART_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Start HFCLK128M/HFCLK64M source as selected in HFCLKSRC\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_hfclkstart](index.html) module"]
+pub struct TASKS_HFCLKSTART_SPEC;
+impl crate::RegisterSpec for TASKS_HFCLKSTART_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_hfclkstart::W](W) writer structure"]
+impl crate::Writable for TASKS_HFCLKSTART_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_HFCLKSTART to value 0"]
+impl crate::Resettable for TASKS_HFCLKSTART_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/tasks_hfclkstop.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_HFCLKSTOP` writer"]
+pub struct W(crate::W<TASKS_HFCLKSTOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_HFCLKSTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_HFCLKSTOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_HFCLKSTOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Stop HFCLK128M/HFCLK64M source\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_HFCLKSTOP_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_HFCLKSTOP_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_HFCLKSTOP_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_HFCLKSTOP` writer - Stop HFCLK128M/HFCLK64M source"]
+pub type TASKS_HFCLKSTOP_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_HFCLKSTOP_SPEC, TASKS_HFCLKSTOP_AW, O>;
+impl<'a, const O: u8> TASKS_HFCLKSTOP_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_HFCLKSTOP_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Stop HFCLK128M/HFCLK64M source"]
+    #[inline(always)]
+    pub fn tasks_hfclkstop(&mut self) -> TASKS_HFCLKSTOP_W<0> {
+        TASKS_HFCLKSTOP_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Stop HFCLK128M/HFCLK64M source\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_hfclkstop](index.html) module"]
+pub struct TASKS_HFCLKSTOP_SPEC;
+impl crate::RegisterSpec for TASKS_HFCLKSTOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_hfclkstop::W](W) writer structure"]
+impl crate::Writable for TASKS_HFCLKSTOP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_HFCLKSTOP to value 0"]
+impl crate::Resettable for TASKS_HFCLKSTOP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/tasks_lfclkstart.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_LFCLKSTART` writer"]
+pub struct W(crate::W<TASKS_LFCLKSTART_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_LFCLKSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_LFCLKSTART_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_LFCLKSTART_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Start LFCLK source as selected in LFCLKSRC\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_LFCLKSTART_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_LFCLKSTART_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_LFCLKSTART_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_LFCLKSTART` writer - Start LFCLK source as selected in LFCLKSRC"]
+pub type TASKS_LFCLKSTART_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_LFCLKSTART_SPEC, TASKS_LFCLKSTART_AW, O>;
+impl<'a, const O: u8> TASKS_LFCLKSTART_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_LFCLKSTART_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Start LFCLK source as selected in LFCLKSRC"]
+    #[inline(always)]
+    pub fn tasks_lfclkstart(&mut self) -> TASKS_LFCLKSTART_W<0> {
+        TASKS_LFCLKSTART_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Start LFCLK source as selected in LFCLKSRC\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_lfclkstart](index.html) module"]
+pub struct TASKS_LFCLKSTART_SPEC;
+impl crate::RegisterSpec for TASKS_LFCLKSTART_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_lfclkstart::W](W) writer structure"]
+impl crate::Writable for TASKS_LFCLKSTART_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_LFCLKSTART to value 0"]
+impl crate::Resettable for TASKS_LFCLKSTART_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/tasks_lfclkstop.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_LFCLKSTOP` writer"]
+pub struct W(crate::W<TASKS_LFCLKSTOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_LFCLKSTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_LFCLKSTOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_LFCLKSTOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Stop LFCLK source\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_LFCLKSTOP_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_LFCLKSTOP_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_LFCLKSTOP_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_LFCLKSTOP` writer - Stop LFCLK source"]
+pub type TASKS_LFCLKSTOP_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_LFCLKSTOP_SPEC, TASKS_LFCLKSTOP_AW, O>;
+impl<'a, const O: u8> TASKS_LFCLKSTOP_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_LFCLKSTOP_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Stop LFCLK source"]
+    #[inline(always)]
+    pub fn tasks_lfclkstop(&mut self) -> TASKS_LFCLKSTOP_W<0> {
+        TASKS_LFCLKSTOP_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Stop LFCLK source\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_lfclkstop](index.html) module"]
+pub struct TASKS_LFCLKSTOP_SPEC;
+impl crate::RegisterSpec for TASKS_LFCLKSTOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_lfclkstop::W](W) writer structure"]
+impl crate::Writable for TASKS_LFCLKSTOP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_LFCLKSTOP to value 0"]
+impl crate::Resettable for TASKS_LFCLKSTOP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/comp_ns.rs

@@ -0,0 +1,174 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct RegisterBlock {
+    #[doc = "0x00 - Start comparator"]
+    pub tasks_start: TASKS_START,
+    #[doc = "0x04 - Stop comparator"]
+    pub tasks_stop: TASKS_STOP,
+    #[doc = "0x08 - Sample comparator value"]
+    pub tasks_sample: TASKS_SAMPLE,
+    _reserved3: [u8; 0x74],
+    #[doc = "0x80 - Subscribe configuration for task START"]
+    pub subscribe_start: SUBSCRIBE_START,
+    #[doc = "0x84 - Subscribe configuration for task STOP"]
+    pub subscribe_stop: SUBSCRIBE_STOP,
+    #[doc = "0x88 - Subscribe configuration for task SAMPLE"]
+    pub subscribe_sample: SUBSCRIBE_SAMPLE,
+    _reserved6: [u8; 0x74],
+    #[doc = "0x100 - COMP is ready and output is valid"]
+    pub events_ready: EVENTS_READY,
+    #[doc = "0x104 - Downward crossing"]
+    pub events_down: EVENTS_DOWN,
+    #[doc = "0x108 - Upward crossing"]
+    pub events_up: EVENTS_UP,
+    #[doc = "0x10c - Downward or upward crossing"]
+    pub events_cross: EVENTS_CROSS,
+    _reserved10: [u8; 0x70],
+    #[doc = "0x180 - Publish configuration for event READY"]
+    pub publish_ready: PUBLISH_READY,
+    #[doc = "0x184 - Publish configuration for event DOWN"]
+    pub publish_down: PUBLISH_DOWN,
+    #[doc = "0x188 - Publish configuration for event UP"]
+    pub publish_up: PUBLISH_UP,
+    #[doc = "0x18c - Publish configuration for event CROSS"]
+    pub publish_cross: PUBLISH_CROSS,
+    _reserved14: [u8; 0x70],
+    #[doc = "0x200 - Shortcuts between local events and tasks"]
+    pub shorts: SHORTS,
+    _reserved15: [u8; 0xfc],
+    #[doc = "0x300 - Enable or disable interrupt"]
+    pub inten: INTEN,
+    #[doc = "0x304 - Enable interrupt"]
+    pub intenset: INTENSET,
+    #[doc = "0x308 - Disable interrupt"]
+    pub intenclr: INTENCLR,
+    _reserved18: [u8; 0xf4],
+    #[doc = "0x400 - Compare result"]
+    pub result: RESULT,
+    _reserved19: [u8; 0xfc],
+    #[doc = "0x500 - COMP enable"]
+    pub enable: ENABLE,
+    #[doc = "0x504 - Pin select"]
+    pub psel: PSEL,
+    #[doc = "0x508 - Reference source select for single-ended mode"]
+    pub refsel: REFSEL,
+    #[doc = "0x50c - External reference select"]
+    pub extrefsel: EXTREFSEL,
+    _reserved23: [u8; 0x20],
+    #[doc = "0x530 - Threshold configuration for hysteresis unit"]
+    pub th: TH,
+    #[doc = "0x534 - Mode configuration"]
+    pub mode: MODE,
+    #[doc = "0x538 - Comparator hysteresis enable"]
+    pub hyst: HYST,
+    #[doc = "0x53c - Current source select on analog input"]
+    pub isource: ISOURCE,
+}
+#[doc = "TASKS_START (w) register accessor: an alias for `Reg<TASKS_START_SPEC>`"]
+pub type TASKS_START = crate::Reg<tasks_start::TASKS_START_SPEC>;
+#[doc = "Start comparator"]
+pub mod tasks_start;
+#[doc = "TASKS_STOP (w) register accessor: an alias for `Reg<TASKS_STOP_SPEC>`"]
+pub type TASKS_STOP = crate::Reg<tasks_stop::TASKS_STOP_SPEC>;
+#[doc = "Stop comparator"]
+pub mod tasks_stop;
+#[doc = "TASKS_SAMPLE (w) register accessor: an alias for `Reg<TASKS_SAMPLE_SPEC>`"]
+pub type TASKS_SAMPLE = crate::Reg<tasks_sample::TASKS_SAMPLE_SPEC>;
+#[doc = "Sample comparator value"]
+pub mod tasks_sample;
+#[doc = "SUBSCRIBE_START (rw) register accessor: an alias for `Reg<SUBSCRIBE_START_SPEC>`"]
+pub type SUBSCRIBE_START = crate::Reg<subscribe_start::SUBSCRIBE_START_SPEC>;
+#[doc = "Subscribe configuration for task START"]
+pub mod subscribe_start;
+#[doc = "SUBSCRIBE_STOP (rw) register accessor: an alias for `Reg<SUBSCRIBE_STOP_SPEC>`"]
+pub type SUBSCRIBE_STOP = crate::Reg<subscribe_stop::SUBSCRIBE_STOP_SPEC>;
+#[doc = "Subscribe configuration for task STOP"]
+pub mod subscribe_stop;
+#[doc = "SUBSCRIBE_SAMPLE (rw) register accessor: an alias for `Reg<SUBSCRIBE_SAMPLE_SPEC>`"]
+pub type SUBSCRIBE_SAMPLE = crate::Reg<subscribe_sample::SUBSCRIBE_SAMPLE_SPEC>;
+#[doc = "Subscribe configuration for task SAMPLE"]
+pub mod subscribe_sample;
+#[doc = "EVENTS_READY (rw) register accessor: an alias for `Reg<EVENTS_READY_SPEC>`"]
+pub type EVENTS_READY = crate::Reg<events_ready::EVENTS_READY_SPEC>;
+#[doc = "COMP is ready and output is valid"]
+pub mod events_ready;
+#[doc = "EVENTS_DOWN (rw) register accessor: an alias for `Reg<EVENTS_DOWN_SPEC>`"]
+pub type EVENTS_DOWN = crate::Reg<events_down::EVENTS_DOWN_SPEC>;
+#[doc = "Downward crossing"]
+pub mod events_down;
+#[doc = "EVENTS_UP (rw) register accessor: an alias for `Reg<EVENTS_UP_SPEC>`"]
+pub type EVENTS_UP = crate::Reg<events_up::EVENTS_UP_SPEC>;
+#[doc = "Upward crossing"]
+pub mod events_up;
+#[doc = "EVENTS_CROSS (rw) register accessor: an alias for `Reg<EVENTS_CROSS_SPEC>`"]
+pub type EVENTS_CROSS = crate::Reg<events_cross::EVENTS_CROSS_SPEC>;
+#[doc = "Downward or upward crossing"]
+pub mod events_cross;
+#[doc = "PUBLISH_READY (rw) register accessor: an alias for `Reg<PUBLISH_READY_SPEC>`"]
+pub type PUBLISH_READY = crate::Reg<publish_ready::PUBLISH_READY_SPEC>;
+#[doc = "Publish configuration for event READY"]
+pub mod publish_ready;
+#[doc = "PUBLISH_DOWN (rw) register accessor: an alias for `Reg<PUBLISH_DOWN_SPEC>`"]
+pub type PUBLISH_DOWN = crate::Reg<publish_down::PUBLISH_DOWN_SPEC>;
+#[doc = "Publish configuration for event DOWN"]
+pub mod publish_down;
+#[doc = "PUBLISH_UP (rw) register accessor: an alias for `Reg<PUBLISH_UP_SPEC>`"]
+pub type PUBLISH_UP = crate::Reg<publish_up::PUBLISH_UP_SPEC>;
+#[doc = "Publish configuration for event UP"]
+pub mod publish_up;
+#[doc = "PUBLISH_CROSS (rw) register accessor: an alias for `Reg<PUBLISH_CROSS_SPEC>`"]
+pub type PUBLISH_CROSS = crate::Reg<publish_cross::PUBLISH_CROSS_SPEC>;
+#[doc = "Publish configuration for event CROSS"]
+pub mod publish_cross;
+#[doc = "SHORTS (rw) register accessor: an alias for `Reg<SHORTS_SPEC>`"]
+pub type SHORTS = crate::Reg<shorts::SHORTS_SPEC>;
+#[doc = "Shortcuts between local events and tasks"]
+pub mod shorts;
+#[doc = "INTEN (rw) register accessor: an alias for `Reg<INTEN_SPEC>`"]
+pub type INTEN = crate::Reg<inten::INTEN_SPEC>;
+#[doc = "Enable or disable interrupt"]
+pub mod inten;
+#[doc = "INTENSET (rw) register accessor: an alias for `Reg<INTENSET_SPEC>`"]
+pub type INTENSET = crate::Reg<intenset::INTENSET_SPEC>;
+#[doc = "Enable interrupt"]
+pub mod intenset;
+#[doc = "INTENCLR (rw) register accessor: an alias for `Reg<INTENCLR_SPEC>`"]
+pub type INTENCLR = crate::Reg<intenclr::INTENCLR_SPEC>;
+#[doc = "Disable interrupt"]
+pub mod intenclr;
+#[doc = "RESULT (r) register accessor: an alias for `Reg<RESULT_SPEC>`"]
+pub type RESULT = crate::Reg<result::RESULT_SPEC>;
+#[doc = "Compare result"]
+pub mod result;
+#[doc = "ENABLE (rw) register accessor: an alias for `Reg<ENABLE_SPEC>`"]
+pub type ENABLE = crate::Reg<enable::ENABLE_SPEC>;
+#[doc = "COMP enable"]
+pub mod enable;
+#[doc = "PSEL (rw) register accessor: an alias for `Reg<PSEL_SPEC>`"]
+pub type PSEL = crate::Reg<psel::PSEL_SPEC>;
+#[doc = "Pin select"]
+pub mod psel;
+#[doc = "REFSEL (rw) register accessor: an alias for `Reg<REFSEL_SPEC>`"]
+pub type REFSEL = crate::Reg<refsel::REFSEL_SPEC>;
+#[doc = "Reference source select for single-ended mode"]
+pub mod refsel;
+#[doc = "EXTREFSEL (rw) register accessor: an alias for `Reg<EXTREFSEL_SPEC>`"]
+pub type EXTREFSEL = crate::Reg<extrefsel::EXTREFSEL_SPEC>;
+#[doc = "External reference select"]
+pub mod extrefsel;
+#[doc = "TH (rw) register accessor: an alias for `Reg<TH_SPEC>`"]
+pub type TH = crate::Reg<th::TH_SPEC>;
+#[doc = "Threshold configuration for hysteresis unit"]
+pub mod th;
+#[doc = "MODE (rw) register accessor: an alias for `Reg<MODE_SPEC>`"]
+pub type MODE = crate::Reg<mode::MODE_SPEC>;
+#[doc = "Mode configuration"]
+pub mod mode;
+#[doc = "HYST (rw) register accessor: an alias for `Reg<HYST_SPEC>`"]
+pub type HYST = crate::Reg<hyst::HYST_SPEC>;
+#[doc = "Comparator hysteresis enable"]
+pub mod hyst;
+#[doc = "ISOURCE (rw) register accessor: an alias for `Reg<ISOURCE_SPEC>`"]
+pub type ISOURCE = crate::Reg<isource::ISOURCE_SPEC>;
+#[doc = "Current source select on analog input"]
+pub mod isource;

vendor/nrf5340-app-pac/src/comp_ns/enable.rs

@@ -0,0 +1,128 @@
+#[doc = "Register `ENABLE` reader"]
+pub struct R(crate::R<ENABLE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ENABLE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ENABLE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ENABLE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ENABLE` writer"]
+pub struct W(crate::W<ENABLE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ENABLE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ENABLE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ENABLE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ENABLE` reader - Enable or disable COMP"]
+pub type ENABLE_R = crate::FieldReader<u8, ENABLE_A>;
+#[doc = "Enable or disable COMP\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum ENABLE_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "2: Enable"]
+    ENABLED = 2,
+}
+impl From<ENABLE_A> for u8 {
+    #[inline(always)]
+    fn from(variant: ENABLE_A) -> Self {
+        variant as _
+    }
+}
+impl ENABLE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<ENABLE_A> {
+        match self.bits {
+            0 => Some(ENABLE_A::DISABLED),
+            2 => Some(ENABLE_A::ENABLED),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == ENABLE_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == ENABLE_A::ENABLED
+    }
+}
+#[doc = "Field `ENABLE` writer - Enable or disable COMP"]
+pub type ENABLE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ENABLE_SPEC, u8, ENABLE_A, 2, O>;
+impl<'a, const O: u8> ENABLE_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(ENABLE_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(ENABLE_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:1 - Enable or disable COMP"]
+    #[inline(always)]
+    pub fn enable(&self) -> ENABLE_R {
+        ENABLE_R::new((self.bits & 3) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:1 - Enable or disable COMP"]
+    #[inline(always)]
+    pub fn enable(&mut self) -> ENABLE_W<0> {
+        ENABLE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "COMP enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [enable](index.html) module"]
+pub struct ENABLE_SPEC;
+impl crate::RegisterSpec for ENABLE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [enable::R](R) reader structure"]
+impl crate::Readable for ENABLE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [enable::W](W) writer structure"]
+impl crate::Writable for ENABLE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets ENABLE to value 0"]
+impl crate::Resettable for ENABLE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/comp_ns/events_cross.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_CROSS` reader"]
+pub struct R(crate::R<EVENTS_CROSS_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_CROSS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_CROSS_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_CROSS_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_CROSS` writer"]
+pub struct W(crate::W<EVENTS_CROSS_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_CROSS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_CROSS_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_CROSS_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_CROSS` reader - Downward or upward crossing"]
+pub type EVENTS_CROSS_R = crate::BitReader<EVENTS_CROSS_A>;
+#[doc = "Downward or upward crossing\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_CROSS_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_CROSS_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_CROSS_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_CROSS_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_CROSS_A {
+        match self.bits {
+            false => EVENTS_CROSS_A::NOT_GENERATED,
+            true => EVENTS_CROSS_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_CROSS_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_CROSS_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_CROSS` writer - Downward or upward crossing"]
+pub type EVENTS_CROSS_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_CROSS_SPEC, EVENTS_CROSS_A, O>;
+impl<'a, const O: u8> EVENTS_CROSS_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_CROSS_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_CROSS_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Downward or upward crossing"]
+    #[inline(always)]
+    pub fn events_cross(&self) -> EVENTS_CROSS_R {
+        EVENTS_CROSS_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Downward or upward crossing"]
+    #[inline(always)]
+    pub fn events_cross(&mut self) -> EVENTS_CROSS_W<0> {
+        EVENTS_CROSS_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Downward or upward crossing\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_cross](index.html) module"]
+pub struct EVENTS_CROSS_SPEC;
+impl crate::RegisterSpec for EVENTS_CROSS_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_cross::R](R) reader structure"]
+impl crate::Readable for EVENTS_CROSS_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_cross::W](W) writer structure"]
+impl crate::Writable for EVENTS_CROSS_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_CROSS to value 0"]
+impl crate::Resettable for EVENTS_CROSS_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/comp_ns/events_down.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_DOWN` reader"]
+pub struct R(crate::R<EVENTS_DOWN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_DOWN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_DOWN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_DOWN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_DOWN` writer"]
+pub struct W(crate::W<EVENTS_DOWN_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_DOWN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_DOWN_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_DOWN_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_DOWN` reader - Downward crossing"]
+pub type EVENTS_DOWN_R = crate::BitReader<EVENTS_DOWN_A>;
+#[doc = "Downward crossing\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_DOWN_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_DOWN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_DOWN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_DOWN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_DOWN_A {
+        match self.bits {
+            false => EVENTS_DOWN_A::NOT_GENERATED,
+            true => EVENTS_DOWN_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_DOWN_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_DOWN_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_DOWN` writer - Downward crossing"]
+pub type EVENTS_DOWN_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_DOWN_SPEC, EVENTS_DOWN_A, O>;
+impl<'a, const O: u8> EVENTS_DOWN_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_DOWN_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_DOWN_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Downward crossing"]
+    #[inline(always)]
+    pub fn events_down(&self) -> EVENTS_DOWN_R {
+        EVENTS_DOWN_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Downward crossing"]
+    #[inline(always)]
+    pub fn events_down(&mut self) -> EVENTS_DOWN_W<0> {
+        EVENTS_DOWN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Downward crossing\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_down](index.html) module"]
+pub struct EVENTS_DOWN_SPEC;
+impl crate::RegisterSpec for EVENTS_DOWN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_down::R](R) reader structure"]
+impl crate::Readable for EVENTS_DOWN_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_down::W](W) writer structure"]
+impl crate::Writable for EVENTS_DOWN_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_DOWN to value 0"]
+impl crate::Resettable for EVENTS_DOWN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/comp_ns/events_ready.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_READY` reader"]
+pub struct R(crate::R<EVENTS_READY_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_READY_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_READY_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_READY_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_READY` writer"]
+pub struct W(crate::W<EVENTS_READY_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_READY_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_READY_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_READY_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_READY` reader - COMP is ready and output is valid"]
+pub type EVENTS_READY_R = crate::BitReader<EVENTS_READY_A>;
+#[doc = "COMP is ready and output is valid\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_READY_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_READY_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_READY_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_READY_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_READY_A {
+        match self.bits {
+            false => EVENTS_READY_A::NOT_GENERATED,
+            true => EVENTS_READY_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_READY_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_READY_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_READY` writer - COMP is ready and output is valid"]
+pub type EVENTS_READY_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_READY_SPEC, EVENTS_READY_A, O>;
+impl<'a, const O: u8> EVENTS_READY_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_READY_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_READY_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - COMP is ready and output is valid"]
+    #[inline(always)]
+    pub fn events_ready(&self) -> EVENTS_READY_R {
+        EVENTS_READY_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - COMP is ready and output is valid"]
+    #[inline(always)]
+    pub fn events_ready(&mut self) -> EVENTS_READY_W<0> {
+        EVENTS_READY_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "COMP is ready and output is valid\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_ready](index.html) module"]
+pub struct EVENTS_READY_SPEC;
+impl crate::RegisterSpec for EVENTS_READY_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_ready::R](R) reader structure"]
+impl crate::Readable for EVENTS_READY_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_ready::W](W) writer structure"]
+impl crate::Writable for EVENTS_READY_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_READY to value 0"]
+impl crate::Resettable for EVENTS_READY_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/comp_ns/events_up.rs

@@ -0,0 +1,126 @@
+#[doc = "Register `EVENTS_UP` reader"]
+pub struct R(crate::R<EVENTS_UP_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_UP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_UP_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_UP_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_UP` writer"]
+pub struct W(crate::W<EVENTS_UP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_UP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_UP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_UP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_UP` reader - Upward crossing"]
+pub type EVENTS_UP_R = crate::BitReader<EVENTS_UP_A>;
+#[doc = "Upward crossing\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_UP_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_UP_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_UP_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_UP_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_UP_A {
+        match self.bits {
+            false => EVENTS_UP_A::NOT_GENERATED,
+            true => EVENTS_UP_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_UP_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_UP_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_UP` writer - Upward crossing"]
+pub type EVENTS_UP_W<'a, const O: u8> = crate::BitWriter<'a, u32, EVENTS_UP_SPEC, EVENTS_UP_A, O>;
+impl<'a, const O: u8> EVENTS_UP_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_UP_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_UP_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Upward crossing"]
+    #[inline(always)]
+    pub fn events_up(&self) -> EVENTS_UP_R {
+        EVENTS_UP_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Upward crossing"]
+    #[inline(always)]
+    pub fn events_up(&mut self) -> EVENTS_UP_W<0> {
+        EVENTS_UP_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Upward crossing\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_up](index.html) module"]
+pub struct EVENTS_UP_SPEC;
+impl crate::RegisterSpec for EVENTS_UP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_up::R](R) reader structure"]
+impl crate::Readable for EVENTS_UP_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_up::W](W) writer structure"]
+impl crate::Writable for EVENTS_UP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_UP to value 0"]
+impl crate::Resettable for EVENTS_UP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/comp_ns/extrefsel.rs

@@ -0,0 +1,207 @@
+#[doc = "Register `EXTREFSEL` reader"]
+pub struct R(crate::R<EXTREFSEL_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EXTREFSEL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EXTREFSEL_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EXTREFSEL_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EXTREFSEL` writer"]
+pub struct W(crate::W<EXTREFSEL_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EXTREFSEL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EXTREFSEL_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EXTREFSEL_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EXTREFSEL` reader - External analog reference select"]
+pub type EXTREFSEL_R = crate::FieldReader<u8, EXTREFSEL_A>;
+#[doc = "External analog reference select\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum EXTREFSEL_A {
+    #[doc = "0: Use AIN0 as external analog reference"]
+    ANALOG_REFERENCE0 = 0,
+    #[doc = "1: Use AIN1 as external analog reference"]
+    ANALOG_REFERENCE1 = 1,
+    #[doc = "2: Use AIN2 as external analog reference"]
+    ANALOG_REFERENCE2 = 2,
+    #[doc = "3: Use AIN3 as external analog reference"]
+    ANALOG_REFERENCE3 = 3,
+    #[doc = "4: Use AIN4 as external analog reference"]
+    ANALOG_REFERENCE4 = 4,
+    #[doc = "5: Use AIN5 as external analog reference"]
+    ANALOG_REFERENCE5 = 5,
+    #[doc = "6: Use AIN6 as external analog reference"]
+    ANALOG_REFERENCE6 = 6,
+    #[doc = "7: Use AIN7 as external analog reference"]
+    ANALOG_REFERENCE7 = 7,
+}
+impl From<EXTREFSEL_A> for u8 {
+    #[inline(always)]
+    fn from(variant: EXTREFSEL_A) -> Self {
+        variant as _
+    }
+}
+impl EXTREFSEL_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EXTREFSEL_A {
+        match self.bits {
+            0 => EXTREFSEL_A::ANALOG_REFERENCE0,
+            1 => EXTREFSEL_A::ANALOG_REFERENCE1,
+            2 => EXTREFSEL_A::ANALOG_REFERENCE2,
+            3 => EXTREFSEL_A::ANALOG_REFERENCE3,
+            4 => EXTREFSEL_A::ANALOG_REFERENCE4,
+            5 => EXTREFSEL_A::ANALOG_REFERENCE5,
+            6 => EXTREFSEL_A::ANALOG_REFERENCE6,
+            7 => EXTREFSEL_A::ANALOG_REFERENCE7,
+            _ => unreachable!(),
+        }
+    }
+    #[doc = "Checks if the value of the field is `ANALOG_REFERENCE0`"]
+    #[inline(always)]
+    pub fn is_analog_reference0(&self) -> bool {
+        *self == EXTREFSEL_A::ANALOG_REFERENCE0
+    }
+    #[doc = "Checks if the value of the field is `ANALOG_REFERENCE1`"]
+    #[inline(always)]
+    pub fn is_analog_reference1(&self) -> bool {
+        *self == EXTREFSEL_A::ANALOG_REFERENCE1
+    }
+    #[doc = "Checks if the value of the field is `ANALOG_REFERENCE2`"]
+    #[inline(always)]
+    pub fn is_analog_reference2(&self) -> bool {
+        *self == EXTREFSEL_A::ANALOG_REFERENCE2
+    }
+    #[doc = "Checks if the value of the field is `ANALOG_REFERENCE3`"]
+    #[inline(always)]
+    pub fn is_analog_reference3(&self) -> bool {
+        *self == EXTREFSEL_A::ANALOG_REFERENCE3
+    }
+    #[doc = "Checks if the value of the field is `ANALOG_REFERENCE4`"]
+    #[inline(always)]
+    pub fn is_analog_reference4(&self) -> bool {
+        *self == EXTREFSEL_A::ANALOG_REFERENCE4
+    }
+    #[doc = "Checks if the value of the field is `ANALOG_REFERENCE5`"]
+    #[inline(always)]
+    pub fn is_analog_reference5(&self) -> bool {
+        *self == EXTREFSEL_A::ANALOG_REFERENCE5
+    }
+    #[doc = "Checks if the value of the field is `ANALOG_REFERENCE6`"]
+    #[inline(always)]
+    pub fn is_analog_reference6(&self) -> bool {
+        *self == EXTREFSEL_A::ANALOG_REFERENCE6
+    }
+    #[doc = "Checks if the value of the field is `ANALOG_REFERENCE7`"]
+    #[inline(always)]
+    pub fn is_analog_reference7(&self) -> bool {
+        *self == EXTREFSEL_A::ANALOG_REFERENCE7
+    }
+}
+#[doc = "Field `EXTREFSEL` writer - External analog reference select"]
+pub type EXTREFSEL_W<'a, const O: u8> =
+    crate::FieldWriterSafe<'a, u32, EXTREFSEL_SPEC, u8, EXTREFSEL_A, 3, O>;
+impl<'a, const O: u8> EXTREFSEL_W<'a, O> {
+    #[doc = "Use AIN0 as external analog reference"]
+    #[inline(always)]
+    pub fn analog_reference0(self) -> &'a mut W {
+        self.variant(EXTREFSEL_A::ANALOG_REFERENCE0)
+    }
+    #[doc = "Use AIN1 as external analog reference"]
+    #[inline(always)]
+    pub fn analog_reference1(self) -> &'a mut W {
+        self.variant(EXTREFSEL_A::ANALOG_REFERENCE1)
+    }
+    #[doc = "Use AIN2 as external analog reference"]
+    #[inline(always)]
+    pub fn analog_reference2(self) -> &'a mut W {
+        self.variant(EXTREFSEL_A::ANALOG_REFERENCE2)
+    }
+    #[doc = "Use AIN3 as external analog reference"]
+    #[inline(always)]
+    pub fn analog_reference3(self) -> &'a mut W {
+        self.variant(EXTREFSEL_A::ANALOG_REFERENCE3)
+    }
+    #[doc = "Use AIN4 as external analog reference"]
+    #[inline(always)]
+    pub fn analog_reference4(self) -> &'a mut W {
+        self.variant(EXTREFSEL_A::ANALOG_REFERENCE4)
+    }
+    #[doc = "Use AIN5 as external analog reference"]
+    #[inline(always)]
+    pub fn analog_reference5(self) -> &'a mut W {
+        self.variant(EXTREFSEL_A::ANALOG_REFERENCE5)
+    }
+    #[doc = "Use AIN6 as external analog reference"]
+    #[inline(always)]
+    pub fn analog_reference6(self) -> &'a mut W {
+        self.variant(EXTREFSEL_A::ANALOG_REFERENCE6)
+    }
+    #[doc = "Use AIN7 as external analog reference"]
+    #[inline(always)]
+    pub fn analog_reference7(self) -> &'a mut W {
+        self.variant(EXTREFSEL_A::ANALOG_REFERENCE7)
+    }
+}
+impl R {
+    #[doc = "Bits 0:2 - External analog reference select"]
+    #[inline(always)]
+    pub fn extrefsel(&self) -> EXTREFSEL_R {
+        EXTREFSEL_R::new((self.bits & 7) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:2 - External analog reference select"]
+    #[inline(always)]
+    pub fn extrefsel(&mut self) -> EXTREFSEL_W<0> {
+        EXTREFSEL_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "External reference select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [extrefsel](index.html) module"]
+pub struct EXTREFSEL_SPEC;
+impl crate::RegisterSpec for EXTREFSEL_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [extrefsel::R](R) reader structure"]
+impl crate::Readable for EXTREFSEL_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [extrefsel::W](W) writer structure"]
+impl crate::Writable for EXTREFSEL_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EXTREFSEL to value 0"]
+impl crate::Resettable for EXTREFSEL_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/comp_ns/hyst.rs

@@ -0,0 +1,126 @@
+#[doc = "Register `HYST` reader"]
+pub struct R(crate::R<HYST_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HYST_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HYST_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HYST_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `HYST` writer"]
+pub struct W(crate::W<HYST_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<HYST_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<HYST_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<HYST_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `HYST` reader - Comparator hysteresis"]
+pub type HYST_R = crate::BitReader<HYST_A>;
+#[doc = "Comparator hysteresis\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HYST_A {
+    #[doc = "0: Comparator hysteresis disabled"]
+    NO_HYST = 0,
+    #[doc = "1: Comparator hysteresis enabled"]
+    HYST50M_V = 1,
+}
+impl From<HYST_A> for bool {
+    #[inline(always)]
+    fn from(variant: HYST_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl HYST_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> HYST_A {
+        match self.bits {
+            false => HYST_A::NO_HYST,
+            true => HYST_A::HYST50M_V,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NO_HYST`"]
+    #[inline(always)]
+    pub fn is_no_hyst(&self) -> bool {
+        *self == HYST_A::NO_HYST
+    }
+    #[doc = "Checks if the value of the field is `HYST50M_V`"]
+    #[inline(always)]
+    pub fn is_hyst50m_v(&self) -> bool {
+        *self == HYST_A::HYST50M_V
+    }
+}
+#[doc = "Field `HYST` writer - Comparator hysteresis"]
+pub type HYST_W<'a, const O: u8> = crate::BitWriter<'a, u32, HYST_SPEC, HYST_A, O>;
+impl<'a, const O: u8> HYST_W<'a, O> {
+    #[doc = "Comparator hysteresis disabled"]
+    #[inline(always)]
+    pub fn no_hyst(self) -> &'a mut W {
+        self.variant(HYST_A::NO_HYST)
+    }
+    #[doc = "Comparator hysteresis enabled"]
+    #[inline(always)]
+    pub fn hyst50m_v(self) -> &'a mut W {
+        self.variant(HYST_A::HYST50M_V)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Comparator hysteresis"]
+    #[inline(always)]
+    pub fn hyst(&self) -> HYST_R {
+        HYST_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Comparator hysteresis"]
+    #[inline(always)]
+    pub fn hyst(&mut self) -> HYST_W<0> {
+        HYST_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Comparator hysteresis enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hyst](index.html) module"]
+pub struct HYST_SPEC;
+impl crate::RegisterSpec for HYST_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hyst::R](R) reader structure"]
+impl crate::Readable for HYST_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [hyst::W](W) writer structure"]
+impl crate::Writable for HYST_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets HYST to value 0"]
+impl crate::Resettable for HYST_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/comp_ns/inten.rs

@@ -0,0 +1,306 @@
+#[doc = "Register `INTEN` reader"]
+pub struct R(crate::R<INTEN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTEN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTEN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTEN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTEN` writer"]
+pub struct W(crate::W<INTEN_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTEN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTEN_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTEN_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `READY` reader - Enable or disable interrupt for event READY"]
+pub type READY_R = crate::BitReader<READY_A>;
+#[doc = "Enable or disable interrupt for event READY\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum READY_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "1: Enable"]
+    ENABLED = 1,
+}
+impl From<READY_A> for bool {
+    #[inline(always)]
+    fn from(variant: READY_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl READY_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> READY_A {
+        match self.bits {
+            false => READY_A::DISABLED,
+            true => READY_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == READY_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == READY_A::ENABLED
+    }
+}
+#[doc = "Field `READY` writer - Enable or disable interrupt for event READY"]
+pub type READY_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, READY_A, O>;
+impl<'a, const O: u8> READY_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(READY_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(READY_A::ENABLED)
+    }
+}
+#[doc = "Field `DOWN` reader - Enable or disable interrupt for event DOWN"]
+pub type DOWN_R = crate::BitReader<DOWN_A>;
+#[doc = "Enable or disable interrupt for event DOWN\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum DOWN_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "1: Enable"]
+    ENABLED = 1,
+}
+impl From<DOWN_A> for bool {
+    #[inline(always)]
+    fn from(variant: DOWN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl DOWN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DOWN_A {
+        match self.bits {
+            false => DOWN_A::DISABLED,
+            true => DOWN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == DOWN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == DOWN_A::ENABLED
+    }
+}
+#[doc = "Field `DOWN` writer - Enable or disable interrupt for event DOWN"]
+pub type DOWN_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, DOWN_A, O>;
+impl<'a, const O: u8> DOWN_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(DOWN_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(DOWN_A::ENABLED)
+    }
+}
+#[doc = "Field `UP` reader - Enable or disable interrupt for event UP"]
+pub type UP_R = crate::BitReader<UP_A>;
+#[doc = "Enable or disable interrupt for event UP\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum UP_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "1: Enable"]
+    ENABLED = 1,
+}
+impl From<UP_A> for bool {
+    #[inline(always)]
+    fn from(variant: UP_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl UP_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> UP_A {
+        match self.bits {
+            false => UP_A::DISABLED,
+            true => UP_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == UP_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == UP_A::ENABLED
+    }
+}
+#[doc = "Field `UP` writer - Enable or disable interrupt for event UP"]
+pub type UP_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, UP_A, O>;
+impl<'a, const O: u8> UP_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(UP_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(UP_A::ENABLED)
+    }
+}
+#[doc = "Field `CROSS` reader - Enable or disable interrupt for event CROSS"]
+pub type CROSS_R = crate::BitReader<CROSS_A>;
+#[doc = "Enable or disable interrupt for event CROSS\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CROSS_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "1: Enable"]
+    ENABLED = 1,
+}
+impl From<CROSS_A> for bool {
+    #[inline(always)]
+    fn from(variant: CROSS_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl CROSS_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CROSS_A {
+        match self.bits {
+            false => CROSS_A::DISABLED,
+            true => CROSS_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == CROSS_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == CROSS_A::ENABLED
+    }
+}
+#[doc = "Field `CROSS` writer - Enable or disable interrupt for event CROSS"]
+pub type CROSS_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, CROSS_A, O>;
+impl<'a, const O: u8> CROSS_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(CROSS_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(CROSS_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Enable or disable interrupt for event READY"]
+    #[inline(always)]
+    pub fn ready(&self) -> READY_R {
+        READY_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Enable or disable interrupt for event DOWN"]
+    #[inline(always)]
+    pub fn down(&self) -> DOWN_R {
+        DOWN_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - Enable or disable interrupt for event UP"]
+    #[inline(always)]
+    pub fn up(&self) -> UP_R {
+        UP_R::new(((self.bits >> 2) & 1) != 0)
+    }
+    #[doc = "Bit 3 - Enable or disable interrupt for event CROSS"]
+    #[inline(always)]
+    pub fn cross(&self) -> CROSS_R {
+        CROSS_R::new(((self.bits >> 3) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Enable or disable interrupt for event READY"]
+    #[inline(always)]
+    pub fn ready(&mut self) -> READY_W<0> {
+        READY_W::new(self)
+    }
+    #[doc = "Bit 1 - Enable or disable interrupt for event DOWN"]
+    #[inline(always)]
+    pub fn down(&mut self) -> DOWN_W<1> {
+        DOWN_W::new(self)
+    }
+    #[doc = "Bit 2 - Enable or disable interrupt for event UP"]
+    #[inline(always)]
+    pub fn up(&mut self) -> UP_W<2> {
+        UP_W::new(self)
+    }
+    #[doc = "Bit 3 - Enable or disable interrupt for event CROSS"]
+    #[inline(always)]
+    pub fn cross(&mut self) -> CROSS_W<3> {
+        CROSS_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Enable or disable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [inten](index.html) module"]
+pub struct INTEN_SPEC;
+impl crate::RegisterSpec for INTEN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [inten::R](R) reader structure"]
+impl crate::Readable for INTEN_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [inten::W](W) writer structure"]
+impl crate::Writable for INTEN_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTEN to value 0"]
+impl crate::Resettable for INTEN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/comp_ns/intenclr.rs

@@ -0,0 +1,334 @@
+#[doc = "Register `INTENCLR` reader"]
+pub struct R(crate::R<INTENCLR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENCLR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENCLR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENCLR` writer"]
+pub struct W(crate::W<INTENCLR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENCLR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENCLR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `READY` reader - Write '1' to disable interrupt for event READY"]
+pub type READY_R = crate::BitReader<READY_A>;
+#[doc = "Write '1' to disable interrupt for event READY\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum READY_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<READY_A> for bool {
+    #[inline(always)]
+    fn from(variant: READY_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl READY_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> READY_A {
+        match self.bits {
+            false => READY_A::DISABLED,
+            true => READY_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == READY_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == READY_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event READY\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum READY_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<READY_AW> for bool {
+    #[inline(always)]
+    fn from(variant: READY_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `READY` writer - Write '1' to disable interrupt for event READY"]
+pub type READY_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, READY_AW, O>;
+impl<'a, const O: u8> READY_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(READY_AW::CLEAR)
+    }
+}
+#[doc = "Field `DOWN` reader - Write '1' to disable interrupt for event DOWN"]
+pub type DOWN_R = crate::BitReader<DOWN_A>;
+#[doc = "Write '1' to disable interrupt for event DOWN\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum DOWN_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<DOWN_A> for bool {
+    #[inline(always)]
+    fn from(variant: DOWN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl DOWN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DOWN_A {
+        match self.bits {
+            false => DOWN_A::DISABLED,
+            true => DOWN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == DOWN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == DOWN_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event DOWN\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum DOWN_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<DOWN_AW> for bool {
+    #[inline(always)]
+    fn from(variant: DOWN_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `DOWN` writer - Write '1' to disable interrupt for event DOWN"]
+pub type DOWN_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, DOWN_AW, O>;
+impl<'a, const O: u8> DOWN_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(DOWN_AW::CLEAR)
+    }
+}
+#[doc = "Field `UP` reader - Write '1' to disable interrupt for event UP"]
+pub type UP_R = crate::BitReader<UP_A>;
+#[doc = "Write '1' to disable interrupt for event UP\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum UP_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<UP_A> for bool {
+    #[inline(always)]
+    fn from(variant: UP_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl UP_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> UP_A {
+        match self.bits {
+            false => UP_A::DISABLED,
+            true => UP_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == UP_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == UP_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event UP\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum UP_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<UP_AW> for bool {
+    #[inline(always)]
+    fn from(variant: UP_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `UP` writer - Write '1' to disable interrupt for event UP"]
+pub type UP_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, UP_AW, O>;
+impl<'a, const O: u8> UP_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(UP_AW::CLEAR)
+    }
+}
+#[doc = "Field `CROSS` reader - Write '1' to disable interrupt for event CROSS"]
+pub type CROSS_R = crate::BitReader<CROSS_A>;
+#[doc = "Write '1' to disable interrupt for event CROSS\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CROSS_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<CROSS_A> for bool {
+    #[inline(always)]
+    fn from(variant: CROSS_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl CROSS_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CROSS_A {
+        match self.bits {
+            false => CROSS_A::DISABLED,
+            true => CROSS_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == CROSS_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == CROSS_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event CROSS\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CROSS_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<CROSS_AW> for bool {
+    #[inline(always)]
+    fn from(variant: CROSS_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `CROSS` writer - Write '1' to disable interrupt for event CROSS"]
+pub type CROSS_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, CROSS_AW, O>;
+impl<'a, const O: u8> CROSS_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(CROSS_AW::CLEAR)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Write '1' to disable interrupt for event READY"]
+    #[inline(always)]
+    pub fn ready(&self) -> READY_R {
+        READY_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Write '1' to disable interrupt for event DOWN"]
+    #[inline(always)]
+    pub fn down(&self) -> DOWN_R {
+        DOWN_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - Write '1' to disable interrupt for event UP"]
+    #[inline(always)]
+    pub fn up(&self) -> UP_R {
+        UP_R::new(((self.bits >> 2) & 1) != 0)
+    }
+    #[doc = "Bit 3 - Write '1' to disable interrupt for event CROSS"]
+    #[inline(always)]
+    pub fn cross(&self) -> CROSS_R {
+        CROSS_R::new(((self.bits >> 3) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Write '1' to disable interrupt for event READY"]
+    #[inline(always)]
+    pub fn ready(&mut self) -> READY_W<0> {
+        READY_W::new(self)
+    }
+    #[doc = "Bit 1 - Write '1' to disable interrupt for event DOWN"]
+    #[inline(always)]
+    pub fn down(&mut self) -> DOWN_W<1> {
+        DOWN_W::new(self)
+    }
+    #[doc = "Bit 2 - Write '1' to disable interrupt for event UP"]
+    #[inline(always)]
+    pub fn up(&mut self) -> UP_W<2> {
+        UP_W::new(self)
+    }
+    #[doc = "Bit 3 - Write '1' to disable interrupt for event CROSS"]
+    #[inline(always)]
+    pub fn cross(&mut self) -> CROSS_W<3> {
+        CROSS_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Disable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"]
+pub struct INTENCLR_SPEC;
+impl crate::RegisterSpec for INTENCLR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [intenclr::R](R) reader structure"]
+impl crate::Readable for INTENCLR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"]
+impl crate::Writable for INTENCLR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTENCLR to value 0"]
+impl crate::Resettable for INTENCLR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/comp_ns/intenset.rs

@@ -0,0 +1,334 @@
+#[doc = "Register `INTENSET` reader"]
+pub struct R(crate::R<INTENSET_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENSET_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENSET_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENSET` writer"]
+pub struct W(crate::W<INTENSET_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENSET_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENSET_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `READY` reader - Write '1' to enable interrupt for event READY"]
+pub type READY_R = crate::BitReader<READY_A>;
+#[doc = "Write '1' to enable interrupt for event READY\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum READY_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<READY_A> for bool {
+    #[inline(always)]
+    fn from(variant: READY_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl READY_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> READY_A {
+        match self.bits {
+            false => READY_A::DISABLED,
+            true => READY_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == READY_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == READY_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event READY\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum READY_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<READY_AW> for bool {
+    #[inline(always)]
+    fn from(variant: READY_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `READY` writer - Write '1' to enable interrupt for event READY"]
+pub type READY_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, READY_AW, O>;
+impl<'a, const O: u8> READY_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(READY_AW::SET)
+    }
+}
+#[doc = "Field `DOWN` reader - Write '1' to enable interrupt for event DOWN"]
+pub type DOWN_R = crate::BitReader<DOWN_A>;
+#[doc = "Write '1' to enable interrupt for event DOWN\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum DOWN_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<DOWN_A> for bool {
+    #[inline(always)]
+    fn from(variant: DOWN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl DOWN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DOWN_A {
+        match self.bits {
+            false => DOWN_A::DISABLED,
+            true => DOWN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == DOWN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == DOWN_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event DOWN\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum DOWN_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<DOWN_AW> for bool {
+    #[inline(always)]
+    fn from(variant: DOWN_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `DOWN` writer - Write '1' to enable interrupt for event DOWN"]
+pub type DOWN_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, DOWN_AW, O>;
+impl<'a, const O: u8> DOWN_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(DOWN_AW::SET)
+    }
+}
+#[doc = "Field `UP` reader - Write '1' to enable interrupt for event UP"]
+pub type UP_R = crate::BitReader<UP_A>;
+#[doc = "Write '1' to enable interrupt for event UP\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum UP_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<UP_A> for bool {
+    #[inline(always)]
+    fn from(variant: UP_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl UP_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> UP_A {
+        match self.bits {
+            false => UP_A::DISABLED,
+            true => UP_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == UP_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == UP_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event UP\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum UP_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<UP_AW> for bool {
+    #[inline(always)]
+    fn from(variant: UP_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `UP` writer - Write '1' to enable interrupt for event UP"]
+pub type UP_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, UP_AW, O>;
+impl<'a, const O: u8> UP_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(UP_AW::SET)
+    }
+}
+#[doc = "Field `CROSS` reader - Write '1' to enable interrupt for event CROSS"]
+pub type CROSS_R = crate::BitReader<CROSS_A>;
+#[doc = "Write '1' to enable interrupt for event CROSS\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CROSS_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<CROSS_A> for bool {
+    #[inline(always)]
+    fn from(variant: CROSS_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl CROSS_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CROSS_A {
+        match self.bits {
+            false => CROSS_A::DISABLED,
+            true => CROSS_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == CROSS_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == CROSS_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event CROSS\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CROSS_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<CROSS_AW> for bool {
+    #[inline(always)]
+    fn from(variant: CROSS_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `CROSS` writer - Write '1' to enable interrupt for event CROSS"]
+pub type CROSS_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, CROSS_AW, O>;
+impl<'a, const O: u8> CROSS_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(CROSS_AW::SET)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Write '1' to enable interrupt for event READY"]
+    #[inline(always)]
+    pub fn ready(&self) -> READY_R {
+        READY_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Write '1' to enable interrupt for event DOWN"]
+    #[inline(always)]
+    pub fn down(&self) -> DOWN_R {
+        DOWN_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - Write '1' to enable interrupt for event UP"]
+    #[inline(always)]
+    pub fn up(&self) -> UP_R {
+        UP_R::new(((self.bits >> 2) & 1) != 0)
+    }
+    #[doc = "Bit 3 - Write '1' to enable interrupt for event CROSS"]
+    #[inline(always)]
+    pub fn cross(&self) -> CROSS_R {
+        CROSS_R::new(((self.bits >> 3) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Write '1' to enable interrupt for event READY"]
+    #[inline(always)]
+    pub fn ready(&mut self) -> READY_W<0> {
+        READY_W::new(self)
+    }
+    #[doc = "Bit 1 - Write '1' to enable interrupt for event DOWN"]
+    #[inline(always)]
+    pub fn down(&mut self) -> DOWN_W<1> {
+        DOWN_W::new(self)
+    }
+    #[doc = "Bit 2 - Write '1' to enable interrupt for event UP"]
+    #[inline(always)]
+    pub fn up(&mut self) -> UP_W<2> {
+        UP_W::new(self)
+    }
+    #[doc = "Bit 3 - Write '1' to enable interrupt for event CROSS"]
+    #[inline(always)]
+    pub fn cross(&mut self) -> CROSS_W<3> {
+        CROSS_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Enable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"]
+pub struct INTENSET_SPEC;
+impl crate::RegisterSpec for INTENSET_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [intenset::R](R) reader structure"]
+impl crate::Readable for INTENSET_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"]
+impl crate::Writable for INTENSET_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTENSET to value 0"]
+impl crate::Resettable for INTENSET_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/comp_ns/isource.rs

@@ -0,0 +1,155 @@
+#[doc = "Register `ISOURCE` reader"]
+pub struct R(crate::R<ISOURCE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ISOURCE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ISOURCE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ISOURCE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ISOURCE` writer"]
+pub struct W(crate::W<ISOURCE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ISOURCE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ISOURCE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ISOURCE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ISOURCE` reader - Comparator hysteresis"]
+pub type ISOURCE_R = crate::FieldReader<u8, ISOURCE_A>;
+#[doc = "Comparator hysteresis\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum ISOURCE_A {
+    #[doc = "0: Current source disabled"]
+    OFF = 0,
+    #[doc = "1: Current source enabled (+/- 2.5 uA)"]
+    IEN2M_A5 = 1,
+    #[doc = "2: Current source enabled (+/- 5 uA)"]
+    IEN5M_A = 2,
+    #[doc = "3: Current source enabled (+/- 10 uA)"]
+    IEN10M_A = 3,
+}
+impl From<ISOURCE_A> for u8 {
+    #[inline(always)]
+    fn from(variant: ISOURCE_A) -> Self {
+        variant as _
+    }
+}
+impl ISOURCE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ISOURCE_A {
+        match self.bits {
+            0 => ISOURCE_A::OFF,
+            1 => ISOURCE_A::IEN2M_A5,
+            2 => ISOURCE_A::IEN5M_A,
+            3 => ISOURCE_A::IEN10M_A,
+            _ => unreachable!(),
+        }
+    }
+    #[doc = "Checks if the value of the field is `OFF`"]
+    #[inline(always)]
+    pub fn is_off(&self) -> bool {
+        *self == ISOURCE_A::OFF
+    }
+    #[doc = "Checks if the value of the field is `IEN2M_A5`"]
+    #[inline(always)]
+    pub fn is_ien2m_a5(&self) -> bool {
+        *self == ISOURCE_A::IEN2M_A5
+    }
+    #[doc = "Checks if the value of the field is `IEN5M_A`"]
+    #[inline(always)]
+    pub fn is_ien5m_a(&self) -> bool {
+        *self == ISOURCE_A::IEN5M_A
+    }
+    #[doc = "Checks if the value of the field is `IEN10M_A`"]
+    #[inline(always)]
+    pub fn is_ien10m_a(&self) -> bool {
+        *self == ISOURCE_A::IEN10M_A
+    }
+}
+#[doc = "Field `ISOURCE` writer - Comparator hysteresis"]
+pub type ISOURCE_W<'a, const O: u8> =
+    crate::FieldWriterSafe<'a, u32, ISOURCE_SPEC, u8, ISOURCE_A, 2, O>;
+impl<'a, const O: u8> ISOURCE_W<'a, O> {
+    #[doc = "Current source disabled"]
+    #[inline(always)]
+    pub fn off(self) -> &'a mut W {
+        self.variant(ISOURCE_A::OFF)
+    }
+    #[doc = "Current source enabled (+/- 2.5 uA)"]
+    #[inline(always)]
+    pub fn ien2m_a5(self) -> &'a mut W {
+        self.variant(ISOURCE_A::IEN2M_A5)
+    }
+    #[doc = "Current source enabled (+/- 5 uA)"]
+    #[inline(always)]
+    pub fn ien5m_a(self) -> &'a mut W {
+        self.variant(ISOURCE_A::IEN5M_A)
+    }
+    #[doc = "Current source enabled (+/- 10 uA)"]
+    #[inline(always)]
+    pub fn ien10m_a(self) -> &'a mut W {
+        self.variant(ISOURCE_A::IEN10M_A)
+    }
+}
+impl R {
+    #[doc = "Bits 0:1 - Comparator hysteresis"]
+    #[inline(always)]
+    pub fn isource(&self) -> ISOURCE_R {
+        ISOURCE_R::new((self.bits & 3) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:1 - Comparator hysteresis"]
+    #[inline(always)]
+    pub fn isource(&mut self) -> ISOURCE_W<0> {
+        ISOURCE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Current source select on analog input\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [isource](index.html) module"]
+pub struct ISOURCE_SPEC;
+impl crate::RegisterSpec for ISOURCE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [isource::R](R) reader structure"]
+impl crate::Readable for ISOURCE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [isource::W](W) writer structure"]
+impl crate::Writable for ISOURCE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets ISOURCE to value 0"]
+impl crate::Resettable for ISOURCE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/comp_ns/mode.rs

@@ -0,0 +1,201 @@
+#[doc = "Register `MODE` reader"]
+pub struct R(crate::R<MODE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<MODE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<MODE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<MODE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `MODE` writer"]
+pub struct W(crate::W<MODE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<MODE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<MODE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<MODE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `SP` reader - Speed and power modes"]
+pub type SP_R = crate::FieldReader<u8, SP_A>;
+#[doc = "Speed and power modes\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum SP_A {
+    #[doc = "0: Low-power mode"]
+    LOW = 0,
+    #[doc = "1: Normal mode"]
+    NORMAL = 1,
+    #[doc = "2: High-speed mode"]
+    HIGH = 2,
+}
+impl From<SP_A> for u8 {
+    #[inline(always)]
+    fn from(variant: SP_A) -> Self {
+        variant as _
+    }
+}
+impl SP_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<SP_A> {
+        match self.bits {
+            0 => Some(SP_A::LOW),
+            1 => Some(SP_A::NORMAL),
+            2 => Some(SP_A::HIGH),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `LOW`"]
+    #[inline(always)]
+    pub fn is_low(&self) -> bool {
+        *self == SP_A::LOW
+    }
+    #[doc = "Checks if the value of the field is `NORMAL`"]
+    #[inline(always)]
+    pub fn is_normal(&self) -> bool {
+        *self == SP_A::NORMAL
+    }
+    #[doc = "Checks if the value of the field is `HIGH`"]
+    #[inline(always)]
+    pub fn is_high(&self) -> bool {
+        *self == SP_A::HIGH
+    }
+}
+#[doc = "Field `SP` writer - Speed and power modes"]
+pub type SP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, MODE_SPEC, u8, SP_A, 2, O>;
+impl<'a, const O: u8> SP_W<'a, O> {
+    #[doc = "Low-power mode"]
+    #[inline(always)]
+    pub fn low(self) -> &'a mut W {
+        self.variant(SP_A::LOW)
+    }
+    #[doc = "Normal mode"]
+    #[inline(always)]
+    pub fn normal(self) -> &'a mut W {
+        self.variant(SP_A::NORMAL)
+    }
+    #[doc = "High-speed mode"]
+    #[inline(always)]
+    pub fn high(self) -> &'a mut W {
+        self.variant(SP_A::HIGH)
+    }
+}
+#[doc = "Field `MAIN` reader - Main operation modes"]
+pub type MAIN_R = crate::BitReader<MAIN_A>;
+#[doc = "Main operation modes\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum MAIN_A {
+    #[doc = "0: Single-ended mode"]
+    SE = 0,
+    #[doc = "1: Differential mode"]
+    DIFF = 1,
+}
+impl From<MAIN_A> for bool {
+    #[inline(always)]
+    fn from(variant: MAIN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl MAIN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> MAIN_A {
+        match self.bits {
+            false => MAIN_A::SE,
+            true => MAIN_A::DIFF,
+        }
+    }
+    #[doc = "Checks if the value of the field is `SE`"]
+    #[inline(always)]
+    pub fn is_se(&self) -> bool {
+        *self == MAIN_A::SE
+    }
+    #[doc = "Checks if the value of the field is `DIFF`"]
+    #[inline(always)]
+    pub fn is_diff(&self) -> bool {
+        *self == MAIN_A::DIFF
+    }
+}
+#[doc = "Field `MAIN` writer - Main operation modes"]
+pub type MAIN_W<'a, const O: u8> = crate::BitWriter<'a, u32, MODE_SPEC, MAIN_A, O>;
+impl<'a, const O: u8> MAIN_W<'a, O> {
+    #[doc = "Single-ended mode"]
+    #[inline(always)]
+    pub fn se(self) -> &'a mut W {
+        self.variant(MAIN_A::SE)
+    }
+    #[doc = "Differential mode"]
+    #[inline(always)]
+    pub fn diff(self) -> &'a mut W {
+        self.variant(MAIN_A::DIFF)
+    }
+}
+impl R {
+    #[doc = "Bits 0:1 - Speed and power modes"]
+    #[inline(always)]
+    pub fn sp(&self) -> SP_R {
+        SP_R::new((self.bits & 3) as u8)
+    }
+    #[doc = "Bit 8 - Main operation modes"]
+    #[inline(always)]
+    pub fn main(&self) -> MAIN_R {
+        MAIN_R::new(((self.bits >> 8) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:1 - Speed and power modes"]
+    #[inline(always)]
+    pub fn sp(&mut self) -> SP_W<0> {
+        SP_W::new(self)
+    }
+    #[doc = "Bit 8 - Main operation modes"]
+    #[inline(always)]
+    pub fn main(&mut self) -> MAIN_W<8> {
+        MAIN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Mode configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mode](index.html) module"]
+pub struct MODE_SPEC;
+impl crate::RegisterSpec for MODE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [mode::R](R) reader structure"]
+impl crate::Readable for MODE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [mode::W](W) writer structure"]
+impl crate::Writable for MODE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets MODE to value 0"]
+impl crate::Resettable for MODE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/comp_ns/psel.rs

@@ -0,0 +1,206 @@
+#[doc = "Register `PSEL` reader"]
+pub struct R(crate::R<PSEL_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PSEL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PSEL_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PSEL_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PSEL` writer"]
+pub struct W(crate::W<PSEL_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PSEL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PSEL_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PSEL_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `PSEL` reader - Analog pin select"]
+pub type PSEL_R = crate::FieldReader<u8, PSEL_A>;
+#[doc = "Analog pin select\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum PSEL_A {
+    #[doc = "0: AIN0 selected as analog input"]
+    ANALOG_INPUT0 = 0,
+    #[doc = "1: AIN1 selected as analog input"]
+    ANALOG_INPUT1 = 1,
+    #[doc = "2: AIN2 selected as analog input"]
+    ANALOG_INPUT2 = 2,
+    #[doc = "3: AIN3 selected as analog input"]
+    ANALOG_INPUT3 = 3,
+    #[doc = "4: AIN4 selected as analog input"]
+    ANALOG_INPUT4 = 4,
+    #[doc = "5: AIN5 selected as analog input"]
+    ANALOG_INPUT5 = 5,
+    #[doc = "6: AIN6 selected as analog input"]
+    ANALOG_INPUT6 = 6,
+    #[doc = "7: AIN7 selected as analog input"]
+    ANALOG_INPUT7 = 7,
+}
+impl From<PSEL_A> for u8 {
+    #[inline(always)]
+    fn from(variant: PSEL_A) -> Self {
+        variant as _
+    }
+}
+impl PSEL_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> PSEL_A {
+        match self.bits {
+            0 => PSEL_A::ANALOG_INPUT0,
+            1 => PSEL_A::ANALOG_INPUT1,
+            2 => PSEL_A::ANALOG_INPUT2,
+            3 => PSEL_A::ANALOG_INPUT3,
+            4 => PSEL_A::ANALOG_INPUT4,
+            5 => PSEL_A::ANALOG_INPUT5,
+            6 => PSEL_A::ANALOG_INPUT6,
+            7 => PSEL_A::ANALOG_INPUT7,
+            _ => unreachable!(),
+        }
+    }
+    #[doc = "Checks if the value of the field is `ANALOG_INPUT0`"]
+    #[inline(always)]
+    pub fn is_analog_input0(&self) -> bool {
+        *self == PSEL_A::ANALOG_INPUT0
+    }
+    #[doc = "Checks if the value of the field is `ANALOG_INPUT1`"]
+    #[inline(always)]
+    pub fn is_analog_input1(&self) -> bool {
+        *self == PSEL_A::ANALOG_INPUT1
+    }
+    #[doc = "Checks if the value of the field is `ANALOG_INPUT2`"]
+    #[inline(always)]
+    pub fn is_analog_input2(&self) -> bool {
+        *self == PSEL_A::ANALOG_INPUT2
+    }
+    #[doc = "Checks if the value of the field is `ANALOG_INPUT3`"]
+    #[inline(always)]
+    pub fn is_analog_input3(&self) -> bool {
+        *self == PSEL_A::ANALOG_INPUT3
+    }
+    #[doc = "Checks if the value of the field is `ANALOG_INPUT4`"]
+    #[inline(always)]
+    pub fn is_analog_input4(&self) -> bool {
+        *self == PSEL_A::ANALOG_INPUT4
+    }
+    #[doc = "Checks if the value of the field is `ANALOG_INPUT5`"]
+    #[inline(always)]
+    pub fn is_analog_input5(&self) -> bool {
+        *self == PSEL_A::ANALOG_INPUT5
+    }
+    #[doc = "Checks if the value of the field is `ANALOG_INPUT6`"]
+    #[inline(always)]
+    pub fn is_analog_input6(&self) -> bool {
+        *self == PSEL_A::ANALOG_INPUT6
+    }
+    #[doc = "Checks if the value of the field is `ANALOG_INPUT7`"]
+    #[inline(always)]
+    pub fn is_analog_input7(&self) -> bool {
+        *self == PSEL_A::ANALOG_INPUT7
+    }
+}
+#[doc = "Field `PSEL` writer - Analog pin select"]
+pub type PSEL_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, PSEL_SPEC, u8, PSEL_A, 3, O>;
+impl<'a, const O: u8> PSEL_W<'a, O> {
+    #[doc = "AIN0 selected as analog input"]
+    #[inline(always)]
+    pub fn analog_input0(self) -> &'a mut W {
+        self.variant(PSEL_A::ANALOG_INPUT0)
+    }
+    #[doc = "AIN1 selected as analog input"]
+    #[inline(always)]
+    pub fn analog_input1(self) -> &'a mut W {
+        self.variant(PSEL_A::ANALOG_INPUT1)
+    }
+    #[doc = "AIN2 selected as analog input"]
+    #[inline(always)]
+    pub fn analog_input2(self) -> &'a mut W {
+        self.variant(PSEL_A::ANALOG_INPUT2)
+    }
+    #[doc = "AIN3 selected as analog input"]
+    #[inline(always)]
+    pub fn analog_input3(self) -> &'a mut W {
+        self.variant(PSEL_A::ANALOG_INPUT3)
+    }
+    #[doc = "AIN4 selected as analog input"]
+    #[inline(always)]
+    pub fn analog_input4(self) -> &'a mut W {
+        self.variant(PSEL_A::ANALOG_INPUT4)
+    }
+    #[doc = "AIN5 selected as analog input"]
+    #[inline(always)]
+    pub fn analog_input5(self) -> &'a mut W {
+        self.variant(PSEL_A::ANALOG_INPUT5)
+    }
+    #[doc = "AIN6 selected as analog input"]
+    #[inline(always)]
+    pub fn analog_input6(self) -> &'a mut W {
+        self.variant(PSEL_A::ANALOG_INPUT6)
+    }
+    #[doc = "AIN7 selected as analog input"]
+    #[inline(always)]
+    pub fn analog_input7(self) -> &'a mut W {
+        self.variant(PSEL_A::ANALOG_INPUT7)
+    }
+}
+impl R {
+    #[doc = "Bits 0:2 - Analog pin select"]
+    #[inline(always)]
+    pub fn psel(&self) -> PSEL_R {
+        PSEL_R::new((self.bits & 7) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:2 - Analog pin select"]
+    #[inline(always)]
+    pub fn psel(&mut self) -> PSEL_W<0> {
+        PSEL_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [psel](index.html) module"]
+pub struct PSEL_SPEC;
+impl crate::RegisterSpec for PSEL_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [psel::R](R) reader structure"]
+impl crate::Readable for PSEL_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [psel::W](W) writer structure"]
+impl crate::Writable for PSEL_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PSEL to value 0"]
+impl crate::Resettable for PSEL_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/comp_ns/publish_cross.rs

@@ -0,0 +1,140 @@
+#[doc = "Register `PUBLISH_CROSS` reader"]
+pub struct R(crate::R<PUBLISH_CROSS_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PUBLISH_CROSS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PUBLISH_CROSS_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PUBLISH_CROSS_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PUBLISH_CROSS` writer"]
+pub struct W(crate::W<PUBLISH_CROSS_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PUBLISH_CROSS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PUBLISH_CROSS_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PUBLISH_CROSS_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that event CROSS will publish to."]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that event CROSS will publish to."]
+pub type CHIDX_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PUBLISH_CROSS_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable publishing"]
+    DISABLED = 0,
+    #[doc = "1: Enable publishing"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PUBLISH_CROSS_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable publishing"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable publishing"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that event CROSS will publish to."]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that event CROSS will publish to."]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Publish configuration for event CROSS\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [publish_cross](index.html) module"]
+pub struct PUBLISH_CROSS_SPEC;
+impl crate::RegisterSpec for PUBLISH_CROSS_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [publish_cross::R](R) reader structure"]
+impl crate::Readable for PUBLISH_CROSS_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [publish_cross::W](W) writer structure"]
+impl crate::Writable for PUBLISH_CROSS_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PUBLISH_CROSS to value 0"]
+impl crate::Resettable for PUBLISH_CROSS_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/comp_ns/publish_down.rs

@@ -0,0 +1,140 @@
+#[doc = "Register `PUBLISH_DOWN` reader"]
+pub struct R(crate::R<PUBLISH_DOWN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PUBLISH_DOWN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PUBLISH_DOWN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PUBLISH_DOWN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PUBLISH_DOWN` writer"]
+pub struct W(crate::W<PUBLISH_DOWN_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PUBLISH_DOWN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PUBLISH_DOWN_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PUBLISH_DOWN_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that event DOWN will publish to."]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that event DOWN will publish to."]
+pub type CHIDX_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PUBLISH_DOWN_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable publishing"]
+    DISABLED = 0,
+    #[doc = "1: Enable publishing"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PUBLISH_DOWN_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable publishing"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable publishing"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that event DOWN will publish to."]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that event DOWN will publish to."]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Publish configuration for event DOWN\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [publish_down](index.html) module"]
+pub struct PUBLISH_DOWN_SPEC;
+impl crate::RegisterSpec for PUBLISH_DOWN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [publish_down::R](R) reader structure"]
+impl crate::Readable for PUBLISH_DOWN_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [publish_down::W](W) writer structure"]
+impl crate::Writable for PUBLISH_DOWN_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PUBLISH_DOWN to value 0"]
+impl crate::Resettable for PUBLISH_DOWN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/comp_ns/publish_ready.rs

@@ -0,0 +1,140 @@
+#[doc = "Register `PUBLISH_READY` reader"]
+pub struct R(crate::R<PUBLISH_READY_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PUBLISH_READY_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PUBLISH_READY_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PUBLISH_READY_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PUBLISH_READY` writer"]
+pub struct W(crate::W<PUBLISH_READY_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PUBLISH_READY_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PUBLISH_READY_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PUBLISH_READY_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that event READY will publish to."]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that event READY will publish to."]
+pub type CHIDX_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PUBLISH_READY_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable publishing"]
+    DISABLED = 0,
+    #[doc = "1: Enable publishing"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PUBLISH_READY_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable publishing"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable publishing"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that event READY will publish to."]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that event READY will publish to."]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Publish configuration for event READY\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [publish_ready](index.html) module"]
+pub struct PUBLISH_READY_SPEC;
+impl crate::RegisterSpec for PUBLISH_READY_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [publish_ready::R](R) reader structure"]
+impl crate::Readable for PUBLISH_READY_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [publish_ready::W](W) writer structure"]
+impl crate::Writable for PUBLISH_READY_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PUBLISH_READY to value 0"]
+impl crate::Resettable for PUBLISH_READY_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/comp_ns/publish_up.rs

@@ -0,0 +1,140 @@
+#[doc = "Register `PUBLISH_UP` reader"]
+pub struct R(crate::R<PUBLISH_UP_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PUBLISH_UP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PUBLISH_UP_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PUBLISH_UP_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PUBLISH_UP` writer"]
+pub struct W(crate::W<PUBLISH_UP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PUBLISH_UP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PUBLISH_UP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PUBLISH_UP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that event UP will publish to."]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that event UP will publish to."]
+pub type CHIDX_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PUBLISH_UP_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable publishing"]
+    DISABLED = 0,
+    #[doc = "1: Enable publishing"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PUBLISH_UP_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable publishing"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable publishing"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that event UP will publish to."]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that event UP will publish to."]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Publish configuration for event UP\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [publish_up](index.html) module"]
+pub struct PUBLISH_UP_SPEC;
+impl crate::RegisterSpec for PUBLISH_UP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [publish_up::R](R) reader structure"]
+impl crate::Readable for PUBLISH_UP_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [publish_up::W](W) writer structure"]
+impl crate::Writable for PUBLISH_UP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PUBLISH_UP to value 0"]
+impl crate::Resettable for PUBLISH_UP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/comp_ns/refsel.rs

@@ -0,0 +1,167 @@
+#[doc = "Register `REFSEL` reader"]
+pub struct R(crate::R<REFSEL_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<REFSEL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<REFSEL_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<REFSEL_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `REFSEL` writer"]
+pub struct W(crate::W<REFSEL_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<REFSEL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<REFSEL_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<REFSEL_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `REFSEL` reader - Reference select"]
+pub type REFSEL_R = crate::FieldReader<u8, REFSEL_A>;
+#[doc = "Reference select\n\nValue on reset: 4"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum REFSEL_A {
+    #[doc = "0: VREF = internal 1.2 V reference (VDD &gt;= 1.7 V)"]
+    INT1V2 = 0,
+    #[doc = "1: VREF = internal 1.8 V reference (VDD &gt;= VREF + 0.2 V)"]
+    INT1V8 = 1,
+    #[doc = "2: VREF = internal 2.4 V reference (VDD &gt;= VREF + 0.2 V)"]
+    INT2V4 = 2,
+    #[doc = "4: VREF = VDD"]
+    VDD = 4,
+    #[doc = "5: VREF = AREF"]
+    AREF = 5,
+}
+impl From<REFSEL_A> for u8 {
+    #[inline(always)]
+    fn from(variant: REFSEL_A) -> Self {
+        variant as _
+    }
+}
+impl REFSEL_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<REFSEL_A> {
+        match self.bits {
+            0 => Some(REFSEL_A::INT1V2),
+            1 => Some(REFSEL_A::INT1V8),
+            2 => Some(REFSEL_A::INT2V4),
+            4 => Some(REFSEL_A::VDD),
+            5 => Some(REFSEL_A::AREF),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `INT1V2`"]
+    #[inline(always)]
+    pub fn is_int1v2(&self) -> bool {
+        *self == REFSEL_A::INT1V2
+    }
+    #[doc = "Checks if the value of the field is `INT1V8`"]
+    #[inline(always)]
+    pub fn is_int1v8(&self) -> bool {
+        *self == REFSEL_A::INT1V8
+    }
+    #[doc = "Checks if the value of the field is `INT2V4`"]
+    #[inline(always)]
+    pub fn is_int2v4(&self) -> bool {
+        *self == REFSEL_A::INT2V4
+    }
+    #[doc = "Checks if the value of the field is `VDD`"]
+    #[inline(always)]
+    pub fn is_vdd(&self) -> bool {
+        *self == REFSEL_A::VDD
+    }
+    #[doc = "Checks if the value of the field is `AREF`"]
+    #[inline(always)]
+    pub fn is_aref(&self) -> bool {
+        *self == REFSEL_A::AREF
+    }
+}
+#[doc = "Field `REFSEL` writer - Reference select"]
+pub type REFSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, REFSEL_SPEC, u8, REFSEL_A, 3, O>;
+impl<'a, const O: u8> REFSEL_W<'a, O> {
+    #[doc = "VREF = internal 1.2 V reference (VDD &gt;= 1.7 V)"]
+    #[inline(always)]
+    pub fn int1v2(self) -> &'a mut W {
+        self.variant(REFSEL_A::INT1V2)
+    }
+    #[doc = "VREF = internal 1.8 V reference (VDD &gt;= VREF + 0.2 V)"]
+    #[inline(always)]
+    pub fn int1v8(self) -> &'a mut W {
+        self.variant(REFSEL_A::INT1V8)
+    }
+    #[doc = "VREF = internal 2.4 V reference (VDD &gt;= VREF + 0.2 V)"]
+    #[inline(always)]
+    pub fn int2v4(self) -> &'a mut W {
+        self.variant(REFSEL_A::INT2V4)
+    }
+    #[doc = "VREF = VDD"]
+    #[inline(always)]
+    pub fn vdd(self) -> &'a mut W {
+        self.variant(REFSEL_A::VDD)
+    }
+    #[doc = "VREF = AREF"]
+    #[inline(always)]
+    pub fn aref(self) -> &'a mut W {
+        self.variant(REFSEL_A::AREF)
+    }
+}
+impl R {
+    #[doc = "Bits 0:2 - Reference select"]
+    #[inline(always)]
+    pub fn refsel(&self) -> REFSEL_R {
+        REFSEL_R::new((self.bits & 7) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:2 - Reference select"]
+    #[inline(always)]
+    pub fn refsel(&mut self) -> REFSEL_W<0> {
+        REFSEL_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Reference source select for single-ended mode\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [refsel](index.html) module"]
+pub struct REFSEL_SPEC;
+impl crate::RegisterSpec for REFSEL_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [refsel::R](R) reader structure"]
+impl crate::Readable for REFSEL_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [refsel::W](W) writer structure"]
+impl crate::Writable for REFSEL_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets REFSEL to value 0x04"]
+impl crate::Resettable for REFSEL_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x04
+    }
+}

vendor/nrf5340-app-pac/src/comp_ns/result.rs

@@ -0,0 +1,74 @@
+#[doc = "Register `RESULT` reader"]
+pub struct R(crate::R<RESULT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<RESULT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<RESULT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<RESULT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `RESULT` reader - Result of last compare. Decision point SAMPLE task."]
+pub type RESULT_R = crate::BitReader<RESULT_A>;
+#[doc = "Result of last compare. Decision point SAMPLE task.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum RESULT_A {
+    #[doc = "0: Input voltage is below the threshold (VIN+ &lt; VIN-)"]
+    BELOW = 0,
+    #[doc = "1: Input voltage is above the threshold (VIN+ &gt; VIN-)"]
+    ABOVE = 1,
+}
+impl From<RESULT_A> for bool {
+    #[inline(always)]
+    fn from(variant: RESULT_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl RESULT_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> RESULT_A {
+        match self.bits {
+            false => RESULT_A::BELOW,
+            true => RESULT_A::ABOVE,
+        }
+    }
+    #[doc = "Checks if the value of the field is `BELOW`"]
+    #[inline(always)]
+    pub fn is_below(&self) -> bool {
+        *self == RESULT_A::BELOW
+    }
+    #[doc = "Checks if the value of the field is `ABOVE`"]
+    #[inline(always)]
+    pub fn is_above(&self) -> bool {
+        *self == RESULT_A::ABOVE
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Result of last compare. Decision point SAMPLE task."]
+    #[inline(always)]
+    pub fn result(&self) -> RESULT_R {
+        RESULT_R::new((self.bits & 1) != 0)
+    }
+}
+#[doc = "Compare result\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [result](index.html) module"]
+pub struct RESULT_SPEC;
+impl crate::RegisterSpec for RESULT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [result::R](R) reader structure"]
+impl crate::Readable for RESULT_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets RESULT to value 0"]
+impl crate::Resettable for RESULT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/comp_ns/shorts.rs

@@ -0,0 +1,367 @@
+#[doc = "Register `SHORTS` reader"]
+pub struct R(crate::R<SHORTS_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SHORTS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SHORTS_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SHORTS_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SHORTS` writer"]
+pub struct W(crate::W<SHORTS_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SHORTS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SHORTS_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SHORTS_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `READY_SAMPLE` reader - Shortcut between event READY and task SAMPLE"]
+pub type READY_SAMPLE_R = crate::BitReader<READY_SAMPLE_A>;
+#[doc = "Shortcut between event READY and task SAMPLE\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum READY_SAMPLE_A {
+    #[doc = "0: Disable shortcut"]
+    DISABLED = 0,
+    #[doc = "1: Enable shortcut"]
+    ENABLED = 1,
+}
+impl From<READY_SAMPLE_A> for bool {
+    #[inline(always)]
+    fn from(variant: READY_SAMPLE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl READY_SAMPLE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> READY_SAMPLE_A {
+        match self.bits {
+            false => READY_SAMPLE_A::DISABLED,
+            true => READY_SAMPLE_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == READY_SAMPLE_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == READY_SAMPLE_A::ENABLED
+    }
+}
+#[doc = "Field `READY_SAMPLE` writer - Shortcut between event READY and task SAMPLE"]
+pub type READY_SAMPLE_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, SHORTS_SPEC, READY_SAMPLE_A, O>;
+impl<'a, const O: u8> READY_SAMPLE_W<'a, O> {
+    #[doc = "Disable shortcut"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(READY_SAMPLE_A::DISABLED)
+    }
+    #[doc = "Enable shortcut"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(READY_SAMPLE_A::ENABLED)
+    }
+}
+#[doc = "Field `READY_STOP` reader - Shortcut between event READY and task STOP"]
+pub type READY_STOP_R = crate::BitReader<READY_STOP_A>;
+#[doc = "Shortcut between event READY and task STOP\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum READY_STOP_A {
+    #[doc = "0: Disable shortcut"]
+    DISABLED = 0,
+    #[doc = "1: Enable shortcut"]
+    ENABLED = 1,
+}
+impl From<READY_STOP_A> for bool {
+    #[inline(always)]
+    fn from(variant: READY_STOP_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl READY_STOP_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> READY_STOP_A {
+        match self.bits {
+            false => READY_STOP_A::DISABLED,
+            true => READY_STOP_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == READY_STOP_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == READY_STOP_A::ENABLED
+    }
+}
+#[doc = "Field `READY_STOP` writer - Shortcut between event READY and task STOP"]
+pub type READY_STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SHORTS_SPEC, READY_STOP_A, O>;
+impl<'a, const O: u8> READY_STOP_W<'a, O> {
+    #[doc = "Disable shortcut"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(READY_STOP_A::DISABLED)
+    }
+    #[doc = "Enable shortcut"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(READY_STOP_A::ENABLED)
+    }
+}
+#[doc = "Field `DOWN_STOP` reader - Shortcut between event DOWN and task STOP"]
+pub type DOWN_STOP_R = crate::BitReader<DOWN_STOP_A>;
+#[doc = "Shortcut between event DOWN and task STOP\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum DOWN_STOP_A {
+    #[doc = "0: Disable shortcut"]
+    DISABLED = 0,
+    #[doc = "1: Enable shortcut"]
+    ENABLED = 1,
+}
+impl From<DOWN_STOP_A> for bool {
+    #[inline(always)]
+    fn from(variant: DOWN_STOP_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl DOWN_STOP_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DOWN_STOP_A {
+        match self.bits {
+            false => DOWN_STOP_A::DISABLED,
+            true => DOWN_STOP_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == DOWN_STOP_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == DOWN_STOP_A::ENABLED
+    }
+}
+#[doc = "Field `DOWN_STOP` writer - Shortcut between event DOWN and task STOP"]
+pub type DOWN_STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SHORTS_SPEC, DOWN_STOP_A, O>;
+impl<'a, const O: u8> DOWN_STOP_W<'a, O> {
+    #[doc = "Disable shortcut"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(DOWN_STOP_A::DISABLED)
+    }
+    #[doc = "Enable shortcut"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(DOWN_STOP_A::ENABLED)
+    }
+}
+#[doc = "Field `UP_STOP` reader - Shortcut between event UP and task STOP"]
+pub type UP_STOP_R = crate::BitReader<UP_STOP_A>;
+#[doc = "Shortcut between event UP and task STOP\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum UP_STOP_A {
+    #[doc = "0: Disable shortcut"]
+    DISABLED = 0,
+    #[doc = "1: Enable shortcut"]
+    ENABLED = 1,
+}
+impl From<UP_STOP_A> for bool {
+    #[inline(always)]
+    fn from(variant: UP_STOP_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl UP_STOP_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> UP_STOP_A {
+        match self.bits {
+            false => UP_STOP_A::DISABLED,
+            true => UP_STOP_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == UP_STOP_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == UP_STOP_A::ENABLED
+    }
+}
+#[doc = "Field `UP_STOP` writer - Shortcut between event UP and task STOP"]
+pub type UP_STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SHORTS_SPEC, UP_STOP_A, O>;
+impl<'a, const O: u8> UP_STOP_W<'a, O> {
+    #[doc = "Disable shortcut"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(UP_STOP_A::DISABLED)
+    }
+    #[doc = "Enable shortcut"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(UP_STOP_A::ENABLED)
+    }
+}
+#[doc = "Field `CROSS_STOP` reader - Shortcut between event CROSS and task STOP"]
+pub type CROSS_STOP_R = crate::BitReader<CROSS_STOP_A>;
+#[doc = "Shortcut between event CROSS and task STOP\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CROSS_STOP_A {
+    #[doc = "0: Disable shortcut"]
+    DISABLED = 0,
+    #[doc = "1: Enable shortcut"]
+    ENABLED = 1,
+}
+impl From<CROSS_STOP_A> for bool {
+    #[inline(always)]
+    fn from(variant: CROSS_STOP_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl CROSS_STOP_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CROSS_STOP_A {
+        match self.bits {
+            false => CROSS_STOP_A::DISABLED,
+            true => CROSS_STOP_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == CROSS_STOP_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == CROSS_STOP_A::ENABLED
+    }
+}
+#[doc = "Field `CROSS_STOP` writer - Shortcut between event CROSS and task STOP"]
+pub type CROSS_STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SHORTS_SPEC, CROSS_STOP_A, O>;
+impl<'a, const O: u8> CROSS_STOP_W<'a, O> {
+    #[doc = "Disable shortcut"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(CROSS_STOP_A::DISABLED)
+    }
+    #[doc = "Enable shortcut"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(CROSS_STOP_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Shortcut between event READY and task SAMPLE"]
+    #[inline(always)]
+    pub fn ready_sample(&self) -> READY_SAMPLE_R {
+        READY_SAMPLE_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Shortcut between event READY and task STOP"]
+    #[inline(always)]
+    pub fn ready_stop(&self) -> READY_STOP_R {
+        READY_STOP_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - Shortcut between event DOWN and task STOP"]
+    #[inline(always)]
+    pub fn down_stop(&self) -> DOWN_STOP_R {
+        DOWN_STOP_R::new(((self.bits >> 2) & 1) != 0)
+    }
+    #[doc = "Bit 3 - Shortcut between event UP and task STOP"]
+    #[inline(always)]
+    pub fn up_stop(&self) -> UP_STOP_R {
+        UP_STOP_R::new(((self.bits >> 3) & 1) != 0)
+    }
+    #[doc = "Bit 4 - Shortcut between event CROSS and task STOP"]
+    #[inline(always)]
+    pub fn cross_stop(&self) -> CROSS_STOP_R {
+        CROSS_STOP_R::new(((self.bits >> 4) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Shortcut between event READY and task SAMPLE"]
+    #[inline(always)]
+    pub fn ready_sample(&mut self) -> READY_SAMPLE_W<0> {
+        READY_SAMPLE_W::new(self)
+    }
+    #[doc = "Bit 1 - Shortcut between event READY and task STOP"]
+    #[inline(always)]
+    pub fn ready_stop(&mut self) -> READY_STOP_W<1> {
+        READY_STOP_W::new(self)
+    }
+    #[doc = "Bit 2 - Shortcut between event DOWN and task STOP"]
+    #[inline(always)]
+    pub fn down_stop(&mut self) -> DOWN_STOP_W<2> {
+        DOWN_STOP_W::new(self)
+    }
+    #[doc = "Bit 3 - Shortcut between event UP and task STOP"]
+    #[inline(always)]
+    pub fn up_stop(&mut self) -> UP_STOP_W<3> {
+        UP_STOP_W::new(self)
+    }
+    #[doc = "Bit 4 - Shortcut between event CROSS and task STOP"]
+    #[inline(always)]
+    pub fn cross_stop(&mut self) -> CROSS_STOP_W<4> {
+        CROSS_STOP_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Shortcuts between local events and tasks\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [shorts](index.html) module"]
+pub struct SHORTS_SPEC;
+impl crate::RegisterSpec for SHORTS_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [shorts::R](R) reader structure"]
+impl crate::Readable for SHORTS_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [shorts::W](W) writer structure"]
+impl crate::Writable for SHORTS_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SHORTS to value 0"]
+impl crate::Resettable for SHORTS_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/comp_ns/subscribe_sample.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `SUBSCRIBE_SAMPLE` reader"]
+pub struct R(crate::R<SUBSCRIBE_SAMPLE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_SAMPLE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_SAMPLE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_SAMPLE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_SAMPLE` writer"]
+pub struct W(crate::W<SUBSCRIBE_SAMPLE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_SAMPLE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_SAMPLE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_SAMPLE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that task SAMPLE will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that task SAMPLE will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, SUBSCRIBE_SAMPLE_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_SAMPLE_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that task SAMPLE will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that task SAMPLE will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task SAMPLE\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_sample](index.html) module"]
+pub struct SUBSCRIBE_SAMPLE_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_SAMPLE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_sample::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_SAMPLE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_sample::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_SAMPLE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_SAMPLE to value 0"]
+impl crate::Resettable for SUBSCRIBE_SAMPLE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}