feat: add display UI with splash screen, dashboard, and RSSI sparkline

Implement full SSD1306 OLED display support:
- Splash screen on boot (1.5s) with project name, version, board
- Dashboard showing radio state, config, counters, RSSI/SNR
- RSSI history sparkline (64-sample ring buffer, 2px-wide bars)
- DisplayOn/DisplayOff host commands routed via dedicated channel
- Pure render functions against generic DrawTarget (no hardware coupling)
- Display on/off control bypasses radio task entirely

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>

vendor/nrf5340-app-pac/src/clock_ns/events_done.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_DONE` reader"]
+pub struct R(crate::R<EVENTS_DONE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_DONE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_DONE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_DONE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_DONE` writer"]
+pub struct W(crate::W<EVENTS_DONE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_DONE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_DONE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_DONE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_DONE` reader - Calibration of LFRC oscillator complete event"]
+pub type EVENTS_DONE_R = crate::BitReader<EVENTS_DONE_A>;
+#[doc = "Calibration of LFRC oscillator complete event\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_DONE_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_DONE_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_DONE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_DONE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_DONE_A {
+        match self.bits {
+            false => EVENTS_DONE_A::NOT_GENERATED,
+            true => EVENTS_DONE_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_DONE_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_DONE_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_DONE` writer - Calibration of LFRC oscillator complete event"]
+pub type EVENTS_DONE_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_DONE_SPEC, EVENTS_DONE_A, O>;
+impl<'a, const O: u8> EVENTS_DONE_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_DONE_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_DONE_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Calibration of LFRC oscillator complete event"]
+    #[inline(always)]
+    pub fn events_done(&self) -> EVENTS_DONE_R {
+        EVENTS_DONE_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Calibration of LFRC oscillator complete event"]
+    #[inline(always)]
+    pub fn events_done(&mut self) -> EVENTS_DONE_W<0> {
+        EVENTS_DONE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Calibration of LFRC oscillator complete event\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_done](index.html) module"]
+pub struct EVENTS_DONE_SPEC;
+impl crate::RegisterSpec for EVENTS_DONE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_done::R](R) reader structure"]
+impl crate::Readable for EVENTS_DONE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_done::W](W) writer structure"]
+impl crate::Writable for EVENTS_DONE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_DONE to value 0"]
+impl crate::Resettable for EVENTS_DONE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/events_hfclk192mstarted.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_HFCLK192MSTARTED` reader"]
+pub struct R(crate::R<EVENTS_HFCLK192MSTARTED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_HFCLK192MSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_HFCLK192MSTARTED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_HFCLK192MSTARTED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_HFCLK192MSTARTED` writer"]
+pub struct W(crate::W<EVENTS_HFCLK192MSTARTED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_HFCLK192MSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_HFCLK192MSTARTED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_HFCLK192MSTARTED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_HFCLK192MSTARTED` reader - HFCLK192M source started"]
+pub type EVENTS_HFCLK192MSTARTED_R = crate::BitReader<EVENTS_HFCLK192MSTARTED_A>;
+#[doc = "HFCLK192M source started\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_HFCLK192MSTARTED_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_HFCLK192MSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_HFCLK192MSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_HFCLK192MSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_HFCLK192MSTARTED_A {
+        match self.bits {
+            false => EVENTS_HFCLK192MSTARTED_A::NOT_GENERATED,
+            true => EVENTS_HFCLK192MSTARTED_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_HFCLK192MSTARTED_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_HFCLK192MSTARTED_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_HFCLK192MSTARTED` writer - HFCLK192M source started"]
+pub type EVENTS_HFCLK192MSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_HFCLK192MSTARTED_SPEC, EVENTS_HFCLK192MSTARTED_A, O>;
+impl<'a, const O: u8> EVENTS_HFCLK192MSTARTED_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_HFCLK192MSTARTED_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_HFCLK192MSTARTED_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - HFCLK192M source started"]
+    #[inline(always)]
+    pub fn events_hfclk192mstarted(&self) -> EVENTS_HFCLK192MSTARTED_R {
+        EVENTS_HFCLK192MSTARTED_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - HFCLK192M source started"]
+    #[inline(always)]
+    pub fn events_hfclk192mstarted(&mut self) -> EVENTS_HFCLK192MSTARTED_W<0> {
+        EVENTS_HFCLK192MSTARTED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "HFCLK192M source started\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_hfclk192mstarted](index.html) module"]
+pub struct EVENTS_HFCLK192MSTARTED_SPEC;
+impl crate::RegisterSpec for EVENTS_HFCLK192MSTARTED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_hfclk192mstarted::R](R) reader structure"]
+impl crate::Readable for EVENTS_HFCLK192MSTARTED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_hfclk192mstarted::W](W) writer structure"]
+impl crate::Writable for EVENTS_HFCLK192MSTARTED_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_HFCLK192MSTARTED to value 0"]
+impl crate::Resettable for EVENTS_HFCLK192MSTARTED_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/events_hfclkaudiostarted.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_HFCLKAUDIOSTARTED` reader"]
+pub struct R(crate::R<EVENTS_HFCLKAUDIOSTARTED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_HFCLKAUDIOSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_HFCLKAUDIOSTARTED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_HFCLKAUDIOSTARTED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_HFCLKAUDIOSTARTED` writer"]
+pub struct W(crate::W<EVENTS_HFCLKAUDIOSTARTED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_HFCLKAUDIOSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_HFCLKAUDIOSTARTED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_HFCLKAUDIOSTARTED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_HFCLKAUDIOSTARTED` reader - HFCLKAUDIO source started"]
+pub type EVENTS_HFCLKAUDIOSTARTED_R = crate::BitReader<EVENTS_HFCLKAUDIOSTARTED_A>;
+#[doc = "HFCLKAUDIO source started\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_HFCLKAUDIOSTARTED_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_HFCLKAUDIOSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_HFCLKAUDIOSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_HFCLKAUDIOSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_HFCLKAUDIOSTARTED_A {
+        match self.bits {
+            false => EVENTS_HFCLKAUDIOSTARTED_A::NOT_GENERATED,
+            true => EVENTS_HFCLKAUDIOSTARTED_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_HFCLKAUDIOSTARTED_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_HFCLKAUDIOSTARTED_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_HFCLKAUDIOSTARTED` writer - HFCLKAUDIO source started"]
+pub type EVENTS_HFCLKAUDIOSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_HFCLKAUDIOSTARTED_SPEC, EVENTS_HFCLKAUDIOSTARTED_A, O>;
+impl<'a, const O: u8> EVENTS_HFCLKAUDIOSTARTED_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_HFCLKAUDIOSTARTED_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_HFCLKAUDIOSTARTED_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - HFCLKAUDIO source started"]
+    #[inline(always)]
+    pub fn events_hfclkaudiostarted(&self) -> EVENTS_HFCLKAUDIOSTARTED_R {
+        EVENTS_HFCLKAUDIOSTARTED_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - HFCLKAUDIO source started"]
+    #[inline(always)]
+    pub fn events_hfclkaudiostarted(&mut self) -> EVENTS_HFCLKAUDIOSTARTED_W<0> {
+        EVENTS_HFCLKAUDIOSTARTED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "HFCLKAUDIO source started\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_hfclkaudiostarted](index.html) module"]
+pub struct EVENTS_HFCLKAUDIOSTARTED_SPEC;
+impl crate::RegisterSpec for EVENTS_HFCLKAUDIOSTARTED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_hfclkaudiostarted::R](R) reader structure"]
+impl crate::Readable for EVENTS_HFCLKAUDIOSTARTED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_hfclkaudiostarted::W](W) writer structure"]
+impl crate::Writable for EVENTS_HFCLKAUDIOSTARTED_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_HFCLKAUDIOSTARTED to value 0"]
+impl crate::Resettable for EVENTS_HFCLKAUDIOSTARTED_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/events_hfclkstarted.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_HFCLKSTARTED` reader"]
+pub struct R(crate::R<EVENTS_HFCLKSTARTED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_HFCLKSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_HFCLKSTARTED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_HFCLKSTARTED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_HFCLKSTARTED` writer"]
+pub struct W(crate::W<EVENTS_HFCLKSTARTED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_HFCLKSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_HFCLKSTARTED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_HFCLKSTARTED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_HFCLKSTARTED` reader - HFCLK128M/HFCLK64M source started"]
+pub type EVENTS_HFCLKSTARTED_R = crate::BitReader<EVENTS_HFCLKSTARTED_A>;
+#[doc = "HFCLK128M/HFCLK64M source started\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_HFCLKSTARTED_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_HFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_HFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_HFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_HFCLKSTARTED_A {
+        match self.bits {
+            false => EVENTS_HFCLKSTARTED_A::NOT_GENERATED,
+            true => EVENTS_HFCLKSTARTED_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_HFCLKSTARTED_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_HFCLKSTARTED_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_HFCLKSTARTED` writer - HFCLK128M/HFCLK64M source started"]
+pub type EVENTS_HFCLKSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_HFCLKSTARTED_SPEC, EVENTS_HFCLKSTARTED_A, O>;
+impl<'a, const O: u8> EVENTS_HFCLKSTARTED_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_HFCLKSTARTED_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_HFCLKSTARTED_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - HFCLK128M/HFCLK64M source started"]
+    #[inline(always)]
+    pub fn events_hfclkstarted(&self) -> EVENTS_HFCLKSTARTED_R {
+        EVENTS_HFCLKSTARTED_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - HFCLK128M/HFCLK64M source started"]
+    #[inline(always)]
+    pub fn events_hfclkstarted(&mut self) -> EVENTS_HFCLKSTARTED_W<0> {
+        EVENTS_HFCLKSTARTED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "HFCLK128M/HFCLK64M source started\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_hfclkstarted](index.html) module"]
+pub struct EVENTS_HFCLKSTARTED_SPEC;
+impl crate::RegisterSpec for EVENTS_HFCLKSTARTED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_hfclkstarted::R](R) reader structure"]
+impl crate::Readable for EVENTS_HFCLKSTARTED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_hfclkstarted::W](W) writer structure"]
+impl crate::Writable for EVENTS_HFCLKSTARTED_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_HFCLKSTARTED to value 0"]
+impl crate::Resettable for EVENTS_HFCLKSTARTED_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/events_lfclkstarted.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_LFCLKSTARTED` reader"]
+pub struct R(crate::R<EVENTS_LFCLKSTARTED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_LFCLKSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_LFCLKSTARTED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_LFCLKSTARTED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_LFCLKSTARTED` writer"]
+pub struct W(crate::W<EVENTS_LFCLKSTARTED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_LFCLKSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_LFCLKSTARTED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_LFCLKSTARTED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_LFCLKSTARTED` reader - LFCLK source started"]
+pub type EVENTS_LFCLKSTARTED_R = crate::BitReader<EVENTS_LFCLKSTARTED_A>;
+#[doc = "LFCLK source started\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_LFCLKSTARTED_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_LFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_LFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_LFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_LFCLKSTARTED_A {
+        match self.bits {
+            false => EVENTS_LFCLKSTARTED_A::NOT_GENERATED,
+            true => EVENTS_LFCLKSTARTED_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_LFCLKSTARTED_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_LFCLKSTARTED_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_LFCLKSTARTED` writer - LFCLK source started"]
+pub type EVENTS_LFCLKSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_LFCLKSTARTED_SPEC, EVENTS_LFCLKSTARTED_A, O>;
+impl<'a, const O: u8> EVENTS_LFCLKSTARTED_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_LFCLKSTARTED_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_LFCLKSTARTED_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - LFCLK source started"]
+    #[inline(always)]
+    pub fn events_lfclkstarted(&self) -> EVENTS_LFCLKSTARTED_R {
+        EVENTS_LFCLKSTARTED_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - LFCLK source started"]
+    #[inline(always)]
+    pub fn events_lfclkstarted(&mut self) -> EVENTS_LFCLKSTARTED_W<0> {
+        EVENTS_LFCLKSTARTED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "LFCLK source started\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_lfclkstarted](index.html) module"]
+pub struct EVENTS_LFCLKSTARTED_SPEC;
+impl crate::RegisterSpec for EVENTS_LFCLKSTARTED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_lfclkstarted::R](R) reader structure"]
+impl crate::Readable for EVENTS_LFCLKSTARTED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_lfclkstarted::W](W) writer structure"]
+impl crate::Writable for EVENTS_LFCLKSTARTED_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_LFCLKSTARTED to value 0"]
+impl crate::Resettable for EVENTS_LFCLKSTARTED_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/hfclk192malwaysrun.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `HFCLK192MALWAYSRUN` reader"]
+pub struct R(crate::R<HFCLK192MALWAYSRUN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFCLK192MALWAYSRUN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFCLK192MALWAYSRUN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFCLK192MALWAYSRUN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `HFCLK192MALWAYSRUN` writer"]
+pub struct W(crate::W<HFCLK192MALWAYSRUN_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<HFCLK192MALWAYSRUN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<HFCLK192MALWAYSRUN_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<HFCLK192MALWAYSRUN_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ALWAYSRUN` reader - Ensure clock is always running"]
+pub type ALWAYSRUN_R = crate::BitReader<ALWAYSRUN_A>;
+#[doc = "Ensure clock is always running\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ALWAYSRUN_A {
+    #[doc = "0: Use automatic clock control"]
+    AUTOMATIC = 0,
+    #[doc = "1: Ensure clock is always running"]
+    ALWAYS_RUN = 1,
+}
+impl From<ALWAYSRUN_A> for bool {
+    #[inline(always)]
+    fn from(variant: ALWAYSRUN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ALWAYSRUN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ALWAYSRUN_A {
+        match self.bits {
+            false => ALWAYSRUN_A::AUTOMATIC,
+            true => ALWAYSRUN_A::ALWAYS_RUN,
+        }
+    }
+    #[doc = "Checks if the value of the field is `AUTOMATIC`"]
+    #[inline(always)]
+    pub fn is_automatic(&self) -> bool {
+        *self == ALWAYSRUN_A::AUTOMATIC
+    }
+    #[doc = "Checks if the value of the field is `ALWAYS_RUN`"]
+    #[inline(always)]
+    pub fn is_always_run(&self) -> bool {
+        *self == ALWAYSRUN_A::ALWAYS_RUN
+    }
+}
+#[doc = "Field `ALWAYSRUN` writer - Ensure clock is always running"]
+pub type ALWAYSRUN_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, HFCLK192MALWAYSRUN_SPEC, ALWAYSRUN_A, O>;
+impl<'a, const O: u8> ALWAYSRUN_W<'a, O> {
+    #[doc = "Use automatic clock control"]
+    #[inline(always)]
+    pub fn automatic(self) -> &'a mut W {
+        self.variant(ALWAYSRUN_A::AUTOMATIC)
+    }
+    #[doc = "Ensure clock is always running"]
+    #[inline(always)]
+    pub fn always_run(self) -> &'a mut W {
+        self.variant(ALWAYSRUN_A::ALWAYS_RUN)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Ensure clock is always running"]
+    #[inline(always)]
+    pub fn alwaysrun(&self) -> ALWAYSRUN_R {
+        ALWAYSRUN_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Ensure clock is always running"]
+    #[inline(always)]
+    pub fn alwaysrun(&mut self) -> ALWAYSRUN_W<0> {
+        ALWAYSRUN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Automatic or manual control of HFCLK192M\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclk192malwaysrun](index.html) module"]
+pub struct HFCLK192MALWAYSRUN_SPEC;
+impl crate::RegisterSpec for HFCLK192MALWAYSRUN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfclk192malwaysrun::R](R) reader structure"]
+impl crate::Readable for HFCLK192MALWAYSRUN_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [hfclk192malwaysrun::W](W) writer structure"]
+impl crate::Writable for HFCLK192MALWAYSRUN_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets HFCLK192MALWAYSRUN to value 0"]
+impl crate::Resettable for HFCLK192MALWAYSRUN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/hfclk192mctrl.rs

@@ -0,0 +1,142 @@
+#[doc = "Register `HFCLK192MCTRL` reader"]
+pub struct R(crate::R<HFCLK192MCTRL_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFCLK192MCTRL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFCLK192MCTRL_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFCLK192MCTRL_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `HFCLK192MCTRL` writer"]
+pub struct W(crate::W<HFCLK192MCTRL_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<HFCLK192MCTRL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<HFCLK192MCTRL_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<HFCLK192MCTRL_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `HCLK192M` reader - High frequency clock HCLK192M"]
+pub type HCLK192M_R = crate::FieldReader<u8, HCLK192M_A>;
+#[doc = "High frequency clock HCLK192M\n\nValue on reset: 2"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum HCLK192M_A {
+    #[doc = "0: Divide HFCLK192M by 1"]
+    DIV1 = 0,
+    #[doc = "1: Divide HFCLK192M by 2"]
+    DIV2 = 1,
+    #[doc = "2: Divide HFCLK192M by 4"]
+    DIV4 = 2,
+}
+impl From<HCLK192M_A> for u8 {
+    #[inline(always)]
+    fn from(variant: HCLK192M_A) -> Self {
+        variant as _
+    }
+}
+impl HCLK192M_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<HCLK192M_A> {
+        match self.bits {
+            0 => Some(HCLK192M_A::DIV1),
+            1 => Some(HCLK192M_A::DIV2),
+            2 => Some(HCLK192M_A::DIV4),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DIV1`"]
+    #[inline(always)]
+    pub fn is_div1(&self) -> bool {
+        *self == HCLK192M_A::DIV1
+    }
+    #[doc = "Checks if the value of the field is `DIV2`"]
+    #[inline(always)]
+    pub fn is_div2(&self) -> bool {
+        *self == HCLK192M_A::DIV2
+    }
+    #[doc = "Checks if the value of the field is `DIV4`"]
+    #[inline(always)]
+    pub fn is_div4(&self) -> bool {
+        *self == HCLK192M_A::DIV4
+    }
+}
+#[doc = "Field `HCLK192M` writer - High frequency clock HCLK192M"]
+pub type HCLK192M_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, HFCLK192MCTRL_SPEC, u8, HCLK192M_A, 2, O>;
+impl<'a, const O: u8> HCLK192M_W<'a, O> {
+    #[doc = "Divide HFCLK192M by 1"]
+    #[inline(always)]
+    pub fn div1(self) -> &'a mut W {
+        self.variant(HCLK192M_A::DIV1)
+    }
+    #[doc = "Divide HFCLK192M by 2"]
+    #[inline(always)]
+    pub fn div2(self) -> &'a mut W {
+        self.variant(HCLK192M_A::DIV2)
+    }
+    #[doc = "Divide HFCLK192M by 4"]
+    #[inline(always)]
+    pub fn div4(self) -> &'a mut W {
+        self.variant(HCLK192M_A::DIV4)
+    }
+}
+impl R {
+    #[doc = "Bits 0:1 - High frequency clock HCLK192M"]
+    #[inline(always)]
+    pub fn hclk192m(&self) -> HCLK192M_R {
+        HCLK192M_R::new((self.bits & 3) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:1 - High frequency clock HCLK192M"]
+    #[inline(always)]
+    pub fn hclk192m(&mut self) -> HCLK192M_W<0> {
+        HCLK192M_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "HFCLK192M frequency configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclk192mctrl](index.html) module"]
+pub struct HFCLK192MCTRL_SPEC;
+impl crate::RegisterSpec for HFCLK192MCTRL_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfclk192mctrl::R](R) reader structure"]
+impl crate::Readable for HFCLK192MCTRL_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [hfclk192mctrl::W](W) writer structure"]
+impl crate::Writable for HFCLK192MCTRL_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets HFCLK192MCTRL to value 0x02"]
+impl crate::Resettable for HFCLK192MCTRL_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x02
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/hfclk192mrun.rs

@@ -0,0 +1,74 @@
+#[doc = "Register `HFCLK192MRUN` reader"]
+pub struct R(crate::R<HFCLK192MRUN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFCLK192MRUN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFCLK192MRUN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFCLK192MRUN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `STATUS` reader - HFCLK192MSTART task triggered or not"]
+pub type STATUS_R = crate::BitReader<STATUS_A>;
+#[doc = "HFCLK192MSTART task triggered or not\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STATUS_A {
+    #[doc = "0: Task not triggered"]
+    NOT_TRIGGERED = 0,
+    #[doc = "1: Task triggered"]
+    TRIGGERED = 1,
+}
+impl From<STATUS_A> for bool {
+    #[inline(always)]
+    fn from(variant: STATUS_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STATUS_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STATUS_A {
+        match self.bits {
+            false => STATUS_A::NOT_TRIGGERED,
+            true => STATUS_A::TRIGGERED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_TRIGGERED`"]
+    #[inline(always)]
+    pub fn is_not_triggered(&self) -> bool {
+        *self == STATUS_A::NOT_TRIGGERED
+    }
+    #[doc = "Checks if the value of the field is `TRIGGERED`"]
+    #[inline(always)]
+    pub fn is_triggered(&self) -> bool {
+        *self == STATUS_A::TRIGGERED
+    }
+}
+impl R {
+    #[doc = "Bit 0 - HFCLK192MSTART task triggered or not"]
+    #[inline(always)]
+    pub fn status(&self) -> STATUS_R {
+        STATUS_R::new((self.bits & 1) != 0)
+    }
+}
+#[doc = "Status indicating that HFCLK192MSTART task has been triggered\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclk192mrun](index.html) module"]
+pub struct HFCLK192MRUN_SPEC;
+impl crate::RegisterSpec for HFCLK192MRUN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfclk192mrun::R](R) reader structure"]
+impl crate::Readable for HFCLK192MRUN_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets HFCLK192MRUN to value 0"]
+impl crate::Resettable for HFCLK192MRUN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/hfclk192msrc.rs

@@ -0,0 +1,126 @@
+#[doc = "Register `HFCLK192MSRC` reader"]
+pub struct R(crate::R<HFCLK192MSRC_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFCLK192MSRC_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFCLK192MSRC_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFCLK192MSRC_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `HFCLK192MSRC` writer"]
+pub struct W(crate::W<HFCLK192MSRC_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<HFCLK192MSRC_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<HFCLK192MSRC_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<HFCLK192MSRC_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `SRC` reader - Select which HFCLK192M source is started by the HFCLK192MSTART task"]
+pub type SRC_R = crate::BitReader<SRC_A>;
+#[doc = "Select which HFCLK192M source is started by the HFCLK192MSTART task\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SRC_A {
+    #[doc = "0: HFCLK192MSTART task starts HFINT oscillator"]
+    HFINT = 0,
+    #[doc = "1: HFCLK192MSTART task starts HFXO oscillator"]
+    HFXO = 1,
+}
+impl From<SRC_A> for bool {
+    #[inline(always)]
+    fn from(variant: SRC_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl SRC_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> SRC_A {
+        match self.bits {
+            false => SRC_A::HFINT,
+            true => SRC_A::HFXO,
+        }
+    }
+    #[doc = "Checks if the value of the field is `HFINT`"]
+    #[inline(always)]
+    pub fn is_hfint(&self) -> bool {
+        *self == SRC_A::HFINT
+    }
+    #[doc = "Checks if the value of the field is `HFXO`"]
+    #[inline(always)]
+    pub fn is_hfxo(&self) -> bool {
+        *self == SRC_A::HFXO
+    }
+}
+#[doc = "Field `SRC` writer - Select which HFCLK192M source is started by the HFCLK192MSTART task"]
+pub type SRC_W<'a, const O: u8> = crate::BitWriter<'a, u32, HFCLK192MSRC_SPEC, SRC_A, O>;
+impl<'a, const O: u8> SRC_W<'a, O> {
+    #[doc = "HFCLK192MSTART task starts HFINT oscillator"]
+    #[inline(always)]
+    pub fn hfint(self) -> &'a mut W {
+        self.variant(SRC_A::HFINT)
+    }
+    #[doc = "HFCLK192MSTART task starts HFXO oscillator"]
+    #[inline(always)]
+    pub fn hfxo(self) -> &'a mut W {
+        self.variant(SRC_A::HFXO)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Select which HFCLK192M source is started by the HFCLK192MSTART task"]
+    #[inline(always)]
+    pub fn src(&self) -> SRC_R {
+        SRC_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Select which HFCLK192M source is started by the HFCLK192MSTART task"]
+    #[inline(always)]
+    pub fn src(&mut self) -> SRC_W<0> {
+        SRC_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Clock source for HFCLK192M\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclk192msrc](index.html) module"]
+pub struct HFCLK192MSRC_SPEC;
+impl crate::RegisterSpec for HFCLK192MSRC_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfclk192msrc::R](R) reader structure"]
+impl crate::Readable for HFCLK192MSRC_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [hfclk192msrc::W](W) writer structure"]
+impl crate::Writable for HFCLK192MSRC_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets HFCLK192MSRC to value 0x01"]
+impl crate::Resettable for HFCLK192MSRC_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x01
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/hfclk192mstat.rs

@@ -0,0 +1,156 @@
+#[doc = "Register `HFCLK192MSTAT` reader"]
+pub struct R(crate::R<HFCLK192MSTAT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFCLK192MSTAT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFCLK192MSTAT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFCLK192MSTAT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `SRC` reader - Active clock source"]
+pub type SRC_R = crate::BitReader<SRC_A>;
+#[doc = "Active clock source\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SRC_A {
+    #[doc = "0: Clock source: HFINT - on-chip oscillator"]
+    HFINT = 0,
+    #[doc = "1: Clock source: HFXO - derived from external 32 MHz crystal oscillator"]
+    HFXO = 1,
+}
+impl From<SRC_A> for bool {
+    #[inline(always)]
+    fn from(variant: SRC_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl SRC_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> SRC_A {
+        match self.bits {
+            false => SRC_A::HFINT,
+            true => SRC_A::HFXO,
+        }
+    }
+    #[doc = "Checks if the value of the field is `HFINT`"]
+    #[inline(always)]
+    pub fn is_hfint(&self) -> bool {
+        *self == SRC_A::HFINT
+    }
+    #[doc = "Checks if the value of the field is `HFXO`"]
+    #[inline(always)]
+    pub fn is_hfxo(&self) -> bool {
+        *self == SRC_A::HFXO
+    }
+}
+#[doc = "Field `ALWAYSRUNNING` reader - ALWAYSRUN activated"]
+pub type ALWAYSRUNNING_R = crate::BitReader<ALWAYSRUNNING_A>;
+#[doc = "ALWAYSRUN activated\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ALWAYSRUNNING_A {
+    #[doc = "0: Automatic clock control enabled"]
+    NOT_RUNNING = 0,
+    #[doc = "1: Oscillator is always running"]
+    RUNNING = 1,
+}
+impl From<ALWAYSRUNNING_A> for bool {
+    #[inline(always)]
+    fn from(variant: ALWAYSRUNNING_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ALWAYSRUNNING_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ALWAYSRUNNING_A {
+        match self.bits {
+            false => ALWAYSRUNNING_A::NOT_RUNNING,
+            true => ALWAYSRUNNING_A::RUNNING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_RUNNING`"]
+    #[inline(always)]
+    pub fn is_not_running(&self) -> bool {
+        *self == ALWAYSRUNNING_A::NOT_RUNNING
+    }
+    #[doc = "Checks if the value of the field is `RUNNING`"]
+    #[inline(always)]
+    pub fn is_running(&self) -> bool {
+        *self == ALWAYSRUNNING_A::RUNNING
+    }
+}
+#[doc = "Field `STATE` reader - HFCLK192M state"]
+pub type STATE_R = crate::BitReader<STATE_A>;
+#[doc = "HFCLK192M state\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STATE_A {
+    #[doc = "0: HFCLK192M not running"]
+    NOT_RUNNING = 0,
+    #[doc = "1: HFCLK192M running"]
+    RUNNING = 1,
+}
+impl From<STATE_A> for bool {
+    #[inline(always)]
+    fn from(variant: STATE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STATE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STATE_A {
+        match self.bits {
+            false => STATE_A::NOT_RUNNING,
+            true => STATE_A::RUNNING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_RUNNING`"]
+    #[inline(always)]
+    pub fn is_not_running(&self) -> bool {
+        *self == STATE_A::NOT_RUNNING
+    }
+    #[doc = "Checks if the value of the field is `RUNNING`"]
+    #[inline(always)]
+    pub fn is_running(&self) -> bool {
+        *self == STATE_A::RUNNING
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Active clock source"]
+    #[inline(always)]
+    pub fn src(&self) -> SRC_R {
+        SRC_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 4 - ALWAYSRUN activated"]
+    #[inline(always)]
+    pub fn alwaysrunning(&self) -> ALWAYSRUNNING_R {
+        ALWAYSRUNNING_R::new(((self.bits >> 4) & 1) != 0)
+    }
+    #[doc = "Bit 16 - HFCLK192M state"]
+    #[inline(always)]
+    pub fn state(&self) -> STATE_R {
+        STATE_R::new(((self.bits >> 16) & 1) != 0)
+    }
+}
+#[doc = "Status indicating which HFCLK192M source is running\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclk192mstat](index.html) module"]
+pub struct HFCLK192MSTAT_SPEC;
+impl crate::RegisterSpec for HFCLK192MSTAT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfclk192mstat::R](R) reader structure"]
+impl crate::Readable for HFCLK192MSTAT_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets HFCLK192MSTAT to value 0"]
+impl crate::Resettable for HFCLK192MSTAT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/hfclkalwaysrun.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `HFCLKALWAYSRUN` reader"]
+pub struct R(crate::R<HFCLKALWAYSRUN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFCLKALWAYSRUN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFCLKALWAYSRUN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFCLKALWAYSRUN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `HFCLKALWAYSRUN` writer"]
+pub struct W(crate::W<HFCLKALWAYSRUN_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<HFCLKALWAYSRUN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<HFCLKALWAYSRUN_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<HFCLKALWAYSRUN_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ALWAYSRUN` reader - Ensure clock is always running"]
+pub type ALWAYSRUN_R = crate::BitReader<ALWAYSRUN_A>;
+#[doc = "Ensure clock is always running\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ALWAYSRUN_A {
+    #[doc = "0: Use automatic clock control"]
+    AUTOMATIC = 0,
+    #[doc = "1: Ensure clock is always running"]
+    ALWAYS_RUN = 1,
+}
+impl From<ALWAYSRUN_A> for bool {
+    #[inline(always)]
+    fn from(variant: ALWAYSRUN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ALWAYSRUN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ALWAYSRUN_A {
+        match self.bits {
+            false => ALWAYSRUN_A::AUTOMATIC,
+            true => ALWAYSRUN_A::ALWAYS_RUN,
+        }
+    }
+    #[doc = "Checks if the value of the field is `AUTOMATIC`"]
+    #[inline(always)]
+    pub fn is_automatic(&self) -> bool {
+        *self == ALWAYSRUN_A::AUTOMATIC
+    }
+    #[doc = "Checks if the value of the field is `ALWAYS_RUN`"]
+    #[inline(always)]
+    pub fn is_always_run(&self) -> bool {
+        *self == ALWAYSRUN_A::ALWAYS_RUN
+    }
+}
+#[doc = "Field `ALWAYSRUN` writer - Ensure clock is always running"]
+pub type ALWAYSRUN_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, HFCLKALWAYSRUN_SPEC, ALWAYSRUN_A, O>;
+impl<'a, const O: u8> ALWAYSRUN_W<'a, O> {
+    #[doc = "Use automatic clock control"]
+    #[inline(always)]
+    pub fn automatic(self) -> &'a mut W {
+        self.variant(ALWAYSRUN_A::AUTOMATIC)
+    }
+    #[doc = "Ensure clock is always running"]
+    #[inline(always)]
+    pub fn always_run(self) -> &'a mut W {
+        self.variant(ALWAYSRUN_A::ALWAYS_RUN)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Ensure clock is always running"]
+    #[inline(always)]
+    pub fn alwaysrun(&self) -> ALWAYSRUN_R {
+        ALWAYSRUN_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Ensure clock is always running"]
+    #[inline(always)]
+    pub fn alwaysrun(&mut self) -> ALWAYSRUN_W<0> {
+        ALWAYSRUN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Automatic or manual control of HFCLK128M/HFCLK64M\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclkalwaysrun](index.html) module"]
+pub struct HFCLKALWAYSRUN_SPEC;
+impl crate::RegisterSpec for HFCLKALWAYSRUN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfclkalwaysrun::R](R) reader structure"]
+impl crate::Readable for HFCLKALWAYSRUN_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [hfclkalwaysrun::W](W) writer structure"]
+impl crate::Writable for HFCLKALWAYSRUN_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets HFCLKALWAYSRUN to value 0"]
+impl crate::Resettable for HFCLKALWAYSRUN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/hfclkaudio.rs

@@ -0,0 +1,10 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct HFCLKAUDIO {
+    #[doc = "0x00 - Audio PLL frequency in 11.176 MHz - 11.402 MHz or 12.165 MHz - 12.411 MHz frequency bands"]
+    pub frequency: FREQUENCY,
+}
+#[doc = "FREQUENCY (rw) register accessor: an alias for `Reg<FREQUENCY_SPEC>`"]
+pub type FREQUENCY = crate::Reg<frequency::FREQUENCY_SPEC>;
+#[doc = "Audio PLL frequency in 11.176 MHz - 11.402 MHz or 12.165 MHz - 12.411 MHz frequency bands"]
+pub mod frequency;

vendor/nrf5340-app-pac/src/clock_ns/hfclkaudio/frequency.rs

@@ -0,0 +1,81 @@
+#[doc = "Register `FREQUENCY` reader"]
+pub struct R(crate::R<FREQUENCY_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<FREQUENCY_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<FREQUENCY_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<FREQUENCY_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `FREQUENCY` writer"]
+pub struct W(crate::W<FREQUENCY_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<FREQUENCY_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<FREQUENCY_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<FREQUENCY_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `FREQUENCY` reader - Frequency 0: 10.666 MHz 65535: 13.333 MHz"]
+pub type FREQUENCY_R = crate::FieldReader<u16, u16>;
+#[doc = "Field `FREQUENCY` writer - Frequency 0: 10.666 MHz 65535: 13.333 MHz"]
+pub type FREQUENCY_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, FREQUENCY_SPEC, u16, u16, 16, O>;
+impl R {
+    #[doc = "Bits 0:15 - Frequency 0: 10.666 MHz 65535: 13.333 MHz"]
+    #[inline(always)]
+    pub fn frequency(&self) -> FREQUENCY_R {
+        FREQUENCY_R::new((self.bits & 0xffff) as u16)
+    }
+}
+impl W {
+    #[doc = "Bits 0:15 - Frequency 0: 10.666 MHz 65535: 13.333 MHz"]
+    #[inline(always)]
+    pub fn frequency(&mut self) -> FREQUENCY_W<0> {
+        FREQUENCY_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Audio PLL frequency in 11.176 MHz - 11.402 MHz or 12.165 MHz - 12.411 MHz frequency bands\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [frequency](index.html) module"]
+pub struct FREQUENCY_SPEC;
+impl crate::RegisterSpec for FREQUENCY_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [frequency::R](R) reader structure"]
+impl crate::Readable for FREQUENCY_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [frequency::W](W) writer structure"]
+impl crate::Writable for FREQUENCY_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets FREQUENCY to value 0x9bae"]
+impl crate::Resettable for FREQUENCY_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x9bae
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/hfclkaudioalwaysrun.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `HFCLKAUDIOALWAYSRUN` reader"]
+pub struct R(crate::R<HFCLKAUDIOALWAYSRUN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFCLKAUDIOALWAYSRUN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFCLKAUDIOALWAYSRUN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFCLKAUDIOALWAYSRUN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `HFCLKAUDIOALWAYSRUN` writer"]
+pub struct W(crate::W<HFCLKAUDIOALWAYSRUN_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<HFCLKAUDIOALWAYSRUN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<HFCLKAUDIOALWAYSRUN_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<HFCLKAUDIOALWAYSRUN_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ALWAYSRUN` reader - Ensure clock is always running"]
+pub type ALWAYSRUN_R = crate::BitReader<ALWAYSRUN_A>;
+#[doc = "Ensure clock is always running\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ALWAYSRUN_A {
+    #[doc = "0: Use automatic clock control"]
+    AUTOMATIC = 0,
+    #[doc = "1: Ensure clock is always running"]
+    ALWAYS_RUN = 1,
+}
+impl From<ALWAYSRUN_A> for bool {
+    #[inline(always)]
+    fn from(variant: ALWAYSRUN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ALWAYSRUN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ALWAYSRUN_A {
+        match self.bits {
+            false => ALWAYSRUN_A::AUTOMATIC,
+            true => ALWAYSRUN_A::ALWAYS_RUN,
+        }
+    }
+    #[doc = "Checks if the value of the field is `AUTOMATIC`"]
+    #[inline(always)]
+    pub fn is_automatic(&self) -> bool {
+        *self == ALWAYSRUN_A::AUTOMATIC
+    }
+    #[doc = "Checks if the value of the field is `ALWAYS_RUN`"]
+    #[inline(always)]
+    pub fn is_always_run(&self) -> bool {
+        *self == ALWAYSRUN_A::ALWAYS_RUN
+    }
+}
+#[doc = "Field `ALWAYSRUN` writer - Ensure clock is always running"]
+pub type ALWAYSRUN_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, HFCLKAUDIOALWAYSRUN_SPEC, ALWAYSRUN_A, O>;
+impl<'a, const O: u8> ALWAYSRUN_W<'a, O> {
+    #[doc = "Use automatic clock control"]
+    #[inline(always)]
+    pub fn automatic(self) -> &'a mut W {
+        self.variant(ALWAYSRUN_A::AUTOMATIC)
+    }
+    #[doc = "Ensure clock is always running"]
+    #[inline(always)]
+    pub fn always_run(self) -> &'a mut W {
+        self.variant(ALWAYSRUN_A::ALWAYS_RUN)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Ensure clock is always running"]
+    #[inline(always)]
+    pub fn alwaysrun(&self) -> ALWAYSRUN_R {
+        ALWAYSRUN_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Ensure clock is always running"]
+    #[inline(always)]
+    pub fn alwaysrun(&mut self) -> ALWAYSRUN_W<0> {
+        ALWAYSRUN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Automatic or manual control of HFCLKAUDIO\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclkaudioalwaysrun](index.html) module"]
+pub struct HFCLKAUDIOALWAYSRUN_SPEC;
+impl crate::RegisterSpec for HFCLKAUDIOALWAYSRUN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfclkaudioalwaysrun::R](R) reader structure"]
+impl crate::Readable for HFCLKAUDIOALWAYSRUN_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [hfclkaudioalwaysrun::W](W) writer structure"]
+impl crate::Writable for HFCLKAUDIOALWAYSRUN_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets HFCLKAUDIOALWAYSRUN to value 0"]
+impl crate::Resettable for HFCLKAUDIOALWAYSRUN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/hfclkaudiorun.rs

@@ -0,0 +1,74 @@
+#[doc = "Register `HFCLKAUDIORUN` reader"]
+pub struct R(crate::R<HFCLKAUDIORUN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFCLKAUDIORUN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFCLKAUDIORUN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFCLKAUDIORUN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `STATUS` reader - HFCLKAUDIOSTART task triggered or not"]
+pub type STATUS_R = crate::BitReader<STATUS_A>;
+#[doc = "HFCLKAUDIOSTART task triggered or not\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STATUS_A {
+    #[doc = "0: Task not triggered"]
+    NOT_TRIGGERED = 0,
+    #[doc = "1: Task triggered"]
+    TRIGGERED = 1,
+}
+impl From<STATUS_A> for bool {
+    #[inline(always)]
+    fn from(variant: STATUS_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STATUS_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STATUS_A {
+        match self.bits {
+            false => STATUS_A::NOT_TRIGGERED,
+            true => STATUS_A::TRIGGERED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_TRIGGERED`"]
+    #[inline(always)]
+    pub fn is_not_triggered(&self) -> bool {
+        *self == STATUS_A::NOT_TRIGGERED
+    }
+    #[doc = "Checks if the value of the field is `TRIGGERED`"]
+    #[inline(always)]
+    pub fn is_triggered(&self) -> bool {
+        *self == STATUS_A::TRIGGERED
+    }
+}
+impl R {
+    #[doc = "Bit 0 - HFCLKAUDIOSTART task triggered or not"]
+    #[inline(always)]
+    pub fn status(&self) -> STATUS_R {
+        STATUS_R::new((self.bits & 1) != 0)
+    }
+}
+#[doc = "Status indicating that HFCLKAUDIOSTART task has been triggered\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclkaudiorun](index.html) module"]
+pub struct HFCLKAUDIORUN_SPEC;
+impl crate::RegisterSpec for HFCLKAUDIORUN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfclkaudiorun::R](R) reader structure"]
+impl crate::Readable for HFCLKAUDIORUN_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets HFCLKAUDIORUN to value 0"]
+impl crate::Resettable for HFCLKAUDIORUN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/hfclkaudiostat.rs

@@ -0,0 +1,115 @@
+#[doc = "Register `HFCLKAUDIOSTAT` reader"]
+pub struct R(crate::R<HFCLKAUDIOSTAT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFCLKAUDIOSTAT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFCLKAUDIOSTAT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFCLKAUDIOSTAT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `ALWAYSRUNNING` reader - ALWAYSRUN activated"]
+pub type ALWAYSRUNNING_R = crate::BitReader<ALWAYSRUNNING_A>;
+#[doc = "ALWAYSRUN activated\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ALWAYSRUNNING_A {
+    #[doc = "0: Automatic clock control enabled"]
+    NOT_RUNNING = 0,
+    #[doc = "1: Oscillator is always running"]
+    RUNNING = 1,
+}
+impl From<ALWAYSRUNNING_A> for bool {
+    #[inline(always)]
+    fn from(variant: ALWAYSRUNNING_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ALWAYSRUNNING_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ALWAYSRUNNING_A {
+        match self.bits {
+            false => ALWAYSRUNNING_A::NOT_RUNNING,
+            true => ALWAYSRUNNING_A::RUNNING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_RUNNING`"]
+    #[inline(always)]
+    pub fn is_not_running(&self) -> bool {
+        *self == ALWAYSRUNNING_A::NOT_RUNNING
+    }
+    #[doc = "Checks if the value of the field is `RUNNING`"]
+    #[inline(always)]
+    pub fn is_running(&self) -> bool {
+        *self == ALWAYSRUNNING_A::RUNNING
+    }
+}
+#[doc = "Field `STATE` reader - HFCLKAUDIO state"]
+pub type STATE_R = crate::BitReader<STATE_A>;
+#[doc = "HFCLKAUDIO state\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STATE_A {
+    #[doc = "0: HFCLKAUDIO not running"]
+    NOT_RUNNING = 0,
+    #[doc = "1: HFCLKAUDIO running"]
+    RUNNING = 1,
+}
+impl From<STATE_A> for bool {
+    #[inline(always)]
+    fn from(variant: STATE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STATE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STATE_A {
+        match self.bits {
+            false => STATE_A::NOT_RUNNING,
+            true => STATE_A::RUNNING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_RUNNING`"]
+    #[inline(always)]
+    pub fn is_not_running(&self) -> bool {
+        *self == STATE_A::NOT_RUNNING
+    }
+    #[doc = "Checks if the value of the field is `RUNNING`"]
+    #[inline(always)]
+    pub fn is_running(&self) -> bool {
+        *self == STATE_A::RUNNING
+    }
+}
+impl R {
+    #[doc = "Bit 4 - ALWAYSRUN activated"]
+    #[inline(always)]
+    pub fn alwaysrunning(&self) -> ALWAYSRUNNING_R {
+        ALWAYSRUNNING_R::new(((self.bits >> 4) & 1) != 0)
+    }
+    #[doc = "Bit 16 - HFCLKAUDIO state"]
+    #[inline(always)]
+    pub fn state(&self) -> STATE_R {
+        STATE_R::new(((self.bits >> 16) & 1) != 0)
+    }
+}
+#[doc = "Status indicating which HFCLKAUDIO source is running\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclkaudiostat](index.html) module"]
+pub struct HFCLKAUDIOSTAT_SPEC;
+impl crate::RegisterSpec for HFCLKAUDIOSTAT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfclkaudiostat::R](R) reader structure"]
+impl crate::Readable for HFCLKAUDIOSTAT_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets HFCLKAUDIOSTAT to value 0"]
+impl crate::Resettable for HFCLKAUDIOSTAT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/hfclkctrl.rs

@@ -0,0 +1,128 @@
+#[doc = "Register `HFCLKCTRL` reader"]
+pub struct R(crate::R<HFCLKCTRL_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFCLKCTRL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFCLKCTRL_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFCLKCTRL_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `HFCLKCTRL` writer"]
+pub struct W(crate::W<HFCLKCTRL_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<HFCLKCTRL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<HFCLKCTRL_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<HFCLKCTRL_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `HCLK` reader - High frequency clock HCLK"]
+pub type HCLK_R = crate::FieldReader<u8, HCLK_A>;
+#[doc = "High frequency clock HCLK\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum HCLK_A {
+    #[doc = "0: Divide HFCLK by 1"]
+    DIV1 = 0,
+    #[doc = "1: Divide HFCLK by 2"]
+    DIV2 = 1,
+}
+impl From<HCLK_A> for u8 {
+    #[inline(always)]
+    fn from(variant: HCLK_A) -> Self {
+        variant as _
+    }
+}
+impl HCLK_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<HCLK_A> {
+        match self.bits {
+            0 => Some(HCLK_A::DIV1),
+            1 => Some(HCLK_A::DIV2),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DIV1`"]
+    #[inline(always)]
+    pub fn is_div1(&self) -> bool {
+        *self == HCLK_A::DIV1
+    }
+    #[doc = "Checks if the value of the field is `DIV2`"]
+    #[inline(always)]
+    pub fn is_div2(&self) -> bool {
+        *self == HCLK_A::DIV2
+    }
+}
+#[doc = "Field `HCLK` writer - High frequency clock HCLK"]
+pub type HCLK_W<'a, const O: u8> = crate::FieldWriter<'a, u32, HFCLKCTRL_SPEC, u8, HCLK_A, 2, O>;
+impl<'a, const O: u8> HCLK_W<'a, O> {
+    #[doc = "Divide HFCLK by 1"]
+    #[inline(always)]
+    pub fn div1(self) -> &'a mut W {
+        self.variant(HCLK_A::DIV1)
+    }
+    #[doc = "Divide HFCLK by 2"]
+    #[inline(always)]
+    pub fn div2(self) -> &'a mut W {
+        self.variant(HCLK_A::DIV2)
+    }
+}
+impl R {
+    #[doc = "Bits 0:1 - High frequency clock HCLK"]
+    #[inline(always)]
+    pub fn hclk(&self) -> HCLK_R {
+        HCLK_R::new((self.bits & 3) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:1 - High frequency clock HCLK"]
+    #[inline(always)]
+    pub fn hclk(&mut self) -> HCLK_W<0> {
+        HCLK_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "HFCLK128M frequency configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclkctrl](index.html) module"]
+pub struct HFCLKCTRL_SPEC;
+impl crate::RegisterSpec for HFCLKCTRL_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfclkctrl::R](R) reader structure"]
+impl crate::Readable for HFCLKCTRL_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [hfclkctrl::W](W) writer structure"]
+impl crate::Writable for HFCLKCTRL_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets HFCLKCTRL to value 0x01"]
+impl crate::Resettable for HFCLKCTRL_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x01
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/hfclkrun.rs

@@ -0,0 +1,74 @@
+#[doc = "Register `HFCLKRUN` reader"]
+pub struct R(crate::R<HFCLKRUN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFCLKRUN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFCLKRUN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFCLKRUN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `STATUS` reader - HFCLKSTART task triggered or not"]
+pub type STATUS_R = crate::BitReader<STATUS_A>;
+#[doc = "HFCLKSTART task triggered or not\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STATUS_A {
+    #[doc = "0: Task not triggered"]
+    NOT_TRIGGERED = 0,
+    #[doc = "1: Task triggered"]
+    TRIGGERED = 1,
+}
+impl From<STATUS_A> for bool {
+    #[inline(always)]
+    fn from(variant: STATUS_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STATUS_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STATUS_A {
+        match self.bits {
+            false => STATUS_A::NOT_TRIGGERED,
+            true => STATUS_A::TRIGGERED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_TRIGGERED`"]
+    #[inline(always)]
+    pub fn is_not_triggered(&self) -> bool {
+        *self == STATUS_A::NOT_TRIGGERED
+    }
+    #[doc = "Checks if the value of the field is `TRIGGERED`"]
+    #[inline(always)]
+    pub fn is_triggered(&self) -> bool {
+        *self == STATUS_A::TRIGGERED
+    }
+}
+impl R {
+    #[doc = "Bit 0 - HFCLKSTART task triggered or not"]
+    #[inline(always)]
+    pub fn status(&self) -> STATUS_R {
+        STATUS_R::new((self.bits & 1) != 0)
+    }
+}
+#[doc = "Status indicating that HFCLKSTART task has been triggered\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclkrun](index.html) module"]
+pub struct HFCLKRUN_SPEC;
+impl crate::RegisterSpec for HFCLKRUN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfclkrun::R](R) reader structure"]
+impl crate::Readable for HFCLKRUN_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets HFCLKRUN to value 0"]
+impl crate::Resettable for HFCLKRUN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/hfclksrc.rs

@@ -0,0 +1,126 @@
+#[doc = "Register `HFCLKSRC` reader"]
+pub struct R(crate::R<HFCLKSRC_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFCLKSRC_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFCLKSRC_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFCLKSRC_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `HFCLKSRC` writer"]
+pub struct W(crate::W<HFCLKSRC_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<HFCLKSRC_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<HFCLKSRC_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<HFCLKSRC_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `SRC` reader - Select which HFCLK source is started by the HFCLKSTART task"]
+pub type SRC_R = crate::BitReader<SRC_A>;
+#[doc = "Select which HFCLK source is started by the HFCLKSTART task\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SRC_A {
+    #[doc = "0: HFCLKSTART task starts HFINT oscillator"]
+    HFINT = 0,
+    #[doc = "1: HFCLKSTART task starts HFXO oscillator"]
+    HFXO = 1,
+}
+impl From<SRC_A> for bool {
+    #[inline(always)]
+    fn from(variant: SRC_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl SRC_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> SRC_A {
+        match self.bits {
+            false => SRC_A::HFINT,
+            true => SRC_A::HFXO,
+        }
+    }
+    #[doc = "Checks if the value of the field is `HFINT`"]
+    #[inline(always)]
+    pub fn is_hfint(&self) -> bool {
+        *self == SRC_A::HFINT
+    }
+    #[doc = "Checks if the value of the field is `HFXO`"]
+    #[inline(always)]
+    pub fn is_hfxo(&self) -> bool {
+        *self == SRC_A::HFXO
+    }
+}
+#[doc = "Field `SRC` writer - Select which HFCLK source is started by the HFCLKSTART task"]
+pub type SRC_W<'a, const O: u8> = crate::BitWriter<'a, u32, HFCLKSRC_SPEC, SRC_A, O>;
+impl<'a, const O: u8> SRC_W<'a, O> {
+    #[doc = "HFCLKSTART task starts HFINT oscillator"]
+    #[inline(always)]
+    pub fn hfint(self) -> &'a mut W {
+        self.variant(SRC_A::HFINT)
+    }
+    #[doc = "HFCLKSTART task starts HFXO oscillator"]
+    #[inline(always)]
+    pub fn hfxo(self) -> &'a mut W {
+        self.variant(SRC_A::HFXO)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Select which HFCLK source is started by the HFCLKSTART task"]
+    #[inline(always)]
+    pub fn src(&self) -> SRC_R {
+        SRC_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Select which HFCLK source is started by the HFCLKSTART task"]
+    #[inline(always)]
+    pub fn src(&mut self) -> SRC_W<0> {
+        SRC_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Clock source for HFCLK128M/HFCLK64M\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclksrc](index.html) module"]
+pub struct HFCLKSRC_SPEC;
+impl crate::RegisterSpec for HFCLKSRC_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfclksrc::R](R) reader structure"]
+impl crate::Readable for HFCLKSRC_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [hfclksrc::W](W) writer structure"]
+impl crate::Writable for HFCLKSRC_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets HFCLKSRC to value 0x01"]
+impl crate::Resettable for HFCLKSRC_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x01
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/hfclkstat.rs

@@ -0,0 +1,156 @@
+#[doc = "Register `HFCLKSTAT` reader"]
+pub struct R(crate::R<HFCLKSTAT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFCLKSTAT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFCLKSTAT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFCLKSTAT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `SRC` reader - Active clock source"]
+pub type SRC_R = crate::BitReader<SRC_A>;
+#[doc = "Active clock source\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SRC_A {
+    #[doc = "0: Clock source: HFINT - 128 MHz on-chip oscillator"]
+    HFINT = 0,
+    #[doc = "1: Clock source: HFXO - 128 MHz clock derived from external 32 MHz crystal oscillator"]
+    HFXO = 1,
+}
+impl From<SRC_A> for bool {
+    #[inline(always)]
+    fn from(variant: SRC_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl SRC_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> SRC_A {
+        match self.bits {
+            false => SRC_A::HFINT,
+            true => SRC_A::HFXO,
+        }
+    }
+    #[doc = "Checks if the value of the field is `HFINT`"]
+    #[inline(always)]
+    pub fn is_hfint(&self) -> bool {
+        *self == SRC_A::HFINT
+    }
+    #[doc = "Checks if the value of the field is `HFXO`"]
+    #[inline(always)]
+    pub fn is_hfxo(&self) -> bool {
+        *self == SRC_A::HFXO
+    }
+}
+#[doc = "Field `ALWAYSRUNNING` reader - ALWAYSRUN activated"]
+pub type ALWAYSRUNNING_R = crate::BitReader<ALWAYSRUNNING_A>;
+#[doc = "ALWAYSRUN activated\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ALWAYSRUNNING_A {
+    #[doc = "0: Automatic clock control enabled"]
+    NOT_RUNNING = 0,
+    #[doc = "1: Oscillator is always running"]
+    RUNNING = 1,
+}
+impl From<ALWAYSRUNNING_A> for bool {
+    #[inline(always)]
+    fn from(variant: ALWAYSRUNNING_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ALWAYSRUNNING_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ALWAYSRUNNING_A {
+        match self.bits {
+            false => ALWAYSRUNNING_A::NOT_RUNNING,
+            true => ALWAYSRUNNING_A::RUNNING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_RUNNING`"]
+    #[inline(always)]
+    pub fn is_not_running(&self) -> bool {
+        *self == ALWAYSRUNNING_A::NOT_RUNNING
+    }
+    #[doc = "Checks if the value of the field is `RUNNING`"]
+    #[inline(always)]
+    pub fn is_running(&self) -> bool {
+        *self == ALWAYSRUNNING_A::RUNNING
+    }
+}
+#[doc = "Field `STATE` reader - HFCLK state"]
+pub type STATE_R = crate::BitReader<STATE_A>;
+#[doc = "HFCLK state\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STATE_A {
+    #[doc = "0: HFCLK not running"]
+    NOT_RUNNING = 0,
+    #[doc = "1: HFCLK running"]
+    RUNNING = 1,
+}
+impl From<STATE_A> for bool {
+    #[inline(always)]
+    fn from(variant: STATE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STATE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STATE_A {
+        match self.bits {
+            false => STATE_A::NOT_RUNNING,
+            true => STATE_A::RUNNING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_RUNNING`"]
+    #[inline(always)]
+    pub fn is_not_running(&self) -> bool {
+        *self == STATE_A::NOT_RUNNING
+    }
+    #[doc = "Checks if the value of the field is `RUNNING`"]
+    #[inline(always)]
+    pub fn is_running(&self) -> bool {
+        *self == STATE_A::RUNNING
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Active clock source"]
+    #[inline(always)]
+    pub fn src(&self) -> SRC_R {
+        SRC_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 4 - ALWAYSRUN activated"]
+    #[inline(always)]
+    pub fn alwaysrunning(&self) -> ALWAYSRUNNING_R {
+        ALWAYSRUNNING_R::new(((self.bits >> 4) & 1) != 0)
+    }
+    #[doc = "Bit 16 - HFCLK state"]
+    #[inline(always)]
+    pub fn state(&self) -> STATE_R {
+        STATE_R::new(((self.bits >> 16) & 1) != 0)
+    }
+}
+#[doc = "Status indicating which HFCLK128M/HFCLK64M source is running This register value in any CLOCK instance reflects status only due to configurations/actions in that CLOCK instance.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclkstat](index.html) module"]
+pub struct HFCLKSTAT_SPEC;
+impl crate::RegisterSpec for HFCLKSTAT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfclkstat::R](R) reader structure"]
+impl crate::Readable for HFCLKSTAT_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets HFCLKSTAT to value 0"]
+impl crate::Resettable for HFCLKSTAT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/inten.rs

@@ -0,0 +1,368 @@
+#[doc = "Register `INTEN` reader"]
+pub struct R(crate::R<INTEN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTEN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTEN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTEN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTEN` writer"]
+pub struct W(crate::W<INTEN_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTEN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTEN_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTEN_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `HFCLKSTARTED` reader - Enable or disable interrupt for event HFCLKSTARTED"]
+pub type HFCLKSTARTED_R = crate::BitReader<HFCLKSTARTED_A>;
+#[doc = "Enable or disable interrupt for event HFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLKSTARTED_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "1: Enable"]
+    ENABLED = 1,
+}
+impl From<HFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl HFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> HFCLKSTARTED_A {
+        match self.bits {
+            false => HFCLKSTARTED_A::DISABLED,
+            true => HFCLKSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == HFCLKSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == HFCLKSTARTED_A::ENABLED
+    }
+}
+#[doc = "Field `HFCLKSTARTED` writer - Enable or disable interrupt for event HFCLKSTARTED"]
+pub type HFCLKSTARTED_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, HFCLKSTARTED_A, O>;
+impl<'a, const O: u8> HFCLKSTARTED_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(HFCLKSTARTED_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(HFCLKSTARTED_A::ENABLED)
+    }
+}
+#[doc = "Field `LFCLKSTARTED` reader - Enable or disable interrupt for event LFCLKSTARTED"]
+pub type LFCLKSTARTED_R = crate::BitReader<LFCLKSTARTED_A>;
+#[doc = "Enable or disable interrupt for event LFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum LFCLKSTARTED_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "1: Enable"]
+    ENABLED = 1,
+}
+impl From<LFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: LFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl LFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> LFCLKSTARTED_A {
+        match self.bits {
+            false => LFCLKSTARTED_A::DISABLED,
+            true => LFCLKSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == LFCLKSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == LFCLKSTARTED_A::ENABLED
+    }
+}
+#[doc = "Field `LFCLKSTARTED` writer - Enable or disable interrupt for event LFCLKSTARTED"]
+pub type LFCLKSTARTED_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, LFCLKSTARTED_A, O>;
+impl<'a, const O: u8> LFCLKSTARTED_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(LFCLKSTARTED_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(LFCLKSTARTED_A::ENABLED)
+    }
+}
+#[doc = "Field `DONE` reader - Enable or disable interrupt for event DONE"]
+pub type DONE_R = crate::BitReader<DONE_A>;
+#[doc = "Enable or disable interrupt for event DONE\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum DONE_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "1: Enable"]
+    ENABLED = 1,
+}
+impl From<DONE_A> for bool {
+    #[inline(always)]
+    fn from(variant: DONE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl DONE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DONE_A {
+        match self.bits {
+            false => DONE_A::DISABLED,
+            true => DONE_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == DONE_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == DONE_A::ENABLED
+    }
+}
+#[doc = "Field `DONE` writer - Enable or disable interrupt for event DONE"]
+pub type DONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, DONE_A, O>;
+impl<'a, const O: u8> DONE_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(DONE_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(DONE_A::ENABLED)
+    }
+}
+#[doc = "Field `HFCLKAUDIOSTARTED` reader - Enable or disable interrupt for event HFCLKAUDIOSTARTED"]
+pub type HFCLKAUDIOSTARTED_R = crate::BitReader<HFCLKAUDIOSTARTED_A>;
+#[doc = "Enable or disable interrupt for event HFCLKAUDIOSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLKAUDIOSTARTED_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "1: Enable"]
+    ENABLED = 1,
+}
+impl From<HFCLKAUDIOSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKAUDIOSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl HFCLKAUDIOSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> HFCLKAUDIOSTARTED_A {
+        match self.bits {
+            false => HFCLKAUDIOSTARTED_A::DISABLED,
+            true => HFCLKAUDIOSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == HFCLKAUDIOSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == HFCLKAUDIOSTARTED_A::ENABLED
+    }
+}
+#[doc = "Field `HFCLKAUDIOSTARTED` writer - Enable or disable interrupt for event HFCLKAUDIOSTARTED"]
+pub type HFCLKAUDIOSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTEN_SPEC, HFCLKAUDIOSTARTED_A, O>;
+impl<'a, const O: u8> HFCLKAUDIOSTARTED_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(HFCLKAUDIOSTARTED_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(HFCLKAUDIOSTARTED_A::ENABLED)
+    }
+}
+#[doc = "Field `HFCLK192MSTARTED` reader - Enable or disable interrupt for event HFCLK192MSTARTED"]
+pub type HFCLK192MSTARTED_R = crate::BitReader<HFCLK192MSTARTED_A>;
+#[doc = "Enable or disable interrupt for event HFCLK192MSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLK192MSTARTED_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "1: Enable"]
+    ENABLED = 1,
+}
+impl From<HFCLK192MSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLK192MSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl HFCLK192MSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> HFCLK192MSTARTED_A {
+        match self.bits {
+            false => HFCLK192MSTARTED_A::DISABLED,
+            true => HFCLK192MSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == HFCLK192MSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == HFCLK192MSTARTED_A::ENABLED
+    }
+}
+#[doc = "Field `HFCLK192MSTARTED` writer - Enable or disable interrupt for event HFCLK192MSTARTED"]
+pub type HFCLK192MSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTEN_SPEC, HFCLK192MSTARTED_A, O>;
+impl<'a, const O: u8> HFCLK192MSTARTED_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(HFCLK192MSTARTED_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(HFCLK192MSTARTED_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Enable or disable interrupt for event HFCLKSTARTED"]
+    #[inline(always)]
+    pub fn hfclkstarted(&self) -> HFCLKSTARTED_R {
+        HFCLKSTARTED_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Enable or disable interrupt for event LFCLKSTARTED"]
+    #[inline(always)]
+    pub fn lfclkstarted(&self) -> LFCLKSTARTED_R {
+        LFCLKSTARTED_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 7 - Enable or disable interrupt for event DONE"]
+    #[inline(always)]
+    pub fn done(&self) -> DONE_R {
+        DONE_R::new(((self.bits >> 7) & 1) != 0)
+    }
+    #[doc = "Bit 8 - Enable or disable interrupt for event HFCLKAUDIOSTARTED"]
+    #[inline(always)]
+    pub fn hfclkaudiostarted(&self) -> HFCLKAUDIOSTARTED_R {
+        HFCLKAUDIOSTARTED_R::new(((self.bits >> 8) & 1) != 0)
+    }
+    #[doc = "Bit 9 - Enable or disable interrupt for event HFCLK192MSTARTED"]
+    #[inline(always)]
+    pub fn hfclk192mstarted(&self) -> HFCLK192MSTARTED_R {
+        HFCLK192MSTARTED_R::new(((self.bits >> 9) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Enable or disable interrupt for event HFCLKSTARTED"]
+    #[inline(always)]
+    pub fn hfclkstarted(&mut self) -> HFCLKSTARTED_W<0> {
+        HFCLKSTARTED_W::new(self)
+    }
+    #[doc = "Bit 1 - Enable or disable interrupt for event LFCLKSTARTED"]
+    #[inline(always)]
+    pub fn lfclkstarted(&mut self) -> LFCLKSTARTED_W<1> {
+        LFCLKSTARTED_W::new(self)
+    }
+    #[doc = "Bit 7 - Enable or disable interrupt for event DONE"]
+    #[inline(always)]
+    pub fn done(&mut self) -> DONE_W<7> {
+        DONE_W::new(self)
+    }
+    #[doc = "Bit 8 - Enable or disable interrupt for event HFCLKAUDIOSTARTED"]
+    #[inline(always)]
+    pub fn hfclkaudiostarted(&mut self) -> HFCLKAUDIOSTARTED_W<8> {
+        HFCLKAUDIOSTARTED_W::new(self)
+    }
+    #[doc = "Bit 9 - Enable or disable interrupt for event HFCLK192MSTARTED"]
+    #[inline(always)]
+    pub fn hfclk192mstarted(&mut self) -> HFCLK192MSTARTED_W<9> {
+        HFCLK192MSTARTED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Enable or disable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [inten](index.html) module"]
+pub struct INTEN_SPEC;
+impl crate::RegisterSpec for INTEN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [inten::R](R) reader structure"]
+impl crate::Readable for INTEN_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [inten::W](W) writer structure"]
+impl crate::Writable for INTEN_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTEN to value 0"]
+impl crate::Resettable for INTEN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/intenclr.rs

@@ -0,0 +1,405 @@
+#[doc = "Register `INTENCLR` reader"]
+pub struct R(crate::R<INTENCLR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENCLR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENCLR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENCLR` writer"]
+pub struct W(crate::W<INTENCLR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENCLR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENCLR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `HFCLKSTARTED` reader - Write '1' to disable interrupt for event HFCLKSTARTED"]
+pub type HFCLKSTARTED_R = crate::BitReader<HFCLKSTARTED_A>;
+#[doc = "Write '1' to disable interrupt for event HFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLKSTARTED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<HFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl HFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> HFCLKSTARTED_A {
+        match self.bits {
+            false => HFCLKSTARTED_A::DISABLED,
+            true => HFCLKSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == HFCLKSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == HFCLKSTARTED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event HFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLKSTARTED_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<HFCLKSTARTED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKSTARTED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `HFCLKSTARTED` writer - Write '1' to disable interrupt for event HFCLKSTARTED"]
+pub type HFCLKSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENCLR_SPEC, HFCLKSTARTED_AW, O>;
+impl<'a, const O: u8> HFCLKSTARTED_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(HFCLKSTARTED_AW::CLEAR)
+    }
+}
+#[doc = "Field `LFCLKSTARTED` reader - Write '1' to disable interrupt for event LFCLKSTARTED"]
+pub type LFCLKSTARTED_R = crate::BitReader<LFCLKSTARTED_A>;
+#[doc = "Write '1' to disable interrupt for event LFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum LFCLKSTARTED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<LFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: LFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl LFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> LFCLKSTARTED_A {
+        match self.bits {
+            false => LFCLKSTARTED_A::DISABLED,
+            true => LFCLKSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == LFCLKSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == LFCLKSTARTED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event LFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum LFCLKSTARTED_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<LFCLKSTARTED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: LFCLKSTARTED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `LFCLKSTARTED` writer - Write '1' to disable interrupt for event LFCLKSTARTED"]
+pub type LFCLKSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENCLR_SPEC, LFCLKSTARTED_AW, O>;
+impl<'a, const O: u8> LFCLKSTARTED_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(LFCLKSTARTED_AW::CLEAR)
+    }
+}
+#[doc = "Field `DONE` reader - Write '1' to disable interrupt for event DONE"]
+pub type DONE_R = crate::BitReader<DONE_A>;
+#[doc = "Write '1' to disable interrupt for event DONE\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum DONE_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<DONE_A> for bool {
+    #[inline(always)]
+    fn from(variant: DONE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl DONE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DONE_A {
+        match self.bits {
+            false => DONE_A::DISABLED,
+            true => DONE_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == DONE_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == DONE_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event DONE\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum DONE_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<DONE_AW> for bool {
+    #[inline(always)]
+    fn from(variant: DONE_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `DONE` writer - Write '1' to disable interrupt for event DONE"]
+pub type DONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, DONE_AW, O>;
+impl<'a, const O: u8> DONE_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(DONE_AW::CLEAR)
+    }
+}
+#[doc = "Field `HFCLKAUDIOSTARTED` reader - Write '1' to disable interrupt for event HFCLKAUDIOSTARTED"]
+pub type HFCLKAUDIOSTARTED_R = crate::BitReader<HFCLKAUDIOSTARTED_A>;
+#[doc = "Write '1' to disable interrupt for event HFCLKAUDIOSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLKAUDIOSTARTED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<HFCLKAUDIOSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKAUDIOSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl HFCLKAUDIOSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> HFCLKAUDIOSTARTED_A {
+        match self.bits {
+            false => HFCLKAUDIOSTARTED_A::DISABLED,
+            true => HFCLKAUDIOSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == HFCLKAUDIOSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == HFCLKAUDIOSTARTED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event HFCLKAUDIOSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLKAUDIOSTARTED_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<HFCLKAUDIOSTARTED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKAUDIOSTARTED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `HFCLKAUDIOSTARTED` writer - Write '1' to disable interrupt for event HFCLKAUDIOSTARTED"]
+pub type HFCLKAUDIOSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENCLR_SPEC, HFCLKAUDIOSTARTED_AW, O>;
+impl<'a, const O: u8> HFCLKAUDIOSTARTED_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(HFCLKAUDIOSTARTED_AW::CLEAR)
+    }
+}
+#[doc = "Field `HFCLK192MSTARTED` reader - Write '1' to disable interrupt for event HFCLK192MSTARTED"]
+pub type HFCLK192MSTARTED_R = crate::BitReader<HFCLK192MSTARTED_A>;
+#[doc = "Write '1' to disable interrupt for event HFCLK192MSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLK192MSTARTED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<HFCLK192MSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLK192MSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl HFCLK192MSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> HFCLK192MSTARTED_A {
+        match self.bits {
+            false => HFCLK192MSTARTED_A::DISABLED,
+            true => HFCLK192MSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == HFCLK192MSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == HFCLK192MSTARTED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event HFCLK192MSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLK192MSTARTED_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<HFCLK192MSTARTED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLK192MSTARTED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `HFCLK192MSTARTED` writer - Write '1' to disable interrupt for event HFCLK192MSTARTED"]
+pub type HFCLK192MSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENCLR_SPEC, HFCLK192MSTARTED_AW, O>;
+impl<'a, const O: u8> HFCLK192MSTARTED_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(HFCLK192MSTARTED_AW::CLEAR)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Write '1' to disable interrupt for event HFCLKSTARTED"]
+    #[inline(always)]
+    pub fn hfclkstarted(&self) -> HFCLKSTARTED_R {
+        HFCLKSTARTED_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Write '1' to disable interrupt for event LFCLKSTARTED"]
+    #[inline(always)]
+    pub fn lfclkstarted(&self) -> LFCLKSTARTED_R {
+        LFCLKSTARTED_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 7 - Write '1' to disable interrupt for event DONE"]
+    #[inline(always)]
+    pub fn done(&self) -> DONE_R {
+        DONE_R::new(((self.bits >> 7) & 1) != 0)
+    }
+    #[doc = "Bit 8 - Write '1' to disable interrupt for event HFCLKAUDIOSTARTED"]
+    #[inline(always)]
+    pub fn hfclkaudiostarted(&self) -> HFCLKAUDIOSTARTED_R {
+        HFCLKAUDIOSTARTED_R::new(((self.bits >> 8) & 1) != 0)
+    }
+    #[doc = "Bit 9 - Write '1' to disable interrupt for event HFCLK192MSTARTED"]
+    #[inline(always)]
+    pub fn hfclk192mstarted(&self) -> HFCLK192MSTARTED_R {
+        HFCLK192MSTARTED_R::new(((self.bits >> 9) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Write '1' to disable interrupt for event HFCLKSTARTED"]
+    #[inline(always)]
+    pub fn hfclkstarted(&mut self) -> HFCLKSTARTED_W<0> {
+        HFCLKSTARTED_W::new(self)
+    }
+    #[doc = "Bit 1 - Write '1' to disable interrupt for event LFCLKSTARTED"]
+    #[inline(always)]
+    pub fn lfclkstarted(&mut self) -> LFCLKSTARTED_W<1> {
+        LFCLKSTARTED_W::new(self)
+    }
+    #[doc = "Bit 7 - Write '1' to disable interrupt for event DONE"]
+    #[inline(always)]
+    pub fn done(&mut self) -> DONE_W<7> {
+        DONE_W::new(self)
+    }
+    #[doc = "Bit 8 - Write '1' to disable interrupt for event HFCLKAUDIOSTARTED"]
+    #[inline(always)]
+    pub fn hfclkaudiostarted(&mut self) -> HFCLKAUDIOSTARTED_W<8> {
+        HFCLKAUDIOSTARTED_W::new(self)
+    }
+    #[doc = "Bit 9 - Write '1' to disable interrupt for event HFCLK192MSTARTED"]
+    #[inline(always)]
+    pub fn hfclk192mstarted(&mut self) -> HFCLK192MSTARTED_W<9> {
+        HFCLK192MSTARTED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Disable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"]
+pub struct INTENCLR_SPEC;
+impl crate::RegisterSpec for INTENCLR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [intenclr::R](R) reader structure"]
+impl crate::Readable for INTENCLR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"]
+impl crate::Writable for INTENCLR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTENCLR to value 0"]
+impl crate::Resettable for INTENCLR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/intenset.rs

@@ -0,0 +1,405 @@
+#[doc = "Register `INTENSET` reader"]
+pub struct R(crate::R<INTENSET_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENSET_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENSET_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENSET` writer"]
+pub struct W(crate::W<INTENSET_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENSET_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENSET_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `HFCLKSTARTED` reader - Write '1' to enable interrupt for event HFCLKSTARTED"]
+pub type HFCLKSTARTED_R = crate::BitReader<HFCLKSTARTED_A>;
+#[doc = "Write '1' to enable interrupt for event HFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLKSTARTED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<HFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl HFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> HFCLKSTARTED_A {
+        match self.bits {
+            false => HFCLKSTARTED_A::DISABLED,
+            true => HFCLKSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == HFCLKSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == HFCLKSTARTED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event HFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLKSTARTED_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<HFCLKSTARTED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKSTARTED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `HFCLKSTARTED` writer - Write '1' to enable interrupt for event HFCLKSTARTED"]
+pub type HFCLKSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENSET_SPEC, HFCLKSTARTED_AW, O>;
+impl<'a, const O: u8> HFCLKSTARTED_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(HFCLKSTARTED_AW::SET)
+    }
+}
+#[doc = "Field `LFCLKSTARTED` reader - Write '1' to enable interrupt for event LFCLKSTARTED"]
+pub type LFCLKSTARTED_R = crate::BitReader<LFCLKSTARTED_A>;
+#[doc = "Write '1' to enable interrupt for event LFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum LFCLKSTARTED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<LFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: LFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl LFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> LFCLKSTARTED_A {
+        match self.bits {
+            false => LFCLKSTARTED_A::DISABLED,
+            true => LFCLKSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == LFCLKSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == LFCLKSTARTED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event LFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum LFCLKSTARTED_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<LFCLKSTARTED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: LFCLKSTARTED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `LFCLKSTARTED` writer - Write '1' to enable interrupt for event LFCLKSTARTED"]
+pub type LFCLKSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENSET_SPEC, LFCLKSTARTED_AW, O>;
+impl<'a, const O: u8> LFCLKSTARTED_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(LFCLKSTARTED_AW::SET)
+    }
+}
+#[doc = "Field `DONE` reader - Write '1' to enable interrupt for event DONE"]
+pub type DONE_R = crate::BitReader<DONE_A>;
+#[doc = "Write '1' to enable interrupt for event DONE\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum DONE_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<DONE_A> for bool {
+    #[inline(always)]
+    fn from(variant: DONE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl DONE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DONE_A {
+        match self.bits {
+            false => DONE_A::DISABLED,
+            true => DONE_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == DONE_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == DONE_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event DONE\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum DONE_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<DONE_AW> for bool {
+    #[inline(always)]
+    fn from(variant: DONE_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `DONE` writer - Write '1' to enable interrupt for event DONE"]
+pub type DONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, DONE_AW, O>;
+impl<'a, const O: u8> DONE_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(DONE_AW::SET)
+    }
+}
+#[doc = "Field `HFCLKAUDIOSTARTED` reader - Write '1' to enable interrupt for event HFCLKAUDIOSTARTED"]
+pub type HFCLKAUDIOSTARTED_R = crate::BitReader<HFCLKAUDIOSTARTED_A>;
+#[doc = "Write '1' to enable interrupt for event HFCLKAUDIOSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLKAUDIOSTARTED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<HFCLKAUDIOSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKAUDIOSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl HFCLKAUDIOSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> HFCLKAUDIOSTARTED_A {
+        match self.bits {
+            false => HFCLKAUDIOSTARTED_A::DISABLED,
+            true => HFCLKAUDIOSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == HFCLKAUDIOSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == HFCLKAUDIOSTARTED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event HFCLKAUDIOSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLKAUDIOSTARTED_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<HFCLKAUDIOSTARTED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKAUDIOSTARTED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `HFCLKAUDIOSTARTED` writer - Write '1' to enable interrupt for event HFCLKAUDIOSTARTED"]
+pub type HFCLKAUDIOSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENSET_SPEC, HFCLKAUDIOSTARTED_AW, O>;
+impl<'a, const O: u8> HFCLKAUDIOSTARTED_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(HFCLKAUDIOSTARTED_AW::SET)
+    }
+}
+#[doc = "Field `HFCLK192MSTARTED` reader - Write '1' to enable interrupt for event HFCLK192MSTARTED"]
+pub type HFCLK192MSTARTED_R = crate::BitReader<HFCLK192MSTARTED_A>;
+#[doc = "Write '1' to enable interrupt for event HFCLK192MSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLK192MSTARTED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<HFCLK192MSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLK192MSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl HFCLK192MSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> HFCLK192MSTARTED_A {
+        match self.bits {
+            false => HFCLK192MSTARTED_A::DISABLED,
+            true => HFCLK192MSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == HFCLK192MSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == HFCLK192MSTARTED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event HFCLK192MSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLK192MSTARTED_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<HFCLK192MSTARTED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLK192MSTARTED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `HFCLK192MSTARTED` writer - Write '1' to enable interrupt for event HFCLK192MSTARTED"]
+pub type HFCLK192MSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENSET_SPEC, HFCLK192MSTARTED_AW, O>;
+impl<'a, const O: u8> HFCLK192MSTARTED_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(HFCLK192MSTARTED_AW::SET)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Write '1' to enable interrupt for event HFCLKSTARTED"]
+    #[inline(always)]
+    pub fn hfclkstarted(&self) -> HFCLKSTARTED_R {
+        HFCLKSTARTED_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Write '1' to enable interrupt for event LFCLKSTARTED"]
+    #[inline(always)]
+    pub fn lfclkstarted(&self) -> LFCLKSTARTED_R {
+        LFCLKSTARTED_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 7 - Write '1' to enable interrupt for event DONE"]
+    #[inline(always)]
+    pub fn done(&self) -> DONE_R {
+        DONE_R::new(((self.bits >> 7) & 1) != 0)
+    }
+    #[doc = "Bit 8 - Write '1' to enable interrupt for event HFCLKAUDIOSTARTED"]
+    #[inline(always)]
+    pub fn hfclkaudiostarted(&self) -> HFCLKAUDIOSTARTED_R {
+        HFCLKAUDIOSTARTED_R::new(((self.bits >> 8) & 1) != 0)
+    }
+    #[doc = "Bit 9 - Write '1' to enable interrupt for event HFCLK192MSTARTED"]
+    #[inline(always)]
+    pub fn hfclk192mstarted(&self) -> HFCLK192MSTARTED_R {
+        HFCLK192MSTARTED_R::new(((self.bits >> 9) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Write '1' to enable interrupt for event HFCLKSTARTED"]
+    #[inline(always)]
+    pub fn hfclkstarted(&mut self) -> HFCLKSTARTED_W<0> {
+        HFCLKSTARTED_W::new(self)
+    }
+    #[doc = "Bit 1 - Write '1' to enable interrupt for event LFCLKSTARTED"]
+    #[inline(always)]
+    pub fn lfclkstarted(&mut self) -> LFCLKSTARTED_W<1> {
+        LFCLKSTARTED_W::new(self)
+    }
+    #[doc = "Bit 7 - Write '1' to enable interrupt for event DONE"]
+    #[inline(always)]
+    pub fn done(&mut self) -> DONE_W<7> {
+        DONE_W::new(self)
+    }
+    #[doc = "Bit 8 - Write '1' to enable interrupt for event HFCLKAUDIOSTARTED"]
+    #[inline(always)]
+    pub fn hfclkaudiostarted(&mut self) -> HFCLKAUDIOSTARTED_W<8> {
+        HFCLKAUDIOSTARTED_W::new(self)
+    }
+    #[doc = "Bit 9 - Write '1' to enable interrupt for event HFCLK192MSTARTED"]
+    #[inline(always)]
+    pub fn hfclk192mstarted(&mut self) -> HFCLK192MSTARTED_W<9> {
+        HFCLK192MSTARTED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Enable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"]
+pub struct INTENSET_SPEC;
+impl crate::RegisterSpec for INTENSET_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [intenset::R](R) reader structure"]
+impl crate::Readable for INTENSET_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"]
+impl crate::Writable for INTENSET_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTENSET to value 0"]
+impl crate::Resettable for INTENSET_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/intpend.rs

@@ -0,0 +1,238 @@
+#[doc = "Register `INTPEND` reader"]
+pub struct R(crate::R<INTPEND_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTPEND_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTPEND_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTPEND_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `HFCLKSTARTED` reader - Read pending status of interrupt for event HFCLKSTARTED"]
+pub type HFCLKSTARTED_R = crate::BitReader<HFCLKSTARTED_A>;
+#[doc = "Read pending status of interrupt for event HFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLKSTARTED_A {
+    #[doc = "0: Read: Not pending"]
+    NOT_PENDING = 0,
+    #[doc = "1: Read: Pending"]
+    PENDING = 1,
+}
+impl From<HFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl HFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> HFCLKSTARTED_A {
+        match self.bits {
+            false => HFCLKSTARTED_A::NOT_PENDING,
+            true => HFCLKSTARTED_A::PENDING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_PENDING`"]
+    #[inline(always)]
+    pub fn is_not_pending(&self) -> bool {
+        *self == HFCLKSTARTED_A::NOT_PENDING
+    }
+    #[doc = "Checks if the value of the field is `PENDING`"]
+    #[inline(always)]
+    pub fn is_pending(&self) -> bool {
+        *self == HFCLKSTARTED_A::PENDING
+    }
+}
+#[doc = "Field `LFCLKSTARTED` reader - Read pending status of interrupt for event LFCLKSTARTED"]
+pub type LFCLKSTARTED_R = crate::BitReader<LFCLKSTARTED_A>;
+#[doc = "Read pending status of interrupt for event LFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum LFCLKSTARTED_A {
+    #[doc = "0: Read: Not pending"]
+    NOT_PENDING = 0,
+    #[doc = "1: Read: Pending"]
+    PENDING = 1,
+}
+impl From<LFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: LFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl LFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> LFCLKSTARTED_A {
+        match self.bits {
+            false => LFCLKSTARTED_A::NOT_PENDING,
+            true => LFCLKSTARTED_A::PENDING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_PENDING`"]
+    #[inline(always)]
+    pub fn is_not_pending(&self) -> bool {
+        *self == LFCLKSTARTED_A::NOT_PENDING
+    }
+    #[doc = "Checks if the value of the field is `PENDING`"]
+    #[inline(always)]
+    pub fn is_pending(&self) -> bool {
+        *self == LFCLKSTARTED_A::PENDING
+    }
+}
+#[doc = "Field `DONE` reader - Read pending status of interrupt for event DONE"]
+pub type DONE_R = crate::BitReader<DONE_A>;
+#[doc = "Read pending status of interrupt for event DONE\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum DONE_A {
+    #[doc = "0: Read: Not pending"]
+    NOT_PENDING = 0,
+    #[doc = "1: Read: Pending"]
+    PENDING = 1,
+}
+impl From<DONE_A> for bool {
+    #[inline(always)]
+    fn from(variant: DONE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl DONE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DONE_A {
+        match self.bits {
+            false => DONE_A::NOT_PENDING,
+            true => DONE_A::PENDING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_PENDING`"]
+    #[inline(always)]
+    pub fn is_not_pending(&self) -> bool {
+        *self == DONE_A::NOT_PENDING
+    }
+    #[doc = "Checks if the value of the field is `PENDING`"]
+    #[inline(always)]
+    pub fn is_pending(&self) -> bool {
+        *self == DONE_A::PENDING
+    }
+}
+#[doc = "Field `HFCLKAUDIOSTARTED` reader - Read pending status of interrupt for event HFCLKAUDIOSTARTED"]
+pub type HFCLKAUDIOSTARTED_R = crate::BitReader<HFCLKAUDIOSTARTED_A>;
+#[doc = "Read pending status of interrupt for event HFCLKAUDIOSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLKAUDIOSTARTED_A {
+    #[doc = "0: Read: Not pending"]
+    NOT_PENDING = 0,
+    #[doc = "1: Read: Pending"]
+    PENDING = 1,
+}
+impl From<HFCLKAUDIOSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKAUDIOSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl HFCLKAUDIOSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> HFCLKAUDIOSTARTED_A {
+        match self.bits {
+            false => HFCLKAUDIOSTARTED_A::NOT_PENDING,
+            true => HFCLKAUDIOSTARTED_A::PENDING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_PENDING`"]
+    #[inline(always)]
+    pub fn is_not_pending(&self) -> bool {
+        *self == HFCLKAUDIOSTARTED_A::NOT_PENDING
+    }
+    #[doc = "Checks if the value of the field is `PENDING`"]
+    #[inline(always)]
+    pub fn is_pending(&self) -> bool {
+        *self == HFCLKAUDIOSTARTED_A::PENDING
+    }
+}
+#[doc = "Field `HFCLK192MSTARTED` reader - Read pending status of interrupt for event HFCLK192MSTARTED"]
+pub type HFCLK192MSTARTED_R = crate::BitReader<HFCLK192MSTARTED_A>;
+#[doc = "Read pending status of interrupt for event HFCLK192MSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLK192MSTARTED_A {
+    #[doc = "0: Read: Not pending"]
+    NOT_PENDING = 0,
+    #[doc = "1: Read: Pending"]
+    PENDING = 1,
+}
+impl From<HFCLK192MSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLK192MSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl HFCLK192MSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> HFCLK192MSTARTED_A {
+        match self.bits {
+            false => HFCLK192MSTARTED_A::NOT_PENDING,
+            true => HFCLK192MSTARTED_A::PENDING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_PENDING`"]
+    #[inline(always)]
+    pub fn is_not_pending(&self) -> bool {
+        *self == HFCLK192MSTARTED_A::NOT_PENDING
+    }
+    #[doc = "Checks if the value of the field is `PENDING`"]
+    #[inline(always)]
+    pub fn is_pending(&self) -> bool {
+        *self == HFCLK192MSTARTED_A::PENDING
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Read pending status of interrupt for event HFCLKSTARTED"]
+    #[inline(always)]
+    pub fn hfclkstarted(&self) -> HFCLKSTARTED_R {
+        HFCLKSTARTED_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Read pending status of interrupt for event LFCLKSTARTED"]
+    #[inline(always)]
+    pub fn lfclkstarted(&self) -> LFCLKSTARTED_R {
+        LFCLKSTARTED_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 7 - Read pending status of interrupt for event DONE"]
+    #[inline(always)]
+    pub fn done(&self) -> DONE_R {
+        DONE_R::new(((self.bits >> 7) & 1) != 0)
+    }
+    #[doc = "Bit 8 - Read pending status of interrupt for event HFCLKAUDIOSTARTED"]
+    #[inline(always)]
+    pub fn hfclkaudiostarted(&self) -> HFCLKAUDIOSTARTED_R {
+        HFCLKAUDIOSTARTED_R::new(((self.bits >> 8) & 1) != 0)
+    }
+    #[doc = "Bit 9 - Read pending status of interrupt for event HFCLK192MSTARTED"]
+    #[inline(always)]
+    pub fn hfclk192mstarted(&self) -> HFCLK192MSTARTED_R {
+        HFCLK192MSTARTED_R::new(((self.bits >> 9) & 1) != 0)
+    }
+}
+#[doc = "Pending interrupts\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intpend](index.html) module"]
+pub struct INTPEND_SPEC;
+impl crate::RegisterSpec for INTPEND_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [intpend::R](R) reader structure"]
+impl crate::Readable for INTPEND_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets INTPEND to value 0"]
+impl crate::Resettable for INTPEND_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/lfclkalwaysrun.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `LFCLKALWAYSRUN` reader"]
+pub struct R(crate::R<LFCLKALWAYSRUN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<LFCLKALWAYSRUN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<LFCLKALWAYSRUN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<LFCLKALWAYSRUN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `LFCLKALWAYSRUN` writer"]
+pub struct W(crate::W<LFCLKALWAYSRUN_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<LFCLKALWAYSRUN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<LFCLKALWAYSRUN_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<LFCLKALWAYSRUN_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ALWAYSRUN` reader - Ensure clock is always running"]
+pub type ALWAYSRUN_R = crate::BitReader<ALWAYSRUN_A>;
+#[doc = "Ensure clock is always running\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ALWAYSRUN_A {
+    #[doc = "0: Use automatic clock control"]
+    AUTOMATIC = 0,
+    #[doc = "1: Ensure clock is always running"]
+    ALWAYS_RUN = 1,
+}
+impl From<ALWAYSRUN_A> for bool {
+    #[inline(always)]
+    fn from(variant: ALWAYSRUN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ALWAYSRUN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ALWAYSRUN_A {
+        match self.bits {
+            false => ALWAYSRUN_A::AUTOMATIC,
+            true => ALWAYSRUN_A::ALWAYS_RUN,
+        }
+    }
+    #[doc = "Checks if the value of the field is `AUTOMATIC`"]
+    #[inline(always)]
+    pub fn is_automatic(&self) -> bool {
+        *self == ALWAYSRUN_A::AUTOMATIC
+    }
+    #[doc = "Checks if the value of the field is `ALWAYS_RUN`"]
+    #[inline(always)]
+    pub fn is_always_run(&self) -> bool {
+        *self == ALWAYSRUN_A::ALWAYS_RUN
+    }
+}
+#[doc = "Field `ALWAYSRUN` writer - Ensure clock is always running"]
+pub type ALWAYSRUN_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, LFCLKALWAYSRUN_SPEC, ALWAYSRUN_A, O>;
+impl<'a, const O: u8> ALWAYSRUN_W<'a, O> {
+    #[doc = "Use automatic clock control"]
+    #[inline(always)]
+    pub fn automatic(self) -> &'a mut W {
+        self.variant(ALWAYSRUN_A::AUTOMATIC)
+    }
+    #[doc = "Ensure clock is always running"]
+    #[inline(always)]
+    pub fn always_run(self) -> &'a mut W {
+        self.variant(ALWAYSRUN_A::ALWAYS_RUN)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Ensure clock is always running"]
+    #[inline(always)]
+    pub fn alwaysrun(&self) -> ALWAYSRUN_R {
+        ALWAYSRUN_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Ensure clock is always running"]
+    #[inline(always)]
+    pub fn alwaysrun(&mut self) -> ALWAYSRUN_W<0> {
+        ALWAYSRUN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Automatic or manual control of LFCLK\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfclkalwaysrun](index.html) module"]
+pub struct LFCLKALWAYSRUN_SPEC;
+impl crate::RegisterSpec for LFCLKALWAYSRUN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [lfclkalwaysrun::R](R) reader structure"]
+impl crate::Readable for LFCLKALWAYSRUN_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [lfclkalwaysrun::W](W) writer structure"]
+impl crate::Writable for LFCLKALWAYSRUN_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets LFCLKALWAYSRUN to value 0"]
+impl crate::Resettable for LFCLKALWAYSRUN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/lfclkrun.rs

@@ -0,0 +1,74 @@
+#[doc = "Register `LFCLKRUN` reader"]
+pub struct R(crate::R<LFCLKRUN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<LFCLKRUN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<LFCLKRUN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<LFCLKRUN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `STATUS` reader - LFCLKSTART task triggered or not"]
+pub type STATUS_R = crate::BitReader<STATUS_A>;
+#[doc = "LFCLKSTART task triggered or not\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STATUS_A {
+    #[doc = "0: Task not triggered"]
+    NOT_TRIGGERED = 0,
+    #[doc = "1: Task triggered"]
+    TRIGGERED = 1,
+}
+impl From<STATUS_A> for bool {
+    #[inline(always)]
+    fn from(variant: STATUS_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STATUS_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STATUS_A {
+        match self.bits {
+            false => STATUS_A::NOT_TRIGGERED,
+            true => STATUS_A::TRIGGERED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_TRIGGERED`"]
+    #[inline(always)]
+    pub fn is_not_triggered(&self) -> bool {
+        *self == STATUS_A::NOT_TRIGGERED
+    }
+    #[doc = "Checks if the value of the field is `TRIGGERED`"]
+    #[inline(always)]
+    pub fn is_triggered(&self) -> bool {
+        *self == STATUS_A::TRIGGERED
+    }
+}
+impl R {
+    #[doc = "Bit 0 - LFCLKSTART task triggered or not"]
+    #[inline(always)]
+    pub fn status(&self) -> STATUS_R {
+        STATUS_R::new((self.bits & 1) != 0)
+    }
+}
+#[doc = "Status indicating that LFCLKSTART task has been triggered\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfclkrun](index.html) module"]
+pub struct LFCLKRUN_SPEC;
+impl crate::RegisterSpec for LFCLKRUN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [lfclkrun::R](R) reader structure"]
+impl crate::Readable for LFCLKRUN_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets LFCLKRUN to value 0"]
+impl crate::Resettable for LFCLKRUN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/lfclksrc.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `LFCLKSRC` reader"]
+pub struct R(crate::R<LFCLKSRC_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<LFCLKSRC_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<LFCLKSRC_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<LFCLKSRC_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `LFCLKSRC` writer"]
+pub struct W(crate::W<LFCLKSRC_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<LFCLKSRC_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<LFCLKSRC_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<LFCLKSRC_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `SRC` reader - Select which LFCLK source is started by the LFCLKSTART task"]
+pub type SRC_R = crate::FieldReader<u8, SRC_A>;
+#[doc = "Select which LFCLK source is started by the LFCLKSTART task\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum SRC_A {
+    #[doc = "1: 32.768 kHz RC oscillator"]
+    LFRC = 1,
+    #[doc = "2: 32.768 kHz crystal oscillator"]
+    LFXO = 2,
+    #[doc = "3: 32.768 kHz synthesized from HFCLK"]
+    LFSYNT = 3,
+}
+impl From<SRC_A> for u8 {
+    #[inline(always)]
+    fn from(variant: SRC_A) -> Self {
+        variant as _
+    }
+}
+impl SRC_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<SRC_A> {
+        match self.bits {
+            1 => Some(SRC_A::LFRC),
+            2 => Some(SRC_A::LFXO),
+            3 => Some(SRC_A::LFSYNT),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `LFRC`"]
+    #[inline(always)]
+    pub fn is_lfrc(&self) -> bool {
+        *self == SRC_A::LFRC
+    }
+    #[doc = "Checks if the value of the field is `LFXO`"]
+    #[inline(always)]
+    pub fn is_lfxo(&self) -> bool {
+        *self == SRC_A::LFXO
+    }
+    #[doc = "Checks if the value of the field is `LFSYNT`"]
+    #[inline(always)]
+    pub fn is_lfsynt(&self) -> bool {
+        *self == SRC_A::LFSYNT
+    }
+}
+#[doc = "Field `SRC` writer - Select which LFCLK source is started by the LFCLKSTART task"]
+pub type SRC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, LFCLKSRC_SPEC, u8, SRC_A, 2, O>;
+impl<'a, const O: u8> SRC_W<'a, O> {
+    #[doc = "32.768 kHz RC oscillator"]
+    #[inline(always)]
+    pub fn lfrc(self) -> &'a mut W {
+        self.variant(SRC_A::LFRC)
+    }
+    #[doc = "32.768 kHz crystal oscillator"]
+    #[inline(always)]
+    pub fn lfxo(self) -> &'a mut W {
+        self.variant(SRC_A::LFXO)
+    }
+    #[doc = "32.768 kHz synthesized from HFCLK"]
+    #[inline(always)]
+    pub fn lfsynt(self) -> &'a mut W {
+        self.variant(SRC_A::LFSYNT)
+    }
+}
+impl R {
+    #[doc = "Bits 0:1 - Select which LFCLK source is started by the LFCLKSTART task"]
+    #[inline(always)]
+    pub fn src(&self) -> SRC_R {
+        SRC_R::new((self.bits & 3) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:1 - Select which LFCLK source is started by the LFCLKSTART task"]
+    #[inline(always)]
+    pub fn src(&mut self) -> SRC_W<0> {
+        SRC_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Clock source for LFCLK\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfclksrc](index.html) module"]
+pub struct LFCLKSRC_SPEC;
+impl crate::RegisterSpec for LFCLKSRC_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [lfclksrc::R](R) reader structure"]
+impl crate::Readable for LFCLKSRC_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [lfclksrc::W](W) writer structure"]
+impl crate::Writable for LFCLKSRC_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets LFCLKSRC to value 0x01"]
+impl crate::Resettable for LFCLKSRC_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x01
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/lfclksrccopy.rs

@@ -0,0 +1,84 @@
+#[doc = "Register `LFCLKSRCCOPY` reader"]
+pub struct R(crate::R<LFCLKSRCCOPY_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<LFCLKSRCCOPY_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<LFCLKSRCCOPY_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<LFCLKSRCCOPY_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `SRC` reader - Clock source"]
+pub type SRC_R = crate::FieldReader<u8, SRC_A>;
+#[doc = "Clock source\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum SRC_A {
+    #[doc = "1: 32.768 kHz RC oscillator"]
+    LFRC = 1,
+    #[doc = "2: 32.768 kHz crystal oscillator"]
+    LFXO = 2,
+    #[doc = "3: 32.768 kHz synthesized from HFCLK"]
+    LFSYNT = 3,
+}
+impl From<SRC_A> for u8 {
+    #[inline(always)]
+    fn from(variant: SRC_A) -> Self {
+        variant as _
+    }
+}
+impl SRC_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<SRC_A> {
+        match self.bits {
+            1 => Some(SRC_A::LFRC),
+            2 => Some(SRC_A::LFXO),
+            3 => Some(SRC_A::LFSYNT),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `LFRC`"]
+    #[inline(always)]
+    pub fn is_lfrc(&self) -> bool {
+        *self == SRC_A::LFRC
+    }
+    #[doc = "Checks if the value of the field is `LFXO`"]
+    #[inline(always)]
+    pub fn is_lfxo(&self) -> bool {
+        *self == SRC_A::LFXO
+    }
+    #[doc = "Checks if the value of the field is `LFSYNT`"]
+    #[inline(always)]
+    pub fn is_lfsynt(&self) -> bool {
+        *self == SRC_A::LFSYNT
+    }
+}
+impl R {
+    #[doc = "Bits 0:1 - Clock source"]
+    #[inline(always)]
+    pub fn src(&self) -> SRC_R {
+        SRC_R::new((self.bits & 3) as u8)
+    }
+}
+#[doc = "Copy of LFCLKSRC register, set when LFCLKSTART task was triggered\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfclksrccopy](index.html) module"]
+pub struct LFCLKSRCCOPY_SPEC;
+impl crate::RegisterSpec for LFCLKSRCCOPY_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [lfclksrccopy::R](R) reader structure"]
+impl crate::Readable for LFCLKSRCCOPY_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets LFCLKSRCCOPY to value 0x01"]
+impl crate::Resettable for LFCLKSRCCOPY_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x01
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/lfclkstat.rs

@@ -0,0 +1,166 @@
+#[doc = "Register `LFCLKSTAT` reader"]
+pub struct R(crate::R<LFCLKSTAT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<LFCLKSTAT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<LFCLKSTAT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<LFCLKSTAT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `SRC` reader - Active clock source"]
+pub type SRC_R = crate::FieldReader<u8, SRC_A>;
+#[doc = "Active clock source\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum SRC_A {
+    #[doc = "1: 32.768 kHz RC oscillator"]
+    LFRC = 1,
+    #[doc = "2: 32.768 kHz crystal oscillator"]
+    LFXO = 2,
+    #[doc = "3: 32.768 kHz synthesized from HFCLK"]
+    LFSYNT = 3,
+}
+impl From<SRC_A> for u8 {
+    #[inline(always)]
+    fn from(variant: SRC_A) -> Self {
+        variant as _
+    }
+}
+impl SRC_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<SRC_A> {
+        match self.bits {
+            1 => Some(SRC_A::LFRC),
+            2 => Some(SRC_A::LFXO),
+            3 => Some(SRC_A::LFSYNT),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `LFRC`"]
+    #[inline(always)]
+    pub fn is_lfrc(&self) -> bool {
+        *self == SRC_A::LFRC
+    }
+    #[doc = "Checks if the value of the field is `LFXO`"]
+    #[inline(always)]
+    pub fn is_lfxo(&self) -> bool {
+        *self == SRC_A::LFXO
+    }
+    #[doc = "Checks if the value of the field is `LFSYNT`"]
+    #[inline(always)]
+    pub fn is_lfsynt(&self) -> bool {
+        *self == SRC_A::LFSYNT
+    }
+}
+#[doc = "Field `ALWAYSRUNNING` reader - ALWAYSRUN activated"]
+pub type ALWAYSRUNNING_R = crate::BitReader<ALWAYSRUNNING_A>;
+#[doc = "ALWAYSRUN activated\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ALWAYSRUNNING_A {
+    #[doc = "0: Automatic clock control enabled"]
+    NOT_RUNNING = 0,
+    #[doc = "1: Oscillator is always running"]
+    RUNNING = 1,
+}
+impl From<ALWAYSRUNNING_A> for bool {
+    #[inline(always)]
+    fn from(variant: ALWAYSRUNNING_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ALWAYSRUNNING_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ALWAYSRUNNING_A {
+        match self.bits {
+            false => ALWAYSRUNNING_A::NOT_RUNNING,
+            true => ALWAYSRUNNING_A::RUNNING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_RUNNING`"]
+    #[inline(always)]
+    pub fn is_not_running(&self) -> bool {
+        *self == ALWAYSRUNNING_A::NOT_RUNNING
+    }
+    #[doc = "Checks if the value of the field is `RUNNING`"]
+    #[inline(always)]
+    pub fn is_running(&self) -> bool {
+        *self == ALWAYSRUNNING_A::RUNNING
+    }
+}
+#[doc = "Field `STATE` reader - LFCLK state"]
+pub type STATE_R = crate::BitReader<STATE_A>;
+#[doc = "LFCLK state\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STATE_A {
+    #[doc = "0: LFCLK not running"]
+    NOT_RUNNING = 0,
+    #[doc = "1: LFCLK running"]
+    RUNNING = 1,
+}
+impl From<STATE_A> for bool {
+    #[inline(always)]
+    fn from(variant: STATE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STATE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STATE_A {
+        match self.bits {
+            false => STATE_A::NOT_RUNNING,
+            true => STATE_A::RUNNING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_RUNNING`"]
+    #[inline(always)]
+    pub fn is_not_running(&self) -> bool {
+        *self == STATE_A::NOT_RUNNING
+    }
+    #[doc = "Checks if the value of the field is `RUNNING`"]
+    #[inline(always)]
+    pub fn is_running(&self) -> bool {
+        *self == STATE_A::RUNNING
+    }
+}
+impl R {
+    #[doc = "Bits 0:1 - Active clock source"]
+    #[inline(always)]
+    pub fn src(&self) -> SRC_R {
+        SRC_R::new((self.bits & 3) as u8)
+    }
+    #[doc = "Bit 4 - ALWAYSRUN activated"]
+    #[inline(always)]
+    pub fn alwaysrunning(&self) -> ALWAYSRUNNING_R {
+        ALWAYSRUNNING_R::new(((self.bits >> 4) & 1) != 0)
+    }
+    #[doc = "Bit 16 - LFCLK state"]
+    #[inline(always)]
+    pub fn state(&self) -> STATE_R {
+        STATE_R::new(((self.bits >> 16) & 1) != 0)
+    }
+}
+#[doc = "Status indicating which LFCLK source is running This register value in any CLOCK instance reflects status only due to configurations/actions in that CLOCK instance.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfclkstat](index.html) module"]
+pub struct LFCLKSTAT_SPEC;
+impl crate::RegisterSpec for LFCLKSTAT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [lfclkstat::R](R) reader structure"]
+impl crate::Readable for LFCLKSTAT_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets LFCLKSTAT to value 0"]
+impl crate::Resettable for LFCLKSTAT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/publish_done.rs

@@ -0,0 +1,140 @@
+#[doc = "Register `PUBLISH_DONE` reader"]
+pub struct R(crate::R<PUBLISH_DONE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PUBLISH_DONE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PUBLISH_DONE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PUBLISH_DONE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PUBLISH_DONE` writer"]
+pub struct W(crate::W<PUBLISH_DONE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PUBLISH_DONE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PUBLISH_DONE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PUBLISH_DONE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that event DONE will publish to."]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that event DONE will publish to."]
+pub type CHIDX_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PUBLISH_DONE_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable publishing"]
+    DISABLED = 0,
+    #[doc = "1: Enable publishing"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PUBLISH_DONE_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable publishing"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable publishing"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that event DONE will publish to."]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that event DONE will publish to."]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Publish configuration for event DONE\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [publish_done](index.html) module"]
+pub struct PUBLISH_DONE_SPEC;
+impl crate::RegisterSpec for PUBLISH_DONE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [publish_done::R](R) reader structure"]
+impl crate::Readable for PUBLISH_DONE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [publish_done::W](W) writer structure"]
+impl crate::Writable for PUBLISH_DONE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PUBLISH_DONE to value 0"]
+impl crate::Resettable for PUBLISH_DONE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/publish_hfclk192mstarted.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `PUBLISH_HFCLK192MSTARTED` reader"]
+pub struct R(crate::R<PUBLISH_HFCLK192MSTARTED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PUBLISH_HFCLK192MSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PUBLISH_HFCLK192MSTARTED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PUBLISH_HFCLK192MSTARTED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PUBLISH_HFCLK192MSTARTED` writer"]
+pub struct W(crate::W<PUBLISH_HFCLK192MSTARTED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PUBLISH_HFCLK192MSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PUBLISH_HFCLK192MSTARTED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PUBLISH_HFCLK192MSTARTED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that event HFCLK192MSTARTED will publish to."]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that event HFCLK192MSTARTED will publish to."]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, PUBLISH_HFCLK192MSTARTED_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable publishing"]
+    DISABLED = 0,
+    #[doc = "1: Enable publishing"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PUBLISH_HFCLK192MSTARTED_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable publishing"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable publishing"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that event HFCLK192MSTARTED will publish to."]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that event HFCLK192MSTARTED will publish to."]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Publish configuration for event HFCLK192MSTARTED\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [publish_hfclk192mstarted](index.html) module"]
+pub struct PUBLISH_HFCLK192MSTARTED_SPEC;
+impl crate::RegisterSpec for PUBLISH_HFCLK192MSTARTED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [publish_hfclk192mstarted::R](R) reader structure"]
+impl crate::Readable for PUBLISH_HFCLK192MSTARTED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [publish_hfclk192mstarted::W](W) writer structure"]
+impl crate::Writable for PUBLISH_HFCLK192MSTARTED_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PUBLISH_HFCLK192MSTARTED to value 0"]
+impl crate::Resettable for PUBLISH_HFCLK192MSTARTED_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/publish_hfclkaudiostarted.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `PUBLISH_HFCLKAUDIOSTARTED` reader"]
+pub struct R(crate::R<PUBLISH_HFCLKAUDIOSTARTED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PUBLISH_HFCLKAUDIOSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PUBLISH_HFCLKAUDIOSTARTED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PUBLISH_HFCLKAUDIOSTARTED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PUBLISH_HFCLKAUDIOSTARTED` writer"]
+pub struct W(crate::W<PUBLISH_HFCLKAUDIOSTARTED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PUBLISH_HFCLKAUDIOSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PUBLISH_HFCLKAUDIOSTARTED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PUBLISH_HFCLKAUDIOSTARTED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that event HFCLKAUDIOSTARTED will publish to."]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that event HFCLKAUDIOSTARTED will publish to."]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, PUBLISH_HFCLKAUDIOSTARTED_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable publishing"]
+    DISABLED = 0,
+    #[doc = "1: Enable publishing"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PUBLISH_HFCLKAUDIOSTARTED_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable publishing"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable publishing"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that event HFCLKAUDIOSTARTED will publish to."]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that event HFCLKAUDIOSTARTED will publish to."]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Publish configuration for event HFCLKAUDIOSTARTED\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [publish_hfclkaudiostarted](index.html) module"]
+pub struct PUBLISH_HFCLKAUDIOSTARTED_SPEC;
+impl crate::RegisterSpec for PUBLISH_HFCLKAUDIOSTARTED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [publish_hfclkaudiostarted::R](R) reader structure"]
+impl crate::Readable for PUBLISH_HFCLKAUDIOSTARTED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [publish_hfclkaudiostarted::W](W) writer structure"]
+impl crate::Writable for PUBLISH_HFCLKAUDIOSTARTED_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PUBLISH_HFCLKAUDIOSTARTED to value 0"]
+impl crate::Resettable for PUBLISH_HFCLKAUDIOSTARTED_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/publish_hfclkstarted.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `PUBLISH_HFCLKSTARTED` reader"]
+pub struct R(crate::R<PUBLISH_HFCLKSTARTED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PUBLISH_HFCLKSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PUBLISH_HFCLKSTARTED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PUBLISH_HFCLKSTARTED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PUBLISH_HFCLKSTARTED` writer"]
+pub struct W(crate::W<PUBLISH_HFCLKSTARTED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PUBLISH_HFCLKSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PUBLISH_HFCLKSTARTED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PUBLISH_HFCLKSTARTED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that event HFCLKSTARTED will publish to."]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that event HFCLKSTARTED will publish to."]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, PUBLISH_HFCLKSTARTED_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable publishing"]
+    DISABLED = 0,
+    #[doc = "1: Enable publishing"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PUBLISH_HFCLKSTARTED_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable publishing"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable publishing"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that event HFCLKSTARTED will publish to."]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that event HFCLKSTARTED will publish to."]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Publish configuration for event HFCLKSTARTED\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [publish_hfclkstarted](index.html) module"]
+pub struct PUBLISH_HFCLKSTARTED_SPEC;
+impl crate::RegisterSpec for PUBLISH_HFCLKSTARTED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [publish_hfclkstarted::R](R) reader structure"]
+impl crate::Readable for PUBLISH_HFCLKSTARTED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [publish_hfclkstarted::W](W) writer structure"]
+impl crate::Writable for PUBLISH_HFCLKSTARTED_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PUBLISH_HFCLKSTARTED to value 0"]
+impl crate::Resettable for PUBLISH_HFCLKSTARTED_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/publish_lfclkstarted.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `PUBLISH_LFCLKSTARTED` reader"]
+pub struct R(crate::R<PUBLISH_LFCLKSTARTED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PUBLISH_LFCLKSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PUBLISH_LFCLKSTARTED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PUBLISH_LFCLKSTARTED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PUBLISH_LFCLKSTARTED` writer"]
+pub struct W(crate::W<PUBLISH_LFCLKSTARTED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PUBLISH_LFCLKSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PUBLISH_LFCLKSTARTED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PUBLISH_LFCLKSTARTED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that event LFCLKSTARTED will publish to."]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that event LFCLKSTARTED will publish to."]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, PUBLISH_LFCLKSTARTED_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable publishing"]
+    DISABLED = 0,
+    #[doc = "1: Enable publishing"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PUBLISH_LFCLKSTARTED_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable publishing"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable publishing"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that event LFCLKSTARTED will publish to."]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that event LFCLKSTARTED will publish to."]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Publish configuration for event LFCLKSTARTED\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [publish_lfclkstarted](index.html) module"]
+pub struct PUBLISH_LFCLKSTARTED_SPEC;
+impl crate::RegisterSpec for PUBLISH_LFCLKSTARTED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [publish_lfclkstarted::R](R) reader structure"]
+impl crate::Readable for PUBLISH_LFCLKSTARTED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [publish_lfclkstarted::W](W) writer structure"]
+impl crate::Writable for PUBLISH_LFCLKSTARTED_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PUBLISH_LFCLKSTARTED to value 0"]
+impl crate::Resettable for PUBLISH_LFCLKSTARTED_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/subscribe_cal.rs

@@ -0,0 +1,140 @@
+#[doc = "Register `SUBSCRIBE_CAL` reader"]
+pub struct R(crate::R<SUBSCRIBE_CAL_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_CAL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_CAL_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_CAL_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_CAL` writer"]
+pub struct W(crate::W<SUBSCRIBE_CAL_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_CAL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_CAL_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_CAL_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that task CAL will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that task CAL will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SUBSCRIBE_CAL_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_CAL_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that task CAL will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that task CAL will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task CAL\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_cal](index.html) module"]
+pub struct SUBSCRIBE_CAL_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_CAL_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_cal::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_CAL_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_cal::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_CAL_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_CAL to value 0"]
+impl crate::Resettable for SUBSCRIBE_CAL_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/subscribe_hfclk192mstart.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `SUBSCRIBE_HFCLK192MSTART` reader"]
+pub struct R(crate::R<SUBSCRIBE_HFCLK192MSTART_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_HFCLK192MSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_HFCLK192MSTART_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_HFCLK192MSTART_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_HFCLK192MSTART` writer"]
+pub struct W(crate::W<SUBSCRIBE_HFCLK192MSTART_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_HFCLK192MSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_HFCLK192MSTART_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_HFCLK192MSTART_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that task HFCLK192MSTART will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that task HFCLK192MSTART will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, SUBSCRIBE_HFCLK192MSTART_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_HFCLK192MSTART_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that task HFCLK192MSTART will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that task HFCLK192MSTART will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task HFCLK192MSTART\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_hfclk192mstart](index.html) module"]
+pub struct SUBSCRIBE_HFCLK192MSTART_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_HFCLK192MSTART_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_hfclk192mstart::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_HFCLK192MSTART_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_hfclk192mstart::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_HFCLK192MSTART_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_HFCLK192MSTART to value 0"]
+impl crate::Resettable for SUBSCRIBE_HFCLK192MSTART_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/subscribe_hfclk192mstop.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `SUBSCRIBE_HFCLK192MSTOP` reader"]
+pub struct R(crate::R<SUBSCRIBE_HFCLK192MSTOP_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_HFCLK192MSTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_HFCLK192MSTOP_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_HFCLK192MSTOP_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_HFCLK192MSTOP` writer"]
+pub struct W(crate::W<SUBSCRIBE_HFCLK192MSTOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_HFCLK192MSTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_HFCLK192MSTOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_HFCLK192MSTOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that task HFCLK192MSTOP will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that task HFCLK192MSTOP will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, SUBSCRIBE_HFCLK192MSTOP_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_HFCLK192MSTOP_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that task HFCLK192MSTOP will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that task HFCLK192MSTOP will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task HFCLK192MSTOP\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_hfclk192mstop](index.html) module"]
+pub struct SUBSCRIBE_HFCLK192MSTOP_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_HFCLK192MSTOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_hfclk192mstop::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_HFCLK192MSTOP_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_hfclk192mstop::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_HFCLK192MSTOP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_HFCLK192MSTOP to value 0"]
+impl crate::Resettable for SUBSCRIBE_HFCLK192MSTOP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/subscribe_hfclkaudiostart.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `SUBSCRIBE_HFCLKAUDIOSTART` reader"]
+pub struct R(crate::R<SUBSCRIBE_HFCLKAUDIOSTART_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_HFCLKAUDIOSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_HFCLKAUDIOSTART_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_HFCLKAUDIOSTART_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_HFCLKAUDIOSTART` writer"]
+pub struct W(crate::W<SUBSCRIBE_HFCLKAUDIOSTART_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_HFCLKAUDIOSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_HFCLKAUDIOSTART_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_HFCLKAUDIOSTART_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that task HFCLKAUDIOSTART will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that task HFCLKAUDIOSTART will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, SUBSCRIBE_HFCLKAUDIOSTART_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_HFCLKAUDIOSTART_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that task HFCLKAUDIOSTART will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that task HFCLKAUDIOSTART will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task HFCLKAUDIOSTART\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_hfclkaudiostart](index.html) module"]
+pub struct SUBSCRIBE_HFCLKAUDIOSTART_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_HFCLKAUDIOSTART_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_hfclkaudiostart::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_HFCLKAUDIOSTART_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_hfclkaudiostart::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_HFCLKAUDIOSTART_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_HFCLKAUDIOSTART to value 0"]
+impl crate::Resettable for SUBSCRIBE_HFCLKAUDIOSTART_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/subscribe_hfclkaudiostop.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `SUBSCRIBE_HFCLKAUDIOSTOP` reader"]
+pub struct R(crate::R<SUBSCRIBE_HFCLKAUDIOSTOP_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_HFCLKAUDIOSTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_HFCLKAUDIOSTOP_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_HFCLKAUDIOSTOP_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_HFCLKAUDIOSTOP` writer"]
+pub struct W(crate::W<SUBSCRIBE_HFCLKAUDIOSTOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_HFCLKAUDIOSTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_HFCLKAUDIOSTOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_HFCLKAUDIOSTOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that task HFCLKAUDIOSTOP will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that task HFCLKAUDIOSTOP will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, SUBSCRIBE_HFCLKAUDIOSTOP_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_HFCLKAUDIOSTOP_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that task HFCLKAUDIOSTOP will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that task HFCLKAUDIOSTOP will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task HFCLKAUDIOSTOP\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_hfclkaudiostop](index.html) module"]
+pub struct SUBSCRIBE_HFCLKAUDIOSTOP_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_HFCLKAUDIOSTOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_hfclkaudiostop::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_HFCLKAUDIOSTOP_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_hfclkaudiostop::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_HFCLKAUDIOSTOP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_HFCLKAUDIOSTOP to value 0"]
+impl crate::Resettable for SUBSCRIBE_HFCLKAUDIOSTOP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/subscribe_hfclkstart.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `SUBSCRIBE_HFCLKSTART` reader"]
+pub struct R(crate::R<SUBSCRIBE_HFCLKSTART_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_HFCLKSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_HFCLKSTART_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_HFCLKSTART_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_HFCLKSTART` writer"]
+pub struct W(crate::W<SUBSCRIBE_HFCLKSTART_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_HFCLKSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_HFCLKSTART_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_HFCLKSTART_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that task HFCLKSTART will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that task HFCLKSTART will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, SUBSCRIBE_HFCLKSTART_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_HFCLKSTART_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that task HFCLKSTART will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that task HFCLKSTART will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task HFCLKSTART\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_hfclkstart](index.html) module"]
+pub struct SUBSCRIBE_HFCLKSTART_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_HFCLKSTART_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_hfclkstart::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_HFCLKSTART_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_hfclkstart::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_HFCLKSTART_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_HFCLKSTART to value 0"]
+impl crate::Resettable for SUBSCRIBE_HFCLKSTART_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/subscribe_hfclkstop.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `SUBSCRIBE_HFCLKSTOP` reader"]
+pub struct R(crate::R<SUBSCRIBE_HFCLKSTOP_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_HFCLKSTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_HFCLKSTOP_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_HFCLKSTOP_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_HFCLKSTOP` writer"]
+pub struct W(crate::W<SUBSCRIBE_HFCLKSTOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_HFCLKSTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_HFCLKSTOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_HFCLKSTOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that task HFCLKSTOP will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that task HFCLKSTOP will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, SUBSCRIBE_HFCLKSTOP_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_HFCLKSTOP_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that task HFCLKSTOP will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that task HFCLKSTOP will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task HFCLKSTOP\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_hfclkstop](index.html) module"]
+pub struct SUBSCRIBE_HFCLKSTOP_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_HFCLKSTOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_hfclkstop::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_HFCLKSTOP_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_hfclkstop::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_HFCLKSTOP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_HFCLKSTOP to value 0"]
+impl crate::Resettable for SUBSCRIBE_HFCLKSTOP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/subscribe_lfclkstart.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `SUBSCRIBE_LFCLKSTART` reader"]
+pub struct R(crate::R<SUBSCRIBE_LFCLKSTART_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_LFCLKSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_LFCLKSTART_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_LFCLKSTART_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_LFCLKSTART` writer"]
+pub struct W(crate::W<SUBSCRIBE_LFCLKSTART_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_LFCLKSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_LFCLKSTART_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_LFCLKSTART_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that task LFCLKSTART will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that task LFCLKSTART will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, SUBSCRIBE_LFCLKSTART_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_LFCLKSTART_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that task LFCLKSTART will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that task LFCLKSTART will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task LFCLKSTART\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_lfclkstart](index.html) module"]
+pub struct SUBSCRIBE_LFCLKSTART_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_LFCLKSTART_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_lfclkstart::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_LFCLKSTART_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_lfclkstart::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_LFCLKSTART_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_LFCLKSTART to value 0"]
+impl crate::Resettable for SUBSCRIBE_LFCLKSTART_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/subscribe_lfclkstop.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `SUBSCRIBE_LFCLKSTOP` reader"]
+pub struct R(crate::R<SUBSCRIBE_LFCLKSTOP_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_LFCLKSTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_LFCLKSTOP_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_LFCLKSTOP_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_LFCLKSTOP` writer"]
+pub struct W(crate::W<SUBSCRIBE_LFCLKSTOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_LFCLKSTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_LFCLKSTOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_LFCLKSTOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that task LFCLKSTOP will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that task LFCLKSTOP will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, SUBSCRIBE_LFCLKSTOP_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_LFCLKSTOP_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that task LFCLKSTOP will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that task LFCLKSTOP will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task LFCLKSTOP\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_lfclkstop](index.html) module"]
+pub struct SUBSCRIBE_LFCLKSTOP_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_LFCLKSTOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_lfclkstop::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_LFCLKSTOP_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_lfclkstop::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_LFCLKSTOP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_LFCLKSTOP to value 0"]
+impl crate::Resettable for SUBSCRIBE_LFCLKSTOP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/tasks_cal.rs

@@ -0,0 +1,71 @@
+#[doc = "Register `TASKS_CAL` writer"]
+pub struct W(crate::W<TASKS_CAL_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_CAL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_CAL_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_CAL_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Start calibration of LFRC oscillator\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_CAL_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_CAL_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_CAL_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_CAL` writer - Start calibration of LFRC oscillator"]
+pub type TASKS_CAL_W<'a, const O: u8> = crate::BitWriter<'a, u32, TASKS_CAL_SPEC, TASKS_CAL_AW, O>;
+impl<'a, const O: u8> TASKS_CAL_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_CAL_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Start calibration of LFRC oscillator"]
+    #[inline(always)]
+    pub fn tasks_cal(&mut self) -> TASKS_CAL_W<0> {
+        TASKS_CAL_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Start calibration of LFRC oscillator\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_cal](index.html) module"]
+pub struct TASKS_CAL_SPEC;
+impl crate::RegisterSpec for TASKS_CAL_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_cal::W](W) writer structure"]
+impl crate::Writable for TASKS_CAL_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_CAL to value 0"]
+impl crate::Resettable for TASKS_CAL_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/tasks_hfclk192mstart.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_HFCLK192MSTART` writer"]
+pub struct W(crate::W<TASKS_HFCLK192MSTART_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_HFCLK192MSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_HFCLK192MSTART_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_HFCLK192MSTART_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Start HFCLK192M source as selected in HFCLK192MSRC\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_HFCLK192MSTART_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_HFCLK192MSTART_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_HFCLK192MSTART_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_HFCLK192MSTART` writer - Start HFCLK192M source as selected in HFCLK192MSRC"]
+pub type TASKS_HFCLK192MSTART_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_HFCLK192MSTART_SPEC, TASKS_HFCLK192MSTART_AW, O>;
+impl<'a, const O: u8> TASKS_HFCLK192MSTART_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_HFCLK192MSTART_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Start HFCLK192M source as selected in HFCLK192MSRC"]
+    #[inline(always)]
+    pub fn tasks_hfclk192mstart(&mut self) -> TASKS_HFCLK192MSTART_W<0> {
+        TASKS_HFCLK192MSTART_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Start HFCLK192M source as selected in HFCLK192MSRC\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_hfclk192mstart](index.html) module"]
+pub struct TASKS_HFCLK192MSTART_SPEC;
+impl crate::RegisterSpec for TASKS_HFCLK192MSTART_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_hfclk192mstart::W](W) writer structure"]
+impl crate::Writable for TASKS_HFCLK192MSTART_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_HFCLK192MSTART to value 0"]
+impl crate::Resettable for TASKS_HFCLK192MSTART_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/tasks_hfclk192mstop.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_HFCLK192MSTOP` writer"]
+pub struct W(crate::W<TASKS_HFCLK192MSTOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_HFCLK192MSTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_HFCLK192MSTOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_HFCLK192MSTOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Stop HFCLK192M source\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_HFCLK192MSTOP_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_HFCLK192MSTOP_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_HFCLK192MSTOP_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_HFCLK192MSTOP` writer - Stop HFCLK192M source"]
+pub type TASKS_HFCLK192MSTOP_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_HFCLK192MSTOP_SPEC, TASKS_HFCLK192MSTOP_AW, O>;
+impl<'a, const O: u8> TASKS_HFCLK192MSTOP_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_HFCLK192MSTOP_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Stop HFCLK192M source"]
+    #[inline(always)]
+    pub fn tasks_hfclk192mstop(&mut self) -> TASKS_HFCLK192MSTOP_W<0> {
+        TASKS_HFCLK192MSTOP_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Stop HFCLK192M source\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_hfclk192mstop](index.html) module"]
+pub struct TASKS_HFCLK192MSTOP_SPEC;
+impl crate::RegisterSpec for TASKS_HFCLK192MSTOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_hfclk192mstop::W](W) writer structure"]
+impl crate::Writable for TASKS_HFCLK192MSTOP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_HFCLK192MSTOP to value 0"]
+impl crate::Resettable for TASKS_HFCLK192MSTOP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/tasks_hfclkaudiostart.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_HFCLKAUDIOSTART` writer"]
+pub struct W(crate::W<TASKS_HFCLKAUDIOSTART_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_HFCLKAUDIOSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_HFCLKAUDIOSTART_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_HFCLKAUDIOSTART_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Start HFCLKAUDIO source\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_HFCLKAUDIOSTART_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_HFCLKAUDIOSTART_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_HFCLKAUDIOSTART_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_HFCLKAUDIOSTART` writer - Start HFCLKAUDIO source"]
+pub type TASKS_HFCLKAUDIOSTART_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_HFCLKAUDIOSTART_SPEC, TASKS_HFCLKAUDIOSTART_AW, O>;
+impl<'a, const O: u8> TASKS_HFCLKAUDIOSTART_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_HFCLKAUDIOSTART_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Start HFCLKAUDIO source"]
+    #[inline(always)]
+    pub fn tasks_hfclkaudiostart(&mut self) -> TASKS_HFCLKAUDIOSTART_W<0> {
+        TASKS_HFCLKAUDIOSTART_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Start HFCLKAUDIO source\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_hfclkaudiostart](index.html) module"]
+pub struct TASKS_HFCLKAUDIOSTART_SPEC;
+impl crate::RegisterSpec for TASKS_HFCLKAUDIOSTART_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_hfclkaudiostart::W](W) writer structure"]
+impl crate::Writable for TASKS_HFCLKAUDIOSTART_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_HFCLKAUDIOSTART to value 0"]
+impl crate::Resettable for TASKS_HFCLKAUDIOSTART_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/tasks_hfclkaudiostop.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_HFCLKAUDIOSTOP` writer"]
+pub struct W(crate::W<TASKS_HFCLKAUDIOSTOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_HFCLKAUDIOSTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_HFCLKAUDIOSTOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_HFCLKAUDIOSTOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Stop HFCLKAUDIO source\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_HFCLKAUDIOSTOP_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_HFCLKAUDIOSTOP_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_HFCLKAUDIOSTOP_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_HFCLKAUDIOSTOP` writer - Stop HFCLKAUDIO source"]
+pub type TASKS_HFCLKAUDIOSTOP_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_HFCLKAUDIOSTOP_SPEC, TASKS_HFCLKAUDIOSTOP_AW, O>;
+impl<'a, const O: u8> TASKS_HFCLKAUDIOSTOP_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_HFCLKAUDIOSTOP_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Stop HFCLKAUDIO source"]
+    #[inline(always)]
+    pub fn tasks_hfclkaudiostop(&mut self) -> TASKS_HFCLKAUDIOSTOP_W<0> {
+        TASKS_HFCLKAUDIOSTOP_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Stop HFCLKAUDIO source\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_hfclkaudiostop](index.html) module"]
+pub struct TASKS_HFCLKAUDIOSTOP_SPEC;
+impl crate::RegisterSpec for TASKS_HFCLKAUDIOSTOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_hfclkaudiostop::W](W) writer structure"]
+impl crate::Writable for TASKS_HFCLKAUDIOSTOP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_HFCLKAUDIOSTOP to value 0"]
+impl crate::Resettable for TASKS_HFCLKAUDIOSTOP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/tasks_hfclkstart.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_HFCLKSTART` writer"]
+pub struct W(crate::W<TASKS_HFCLKSTART_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_HFCLKSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_HFCLKSTART_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_HFCLKSTART_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Start HFCLK128M/HFCLK64M source as selected in HFCLKSRC\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_HFCLKSTART_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_HFCLKSTART_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_HFCLKSTART_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_HFCLKSTART` writer - Start HFCLK128M/HFCLK64M source as selected in HFCLKSRC"]
+pub type TASKS_HFCLKSTART_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_HFCLKSTART_SPEC, TASKS_HFCLKSTART_AW, O>;
+impl<'a, const O: u8> TASKS_HFCLKSTART_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_HFCLKSTART_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Start HFCLK128M/HFCLK64M source as selected in HFCLKSRC"]
+    #[inline(always)]
+    pub fn tasks_hfclkstart(&mut self) -> TASKS_HFCLKSTART_W<0> {
+        TASKS_HFCLKSTART_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Start HFCLK128M/HFCLK64M source as selected in HFCLKSRC\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_hfclkstart](index.html) module"]
+pub struct TASKS_HFCLKSTART_SPEC;
+impl crate::RegisterSpec for TASKS_HFCLKSTART_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_hfclkstart::W](W) writer structure"]
+impl crate::Writable for TASKS_HFCLKSTART_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_HFCLKSTART to value 0"]
+impl crate::Resettable for TASKS_HFCLKSTART_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/tasks_hfclkstop.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_HFCLKSTOP` writer"]
+pub struct W(crate::W<TASKS_HFCLKSTOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_HFCLKSTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_HFCLKSTOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_HFCLKSTOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Stop HFCLK128M/HFCLK64M source\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_HFCLKSTOP_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_HFCLKSTOP_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_HFCLKSTOP_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_HFCLKSTOP` writer - Stop HFCLK128M/HFCLK64M source"]
+pub type TASKS_HFCLKSTOP_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_HFCLKSTOP_SPEC, TASKS_HFCLKSTOP_AW, O>;
+impl<'a, const O: u8> TASKS_HFCLKSTOP_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_HFCLKSTOP_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Stop HFCLK128M/HFCLK64M source"]
+    #[inline(always)]
+    pub fn tasks_hfclkstop(&mut self) -> TASKS_HFCLKSTOP_W<0> {
+        TASKS_HFCLKSTOP_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Stop HFCLK128M/HFCLK64M source\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_hfclkstop](index.html) module"]
+pub struct TASKS_HFCLKSTOP_SPEC;
+impl crate::RegisterSpec for TASKS_HFCLKSTOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_hfclkstop::W](W) writer structure"]
+impl crate::Writable for TASKS_HFCLKSTOP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_HFCLKSTOP to value 0"]
+impl crate::Resettable for TASKS_HFCLKSTOP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/tasks_lfclkstart.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_LFCLKSTART` writer"]
+pub struct W(crate::W<TASKS_LFCLKSTART_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_LFCLKSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_LFCLKSTART_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_LFCLKSTART_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Start LFCLK source as selected in LFCLKSRC\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_LFCLKSTART_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_LFCLKSTART_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_LFCLKSTART_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_LFCLKSTART` writer - Start LFCLK source as selected in LFCLKSRC"]
+pub type TASKS_LFCLKSTART_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_LFCLKSTART_SPEC, TASKS_LFCLKSTART_AW, O>;
+impl<'a, const O: u8> TASKS_LFCLKSTART_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_LFCLKSTART_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Start LFCLK source as selected in LFCLKSRC"]
+    #[inline(always)]
+    pub fn tasks_lfclkstart(&mut self) -> TASKS_LFCLKSTART_W<0> {
+        TASKS_LFCLKSTART_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Start LFCLK source as selected in LFCLKSRC\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_lfclkstart](index.html) module"]
+pub struct TASKS_LFCLKSTART_SPEC;
+impl crate::RegisterSpec for TASKS_LFCLKSTART_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_lfclkstart::W](W) writer structure"]
+impl crate::Writable for TASKS_LFCLKSTART_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_LFCLKSTART to value 0"]
+impl crate::Resettable for TASKS_LFCLKSTART_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/clock_ns/tasks_lfclkstop.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_LFCLKSTOP` writer"]
+pub struct W(crate::W<TASKS_LFCLKSTOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_LFCLKSTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_LFCLKSTOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_LFCLKSTOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Stop LFCLK source\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_LFCLKSTOP_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_LFCLKSTOP_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_LFCLKSTOP_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_LFCLKSTOP` writer - Stop LFCLK source"]
+pub type TASKS_LFCLKSTOP_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_LFCLKSTOP_SPEC, TASKS_LFCLKSTOP_AW, O>;
+impl<'a, const O: u8> TASKS_LFCLKSTOP_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_LFCLKSTOP_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Stop LFCLK source"]
+    #[inline(always)]
+    pub fn tasks_lfclkstop(&mut self) -> TASKS_LFCLKSTOP_W<0> {
+        TASKS_LFCLKSTOP_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Stop LFCLK source\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_lfclkstop](index.html) module"]
+pub struct TASKS_LFCLKSTOP_SPEC;
+impl crate::RegisterSpec for TASKS_LFCLKSTOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_lfclkstop::W](W) writer structure"]
+impl crate::Writable for TASKS_LFCLKSTOP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_LFCLKSTOP to value 0"]
+impl crate::Resettable for TASKS_LFCLKSTOP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}