feat: add display UI with splash screen, dashboard, and RSSI sparkline

Implement full SSD1306 OLED display support:
- Splash screen on boot (1.5s) with project name, version, board
- Dashboard showing radio state, config, counters, RSSI/SNR
- RSSI history sparkline (64-sample ring buffer, 2px-wide bars)
- DisplayOn/DisplayOff host commands routed via dedicated channel
- Pure render functions against generic DrawTarget (no hardware coupling)
- Display on/off control bypasses radio task entirely

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>

vendor/nrf5340-app-pac/src/pdm0_ns/enable.rs

@@ -0,0 +1,126 @@
+#[doc = "Register `ENABLE` reader"]
+pub struct R(crate::R<ENABLE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ENABLE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ENABLE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ENABLE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ENABLE` writer"]
+pub struct W(crate::W<ENABLE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ENABLE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ENABLE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ENABLE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ENABLE` reader - Enable or disable PDM module"]
+pub type ENABLE_R = crate::BitReader<ENABLE_A>;
+#[doc = "Enable or disable PDM module\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ENABLE_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "1: Enable"]
+    ENABLED = 1,
+}
+impl From<ENABLE_A> for bool {
+    #[inline(always)]
+    fn from(variant: ENABLE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ENABLE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ENABLE_A {
+        match self.bits {
+            false => ENABLE_A::DISABLED,
+            true => ENABLE_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == ENABLE_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == ENABLE_A::ENABLED
+    }
+}
+#[doc = "Field `ENABLE` writer - Enable or disable PDM module"]
+pub type ENABLE_W<'a, const O: u8> = crate::BitWriter<'a, u32, ENABLE_SPEC, ENABLE_A, O>;
+impl<'a, const O: u8> ENABLE_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(ENABLE_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(ENABLE_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Enable or disable PDM module"]
+    #[inline(always)]
+    pub fn enable(&self) -> ENABLE_R {
+        ENABLE_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Enable or disable PDM module"]
+    #[inline(always)]
+    pub fn enable(&mut self) -> ENABLE_W<0> {
+        ENABLE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "PDM module enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [enable](index.html) module"]
+pub struct ENABLE_SPEC;
+impl crate::RegisterSpec for ENABLE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [enable::R](R) reader structure"]
+impl crate::Readable for ENABLE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [enable::W](W) writer structure"]
+impl crate::Writable for ENABLE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets ENABLE to value 0"]
+impl crate::Resettable for ENABLE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/pdm0_ns/events_end.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_END` reader"]
+pub struct R(crate::R<EVENTS_END_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_END_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_END_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_END_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_END` writer"]
+pub struct W(crate::W<EVENTS_END_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_END_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_END_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_END_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_END` reader - The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample after a STOP task has been received) to Data RAM"]
+pub type EVENTS_END_R = crate::BitReader<EVENTS_END_A>;
+#[doc = "The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample after a STOP task has been received) to Data RAM\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_END_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_END_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_END_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_END_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_END_A {
+        match self.bits {
+            false => EVENTS_END_A::NOT_GENERATED,
+            true => EVENTS_END_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_END_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_END_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_END` writer - The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample after a STOP task has been received) to Data RAM"]
+pub type EVENTS_END_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_END_SPEC, EVENTS_END_A, O>;
+impl<'a, const O: u8> EVENTS_END_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_END_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_END_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample after a STOP task has been received) to Data RAM"]
+    #[inline(always)]
+    pub fn events_end(&self) -> EVENTS_END_R {
+        EVENTS_END_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample after a STOP task has been received) to Data RAM"]
+    #[inline(always)]
+    pub fn events_end(&mut self) -> EVENTS_END_W<0> {
+        EVENTS_END_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample after a STOP task has been received) to Data RAM\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_end](index.html) module"]
+pub struct EVENTS_END_SPEC;
+impl crate::RegisterSpec for EVENTS_END_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_end::R](R) reader structure"]
+impl crate::Readable for EVENTS_END_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_end::W](W) writer structure"]
+impl crate::Writable for EVENTS_END_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_END to value 0"]
+impl crate::Resettable for EVENTS_END_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/pdm0_ns/events_started.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_STARTED` reader"]
+pub struct R(crate::R<EVENTS_STARTED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_STARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_STARTED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_STARTED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_STARTED` writer"]
+pub struct W(crate::W<EVENTS_STARTED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_STARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_STARTED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_STARTED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_STARTED` reader - PDM transfer has started"]
+pub type EVENTS_STARTED_R = crate::BitReader<EVENTS_STARTED_A>;
+#[doc = "PDM transfer has started\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_STARTED_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_STARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_STARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_STARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_STARTED_A {
+        match self.bits {
+            false => EVENTS_STARTED_A::NOT_GENERATED,
+            true => EVENTS_STARTED_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_STARTED_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_STARTED_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_STARTED` writer - PDM transfer has started"]
+pub type EVENTS_STARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_STARTED_SPEC, EVENTS_STARTED_A, O>;
+impl<'a, const O: u8> EVENTS_STARTED_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_STARTED_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_STARTED_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - PDM transfer has started"]
+    #[inline(always)]
+    pub fn events_started(&self) -> EVENTS_STARTED_R {
+        EVENTS_STARTED_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - PDM transfer has started"]
+    #[inline(always)]
+    pub fn events_started(&mut self) -> EVENTS_STARTED_W<0> {
+        EVENTS_STARTED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "PDM transfer has started\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_started](index.html) module"]
+pub struct EVENTS_STARTED_SPEC;
+impl crate::RegisterSpec for EVENTS_STARTED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_started::R](R) reader structure"]
+impl crate::Readable for EVENTS_STARTED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_started::W](W) writer structure"]
+impl crate::Writable for EVENTS_STARTED_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_STARTED to value 0"]
+impl crate::Resettable for EVENTS_STARTED_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/pdm0_ns/events_stopped.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_STOPPED` reader"]
+pub struct R(crate::R<EVENTS_STOPPED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_STOPPED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_STOPPED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_STOPPED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_STOPPED` writer"]
+pub struct W(crate::W<EVENTS_STOPPED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_STOPPED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_STOPPED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_STOPPED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_STOPPED` reader - PDM transfer has finished"]
+pub type EVENTS_STOPPED_R = crate::BitReader<EVENTS_STOPPED_A>;
+#[doc = "PDM transfer has finished\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_STOPPED_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_STOPPED_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_STOPPED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_STOPPED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_STOPPED_A {
+        match self.bits {
+            false => EVENTS_STOPPED_A::NOT_GENERATED,
+            true => EVENTS_STOPPED_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_STOPPED_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_STOPPED_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_STOPPED` writer - PDM transfer has finished"]
+pub type EVENTS_STOPPED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_STOPPED_SPEC, EVENTS_STOPPED_A, O>;
+impl<'a, const O: u8> EVENTS_STOPPED_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_STOPPED_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_STOPPED_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - PDM transfer has finished"]
+    #[inline(always)]
+    pub fn events_stopped(&self) -> EVENTS_STOPPED_R {
+        EVENTS_STOPPED_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - PDM transfer has finished"]
+    #[inline(always)]
+    pub fn events_stopped(&mut self) -> EVENTS_STOPPED_W<0> {
+        EVENTS_STOPPED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "PDM transfer has finished\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_stopped](index.html) module"]
+pub struct EVENTS_STOPPED_SPEC;
+impl crate::RegisterSpec for EVENTS_STOPPED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_stopped::R](R) reader structure"]
+impl crate::Readable for EVENTS_STOPPED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_stopped::W](W) writer structure"]
+impl crate::Writable for EVENTS_STOPPED_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_STOPPED to value 0"]
+impl crate::Resettable for EVENTS_STOPPED_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/pdm0_ns/gainl.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `GAINL` reader"]
+pub struct R(crate::R<GAINL_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<GAINL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<GAINL_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<GAINL_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `GAINL` writer"]
+pub struct W(crate::W<GAINL_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<GAINL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<GAINL_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<GAINL_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `GAINL` reader - Left output gain adjustment, in 0.5 dB steps, around the default module gain (see electrical parameters) 0x00 -20 dB gain adjust 0x01 -19.5 dB gain adjust (...) 0x27 -0.5 dB gain adjust 0x28 0 dB gain adjust 0x29 +0.5 dB gain adjust (...) 0x4F +19.5 dB gain adjust 0x50 +20 dB gain adjust"]
+pub type GAINL_R = crate::FieldReader<u8, GAINL_A>;
+#[doc = "Left output gain adjustment, in 0.5 dB steps, around the default module gain (see electrical parameters) 0x00 -20 dB gain adjust 0x01 -19.5 dB gain adjust (...) 0x27 -0.5 dB gain adjust 0x28 0 dB gain adjust 0x29 +0.5 dB gain adjust (...) 0x4F +19.5 dB gain adjust 0x50 +20 dB gain adjust\n\nValue on reset: 40"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum GAINL_A {
+    #[doc = "0: -20 dB gain adjustment (minimum)"]
+    MIN_GAIN = 0,
+    #[doc = "40: 0 dB gain adjustment"]
+    DEFAULT_GAIN = 40,
+    #[doc = "80: +20 dB gain adjustment (maximum)"]
+    MAX_GAIN = 80,
+}
+impl From<GAINL_A> for u8 {
+    #[inline(always)]
+    fn from(variant: GAINL_A) -> Self {
+        variant as _
+    }
+}
+impl GAINL_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<GAINL_A> {
+        match self.bits {
+            0 => Some(GAINL_A::MIN_GAIN),
+            40 => Some(GAINL_A::DEFAULT_GAIN),
+            80 => Some(GAINL_A::MAX_GAIN),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `MIN_GAIN`"]
+    #[inline(always)]
+    pub fn is_min_gain(&self) -> bool {
+        *self == GAINL_A::MIN_GAIN
+    }
+    #[doc = "Checks if the value of the field is `DEFAULT_GAIN`"]
+    #[inline(always)]
+    pub fn is_default_gain(&self) -> bool {
+        *self == GAINL_A::DEFAULT_GAIN
+    }
+    #[doc = "Checks if the value of the field is `MAX_GAIN`"]
+    #[inline(always)]
+    pub fn is_max_gain(&self) -> bool {
+        *self == GAINL_A::MAX_GAIN
+    }
+}
+#[doc = "Field `GAINL` writer - Left output gain adjustment, in 0.5 dB steps, around the default module gain (see electrical parameters) 0x00 -20 dB gain adjust 0x01 -19.5 dB gain adjust (...) 0x27 -0.5 dB gain adjust 0x28 0 dB gain adjust 0x29 +0.5 dB gain adjust (...) 0x4F +19.5 dB gain adjust 0x50 +20 dB gain adjust"]
+pub type GAINL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, GAINL_SPEC, u8, GAINL_A, 7, O>;
+impl<'a, const O: u8> GAINL_W<'a, O> {
+    #[doc = "-20 dB gain adjustment (minimum)"]
+    #[inline(always)]
+    pub fn min_gain(self) -> &'a mut W {
+        self.variant(GAINL_A::MIN_GAIN)
+    }
+    #[doc = "0 dB gain adjustment"]
+    #[inline(always)]
+    pub fn default_gain(self) -> &'a mut W {
+        self.variant(GAINL_A::DEFAULT_GAIN)
+    }
+    #[doc = "+20 dB gain adjustment (maximum)"]
+    #[inline(always)]
+    pub fn max_gain(self) -> &'a mut W {
+        self.variant(GAINL_A::MAX_GAIN)
+    }
+}
+impl R {
+    #[doc = "Bits 0:6 - Left output gain adjustment, in 0.5 dB steps, around the default module gain (see electrical parameters) 0x00 -20 dB gain adjust 0x01 -19.5 dB gain adjust (...) 0x27 -0.5 dB gain adjust 0x28 0 dB gain adjust 0x29 +0.5 dB gain adjust (...) 0x4F +19.5 dB gain adjust 0x50 +20 dB gain adjust"]
+    #[inline(always)]
+    pub fn gainl(&self) -> GAINL_R {
+        GAINL_R::new((self.bits & 0x7f) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:6 - Left output gain adjustment, in 0.5 dB steps, around the default module gain (see electrical parameters) 0x00 -20 dB gain adjust 0x01 -19.5 dB gain adjust (...) 0x27 -0.5 dB gain adjust 0x28 0 dB gain adjust 0x29 +0.5 dB gain adjust (...) 0x4F +19.5 dB gain adjust 0x50 +20 dB gain adjust"]
+    #[inline(always)]
+    pub fn gainl(&mut self) -> GAINL_W<0> {
+        GAINL_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Left output gain adjustment\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [gainl](index.html) module"]
+pub struct GAINL_SPEC;
+impl crate::RegisterSpec for GAINL_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [gainl::R](R) reader structure"]
+impl crate::Readable for GAINL_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [gainl::W](W) writer structure"]
+impl crate::Writable for GAINL_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets GAINL to value 0x28"]
+impl crate::Resettable for GAINL_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x28
+    }
+}

vendor/nrf5340-app-pac/src/pdm0_ns/gainr.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `GAINR` reader"]
+pub struct R(crate::R<GAINR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<GAINR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<GAINR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<GAINR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `GAINR` writer"]
+pub struct W(crate::W<GAINR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<GAINR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<GAINR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<GAINR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `GAINR` reader - Right output gain adjustment, in 0.5 dB steps, around the default module gain (see electrical parameters)"]
+pub type GAINR_R = crate::FieldReader<u8, GAINR_A>;
+#[doc = "Right output gain adjustment, in 0.5 dB steps, around the default module gain (see electrical parameters)\n\nValue on reset: 40"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum GAINR_A {
+    #[doc = "0: -20 dB gain adjustment (minimum)"]
+    MIN_GAIN = 0,
+    #[doc = "40: 0 dB gain adjustment"]
+    DEFAULT_GAIN = 40,
+    #[doc = "80: +20 dB gain adjustment (maximum)"]
+    MAX_GAIN = 80,
+}
+impl From<GAINR_A> for u8 {
+    #[inline(always)]
+    fn from(variant: GAINR_A) -> Self {
+        variant as _
+    }
+}
+impl GAINR_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<GAINR_A> {
+        match self.bits {
+            0 => Some(GAINR_A::MIN_GAIN),
+            40 => Some(GAINR_A::DEFAULT_GAIN),
+            80 => Some(GAINR_A::MAX_GAIN),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `MIN_GAIN`"]
+    #[inline(always)]
+    pub fn is_min_gain(&self) -> bool {
+        *self == GAINR_A::MIN_GAIN
+    }
+    #[doc = "Checks if the value of the field is `DEFAULT_GAIN`"]
+    #[inline(always)]
+    pub fn is_default_gain(&self) -> bool {
+        *self == GAINR_A::DEFAULT_GAIN
+    }
+    #[doc = "Checks if the value of the field is `MAX_GAIN`"]
+    #[inline(always)]
+    pub fn is_max_gain(&self) -> bool {
+        *self == GAINR_A::MAX_GAIN
+    }
+}
+#[doc = "Field `GAINR` writer - Right output gain adjustment, in 0.5 dB steps, around the default module gain (see electrical parameters)"]
+pub type GAINR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, GAINR_SPEC, u8, GAINR_A, 7, O>;
+impl<'a, const O: u8> GAINR_W<'a, O> {
+    #[doc = "-20 dB gain adjustment (minimum)"]
+    #[inline(always)]
+    pub fn min_gain(self) -> &'a mut W {
+        self.variant(GAINR_A::MIN_GAIN)
+    }
+    #[doc = "0 dB gain adjustment"]
+    #[inline(always)]
+    pub fn default_gain(self) -> &'a mut W {
+        self.variant(GAINR_A::DEFAULT_GAIN)
+    }
+    #[doc = "+20 dB gain adjustment (maximum)"]
+    #[inline(always)]
+    pub fn max_gain(self) -> &'a mut W {
+        self.variant(GAINR_A::MAX_GAIN)
+    }
+}
+impl R {
+    #[doc = "Bits 0:6 - Right output gain adjustment, in 0.5 dB steps, around the default module gain (see electrical parameters)"]
+    #[inline(always)]
+    pub fn gainr(&self) -> GAINR_R {
+        GAINR_R::new((self.bits & 0x7f) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:6 - Right output gain adjustment, in 0.5 dB steps, around the default module gain (see electrical parameters)"]
+    #[inline(always)]
+    pub fn gainr(&mut self) -> GAINR_W<0> {
+        GAINR_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Right output gain adjustment\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [gainr](index.html) module"]
+pub struct GAINR_SPEC;
+impl crate::RegisterSpec for GAINR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [gainr::R](R) reader structure"]
+impl crate::Readable for GAINR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [gainr::W](W) writer structure"]
+impl crate::Writable for GAINR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets GAINR to value 0x28"]
+impl crate::Resettable for GAINR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x28
+    }
+}

vendor/nrf5340-app-pac/src/pdm0_ns/inten.rs

@@ -0,0 +1,246 @@
+#[doc = "Register `INTEN` reader"]
+pub struct R(crate::R<INTEN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTEN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTEN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTEN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTEN` writer"]
+pub struct W(crate::W<INTEN_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTEN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTEN_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTEN_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `STARTED` reader - Enable or disable interrupt for event STARTED"]
+pub type STARTED_R = crate::BitReader<STARTED_A>;
+#[doc = "Enable or disable interrupt for event STARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STARTED_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "1: Enable"]
+    ENABLED = 1,
+}
+impl From<STARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: STARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STARTED_A {
+        match self.bits {
+            false => STARTED_A::DISABLED,
+            true => STARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == STARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == STARTED_A::ENABLED
+    }
+}
+#[doc = "Field `STARTED` writer - Enable or disable interrupt for event STARTED"]
+pub type STARTED_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, STARTED_A, O>;
+impl<'a, const O: u8> STARTED_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(STARTED_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(STARTED_A::ENABLED)
+    }
+}
+#[doc = "Field `STOPPED` reader - Enable or disable interrupt for event STOPPED"]
+pub type STOPPED_R = crate::BitReader<STOPPED_A>;
+#[doc = "Enable or disable interrupt for event STOPPED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STOPPED_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "1: Enable"]
+    ENABLED = 1,
+}
+impl From<STOPPED_A> for bool {
+    #[inline(always)]
+    fn from(variant: STOPPED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STOPPED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STOPPED_A {
+        match self.bits {
+            false => STOPPED_A::DISABLED,
+            true => STOPPED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == STOPPED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == STOPPED_A::ENABLED
+    }
+}
+#[doc = "Field `STOPPED` writer - Enable or disable interrupt for event STOPPED"]
+pub type STOPPED_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, STOPPED_A, O>;
+impl<'a, const O: u8> STOPPED_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(STOPPED_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(STOPPED_A::ENABLED)
+    }
+}
+#[doc = "Field `END` reader - Enable or disable interrupt for event END"]
+pub type END_R = crate::BitReader<END_A>;
+#[doc = "Enable or disable interrupt for event END\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum END_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "1: Enable"]
+    ENABLED = 1,
+}
+impl From<END_A> for bool {
+    #[inline(always)]
+    fn from(variant: END_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl END_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> END_A {
+        match self.bits {
+            false => END_A::DISABLED,
+            true => END_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == END_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == END_A::ENABLED
+    }
+}
+#[doc = "Field `END` writer - Enable or disable interrupt for event END"]
+pub type END_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, END_A, O>;
+impl<'a, const O: u8> END_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(END_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(END_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Enable or disable interrupt for event STARTED"]
+    #[inline(always)]
+    pub fn started(&self) -> STARTED_R {
+        STARTED_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Enable or disable interrupt for event STOPPED"]
+    #[inline(always)]
+    pub fn stopped(&self) -> STOPPED_R {
+        STOPPED_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - Enable or disable interrupt for event END"]
+    #[inline(always)]
+    pub fn end(&self) -> END_R {
+        END_R::new(((self.bits >> 2) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Enable or disable interrupt for event STARTED"]
+    #[inline(always)]
+    pub fn started(&mut self) -> STARTED_W<0> {
+        STARTED_W::new(self)
+    }
+    #[doc = "Bit 1 - Enable or disable interrupt for event STOPPED"]
+    #[inline(always)]
+    pub fn stopped(&mut self) -> STOPPED_W<1> {
+        STOPPED_W::new(self)
+    }
+    #[doc = "Bit 2 - Enable or disable interrupt for event END"]
+    #[inline(always)]
+    pub fn end(&mut self) -> END_W<2> {
+        END_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Enable or disable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [inten](index.html) module"]
+pub struct INTEN_SPEC;
+impl crate::RegisterSpec for INTEN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [inten::R](R) reader structure"]
+impl crate::Readable for INTEN_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [inten::W](W) writer structure"]
+impl crate::Writable for INTEN_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTEN to value 0"]
+impl crate::Resettable for INTEN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/pdm0_ns/intenclr.rs

@@ -0,0 +1,267 @@
+#[doc = "Register `INTENCLR` reader"]
+pub struct R(crate::R<INTENCLR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENCLR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENCLR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENCLR` writer"]
+pub struct W(crate::W<INTENCLR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENCLR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENCLR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `STARTED` reader - Write '1' to disable interrupt for event STARTED"]
+pub type STARTED_R = crate::BitReader<STARTED_A>;
+#[doc = "Write '1' to disable interrupt for event STARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STARTED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<STARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: STARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STARTED_A {
+        match self.bits {
+            false => STARTED_A::DISABLED,
+            true => STARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == STARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == STARTED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event STARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STARTED_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<STARTED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: STARTED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `STARTED` writer - Write '1' to disable interrupt for event STARTED"]
+pub type STARTED_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, STARTED_AW, O>;
+impl<'a, const O: u8> STARTED_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(STARTED_AW::CLEAR)
+    }
+}
+#[doc = "Field `STOPPED` reader - Write '1' to disable interrupt for event STOPPED"]
+pub type STOPPED_R = crate::BitReader<STOPPED_A>;
+#[doc = "Write '1' to disable interrupt for event STOPPED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STOPPED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<STOPPED_A> for bool {
+    #[inline(always)]
+    fn from(variant: STOPPED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STOPPED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STOPPED_A {
+        match self.bits {
+            false => STOPPED_A::DISABLED,
+            true => STOPPED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == STOPPED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == STOPPED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event STOPPED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STOPPED_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<STOPPED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: STOPPED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `STOPPED` writer - Write '1' to disable interrupt for event STOPPED"]
+pub type STOPPED_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, STOPPED_AW, O>;
+impl<'a, const O: u8> STOPPED_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(STOPPED_AW::CLEAR)
+    }
+}
+#[doc = "Field `END` reader - Write '1' to disable interrupt for event END"]
+pub type END_R = crate::BitReader<END_A>;
+#[doc = "Write '1' to disable interrupt for event END\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum END_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<END_A> for bool {
+    #[inline(always)]
+    fn from(variant: END_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl END_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> END_A {
+        match self.bits {
+            false => END_A::DISABLED,
+            true => END_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == END_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == END_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event END\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum END_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<END_AW> for bool {
+    #[inline(always)]
+    fn from(variant: END_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `END` writer - Write '1' to disable interrupt for event END"]
+pub type END_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, END_AW, O>;
+impl<'a, const O: u8> END_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(END_AW::CLEAR)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Write '1' to disable interrupt for event STARTED"]
+    #[inline(always)]
+    pub fn started(&self) -> STARTED_R {
+        STARTED_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Write '1' to disable interrupt for event STOPPED"]
+    #[inline(always)]
+    pub fn stopped(&self) -> STOPPED_R {
+        STOPPED_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - Write '1' to disable interrupt for event END"]
+    #[inline(always)]
+    pub fn end(&self) -> END_R {
+        END_R::new(((self.bits >> 2) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Write '1' to disable interrupt for event STARTED"]
+    #[inline(always)]
+    pub fn started(&mut self) -> STARTED_W<0> {
+        STARTED_W::new(self)
+    }
+    #[doc = "Bit 1 - Write '1' to disable interrupt for event STOPPED"]
+    #[inline(always)]
+    pub fn stopped(&mut self) -> STOPPED_W<1> {
+        STOPPED_W::new(self)
+    }
+    #[doc = "Bit 2 - Write '1' to disable interrupt for event END"]
+    #[inline(always)]
+    pub fn end(&mut self) -> END_W<2> {
+        END_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Disable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"]
+pub struct INTENCLR_SPEC;
+impl crate::RegisterSpec for INTENCLR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [intenclr::R](R) reader structure"]
+impl crate::Readable for INTENCLR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"]
+impl crate::Writable for INTENCLR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTENCLR to value 0"]
+impl crate::Resettable for INTENCLR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/pdm0_ns/intenset.rs

@@ -0,0 +1,267 @@
+#[doc = "Register `INTENSET` reader"]
+pub struct R(crate::R<INTENSET_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENSET_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENSET_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENSET` writer"]
+pub struct W(crate::W<INTENSET_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENSET_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENSET_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `STARTED` reader - Write '1' to enable interrupt for event STARTED"]
+pub type STARTED_R = crate::BitReader<STARTED_A>;
+#[doc = "Write '1' to enable interrupt for event STARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STARTED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<STARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: STARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STARTED_A {
+        match self.bits {
+            false => STARTED_A::DISABLED,
+            true => STARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == STARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == STARTED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event STARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STARTED_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<STARTED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: STARTED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `STARTED` writer - Write '1' to enable interrupt for event STARTED"]
+pub type STARTED_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, STARTED_AW, O>;
+impl<'a, const O: u8> STARTED_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(STARTED_AW::SET)
+    }
+}
+#[doc = "Field `STOPPED` reader - Write '1' to enable interrupt for event STOPPED"]
+pub type STOPPED_R = crate::BitReader<STOPPED_A>;
+#[doc = "Write '1' to enable interrupt for event STOPPED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STOPPED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<STOPPED_A> for bool {
+    #[inline(always)]
+    fn from(variant: STOPPED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STOPPED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STOPPED_A {
+        match self.bits {
+            false => STOPPED_A::DISABLED,
+            true => STOPPED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == STOPPED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == STOPPED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event STOPPED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STOPPED_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<STOPPED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: STOPPED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `STOPPED` writer - Write '1' to enable interrupt for event STOPPED"]
+pub type STOPPED_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, STOPPED_AW, O>;
+impl<'a, const O: u8> STOPPED_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(STOPPED_AW::SET)
+    }
+}
+#[doc = "Field `END` reader - Write '1' to enable interrupt for event END"]
+pub type END_R = crate::BitReader<END_A>;
+#[doc = "Write '1' to enable interrupt for event END\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum END_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<END_A> for bool {
+    #[inline(always)]
+    fn from(variant: END_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl END_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> END_A {
+        match self.bits {
+            false => END_A::DISABLED,
+            true => END_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == END_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == END_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event END\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum END_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<END_AW> for bool {
+    #[inline(always)]
+    fn from(variant: END_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `END` writer - Write '1' to enable interrupt for event END"]
+pub type END_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, END_AW, O>;
+impl<'a, const O: u8> END_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(END_AW::SET)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Write '1' to enable interrupt for event STARTED"]
+    #[inline(always)]
+    pub fn started(&self) -> STARTED_R {
+        STARTED_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Write '1' to enable interrupt for event STOPPED"]
+    #[inline(always)]
+    pub fn stopped(&self) -> STOPPED_R {
+        STOPPED_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - Write '1' to enable interrupt for event END"]
+    #[inline(always)]
+    pub fn end(&self) -> END_R {
+        END_R::new(((self.bits >> 2) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Write '1' to enable interrupt for event STARTED"]
+    #[inline(always)]
+    pub fn started(&mut self) -> STARTED_W<0> {
+        STARTED_W::new(self)
+    }
+    #[doc = "Bit 1 - Write '1' to enable interrupt for event STOPPED"]
+    #[inline(always)]
+    pub fn stopped(&mut self) -> STOPPED_W<1> {
+        STOPPED_W::new(self)
+    }
+    #[doc = "Bit 2 - Write '1' to enable interrupt for event END"]
+    #[inline(always)]
+    pub fn end(&mut self) -> END_W<2> {
+        END_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Enable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"]
+pub struct INTENSET_SPEC;
+impl crate::RegisterSpec for INTENSET_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [intenset::R](R) reader structure"]
+impl crate::Readable for INTENSET_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"]
+impl crate::Writable for INTENSET_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTENSET to value 0"]
+impl crate::Resettable for INTENSET_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/pdm0_ns/mclkconfig.rs

@@ -0,0 +1,126 @@
+#[doc = "Register `MCLKCONFIG` reader"]
+pub struct R(crate::R<MCLKCONFIG_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<MCLKCONFIG_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<MCLKCONFIG_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<MCLKCONFIG_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `MCLKCONFIG` writer"]
+pub struct W(crate::W<MCLKCONFIG_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<MCLKCONFIG_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<MCLKCONFIG_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<MCLKCONFIG_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `SRC` reader - Master clock source selection"]
+pub type SRC_R = crate::BitReader<SRC_A>;
+#[doc = "Master clock source selection\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SRC_A {
+    #[doc = "0: 32 MHz peripheral clock"]
+    PCLK32M = 0,
+    #[doc = "1: Audio PLL clock"]
+    ACLK = 1,
+}
+impl From<SRC_A> for bool {
+    #[inline(always)]
+    fn from(variant: SRC_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl SRC_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> SRC_A {
+        match self.bits {
+            false => SRC_A::PCLK32M,
+            true => SRC_A::ACLK,
+        }
+    }
+    #[doc = "Checks if the value of the field is `PCLK32M`"]
+    #[inline(always)]
+    pub fn is_pclk32m(&self) -> bool {
+        *self == SRC_A::PCLK32M
+    }
+    #[doc = "Checks if the value of the field is `ACLK`"]
+    #[inline(always)]
+    pub fn is_aclk(&self) -> bool {
+        *self == SRC_A::ACLK
+    }
+}
+#[doc = "Field `SRC` writer - Master clock source selection"]
+pub type SRC_W<'a, const O: u8> = crate::BitWriter<'a, u32, MCLKCONFIG_SPEC, SRC_A, O>;
+impl<'a, const O: u8> SRC_W<'a, O> {
+    #[doc = "32 MHz peripheral clock"]
+    #[inline(always)]
+    pub fn pclk32m(self) -> &'a mut W {
+        self.variant(SRC_A::PCLK32M)
+    }
+    #[doc = "Audio PLL clock"]
+    #[inline(always)]
+    pub fn aclk(self) -> &'a mut W {
+        self.variant(SRC_A::ACLK)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Master clock source selection"]
+    #[inline(always)]
+    pub fn src(&self) -> SRC_R {
+        SRC_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Master clock source selection"]
+    #[inline(always)]
+    pub fn src(&mut self) -> SRC_W<0> {
+        SRC_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Master clock generator configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mclkconfig](index.html) module"]
+pub struct MCLKCONFIG_SPEC;
+impl crate::RegisterSpec for MCLKCONFIG_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [mclkconfig::R](R) reader structure"]
+impl crate::Readable for MCLKCONFIG_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [mclkconfig::W](W) writer structure"]
+impl crate::Writable for MCLKCONFIG_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets MCLKCONFIG to value 0"]
+impl crate::Resettable for MCLKCONFIG_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/pdm0_ns/mode.rs

@@ -0,0 +1,186 @@
+#[doc = "Register `MODE` reader"]
+pub struct R(crate::R<MODE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<MODE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<MODE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<MODE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `MODE` writer"]
+pub struct W(crate::W<MODE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<MODE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<MODE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<MODE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `OPERATION` reader - Mono or stereo operation"]
+pub type OPERATION_R = crate::BitReader<OPERATION_A>;
+#[doc = "Mono or stereo operation\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum OPERATION_A {
+    #[doc = "0: Sample and store one pair (left + right) of 16-bit samples per RAM word R=\\[31:16\\]; L=\\[15:0\\]"]
+    STEREO = 0,
+    #[doc = "1: Sample and store two successive left samples (16 bits each) per RAM word L1=\\[31:16\\]; L0=\\[15:0\\]"]
+    MONO = 1,
+}
+impl From<OPERATION_A> for bool {
+    #[inline(always)]
+    fn from(variant: OPERATION_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl OPERATION_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> OPERATION_A {
+        match self.bits {
+            false => OPERATION_A::STEREO,
+            true => OPERATION_A::MONO,
+        }
+    }
+    #[doc = "Checks if the value of the field is `STEREO`"]
+    #[inline(always)]
+    pub fn is_stereo(&self) -> bool {
+        *self == OPERATION_A::STEREO
+    }
+    #[doc = "Checks if the value of the field is `MONO`"]
+    #[inline(always)]
+    pub fn is_mono(&self) -> bool {
+        *self == OPERATION_A::MONO
+    }
+}
+#[doc = "Field `OPERATION` writer - Mono or stereo operation"]
+pub type OPERATION_W<'a, const O: u8> = crate::BitWriter<'a, u32, MODE_SPEC, OPERATION_A, O>;
+impl<'a, const O: u8> OPERATION_W<'a, O> {
+    #[doc = "Sample and store one pair (left + right) of 16-bit samples per RAM word R=\\[31:16\\]; L=\\[15:0\\]"]
+    #[inline(always)]
+    pub fn stereo(self) -> &'a mut W {
+        self.variant(OPERATION_A::STEREO)
+    }
+    #[doc = "Sample and store two successive left samples (16 bits each) per RAM word L1=\\[31:16\\]; L0=\\[15:0\\]"]
+    #[inline(always)]
+    pub fn mono(self) -> &'a mut W {
+        self.variant(OPERATION_A::MONO)
+    }
+}
+#[doc = "Field `EDGE` reader - Defines on which PDM_CLK edge left (or mono) is sampled"]
+pub type EDGE_R = crate::BitReader<EDGE_A>;
+#[doc = "Defines on which PDM_CLK edge left (or mono) is sampled\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EDGE_A {
+    #[doc = "0: Left (or mono) is sampled on falling edge of PDM_CLK"]
+    LEFT_FALLING = 0,
+    #[doc = "1: Left (or mono) is sampled on rising edge of PDM_CLK"]
+    LEFT_RISING = 1,
+}
+impl From<EDGE_A> for bool {
+    #[inline(always)]
+    fn from(variant: EDGE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EDGE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EDGE_A {
+        match self.bits {
+            false => EDGE_A::LEFT_FALLING,
+            true => EDGE_A::LEFT_RISING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `LEFT_FALLING`"]
+    #[inline(always)]
+    pub fn is_left_falling(&self) -> bool {
+        *self == EDGE_A::LEFT_FALLING
+    }
+    #[doc = "Checks if the value of the field is `LEFT_RISING`"]
+    #[inline(always)]
+    pub fn is_left_rising(&self) -> bool {
+        *self == EDGE_A::LEFT_RISING
+    }
+}
+#[doc = "Field `EDGE` writer - Defines on which PDM_CLK edge left (or mono) is sampled"]
+pub type EDGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, MODE_SPEC, EDGE_A, O>;
+impl<'a, const O: u8> EDGE_W<'a, O> {
+    #[doc = "Left (or mono) is sampled on falling edge of PDM_CLK"]
+    #[inline(always)]
+    pub fn left_falling(self) -> &'a mut W {
+        self.variant(EDGE_A::LEFT_FALLING)
+    }
+    #[doc = "Left (or mono) is sampled on rising edge of PDM_CLK"]
+    #[inline(always)]
+    pub fn left_rising(self) -> &'a mut W {
+        self.variant(EDGE_A::LEFT_RISING)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Mono or stereo operation"]
+    #[inline(always)]
+    pub fn operation(&self) -> OPERATION_R {
+        OPERATION_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Defines on which PDM_CLK edge left (or mono) is sampled"]
+    #[inline(always)]
+    pub fn edge(&self) -> EDGE_R {
+        EDGE_R::new(((self.bits >> 1) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Mono or stereo operation"]
+    #[inline(always)]
+    pub fn operation(&mut self) -> OPERATION_W<0> {
+        OPERATION_W::new(self)
+    }
+    #[doc = "Bit 1 - Defines on which PDM_CLK edge left (or mono) is sampled"]
+    #[inline(always)]
+    pub fn edge(&mut self) -> EDGE_W<1> {
+        EDGE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Defines the routing of the connected PDM microphones' signals\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mode](index.html) module"]
+pub struct MODE_SPEC;
+impl crate::RegisterSpec for MODE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [mode::R](R) reader structure"]
+impl crate::Readable for MODE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [mode::W](W) writer structure"]
+impl crate::Writable for MODE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets MODE to value 0"]
+impl crate::Resettable for MODE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/pdm0_ns/pdmclkctrl.rs

@@ -0,0 +1,180 @@
+#[doc = "Register `PDMCLKCTRL` reader"]
+pub struct R(crate::R<PDMCLKCTRL_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PDMCLKCTRL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PDMCLKCTRL_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PDMCLKCTRL_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PDMCLKCTRL` writer"]
+pub struct W(crate::W<PDMCLKCTRL_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PDMCLKCTRL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PDMCLKCTRL_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PDMCLKCTRL_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `FREQ` reader - PDM_CLK frequency configuration. Enumerations are deprecated, use PDMCLKCTRL equation to find the register value. The 12 least significant bits of the register are ignored and shall be set to zero."]
+pub type FREQ_R = crate::FieldReader<u32, FREQ_A>;
+#[doc = "PDM_CLK frequency configuration. Enumerations are deprecated, use PDMCLKCTRL equation to find the register value. The 12 least significant bits of the register are ignored and shall be set to zero.\n\nValue on reset: 138412032"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u32)]
+pub enum FREQ_A {
+    #[doc = "134217728: PDM_CLK = 32 MHz / 32 = 1.000 MHz"]
+    _1000K = 134217728,
+    #[doc = "138412032: PDM_CLK = 32 MHz / 31 = 1.032 MHz. Nominal clock for RATIO=Ratio64."]
+    DEFAULT = 138412032,
+    #[doc = "142606336: PDM_CLK = 32 MHz / 30 = 1.067 MHz"]
+    _1067K = 142606336,
+    #[doc = "159383552: PDM_CLK = 32 MHz / 26 = 1.231 MHz"]
+    _1231K = 159383552,
+    #[doc = "167772160: PDM_CLK = 32 MHz / 25 = 1.280 MHz. Nominal clock for RATIO=Ratio80."]
+    _1280K = 167772160,
+    #[doc = "176160768: PDM_CLK = 32 MHz / 24 = 1.333 MHz"]
+    _1333K = 176160768,
+}
+impl From<FREQ_A> for u32 {
+    #[inline(always)]
+    fn from(variant: FREQ_A) -> Self {
+        variant as _
+    }
+}
+impl FREQ_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<FREQ_A> {
+        match self.bits {
+            134217728 => Some(FREQ_A::_1000K),
+            138412032 => Some(FREQ_A::DEFAULT),
+            142606336 => Some(FREQ_A::_1067K),
+            159383552 => Some(FREQ_A::_1231K),
+            167772160 => Some(FREQ_A::_1280K),
+            176160768 => Some(FREQ_A::_1333K),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `_1000K`"]
+    #[inline(always)]
+    pub fn is_1000k(&self) -> bool {
+        *self == FREQ_A::_1000K
+    }
+    #[doc = "Checks if the value of the field is `DEFAULT`"]
+    #[inline(always)]
+    pub fn is_default(&self) -> bool {
+        *self == FREQ_A::DEFAULT
+    }
+    #[doc = "Checks if the value of the field is `_1067K`"]
+    #[inline(always)]
+    pub fn is_1067k(&self) -> bool {
+        *self == FREQ_A::_1067K
+    }
+    #[doc = "Checks if the value of the field is `_1231K`"]
+    #[inline(always)]
+    pub fn is_1231k(&self) -> bool {
+        *self == FREQ_A::_1231K
+    }
+    #[doc = "Checks if the value of the field is `_1280K`"]
+    #[inline(always)]
+    pub fn is_1280k(&self) -> bool {
+        *self == FREQ_A::_1280K
+    }
+    #[doc = "Checks if the value of the field is `_1333K`"]
+    #[inline(always)]
+    pub fn is_1333k(&self) -> bool {
+        *self == FREQ_A::_1333K
+    }
+}
+#[doc = "Field `FREQ` writer - PDM_CLK frequency configuration. Enumerations are deprecated, use PDMCLKCTRL equation to find the register value. The 12 least significant bits of the register are ignored and shall be set to zero."]
+pub type FREQ_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PDMCLKCTRL_SPEC, u32, FREQ_A, 32, O>;
+impl<'a, const O: u8> FREQ_W<'a, O> {
+    #[doc = "PDM_CLK = 32 MHz / 32 = 1.000 MHz"]
+    #[inline(always)]
+    pub fn _1000k(self) -> &'a mut W {
+        self.variant(FREQ_A::_1000K)
+    }
+    #[doc = "PDM_CLK = 32 MHz / 31 = 1.032 MHz. Nominal clock for RATIO=Ratio64."]
+    #[inline(always)]
+    pub fn default(self) -> &'a mut W {
+        self.variant(FREQ_A::DEFAULT)
+    }
+    #[doc = "PDM_CLK = 32 MHz / 30 = 1.067 MHz"]
+    #[inline(always)]
+    pub fn _1067k(self) -> &'a mut W {
+        self.variant(FREQ_A::_1067K)
+    }
+    #[doc = "PDM_CLK = 32 MHz / 26 = 1.231 MHz"]
+    #[inline(always)]
+    pub fn _1231k(self) -> &'a mut W {
+        self.variant(FREQ_A::_1231K)
+    }
+    #[doc = "PDM_CLK = 32 MHz / 25 = 1.280 MHz. Nominal clock for RATIO=Ratio80."]
+    #[inline(always)]
+    pub fn _1280k(self) -> &'a mut W {
+        self.variant(FREQ_A::_1280K)
+    }
+    #[doc = "PDM_CLK = 32 MHz / 24 = 1.333 MHz"]
+    #[inline(always)]
+    pub fn _1333k(self) -> &'a mut W {
+        self.variant(FREQ_A::_1333K)
+    }
+}
+impl R {
+    #[doc = "Bits 0:31 - PDM_CLK frequency configuration. Enumerations are deprecated, use PDMCLKCTRL equation to find the register value. The 12 least significant bits of the register are ignored and shall be set to zero."]
+    #[inline(always)]
+    pub fn freq(&self) -> FREQ_R {
+        FREQ_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - PDM_CLK frequency configuration. Enumerations are deprecated, use PDMCLKCTRL equation to find the register value. The 12 least significant bits of the register are ignored and shall be set to zero."]
+    #[inline(always)]
+    pub fn freq(&mut self) -> FREQ_W<0> {
+        FREQ_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "PDM clock generator control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pdmclkctrl](index.html) module"]
+pub struct PDMCLKCTRL_SPEC;
+impl crate::RegisterSpec for PDMCLKCTRL_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [pdmclkctrl::R](R) reader structure"]
+impl crate::Readable for PDMCLKCTRL_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [pdmclkctrl::W](W) writer structure"]
+impl crate::Writable for PDMCLKCTRL_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PDMCLKCTRL to value 0x0840_0000"]
+impl crate::Resettable for PDMCLKCTRL_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x0840_0000
+    }
+}

vendor/nrf5340-app-pac/src/pdm0_ns/psel.rs

@@ -0,0 +1,16 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct PSEL {
+    #[doc = "0x00 - Pin number configuration for PDM CLK signal"]
+    pub clk: CLK,
+    #[doc = "0x04 - Pin number configuration for PDM DIN signal"]
+    pub din: DIN,
+}
+#[doc = "CLK (rw) register accessor: an alias for `Reg<CLK_SPEC>`"]
+pub type CLK = crate::Reg<clk::CLK_SPEC>;
+#[doc = "Pin number configuration for PDM CLK signal"]
+pub mod clk;
+#[doc = "DIN (rw) register accessor: an alias for `Reg<DIN_SPEC>`"]
+pub type DIN = crate::Reg<din::DIN_SPEC>;
+#[doc = "Pin number configuration for PDM DIN signal"]
+pub mod din;

vendor/nrf5340-app-pac/src/pdm0_ns/psel/clk.rs

@@ -0,0 +1,154 @@
+#[doc = "Register `CLK` reader"]
+pub struct R(crate::R<CLK_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CLK_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CLK_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CLK_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CLK` writer"]
+pub struct W(crate::W<CLK_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CLK_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CLK_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CLK_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `PIN` reader - Pin number"]
+pub type PIN_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `PIN` writer - Pin number"]
+pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CLK_SPEC, u8, u8, 5, O>;
+#[doc = "Field `PORT` reader - Port number"]
+pub type PORT_R = crate::BitReader<bool>;
+#[doc = "Field `PORT` writer - Port number"]
+pub type PORT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLK_SPEC, bool, O>;
+#[doc = "Field `CONNECT` reader - Connection"]
+pub type CONNECT_R = crate::BitReader<CONNECT_A>;
+#[doc = "Connection\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CONNECT_A {
+    #[doc = "1: Disconnect"]
+    DISCONNECTED = 1,
+    #[doc = "0: Connect"]
+    CONNECTED = 0,
+}
+impl From<CONNECT_A> for bool {
+    #[inline(always)]
+    fn from(variant: CONNECT_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl CONNECT_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CONNECT_A {
+        match self.bits {
+            true => CONNECT_A::DISCONNECTED,
+            false => CONNECT_A::CONNECTED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISCONNECTED`"]
+    #[inline(always)]
+    pub fn is_disconnected(&self) -> bool {
+        *self == CONNECT_A::DISCONNECTED
+    }
+    #[doc = "Checks if the value of the field is `CONNECTED`"]
+    #[inline(always)]
+    pub fn is_connected(&self) -> bool {
+        *self == CONNECT_A::CONNECTED
+    }
+}
+#[doc = "Field `CONNECT` writer - Connection"]
+pub type CONNECT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLK_SPEC, CONNECT_A, O>;
+impl<'a, const O: u8> CONNECT_W<'a, O> {
+    #[doc = "Disconnect"]
+    #[inline(always)]
+    pub fn disconnected(self) -> &'a mut W {
+        self.variant(CONNECT_A::DISCONNECTED)
+    }
+    #[doc = "Connect"]
+    #[inline(always)]
+    pub fn connected(self) -> &'a mut W {
+        self.variant(CONNECT_A::CONNECTED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:4 - Pin number"]
+    #[inline(always)]
+    pub fn pin(&self) -> PIN_R {
+        PIN_R::new((self.bits & 0x1f) as u8)
+    }
+    #[doc = "Bit 5 - Port number"]
+    #[inline(always)]
+    pub fn port(&self) -> PORT_R {
+        PORT_R::new(((self.bits >> 5) & 1) != 0)
+    }
+    #[doc = "Bit 31 - Connection"]
+    #[inline(always)]
+    pub fn connect(&self) -> CONNECT_R {
+        CONNECT_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:4 - Pin number"]
+    #[inline(always)]
+    pub fn pin(&mut self) -> PIN_W<0> {
+        PIN_W::new(self)
+    }
+    #[doc = "Bit 5 - Port number"]
+    #[inline(always)]
+    pub fn port(&mut self) -> PORT_W<5> {
+        PORT_W::new(self)
+    }
+    #[doc = "Bit 31 - Connection"]
+    #[inline(always)]
+    pub fn connect(&mut self) -> CONNECT_W<31> {
+        CONNECT_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Pin number configuration for PDM CLK signal\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clk](index.html) module"]
+pub struct CLK_SPEC;
+impl crate::RegisterSpec for CLK_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [clk::R](R) reader structure"]
+impl crate::Readable for CLK_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [clk::W](W) writer structure"]
+impl crate::Writable for CLK_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CLK to value 0xffff_ffff"]
+impl crate::Resettable for CLK_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0xffff_ffff
+    }
+}

vendor/nrf5340-app-pac/src/pdm0_ns/psel/din.rs

@@ -0,0 +1,154 @@
+#[doc = "Register `DIN` reader"]
+pub struct R(crate::R<DIN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<DIN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<DIN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<DIN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `DIN` writer"]
+pub struct W(crate::W<DIN_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<DIN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<DIN_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<DIN_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `PIN` reader - Pin number"]
+pub type PIN_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `PIN` writer - Pin number"]
+pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DIN_SPEC, u8, u8, 5, O>;
+#[doc = "Field `PORT` reader - Port number"]
+pub type PORT_R = crate::BitReader<bool>;
+#[doc = "Field `PORT` writer - Port number"]
+pub type PORT_W<'a, const O: u8> = crate::BitWriter<'a, u32, DIN_SPEC, bool, O>;
+#[doc = "Field `CONNECT` reader - Connection"]
+pub type CONNECT_R = crate::BitReader<CONNECT_A>;
+#[doc = "Connection\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CONNECT_A {
+    #[doc = "1: Disconnect"]
+    DISCONNECTED = 1,
+    #[doc = "0: Connect"]
+    CONNECTED = 0,
+}
+impl From<CONNECT_A> for bool {
+    #[inline(always)]
+    fn from(variant: CONNECT_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl CONNECT_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CONNECT_A {
+        match self.bits {
+            true => CONNECT_A::DISCONNECTED,
+            false => CONNECT_A::CONNECTED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISCONNECTED`"]
+    #[inline(always)]
+    pub fn is_disconnected(&self) -> bool {
+        *self == CONNECT_A::DISCONNECTED
+    }
+    #[doc = "Checks if the value of the field is `CONNECTED`"]
+    #[inline(always)]
+    pub fn is_connected(&self) -> bool {
+        *self == CONNECT_A::CONNECTED
+    }
+}
+#[doc = "Field `CONNECT` writer - Connection"]
+pub type CONNECT_W<'a, const O: u8> = crate::BitWriter<'a, u32, DIN_SPEC, CONNECT_A, O>;
+impl<'a, const O: u8> CONNECT_W<'a, O> {
+    #[doc = "Disconnect"]
+    #[inline(always)]
+    pub fn disconnected(self) -> &'a mut W {
+        self.variant(CONNECT_A::DISCONNECTED)
+    }
+    #[doc = "Connect"]
+    #[inline(always)]
+    pub fn connected(self) -> &'a mut W {
+        self.variant(CONNECT_A::CONNECTED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:4 - Pin number"]
+    #[inline(always)]
+    pub fn pin(&self) -> PIN_R {
+        PIN_R::new((self.bits & 0x1f) as u8)
+    }
+    #[doc = "Bit 5 - Port number"]
+    #[inline(always)]
+    pub fn port(&self) -> PORT_R {
+        PORT_R::new(((self.bits >> 5) & 1) != 0)
+    }
+    #[doc = "Bit 31 - Connection"]
+    #[inline(always)]
+    pub fn connect(&self) -> CONNECT_R {
+        CONNECT_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:4 - Pin number"]
+    #[inline(always)]
+    pub fn pin(&mut self) -> PIN_W<0> {
+        PIN_W::new(self)
+    }
+    #[doc = "Bit 5 - Port number"]
+    #[inline(always)]
+    pub fn port(&mut self) -> PORT_W<5> {
+        PORT_W::new(self)
+    }
+    #[doc = "Bit 31 - Connection"]
+    #[inline(always)]
+    pub fn connect(&mut self) -> CONNECT_W<31> {
+        CONNECT_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Pin number configuration for PDM DIN signal\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [din](index.html) module"]
+pub struct DIN_SPEC;
+impl crate::RegisterSpec for DIN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [din::R](R) reader structure"]
+impl crate::Readable for DIN_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [din::W](W) writer structure"]
+impl crate::Writable for DIN_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets DIN to value 0xffff_ffff"]
+impl crate::Resettable for DIN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0xffff_ffff
+    }
+}

vendor/nrf5340-app-pac/src/pdm0_ns/publish_end.rs

@@ -0,0 +1,140 @@
+#[doc = "Register `PUBLISH_END` reader"]
+pub struct R(crate::R<PUBLISH_END_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PUBLISH_END_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PUBLISH_END_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PUBLISH_END_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PUBLISH_END` writer"]
+pub struct W(crate::W<PUBLISH_END_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PUBLISH_END_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PUBLISH_END_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PUBLISH_END_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that event END will publish to."]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that event END will publish to."]
+pub type CHIDX_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PUBLISH_END_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable publishing"]
+    DISABLED = 0,
+    #[doc = "1: Enable publishing"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PUBLISH_END_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable publishing"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable publishing"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that event END will publish to."]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that event END will publish to."]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Publish configuration for event END\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [publish_end](index.html) module"]
+pub struct PUBLISH_END_SPEC;
+impl crate::RegisterSpec for PUBLISH_END_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [publish_end::R](R) reader structure"]
+impl crate::Readable for PUBLISH_END_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [publish_end::W](W) writer structure"]
+impl crate::Writable for PUBLISH_END_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PUBLISH_END to value 0"]
+impl crate::Resettable for PUBLISH_END_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/pdm0_ns/publish_started.rs

@@ -0,0 +1,140 @@
+#[doc = "Register `PUBLISH_STARTED` reader"]
+pub struct R(crate::R<PUBLISH_STARTED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PUBLISH_STARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PUBLISH_STARTED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PUBLISH_STARTED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PUBLISH_STARTED` writer"]
+pub struct W(crate::W<PUBLISH_STARTED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PUBLISH_STARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PUBLISH_STARTED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PUBLISH_STARTED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that event STARTED will publish to."]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that event STARTED will publish to."]
+pub type CHIDX_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PUBLISH_STARTED_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable publishing"]
+    DISABLED = 0,
+    #[doc = "1: Enable publishing"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PUBLISH_STARTED_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable publishing"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable publishing"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that event STARTED will publish to."]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that event STARTED will publish to."]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Publish configuration for event STARTED\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [publish_started](index.html) module"]
+pub struct PUBLISH_STARTED_SPEC;
+impl crate::RegisterSpec for PUBLISH_STARTED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [publish_started::R](R) reader structure"]
+impl crate::Readable for PUBLISH_STARTED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [publish_started::W](W) writer structure"]
+impl crate::Writable for PUBLISH_STARTED_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PUBLISH_STARTED to value 0"]
+impl crate::Resettable for PUBLISH_STARTED_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/pdm0_ns/publish_stopped.rs

@@ -0,0 +1,140 @@
+#[doc = "Register `PUBLISH_STOPPED` reader"]
+pub struct R(crate::R<PUBLISH_STOPPED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PUBLISH_STOPPED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PUBLISH_STOPPED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PUBLISH_STOPPED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PUBLISH_STOPPED` writer"]
+pub struct W(crate::W<PUBLISH_STOPPED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PUBLISH_STOPPED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PUBLISH_STOPPED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PUBLISH_STOPPED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that event STOPPED will publish to."]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that event STOPPED will publish to."]
+pub type CHIDX_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PUBLISH_STOPPED_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable publishing"]
+    DISABLED = 0,
+    #[doc = "1: Enable publishing"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PUBLISH_STOPPED_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable publishing"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable publishing"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that event STOPPED will publish to."]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that event STOPPED will publish to."]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Publish configuration for event STOPPED\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [publish_stopped](index.html) module"]
+pub struct PUBLISH_STOPPED_SPEC;
+impl crate::RegisterSpec for PUBLISH_STOPPED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [publish_stopped::R](R) reader structure"]
+impl crate::Readable for PUBLISH_STOPPED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [publish_stopped::W](W) writer structure"]
+impl crate::Writable for PUBLISH_STOPPED_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PUBLISH_STOPPED to value 0"]
+impl crate::Resettable for PUBLISH_STOPPED_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/pdm0_ns/ratio.rs

@@ -0,0 +1,126 @@
+#[doc = "Register `RATIO` reader"]
+pub struct R(crate::R<RATIO_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<RATIO_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<RATIO_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<RATIO_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `RATIO` writer"]
+pub struct W(crate::W<RATIO_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<RATIO_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<RATIO_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<RATIO_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `RATIO` reader - Selects the ratio between PDM_CLK and output sample rate"]
+pub type RATIO_R = crate::BitReader<RATIO_A>;
+#[doc = "Selects the ratio between PDM_CLK and output sample rate\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum RATIO_A {
+    #[doc = "0: Ratio of 64"]
+    RATIO64 = 0,
+    #[doc = "1: Ratio of 80"]
+    RATIO80 = 1,
+}
+impl From<RATIO_A> for bool {
+    #[inline(always)]
+    fn from(variant: RATIO_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl RATIO_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> RATIO_A {
+        match self.bits {
+            false => RATIO_A::RATIO64,
+            true => RATIO_A::RATIO80,
+        }
+    }
+    #[doc = "Checks if the value of the field is `RATIO64`"]
+    #[inline(always)]
+    pub fn is_ratio64(&self) -> bool {
+        *self == RATIO_A::RATIO64
+    }
+    #[doc = "Checks if the value of the field is `RATIO80`"]
+    #[inline(always)]
+    pub fn is_ratio80(&self) -> bool {
+        *self == RATIO_A::RATIO80
+    }
+}
+#[doc = "Field `RATIO` writer - Selects the ratio between PDM_CLK and output sample rate"]
+pub type RATIO_W<'a, const O: u8> = crate::BitWriter<'a, u32, RATIO_SPEC, RATIO_A, O>;
+impl<'a, const O: u8> RATIO_W<'a, O> {
+    #[doc = "Ratio of 64"]
+    #[inline(always)]
+    pub fn ratio64(self) -> &'a mut W {
+        self.variant(RATIO_A::RATIO64)
+    }
+    #[doc = "Ratio of 80"]
+    #[inline(always)]
+    pub fn ratio80(self) -> &'a mut W {
+        self.variant(RATIO_A::RATIO80)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Selects the ratio between PDM_CLK and output sample rate"]
+    #[inline(always)]
+    pub fn ratio(&self) -> RATIO_R {
+        RATIO_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Selects the ratio between PDM_CLK and output sample rate"]
+    #[inline(always)]
+    pub fn ratio(&mut self) -> RATIO_W<0> {
+        RATIO_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Selects the ratio between PDM_CLK and output sample rate. Change PDMCLKCTRL accordingly.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ratio](index.html) module"]
+pub struct RATIO_SPEC;
+impl crate::RegisterSpec for RATIO_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ratio::R](R) reader structure"]
+impl crate::Readable for RATIO_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ratio::W](W) writer structure"]
+impl crate::Writable for RATIO_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets RATIO to value 0"]
+impl crate::Resettable for RATIO_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/pdm0_ns/sample.rs

@@ -0,0 +1,16 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct SAMPLE {
+    #[doc = "0x00 - RAM address pointer to write samples to with EasyDMA"]
+    pub ptr: PTR,
+    #[doc = "0x04 - Number of samples to allocate memory for in EasyDMA mode"]
+    pub maxcnt: MAXCNT,
+}
+#[doc = "PTR (rw) register accessor: an alias for `Reg<PTR_SPEC>`"]
+pub type PTR = crate::Reg<ptr::PTR_SPEC>;
+#[doc = "RAM address pointer to write samples to with EasyDMA"]
+pub mod ptr;
+#[doc = "MAXCNT (rw) register accessor: an alias for `Reg<MAXCNT_SPEC>`"]
+pub type MAXCNT = crate::Reg<maxcnt::MAXCNT_SPEC>;
+#[doc = "Number of samples to allocate memory for in EasyDMA mode"]
+pub mod maxcnt;

vendor/nrf5340-app-pac/src/pdm0_ns/sample/maxcnt.rs

@@ -0,0 +1,80 @@
+#[doc = "Register `MAXCNT` reader"]
+pub struct R(crate::R<MAXCNT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<MAXCNT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<MAXCNT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<MAXCNT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `MAXCNT` writer"]
+pub struct W(crate::W<MAXCNT_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<MAXCNT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<MAXCNT_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<MAXCNT_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `BUFFSIZE` reader - Length of DMA RAM allocation in number of samples"]
+pub type BUFFSIZE_R = crate::FieldReader<u16, u16>;
+#[doc = "Field `BUFFSIZE` writer - Length of DMA RAM allocation in number of samples"]
+pub type BUFFSIZE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, MAXCNT_SPEC, u16, u16, 15, O>;
+impl R {
+    #[doc = "Bits 0:14 - Length of DMA RAM allocation in number of samples"]
+    #[inline(always)]
+    pub fn buffsize(&self) -> BUFFSIZE_R {
+        BUFFSIZE_R::new((self.bits & 0x7fff) as u16)
+    }
+}
+impl W {
+    #[doc = "Bits 0:14 - Length of DMA RAM allocation in number of samples"]
+    #[inline(always)]
+    pub fn buffsize(&mut self) -> BUFFSIZE_W<0> {
+        BUFFSIZE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Number of samples to allocate memory for in EasyDMA mode\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [maxcnt](index.html) module"]
+pub struct MAXCNT_SPEC;
+impl crate::RegisterSpec for MAXCNT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [maxcnt::R](R) reader structure"]
+impl crate::Readable for MAXCNT_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [maxcnt::W](W) writer structure"]
+impl crate::Writable for MAXCNT_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets MAXCNT to value 0"]
+impl crate::Resettable for MAXCNT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/pdm0_ns/sample/ptr.rs

@@ -0,0 +1,80 @@
+#[doc = "Register `PTR` reader"]
+pub struct R(crate::R<PTR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PTR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PTR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PTR` writer"]
+pub struct W(crate::W<PTR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PTR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PTR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `SAMPLEPTR` reader - Address to write PDM samples to over DMA"]
+pub type SAMPLEPTR_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `SAMPLEPTR` writer - Address to write PDM samples to over DMA"]
+pub type SAMPLEPTR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PTR_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - Address to write PDM samples to over DMA"]
+    #[inline(always)]
+    pub fn sampleptr(&self) -> SAMPLEPTR_R {
+        SAMPLEPTR_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Address to write PDM samples to over DMA"]
+    #[inline(always)]
+    pub fn sampleptr(&mut self) -> SAMPLEPTR_W<0> {
+        SAMPLEPTR_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "RAM address pointer to write samples to with EasyDMA\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ptr](index.html) module"]
+pub struct PTR_SPEC;
+impl crate::RegisterSpec for PTR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ptr::R](R) reader structure"]
+impl crate::Readable for PTR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ptr::W](W) writer structure"]
+impl crate::Writable for PTR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PTR to value 0"]
+impl crate::Resettable for PTR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/pdm0_ns/subscribe_start.rs

@@ -0,0 +1,140 @@
+#[doc = "Register `SUBSCRIBE_START` reader"]
+pub struct R(crate::R<SUBSCRIBE_START_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_START_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_START_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_START_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_START` writer"]
+pub struct W(crate::W<SUBSCRIBE_START_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_START_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_START_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_START_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that task START will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that task START will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SUBSCRIBE_START_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_START_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that task START will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that task START will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task START\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_start](index.html) module"]
+pub struct SUBSCRIBE_START_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_START_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_start::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_START_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_start::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_START_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_START to value 0"]
+impl crate::Resettable for SUBSCRIBE_START_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/pdm0_ns/subscribe_stop.rs

@@ -0,0 +1,140 @@
+#[doc = "Register `SUBSCRIBE_STOP` reader"]
+pub struct R(crate::R<SUBSCRIBE_STOP_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_STOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_STOP_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_STOP_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_STOP` writer"]
+pub struct W(crate::W<SUBSCRIBE_STOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_STOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_STOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_STOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that task STOP will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that task STOP will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SUBSCRIBE_STOP_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_STOP_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that task STOP will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that task STOP will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task STOP\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_stop](index.html) module"]
+pub struct SUBSCRIBE_STOP_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_STOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_stop::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_STOP_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_stop::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_STOP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_STOP to value 0"]
+impl crate::Resettable for SUBSCRIBE_STOP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/pdm0_ns/tasks_start.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_START` writer"]
+pub struct W(crate::W<TASKS_START_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_START_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_START_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_START_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Starts continuous PDM transfer\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_START_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_START_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_START_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_START` writer - Starts continuous PDM transfer"]
+pub type TASKS_START_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_START_SPEC, TASKS_START_AW, O>;
+impl<'a, const O: u8> TASKS_START_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_START_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Starts continuous PDM transfer"]
+    #[inline(always)]
+    pub fn tasks_start(&mut self) -> TASKS_START_W<0> {
+        TASKS_START_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Starts continuous PDM transfer\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_start](index.html) module"]
+pub struct TASKS_START_SPEC;
+impl crate::RegisterSpec for TASKS_START_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_start::W](W) writer structure"]
+impl crate::Writable for TASKS_START_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_START to value 0"]
+impl crate::Resettable for TASKS_START_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/pdm0_ns/tasks_stop.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_STOP` writer"]
+pub struct W(crate::W<TASKS_STOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_STOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_STOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_STOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Stops PDM transfer\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_STOP_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_STOP_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_STOP_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_STOP` writer - Stops PDM transfer"]
+pub type TASKS_STOP_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_STOP_SPEC, TASKS_STOP_AW, O>;
+impl<'a, const O: u8> TASKS_STOP_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_STOP_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Stops PDM transfer"]
+    #[inline(always)]
+    pub fn tasks_stop(&mut self) -> TASKS_STOP_W<0> {
+        TASKS_STOP_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Stops PDM transfer\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_stop](index.html) module"]
+pub struct TASKS_STOP_SPEC;
+impl crate::RegisterSpec for TASKS_STOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_stop::W](W) writer structure"]
+impl crate::Writable for TASKS_STOP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_STOP to value 0"]
+impl crate::Resettable for TASKS_STOP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}