feat: add display UI with splash screen, dashboard, and RSSI sparkline

Implement full SSD1306 OLED display support:
- Splash screen on boot (1.5s) with project name, version, board
- Dashboard showing radio state, config, counters, RSSI/SNR
- RSSI history sparkline (64-sample ring buffer, 2px-wide bars)
- DisplayOn/DisplayOff host commands routed via dedicated channel
- Pure render functions against generic DrawTarget (no hardware coupling)
- Display on/off control bypasses radio task entirely

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
This commit is contained in:
swaitsandClaude Opus 4.6 committed 2026-03-29 20:42:54 -06:00
1 parent 7064110293
commit 3102fc747a
17624 files changed
+4564928 -38

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#[doc = "Register `CLOCKSTART` writer"]
pub struct W(crate::W<CLOCKSTART_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<CLOCKSTART_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<CLOCKSTART_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<CLOCKSTART_SPEC>) -> Self {
W(writer)
}
}
#[doc = "\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum START_AW {
#[doc = "1: Start all trace and debug clocks."]
START = 1,
}
impl From<START_AW> for bool {
#[inline(always)]
fn from(variant: START_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `START` writer - "]
pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLOCKSTART_SPEC, START_AW, O>;
impl<'a, const O: u8> START_W<'a, O> {
#[doc = "Start all trace and debug clocks."]
#[inline(always)]
pub fn start(self) -> &'a mut W {
self.variant(START_AW::START)
}
}
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn start(&mut self) -> START_W<0> {
START_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Start all trace and debug clocks.\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clockstart](index.html) module"]
pub struct CLOCKSTART_SPEC;
impl crate::RegisterSpec for CLOCKSTART_SPEC {
type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [clockstart::W](W) writer structure"]
impl crate::Writable for CLOCKSTART_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets CLOCKSTART to value 0"]
impl crate::Resettable for CLOCKSTART_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
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#[doc = "Register `CLOCKSTOP` writer"]
pub struct W(crate::W<CLOCKSTOP_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<CLOCKSTOP_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<CLOCKSTOP_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<CLOCKSTOP_SPEC>) -> Self {
W(writer)
}
}
#[doc = "\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum STOP_AW {
#[doc = "1: Stop all trace and debug clocks."]
STOP = 1,
}
impl From<STOP_AW> for bool {
#[inline(always)]
fn from(variant: STOP_AW) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `STOP` writer - "]
pub type STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLOCKSTOP_SPEC, STOP_AW, O>;
impl<'a, const O: u8> STOP_W<'a, O> {
#[doc = "Stop all trace and debug clocks."]
#[inline(always)]
pub fn stop(self) -> &'a mut W {
self.variant(STOP_AW::STOP)
}
}
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn stop(&mut self) -> STOP_W<0> {
STOP_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Stop all trace and debug clocks.\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clockstop](index.html) module"]
pub struct CLOCKSTOP_SPEC;
impl crate::RegisterSpec for CLOCKSTOP_SPEC {
type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [clockstop::W](W) writer structure"]
impl crate::Writable for CLOCKSTOP_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets CLOCKSTOP to value 0"]
impl crate::Resettable for CLOCKSTOP_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
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#[doc = "Register `ENABLE` reader"]
pub struct R(crate::R<ENABLE_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<ENABLE_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<ENABLE_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<ENABLE_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `ENABLE` writer"]
pub struct W(crate::W<ENABLE_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<ENABLE_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<ENABLE_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<ENABLE_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `ENABLE` reader - "]
pub type ENABLE_R = crate::BitReader<ENABLE_A>;
#[doc = "\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ENABLE_A {
#[doc = "0: Disable debug domain and release selected GPIOs"]
DISABLED = 0,
#[doc = "1: Enable debug domain and aquire selected GPIOs"]
ENABLED = 1,
}
impl From<ENABLE_A> for bool {
#[inline(always)]
fn from(variant: ENABLE_A) -> Self {
variant as u8 != 0
}
}
impl ENABLE_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> ENABLE_A {
match self.bits {
false => ENABLE_A::DISABLED,
true => ENABLE_A::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline(always)]
pub fn is_disabled(&self) -> bool {
*self == ENABLE_A::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline(always)]
pub fn is_enabled(&self) -> bool {
*self == ENABLE_A::ENABLED
}
}
#[doc = "Field `ENABLE` writer - "]
pub type ENABLE_W<'a, const O: u8> = crate::BitWriter<'a, u32, ENABLE_SPEC, ENABLE_A, O>;
impl<'a, const O: u8> ENABLE_W<'a, O> {
#[doc = "Disable debug domain and release selected GPIOs"]
#[inline(always)]
pub fn disabled(self) -> &'a mut W {
self.variant(ENABLE_A::DISABLED)
}
#[doc = "Enable debug domain and aquire selected GPIOs"]
#[inline(always)]
pub fn enabled(self) -> &'a mut W {
self.variant(ENABLE_A::ENABLED)
}
}
impl R {
#[doc = "Bit 0"]
#[inline(always)]
pub fn enable(&self) -> ENABLE_R {
ENABLE_R::new((self.bits & 1) != 0)
}
}
impl W {
#[doc = "Bit 0"]
#[inline(always)]
pub fn enable(&mut self) -> ENABLE_W<0> {
ENABLE_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Enable debug domain and aquire selected GPIOs\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [enable](index.html) module"]
pub struct ENABLE_SPEC;
impl crate::RegisterSpec for ENABLE_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [enable::R](R) reader structure"]
impl crate::Readable for ENABLE_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [enable::W](W) writer structure"]
impl crate::Writable for ENABLE_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets ENABLE to value 0"]
impl crate::Resettable for ENABLE_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}
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#[doc = r"Register block"]
#[repr(C)]
pub struct PSEL {
#[doc = "0x00 - Pin configuration for TRACECLK"]
pub traceclk: TRACECLK,
#[doc = "0x04 - Pin configuration for TRACEDATA\\[0\\]"]
pub tracedata0: TRACEDATA0,
#[doc = "0x08 - Pin configuration for TRACEDATA\\[1\\]"]
pub tracedata1: TRACEDATA1,
#[doc = "0x0c - Pin configuration for TRACEDATA\\[2\\]"]
pub tracedata2: TRACEDATA2,
#[doc = "0x10 - Pin configuration for TRACEDATA\\[3\\]"]
pub tracedata3: TRACEDATA3,
}
#[doc = "TRACECLK (rw) register accessor: an alias for `Reg<TRACECLK_SPEC>`"]
pub type TRACECLK = crate::Reg<traceclk::TRACECLK_SPEC>;
#[doc = "Pin configuration for TRACECLK"]
pub mod traceclk;
#[doc = "TRACEDATA0 (rw) register accessor: an alias for `Reg<TRACEDATA0_SPEC>`"]
pub type TRACEDATA0 = crate::Reg<tracedata0::TRACEDATA0_SPEC>;
#[doc = "Pin configuration for TRACEDATA\\[0\\]"]
pub mod tracedata0;
#[doc = "TRACEDATA1 (rw) register accessor: an alias for `Reg<TRACEDATA1_SPEC>`"]
pub type TRACEDATA1 = crate::Reg<tracedata1::TRACEDATA1_SPEC>;
#[doc = "Pin configuration for TRACEDATA\\[1\\]"]
pub mod tracedata1;
#[doc = "TRACEDATA2 (rw) register accessor: an alias for `Reg<TRACEDATA2_SPEC>`"]
pub type TRACEDATA2 = crate::Reg<tracedata2::TRACEDATA2_SPEC>;
#[doc = "Pin configuration for TRACEDATA\\[2\\]"]
pub mod tracedata2;
#[doc = "TRACEDATA3 (rw) register accessor: an alias for `Reg<TRACEDATA3_SPEC>`"]
pub type TRACEDATA3 = crate::Reg<tracedata3::TRACEDATA3_SPEC>;
#[doc = "Pin configuration for TRACEDATA\\[3\\]"]
pub mod tracedata3;
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#[doc = "Register `TRACECLK` reader"]
pub struct R(crate::R<TRACECLK_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<TRACECLK_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<TRACECLK_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<TRACECLK_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `TRACECLK` writer"]
pub struct W(crate::W<TRACECLK_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<TRACECLK_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<TRACECLK_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<TRACECLK_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `PIN` reader - Pin number"]
pub type PIN_R = crate::FieldReader<u8, PIN_A>;
#[doc = "Pin number\n\nValue on reset: 31"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum PIN_A {
#[doc = "12: TRACECLK pin"]
TRACECLK = 12,
}
impl From<PIN_A> for u8 {
#[inline(always)]
fn from(variant: PIN_A) -> Self {
variant as _
}
}
impl PIN_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> Option<PIN_A> {
match self.bits {
12 => Some(PIN_A::TRACECLK),
_ => None,
}
}
#[doc = "Checks if the value of the field is `TRACECLK`"]
#[inline(always)]
pub fn is_traceclk(&self) -> bool {
*self == PIN_A::TRACECLK
}
}
#[doc = "Field `PIN` writer - Pin number"]
pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TRACECLK_SPEC, u8, PIN_A, 5, O>;
impl<'a, const O: u8> PIN_W<'a, O> {
#[doc = "TRACECLK pin"]
#[inline(always)]
pub fn traceclk(self) -> &'a mut W {
self.variant(PIN_A::TRACECLK)
}
}
#[doc = "Field `CONNECT` reader - Connection"]
pub type CONNECT_R = crate::BitReader<CONNECT_A>;
#[doc = "Connection\n\nValue on reset: 1"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CONNECT_A {
#[doc = "1: Disconnect"]
DISCONNECTED = 1,
#[doc = "0: Connect"]
CONNECTED = 0,
}
impl From<CONNECT_A> for bool {
#[inline(always)]
fn from(variant: CONNECT_A) -> Self {
variant as u8 != 0
}
}
impl CONNECT_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> CONNECT_A {
match self.bits {
true => CONNECT_A::DISCONNECTED,
false => CONNECT_A::CONNECTED,
}
}
#[doc = "Checks if the value of the field is `DISCONNECTED`"]
#[inline(always)]
pub fn is_disconnected(&self) -> bool {
*self == CONNECT_A::DISCONNECTED
}
#[doc = "Checks if the value of the field is `CONNECTED`"]
#[inline(always)]
pub fn is_connected(&self) -> bool {
*self == CONNECT_A::CONNECTED
}
}
#[doc = "Field `CONNECT` writer - Connection"]
pub type CONNECT_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRACECLK_SPEC, CONNECT_A, O>;
impl<'a, const O: u8> CONNECT_W<'a, O> {
#[doc = "Disconnect"]
#[inline(always)]
pub fn disconnected(self) -> &'a mut W {
self.variant(CONNECT_A::DISCONNECTED)
}
#[doc = "Connect"]
#[inline(always)]
pub fn connected(self) -> &'a mut W {
self.variant(CONNECT_A::CONNECTED)
}
}
impl R {
#[doc = "Bits 0:4 - Pin number"]
#[inline(always)]
pub fn pin(&self) -> PIN_R {
PIN_R::new((self.bits & 0x1f) as u8)
}
#[doc = "Bit 31 - Connection"]
#[inline(always)]
pub fn connect(&self) -> CONNECT_R {
CONNECT_R::new(((self.bits >> 31) & 1) != 0)
}
}
impl W {
#[doc = "Bits 0:4 - Pin number"]
#[inline(always)]
pub fn pin(&mut self) -> PIN_W<0> {
PIN_W::new(self)
}
#[doc = "Bit 31 - Connection"]
#[inline(always)]
pub fn connect(&mut self) -> CONNECT_W<31> {
CONNECT_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Pin configuration for TRACECLK\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [traceclk](index.html) module"]
pub struct TRACECLK_SPEC;
impl crate::RegisterSpec for TRACECLK_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [traceclk::R](R) reader structure"]
impl crate::Readable for TRACECLK_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [traceclk::W](W) writer structure"]
impl crate::Writable for TRACECLK_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets TRACECLK to value 0xffff_ffff"]
impl crate::Resettable for TRACECLK_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0xffff_ffff
}
}
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#[doc = "Register `TRACEDATA0` reader"]
pub struct R(crate::R<TRACEDATA0_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<TRACEDATA0_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<TRACEDATA0_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<TRACEDATA0_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `TRACEDATA0` writer"]
pub struct W(crate::W<TRACEDATA0_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<TRACEDATA0_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<TRACEDATA0_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<TRACEDATA0_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `PIN` reader - Pin number"]
pub type PIN_R = crate::FieldReader<u8, PIN_A>;
#[doc = "Pin number\n\nValue on reset: 31"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum PIN_A {
#[doc = "11: TRACEDATA0 pin"]
TRACEDATA0 = 11,
}
impl From<PIN_A> for u8 {
#[inline(always)]
fn from(variant: PIN_A) -> Self {
variant as _
}
}
impl PIN_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> Option<PIN_A> {
match self.bits {
11 => Some(PIN_A::TRACEDATA0),
_ => None,
}
}
#[doc = "Checks if the value of the field is `TRACEDATA0`"]
#[inline(always)]
pub fn is_tracedata0(&self) -> bool {
*self == PIN_A::TRACEDATA0
}
}
#[doc = "Field `PIN` writer - Pin number"]
pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TRACEDATA0_SPEC, u8, PIN_A, 5, O>;
impl<'a, const O: u8> PIN_W<'a, O> {
#[doc = "TRACEDATA0 pin"]
#[inline(always)]
pub fn tracedata0(self) -> &'a mut W {
self.variant(PIN_A::TRACEDATA0)
}
}
#[doc = "Field `CONNECT` reader - Connection"]
pub type CONNECT_R = crate::BitReader<CONNECT_A>;
#[doc = "Connection\n\nValue on reset: 1"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CONNECT_A {
#[doc = "1: Disconnect"]
DISCONNECTED = 1,
#[doc = "0: Connect"]
CONNECTED = 0,
}
impl From<CONNECT_A> for bool {
#[inline(always)]
fn from(variant: CONNECT_A) -> Self {
variant as u8 != 0
}
}
impl CONNECT_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> CONNECT_A {
match self.bits {
true => CONNECT_A::DISCONNECTED,
false => CONNECT_A::CONNECTED,
}
}
#[doc = "Checks if the value of the field is `DISCONNECTED`"]
#[inline(always)]
pub fn is_disconnected(&self) -> bool {
*self == CONNECT_A::DISCONNECTED
}
#[doc = "Checks if the value of the field is `CONNECTED`"]
#[inline(always)]
pub fn is_connected(&self) -> bool {
*self == CONNECT_A::CONNECTED
}
}
#[doc = "Field `CONNECT` writer - Connection"]
pub type CONNECT_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRACEDATA0_SPEC, CONNECT_A, O>;
impl<'a, const O: u8> CONNECT_W<'a, O> {
#[doc = "Disconnect"]
#[inline(always)]
pub fn disconnected(self) -> &'a mut W {
self.variant(CONNECT_A::DISCONNECTED)
}
#[doc = "Connect"]
#[inline(always)]
pub fn connected(self) -> &'a mut W {
self.variant(CONNECT_A::CONNECTED)
}
}
impl R {
#[doc = "Bits 0:4 - Pin number"]
#[inline(always)]
pub fn pin(&self) -> PIN_R {
PIN_R::new((self.bits & 0x1f) as u8)
}
#[doc = "Bit 31 - Connection"]
#[inline(always)]
pub fn connect(&self) -> CONNECT_R {
CONNECT_R::new(((self.bits >> 31) & 1) != 0)
}
}
impl W {
#[doc = "Bits 0:4 - Pin number"]
#[inline(always)]
pub fn pin(&mut self) -> PIN_W<0> {
PIN_W::new(self)
}
#[doc = "Bit 31 - Connection"]
#[inline(always)]
pub fn connect(&mut self) -> CONNECT_W<31> {
CONNECT_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Pin configuration for TRACEDATA\\[0\\]\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tracedata0](index.html) module"]
pub struct TRACEDATA0_SPEC;
impl crate::RegisterSpec for TRACEDATA0_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [tracedata0::R](R) reader structure"]
impl crate::Readable for TRACEDATA0_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [tracedata0::W](W) writer structure"]
impl crate::Writable for TRACEDATA0_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets TRACEDATA0 to value 0xffff_ffff"]
impl crate::Resettable for TRACEDATA0_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0xffff_ffff
}
}
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#[doc = "Register `TRACEDATA1` reader"]
pub struct R(crate::R<TRACEDATA1_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<TRACEDATA1_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<TRACEDATA1_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<TRACEDATA1_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `TRACEDATA1` writer"]
pub struct W(crate::W<TRACEDATA1_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<TRACEDATA1_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<TRACEDATA1_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<TRACEDATA1_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `PIN` reader - Pin number"]
pub type PIN_R = crate::FieldReader<u8, PIN_A>;
#[doc = "Pin number\n\nValue on reset: 31"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum PIN_A {
#[doc = "10: TRACEDATA1 pin"]
TRACEDATA1 = 10,
}
impl From<PIN_A> for u8 {
#[inline(always)]
fn from(variant: PIN_A) -> Self {
variant as _
}
}
impl PIN_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> Option<PIN_A> {
match self.bits {
10 => Some(PIN_A::TRACEDATA1),
_ => None,
}
}
#[doc = "Checks if the value of the field is `TRACEDATA1`"]
#[inline(always)]
pub fn is_tracedata1(&self) -> bool {
*self == PIN_A::TRACEDATA1
}
}
#[doc = "Field `PIN` writer - Pin number"]
pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TRACEDATA1_SPEC, u8, PIN_A, 5, O>;
impl<'a, const O: u8> PIN_W<'a, O> {
#[doc = "TRACEDATA1 pin"]
#[inline(always)]
pub fn tracedata1(self) -> &'a mut W {
self.variant(PIN_A::TRACEDATA1)
}
}
#[doc = "Field `CONNECT` reader - Connection"]
pub type CONNECT_R = crate::BitReader<CONNECT_A>;
#[doc = "Connection\n\nValue on reset: 1"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CONNECT_A {
#[doc = "1: Disconnect"]
DISCONNECTED = 1,
#[doc = "0: Connect"]
CONNECTED = 0,
}
impl From<CONNECT_A> for bool {
#[inline(always)]
fn from(variant: CONNECT_A) -> Self {
variant as u8 != 0
}
}
impl CONNECT_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> CONNECT_A {
match self.bits {
true => CONNECT_A::DISCONNECTED,
false => CONNECT_A::CONNECTED,
}
}
#[doc = "Checks if the value of the field is `DISCONNECTED`"]
#[inline(always)]
pub fn is_disconnected(&self) -> bool {
*self == CONNECT_A::DISCONNECTED
}
#[doc = "Checks if the value of the field is `CONNECTED`"]
#[inline(always)]
pub fn is_connected(&self) -> bool {
*self == CONNECT_A::CONNECTED
}
}
#[doc = "Field `CONNECT` writer - Connection"]
pub type CONNECT_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRACEDATA1_SPEC, CONNECT_A, O>;
impl<'a, const O: u8> CONNECT_W<'a, O> {
#[doc = "Disconnect"]
#[inline(always)]
pub fn disconnected(self) -> &'a mut W {
self.variant(CONNECT_A::DISCONNECTED)
}
#[doc = "Connect"]
#[inline(always)]
pub fn connected(self) -> &'a mut W {
self.variant(CONNECT_A::CONNECTED)
}
}
impl R {
#[doc = "Bits 0:4 - Pin number"]
#[inline(always)]
pub fn pin(&self) -> PIN_R {
PIN_R::new((self.bits & 0x1f) as u8)
}
#[doc = "Bit 31 - Connection"]
#[inline(always)]
pub fn connect(&self) -> CONNECT_R {
CONNECT_R::new(((self.bits >> 31) & 1) != 0)
}
}
impl W {
#[doc = "Bits 0:4 - Pin number"]
#[inline(always)]
pub fn pin(&mut self) -> PIN_W<0> {
PIN_W::new(self)
}
#[doc = "Bit 31 - Connection"]
#[inline(always)]
pub fn connect(&mut self) -> CONNECT_W<31> {
CONNECT_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Pin configuration for TRACEDATA\\[1\\]\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tracedata1](index.html) module"]
pub struct TRACEDATA1_SPEC;
impl crate::RegisterSpec for TRACEDATA1_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [tracedata1::R](R) reader structure"]
impl crate::Readable for TRACEDATA1_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [tracedata1::W](W) writer structure"]
impl crate::Writable for TRACEDATA1_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets TRACEDATA1 to value 0xffff_ffff"]
impl crate::Resettable for TRACEDATA1_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0xffff_ffff
}
}
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#[doc = "Register `TRACEDATA2` reader"]
pub struct R(crate::R<TRACEDATA2_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<TRACEDATA2_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<TRACEDATA2_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<TRACEDATA2_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `TRACEDATA2` writer"]
pub struct W(crate::W<TRACEDATA2_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<TRACEDATA2_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<TRACEDATA2_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<TRACEDATA2_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `PIN` reader - Pin number"]
pub type PIN_R = crate::FieldReader<u8, PIN_A>;
#[doc = "Pin number\n\nValue on reset: 31"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum PIN_A {
#[doc = "9: TRACEDATA2 pin"]
TRACEDATA2 = 9,
}
impl From<PIN_A> for u8 {
#[inline(always)]
fn from(variant: PIN_A) -> Self {
variant as _
}
}
impl PIN_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> Option<PIN_A> {
match self.bits {
9 => Some(PIN_A::TRACEDATA2),
_ => None,
}
}
#[doc = "Checks if the value of the field is `TRACEDATA2`"]
#[inline(always)]
pub fn is_tracedata2(&self) -> bool {
*self == PIN_A::TRACEDATA2
}
}
#[doc = "Field `PIN` writer - Pin number"]
pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TRACEDATA2_SPEC, u8, PIN_A, 5, O>;
impl<'a, const O: u8> PIN_W<'a, O> {
#[doc = "TRACEDATA2 pin"]
#[inline(always)]
pub fn tracedata2(self) -> &'a mut W {
self.variant(PIN_A::TRACEDATA2)
}
}
#[doc = "Field `CONNECT` reader - Connection"]
pub type CONNECT_R = crate::BitReader<CONNECT_A>;
#[doc = "Connection\n\nValue on reset: 1"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CONNECT_A {
#[doc = "1: Disconnect"]
DISCONNECTED = 1,
#[doc = "0: Connect"]
CONNECTED = 0,
}
impl From<CONNECT_A> for bool {
#[inline(always)]
fn from(variant: CONNECT_A) -> Self {
variant as u8 != 0
}
}
impl CONNECT_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> CONNECT_A {
match self.bits {
true => CONNECT_A::DISCONNECTED,
false => CONNECT_A::CONNECTED,
}
}
#[doc = "Checks if the value of the field is `DISCONNECTED`"]
#[inline(always)]
pub fn is_disconnected(&self) -> bool {
*self == CONNECT_A::DISCONNECTED
}
#[doc = "Checks if the value of the field is `CONNECTED`"]
#[inline(always)]
pub fn is_connected(&self) -> bool {
*self == CONNECT_A::CONNECTED
}
}
#[doc = "Field `CONNECT` writer - Connection"]
pub type CONNECT_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRACEDATA2_SPEC, CONNECT_A, O>;
impl<'a, const O: u8> CONNECT_W<'a, O> {
#[doc = "Disconnect"]
#[inline(always)]
pub fn disconnected(self) -> &'a mut W {
self.variant(CONNECT_A::DISCONNECTED)
}
#[doc = "Connect"]
#[inline(always)]
pub fn connected(self) -> &'a mut W {
self.variant(CONNECT_A::CONNECTED)
}
}
impl R {
#[doc = "Bits 0:4 - Pin number"]
#[inline(always)]
pub fn pin(&self) -> PIN_R {
PIN_R::new((self.bits & 0x1f) as u8)
}
#[doc = "Bit 31 - Connection"]
#[inline(always)]
pub fn connect(&self) -> CONNECT_R {
CONNECT_R::new(((self.bits >> 31) & 1) != 0)
}
}
impl W {
#[doc = "Bits 0:4 - Pin number"]
#[inline(always)]
pub fn pin(&mut self) -> PIN_W<0> {
PIN_W::new(self)
}
#[doc = "Bit 31 - Connection"]
#[inline(always)]
pub fn connect(&mut self) -> CONNECT_W<31> {
CONNECT_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Pin configuration for TRACEDATA\\[2\\]\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tracedata2](index.html) module"]
pub struct TRACEDATA2_SPEC;
impl crate::RegisterSpec for TRACEDATA2_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [tracedata2::R](R) reader structure"]
impl crate::Readable for TRACEDATA2_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [tracedata2::W](W) writer structure"]
impl crate::Writable for TRACEDATA2_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets TRACEDATA2 to value 0xffff_ffff"]
impl crate::Resettable for TRACEDATA2_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0xffff_ffff
}
}
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#[doc = "Register `TRACEDATA3` reader"]
pub struct R(crate::R<TRACEDATA3_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<TRACEDATA3_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<TRACEDATA3_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<TRACEDATA3_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `TRACEDATA3` writer"]
pub struct W(crate::W<TRACEDATA3_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<TRACEDATA3_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<TRACEDATA3_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<TRACEDATA3_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `PIN` reader - Pin number"]
pub type PIN_R = crate::FieldReader<u8, PIN_A>;
#[doc = "Pin number\n\nValue on reset: 31"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum PIN_A {
#[doc = "8: TRACEDATA3 pin"]
TRACEDATA3 = 8,
}
impl From<PIN_A> for u8 {
#[inline(always)]
fn from(variant: PIN_A) -> Self {
variant as _
}
}
impl PIN_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> Option<PIN_A> {
match self.bits {
8 => Some(PIN_A::TRACEDATA3),
_ => None,
}
}
#[doc = "Checks if the value of the field is `TRACEDATA3`"]
#[inline(always)]
pub fn is_tracedata3(&self) -> bool {
*self == PIN_A::TRACEDATA3
}
}
#[doc = "Field `PIN` writer - Pin number"]
pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TRACEDATA3_SPEC, u8, PIN_A, 5, O>;
impl<'a, const O: u8> PIN_W<'a, O> {
#[doc = "TRACEDATA3 pin"]
#[inline(always)]
pub fn tracedata3(self) -> &'a mut W {
self.variant(PIN_A::TRACEDATA3)
}
}
#[doc = "Field `CONNECT` reader - Connection"]
pub type CONNECT_R = crate::BitReader<CONNECT_A>;
#[doc = "Connection\n\nValue on reset: 1"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CONNECT_A {
#[doc = "1: Disconnect"]
DISCONNECTED = 1,
#[doc = "0: Connect"]
CONNECTED = 0,
}
impl From<CONNECT_A> for bool {
#[inline(always)]
fn from(variant: CONNECT_A) -> Self {
variant as u8 != 0
}
}
impl CONNECT_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> CONNECT_A {
match self.bits {
true => CONNECT_A::DISCONNECTED,
false => CONNECT_A::CONNECTED,
}
}
#[doc = "Checks if the value of the field is `DISCONNECTED`"]
#[inline(always)]
pub fn is_disconnected(&self) -> bool {
*self == CONNECT_A::DISCONNECTED
}
#[doc = "Checks if the value of the field is `CONNECTED`"]
#[inline(always)]
pub fn is_connected(&self) -> bool {
*self == CONNECT_A::CONNECTED
}
}
#[doc = "Field `CONNECT` writer - Connection"]
pub type CONNECT_W<'a, const O: u8> = crate::BitWriter<'a, u32, TRACEDATA3_SPEC, CONNECT_A, O>;
impl<'a, const O: u8> CONNECT_W<'a, O> {
#[doc = "Disconnect"]
#[inline(always)]
pub fn disconnected(self) -> &'a mut W {
self.variant(CONNECT_A::DISCONNECTED)
}
#[doc = "Connect"]
#[inline(always)]
pub fn connected(self) -> &'a mut W {
self.variant(CONNECT_A::CONNECTED)
}
}
impl R {
#[doc = "Bits 0:4 - Pin number"]
#[inline(always)]
pub fn pin(&self) -> PIN_R {
PIN_R::new((self.bits & 0x1f) as u8)
}
#[doc = "Bit 31 - Connection"]
#[inline(always)]
pub fn connect(&self) -> CONNECT_R {
CONNECT_R::new(((self.bits >> 31) & 1) != 0)
}
}
impl W {
#[doc = "Bits 0:4 - Pin number"]
#[inline(always)]
pub fn pin(&mut self) -> PIN_W<0> {
PIN_W::new(self)
}
#[doc = "Bit 31 - Connection"]
#[inline(always)]
pub fn connect(&mut self) -> CONNECT_W<31> {
CONNECT_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Pin configuration for TRACEDATA\\[3\\]\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tracedata3](index.html) module"]
pub struct TRACEDATA3_SPEC;
impl crate::RegisterSpec for TRACEDATA3_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [tracedata3::R](R) reader structure"]
impl crate::Readable for TRACEDATA3_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [tracedata3::W](W) writer structure"]
impl crate::Writable for TRACEDATA3_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets TRACEDATA3 to value 0xffff_ffff"]
impl crate::Resettable for TRACEDATA3_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0xffff_ffff
}
}
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#[doc = "Register `TRACEPORTSPEED` reader"]
pub struct R(crate::R<TRACEPORTSPEED_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<TRACEPORTSPEED_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<TRACEPORTSPEED_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<TRACEPORTSPEED_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `TRACEPORTSPEED` writer"]
pub struct W(crate::W<TRACEPORTSPEED_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<TRACEPORTSPEED_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<TRACEPORTSPEED_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<TRACEPORTSPEED_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `TRACEPORTSPEED` reader - Speed of Trace Port clock. Note that the TRACECLK pin output will be divided again by two from the Trace Port clock."]
pub type TRACEPORTSPEED_R = crate::FieldReader<u8, TRACEPORTSPEED_A>;
#[doc = "Speed of Trace Port clock. Note that the TRACECLK pin output will be divided again by two from the Trace Port clock.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
#[repr(u8)]
pub enum TRACEPORTSPEED_A {
#[doc = "0: Trace Port clock is: 64MHz"]
_64MHZ = 0,
#[doc = "1: Trace Port clock is: 32MHz"]
_32MHZ = 1,
#[doc = "2: Trace Port clock is: 16MHz"]
_16MHZ = 2,
#[doc = "3: Trace Port clock is: 8MHz"]
_8MHZ = 3,
}
impl From<TRACEPORTSPEED_A> for u8 {
#[inline(always)]
fn from(variant: TRACEPORTSPEED_A) -> Self {
variant as _
}
}
impl TRACEPORTSPEED_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub fn variant(&self) -> TRACEPORTSPEED_A {
match self.bits {
0 => TRACEPORTSPEED_A::_64MHZ,
1 => TRACEPORTSPEED_A::_32MHZ,
2 => TRACEPORTSPEED_A::_16MHZ,
3 => TRACEPORTSPEED_A::_8MHZ,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `_64MHZ`"]
#[inline(always)]
pub fn is_64mhz(&self) -> bool {
*self == TRACEPORTSPEED_A::_64MHZ
}
#[doc = "Checks if the value of the field is `_32MHZ`"]
#[inline(always)]
pub fn is_32mhz(&self) -> bool {
*self == TRACEPORTSPEED_A::_32MHZ
}
#[doc = "Checks if the value of the field is `_16MHZ`"]
#[inline(always)]
pub fn is_16mhz(&self) -> bool {
*self == TRACEPORTSPEED_A::_16MHZ
}
#[doc = "Checks if the value of the field is `_8MHZ`"]
#[inline(always)]
pub fn is_8mhz(&self) -> bool {
*self == TRACEPORTSPEED_A::_8MHZ
}
}
#[doc = "Field `TRACEPORTSPEED` writer - Speed of Trace Port clock. Note that the TRACECLK pin output will be divided again by two from the Trace Port clock."]
pub type TRACEPORTSPEED_W<'a, const O: u8> =
crate::FieldWriterSafe<'a, u32, TRACEPORTSPEED_SPEC, u8, TRACEPORTSPEED_A, 2, O>;
impl<'a, const O: u8> TRACEPORTSPEED_W<'a, O> {
#[doc = "Trace Port clock is: 64MHz"]
#[inline(always)]
pub fn _64mhz(self) -> &'a mut W {
self.variant(TRACEPORTSPEED_A::_64MHZ)
}
#[doc = "Trace Port clock is: 32MHz"]
#[inline(always)]
pub fn _32mhz(self) -> &'a mut W {
self.variant(TRACEPORTSPEED_A::_32MHZ)
}
#[doc = "Trace Port clock is: 16MHz"]
#[inline(always)]
pub fn _16mhz(self) -> &'a mut W {
self.variant(TRACEPORTSPEED_A::_16MHZ)
}
#[doc = "Trace Port clock is: 8MHz"]
#[inline(always)]
pub fn _8mhz(self) -> &'a mut W {
self.variant(TRACEPORTSPEED_A::_8MHZ)
}
}
impl R {
#[doc = "Bits 0:1 - Speed of Trace Port clock. Note that the TRACECLK pin output will be divided again by two from the Trace Port clock."]
#[inline(always)]
pub fn traceportspeed(&self) -> TRACEPORTSPEED_R {
TRACEPORTSPEED_R::new((self.bits & 3) as u8)
}
}
impl W {
#[doc = "Bits 0:1 - Speed of Trace Port clock. Note that the TRACECLK pin output will be divided again by two from the Trace Port clock."]
#[inline(always)]
pub fn traceportspeed(&mut self) -> TRACEPORTSPEED_W<0> {
TRACEPORTSPEED_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Clocking options for the Trace Port debug interface Reset behavior is the same as debug components\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [traceportspeed](index.html) module"]
pub struct TRACEPORTSPEED_SPEC;
impl crate::RegisterSpec for TRACEPORTSPEED_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [traceportspeed::R](R) reader structure"]
impl crate::Readable for TRACEPORTSPEED_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [traceportspeed::W](W) writer structure"]
impl crate::Writable for TRACEPORTSPEED_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets TRACEPORTSPEED to value 0"]
impl crate::Resettable for TRACEPORTSPEED_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}