feat: add display UI with splash screen, dashboard, and RSSI sparkline
Implement full SSD1306 OLED display support: - Splash screen on boot (1.5s) with project name, version, board - Dashboard showing radio state, config, counters, RSSI/SNR - RSSI history sparkline (64-sample ring buffer, 2px-wide bars) - DisplayOn/DisplayOff host commands routed via dedicated channel - Pure render functions against generic DrawTarget (no hardware coupling) - Display on/off control bypasses radio task entirely Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
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#[doc = r"Register block"]
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#[repr(C)]
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pub struct RegisterBlock {
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_reserved0: [u8; 0x04],
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#[doc = "0x04 - Start all trace and debug clocks."]
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pub clockstart: CLOCKSTART,
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#[doc = "0x08 - Stop all trace and debug clocks."]
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pub clockstop: CLOCKSTOP,
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_reserved2: [u8; 0x04f4],
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#[doc = "0x500 - Enable debug domain and aquire selected GPIOs"]
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pub enable: ENABLE,
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#[doc = "0x504..0x518 - Unspecified"]
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pub psel: PSEL,
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#[doc = "0x518 - Clocking options for the Trace Port debug interface Reset behavior is the same as debug components"]
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pub traceportspeed: TRACEPORTSPEED,
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}
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#[doc = "CLOCKSTART (w) register accessor: an alias for `Reg<CLOCKSTART_SPEC>`"]
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pub type CLOCKSTART = crate::Reg<clockstart::CLOCKSTART_SPEC>;
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#[doc = "Start all trace and debug clocks."]
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pub mod clockstart;
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#[doc = "CLOCKSTOP (w) register accessor: an alias for `Reg<CLOCKSTOP_SPEC>`"]
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pub type CLOCKSTOP = crate::Reg<clockstop::CLOCKSTOP_SPEC>;
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#[doc = "Stop all trace and debug clocks."]
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pub mod clockstop;
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#[doc = "ENABLE (rw) register accessor: an alias for `Reg<ENABLE_SPEC>`"]
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pub type ENABLE = crate::Reg<enable::ENABLE_SPEC>;
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#[doc = "Enable debug domain and aquire selected GPIOs"]
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pub mod enable;
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#[doc = "Unspecified"]
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pub use psel::PSEL;
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#[doc = r"Cluster"]
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#[doc = "Unspecified"]
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pub mod psel;
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#[doc = "TRACEPORTSPEED (rw) register accessor: an alias for `Reg<TRACEPORTSPEED_SPEC>`"]
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pub type TRACEPORTSPEED = crate::Reg<traceportspeed::TRACEPORTSPEED_SPEC>;
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#[doc = "Clocking options for the Trace Port debug interface Reset behavior is the same as debug components"]
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pub mod traceportspeed;
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