feat: add display UI with splash screen, dashboard, and RSSI sparkline

Implement full SSD1306 OLED display support:
- Splash screen on boot (1.5s) with project name, version, board
- Dashboard showing radio state, config, counters, RSSI/SNR
- RSSI history sparkline (64-sample ring buffer, 2px-wide bars)
- DisplayOn/DisplayOff host commands routed via dedicated channel
- Pure render functions against generic DrawTarget (no hardware coupling)
- Display on/off control bypasses radio task entirely

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>

vendor/nrf5340-app-pac/src/uicr_s/approtect.rs

@@ -0,0 +1,128 @@
+#[doc = "Register `APPROTECT` reader"]
+pub struct R(crate::R<APPROTECT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<APPROTECT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<APPROTECT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<APPROTECT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `APPROTECT` writer"]
+pub struct W(crate::W<APPROTECT_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<APPROTECT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<APPROTECT_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<APPROTECT_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `PALL` reader - Blocks debugger read/write access to all CPU registers and memory mapped addresses."]
+pub type PALL_R = crate::FieldReader<u32, PALL_A>;
+#[doc = "Blocks debugger read/write access to all CPU registers and memory mapped addresses.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u32)]
+pub enum PALL_A {
+    #[doc = "1358582010: Unprotected"]
+    UNPROTECTED = 1358582010,
+    #[doc = "0: Protected"]
+    PROTECTED = 0,
+}
+impl From<PALL_A> for u32 {
+    #[inline(always)]
+    fn from(variant: PALL_A) -> Self {
+        variant as _
+    }
+}
+impl PALL_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<PALL_A> {
+        match self.bits {
+            1358582010 => Some(PALL_A::UNPROTECTED),
+            0 => Some(PALL_A::PROTECTED),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `UNPROTECTED`"]
+    #[inline(always)]
+    pub fn is_unprotected(&self) -> bool {
+        *self == PALL_A::UNPROTECTED
+    }
+    #[doc = "Checks if the value of the field is `PROTECTED`"]
+    #[inline(always)]
+    pub fn is_protected(&self) -> bool {
+        *self == PALL_A::PROTECTED
+    }
+}
+#[doc = "Field `PALL` writer - Blocks debugger read/write access to all CPU registers and memory mapped addresses."]
+pub type PALL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, APPROTECT_SPEC, u32, PALL_A, 32, O>;
+impl<'a, const O: u8> PALL_W<'a, O> {
+    #[doc = "Unprotected"]
+    #[inline(always)]
+    pub fn unprotected(self) -> &'a mut W {
+        self.variant(PALL_A::UNPROTECTED)
+    }
+    #[doc = "Protected"]
+    #[inline(always)]
+    pub fn protected(self) -> &'a mut W {
+        self.variant(PALL_A::PROTECTED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:31 - Blocks debugger read/write access to all CPU registers and memory mapped addresses."]
+    #[inline(always)]
+    pub fn pall(&self) -> PALL_R {
+        PALL_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Blocks debugger read/write access to all CPU registers and memory mapped addresses."]
+    #[inline(always)]
+    pub fn pall(&mut self) -> PALL_W<0> {
+        PALL_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Access port protection\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [approtect](index.html) module"]
+pub struct APPROTECT_SPEC;
+impl crate::RegisterSpec for APPROTECT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [approtect::R](R) reader structure"]
+impl crate::Readable for APPROTECT_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [approtect::W](W) writer structure"]
+impl crate::Writable for APPROTECT_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets APPROTECT to value 0"]
+impl crate::Resettable for APPROTECT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/uicr_s/eraseprotect.rs

@@ -0,0 +1,129 @@
+#[doc = "Register `ERASEPROTECT` reader"]
+pub struct R(crate::R<ERASEPROTECT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ERASEPROTECT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ERASEPROTECT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ERASEPROTECT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ERASEPROTECT` writer"]
+pub struct W(crate::W<ERASEPROTECT_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ERASEPROTECT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ERASEPROTECT_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ERASEPROTECT_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `PALL` reader - Blocks NVMC ERASEALL and CTRLAP ERASEALL functionality. Using any value except Unprotected will lead to the protection being enabled."]
+pub type PALL_R = crate::FieldReader<u32, PALL_A>;
+#[doc = "Blocks NVMC ERASEALL and CTRLAP ERASEALL functionality. Using any value except Unprotected will lead to the protection being enabled.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u32)]
+pub enum PALL_A {
+    #[doc = "4294967295: Unprotected"]
+    UNPROTECTED = 4294967295,
+    #[doc = "0: Protected"]
+    PROTECTED = 0,
+}
+impl From<PALL_A> for u32 {
+    #[inline(always)]
+    fn from(variant: PALL_A) -> Self {
+        variant as _
+    }
+}
+impl PALL_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<PALL_A> {
+        match self.bits {
+            4294967295 => Some(PALL_A::UNPROTECTED),
+            0 => Some(PALL_A::PROTECTED),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `UNPROTECTED`"]
+    #[inline(always)]
+    pub fn is_unprotected(&self) -> bool {
+        *self == PALL_A::UNPROTECTED
+    }
+    #[doc = "Checks if the value of the field is `PROTECTED`"]
+    #[inline(always)]
+    pub fn is_protected(&self) -> bool {
+        *self == PALL_A::PROTECTED
+    }
+}
+#[doc = "Field `PALL` writer - Blocks NVMC ERASEALL and CTRLAP ERASEALL functionality. Using any value except Unprotected will lead to the protection being enabled."]
+pub type PALL_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, ERASEPROTECT_SPEC, u32, PALL_A, 32, O>;
+impl<'a, const O: u8> PALL_W<'a, O> {
+    #[doc = "Unprotected"]
+    #[inline(always)]
+    pub fn unprotected(self) -> &'a mut W {
+        self.variant(PALL_A::UNPROTECTED)
+    }
+    #[doc = "Protected"]
+    #[inline(always)]
+    pub fn protected(self) -> &'a mut W {
+        self.variant(PALL_A::PROTECTED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:31 - Blocks NVMC ERASEALL and CTRLAP ERASEALL functionality. Using any value except Unprotected will lead to the protection being enabled."]
+    #[inline(always)]
+    pub fn pall(&self) -> PALL_R {
+        PALL_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Blocks NVMC ERASEALL and CTRLAP ERASEALL functionality. Using any value except Unprotected will lead to the protection being enabled."]
+    #[inline(always)]
+    pub fn pall(&mut self) -> PALL_W<0> {
+        PALL_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Erase protection\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eraseprotect](index.html) module"]
+pub struct ERASEPROTECT_SPEC;
+impl crate::RegisterSpec for ERASEPROTECT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [eraseprotect::R](R) reader structure"]
+impl crate::Readable for ERASEPROTECT_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [eraseprotect::W](W) writer structure"]
+impl crate::Writable for ERASEPROTECT_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets ERASEPROTECT to value 0"]
+impl crate::Resettable for ERASEPROTECT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/uicr_s/hfxocnt.rs

@@ -0,0 +1,142 @@
+#[doc = "Register `HFXOCNT` reader"]
+pub struct R(crate::R<HFXOCNT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFXOCNT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFXOCNT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFXOCNT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `HFXOCNT` writer"]
+pub struct W(crate::W<HFXOCNT_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<HFXOCNT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<HFXOCNT_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<HFXOCNT_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `HFXOCNT` reader - HFXO startup counter. Total debounce time = HFXOCNT*64 us + 0.5 us"]
+pub type HFXOCNT_R = crate::FieldReader<u8, HFXOCNT_A>;
+#[doc = "HFXO startup counter. Total debounce time = HFXOCNT*64 us + 0.5 us\n\nValue on reset: 255"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum HFXOCNT_A {
+    #[doc = "0: Min debounce time = (0*64 us + 0.5 us)"]
+    MIN_DEBOUNCE_TIME = 0,
+    #[doc = "254: Max debounce time = (254*64 us + 0.5 us)"]
+    MAX_DEBOUNCE_TIME = 254,
+    #[doc = "255: Default debounce time for erased UICR = 4*64 us + 0.5 us"]
+    DEFAULT_DEBOUNCE_TIME = 255,
+}
+impl From<HFXOCNT_A> for u8 {
+    #[inline(always)]
+    fn from(variant: HFXOCNT_A) -> Self {
+        variant as _
+    }
+}
+impl HFXOCNT_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<HFXOCNT_A> {
+        match self.bits {
+            0 => Some(HFXOCNT_A::MIN_DEBOUNCE_TIME),
+            254 => Some(HFXOCNT_A::MAX_DEBOUNCE_TIME),
+            255 => Some(HFXOCNT_A::DEFAULT_DEBOUNCE_TIME),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `MIN_DEBOUNCE_TIME`"]
+    #[inline(always)]
+    pub fn is_min_debounce_time(&self) -> bool {
+        *self == HFXOCNT_A::MIN_DEBOUNCE_TIME
+    }
+    #[doc = "Checks if the value of the field is `MAX_DEBOUNCE_TIME`"]
+    #[inline(always)]
+    pub fn is_max_debounce_time(&self) -> bool {
+        *self == HFXOCNT_A::MAX_DEBOUNCE_TIME
+    }
+    #[doc = "Checks if the value of the field is `DEFAULT_DEBOUNCE_TIME`"]
+    #[inline(always)]
+    pub fn is_default_debounce_time(&self) -> bool {
+        *self == HFXOCNT_A::DEFAULT_DEBOUNCE_TIME
+    }
+}
+#[doc = "Field `HFXOCNT` writer - HFXO startup counter. Total debounce time = HFXOCNT*64 us + 0.5 us"]
+pub type HFXOCNT_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, HFXOCNT_SPEC, u8, HFXOCNT_A, 8, O>;
+impl<'a, const O: u8> HFXOCNT_W<'a, O> {
+    #[doc = "Min debounce time = (0*64 us + 0.5 us)"]
+    #[inline(always)]
+    pub fn min_debounce_time(self) -> &'a mut W {
+        self.variant(HFXOCNT_A::MIN_DEBOUNCE_TIME)
+    }
+    #[doc = "Max debounce time = (254*64 us + 0.5 us)"]
+    #[inline(always)]
+    pub fn max_debounce_time(self) -> &'a mut W {
+        self.variant(HFXOCNT_A::MAX_DEBOUNCE_TIME)
+    }
+    #[doc = "Default debounce time for erased UICR = 4*64 us + 0.5 us"]
+    #[inline(always)]
+    pub fn default_debounce_time(self) -> &'a mut W {
+        self.variant(HFXOCNT_A::DEFAULT_DEBOUNCE_TIME)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - HFXO startup counter. Total debounce time = HFXOCNT*64 us + 0.5 us"]
+    #[inline(always)]
+    pub fn hfxocnt(&self) -> HFXOCNT_R {
+        HFXOCNT_R::new((self.bits & 0xff) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - HFXO startup counter. Total debounce time = HFXOCNT*64 us + 0.5 us"]
+    #[inline(always)]
+    pub fn hfxocnt(&mut self) -> HFXOCNT_W<0> {
+        HFXOCNT_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "HFXO startup counter\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfxocnt](index.html) module"]
+pub struct HFXOCNT_SPEC;
+impl crate::RegisterSpec for HFXOCNT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfxocnt::R](R) reader structure"]
+impl crate::Readable for HFXOCNT_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [hfxocnt::W](W) writer structure"]
+impl crate::Writable for HFXOCNT_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets HFXOCNT to value 0xffff_ffff"]
+impl crate::Resettable for HFXOCNT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0xffff_ffff
+    }
+}

vendor/nrf5340-app-pac/src/uicr_s/keyslot.rs

@@ -0,0 +1,18 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct KEYSLOT {
+    #[doc = "0x00..0x400 - Unspecified"]
+    pub config: [CONFIG; 128],
+    #[doc = "0x400..0xc00 - Unspecified"]
+    pub key: [KEY; 128],
+}
+#[doc = "Unspecified"]
+pub use config::CONFIG;
+#[doc = r"Cluster"]
+#[doc = "Unspecified"]
+pub mod config;
+#[doc = "Unspecified"]
+pub use key::KEY;
+#[doc = r"Cluster"]
+#[doc = "Unspecified"]
+pub mod key;

vendor/nrf5340-app-pac/src/uicr_s/keyslot/config.rs

@@ -0,0 +1,16 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct CONFIG {
+    #[doc = "0x00 - Description cluster: Destination address where content of the key value registers (KEYSLOT.KEYn.VALUE\\[0-3\\]) will be pushed by KMU. Note that this address must match that of a peripherals APB mapped write-only key registers, else the KMU can push this key value into an address range which the CPU can potentially read."]
+    pub dest: DEST,
+    #[doc = "0x04 - Description cluster: Define permissions for the key slot. Bits 0-15 and 16-31 can only be written when equal to 0xFFFF."]
+    pub perm: PERM,
+}
+#[doc = "DEST (rw) register accessor: an alias for `Reg<DEST_SPEC>`"]
+pub type DEST = crate::Reg<dest::DEST_SPEC>;
+#[doc = "Description cluster: Destination address where content of the key value registers (KEYSLOT.KEYn.VALUE\\[0-3\\]) will be pushed by KMU. Note that this address must match that of a peripherals APB mapped write-only key registers, else the KMU can push this key value into an address range which the CPU can potentially read."]
+pub mod dest;
+#[doc = "PERM (rw) register accessor: an alias for `Reg<PERM_SPEC>`"]
+pub type PERM = crate::Reg<perm::PERM_SPEC>;
+#[doc = "Description cluster: Define permissions for the key slot. Bits 0-15 and 16-31 can only be written when equal to 0xFFFF."]
+pub mod perm;

vendor/nrf5340-app-pac/src/uicr_s/keyslot/config/dest.rs

@@ -0,0 +1,80 @@
+#[doc = "Register `DEST` reader"]
+pub struct R(crate::R<DEST_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<DEST_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<DEST_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<DEST_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `DEST` writer"]
+pub struct W(crate::W<DEST_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<DEST_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<DEST_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<DEST_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `DEST` reader - Secure APB destination address"]
+pub type DEST_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `DEST` writer - Secure APB destination address"]
+pub type DEST_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DEST_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - Secure APB destination address"]
+    #[inline(always)]
+    pub fn dest(&self) -> DEST_R {
+        DEST_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Secure APB destination address"]
+    #[inline(always)]
+    pub fn dest(&mut self) -> DEST_W<0> {
+        DEST_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description cluster: Destination address where content of the key value registers (KEYSLOT.KEYn.VALUE\\[0-3\\]) will be pushed by KMU. Note that this address must match that of a peripherals APB mapped write-only key registers, else the KMU can push this key value into an address range which the CPU can potentially read.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dest](index.html) module"]
+pub struct DEST_SPEC;
+impl crate::RegisterSpec for DEST_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [dest::R](R) reader structure"]
+impl crate::Readable for DEST_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [dest::W](W) writer structure"]
+impl crate::Writable for DEST_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets DEST to value 0xffff_ffff"]
+impl crate::Resettable for DEST_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0xffff_ffff
+    }
+}

vendor/nrf5340-app-pac/src/uicr_s/keyslot/config/perm.rs

@@ -0,0 +1,306 @@
+#[doc = "Register `PERM` reader"]
+pub struct R(crate::R<PERM_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PERM_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PERM_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PERM_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PERM` writer"]
+pub struct W(crate::W<PERM_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PERM_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PERM_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PERM_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `WRITE` reader - Write permission for key slot"]
+pub type WRITE_R = crate::BitReader<WRITE_A>;
+#[doc = "Write permission for key slot\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum WRITE_A {
+    #[doc = "0: Disable write to the key value registers"]
+    DISABLED = 0,
+    #[doc = "1: Enable write to the key value registers"]
+    ENABLED = 1,
+}
+impl From<WRITE_A> for bool {
+    #[inline(always)]
+    fn from(variant: WRITE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl WRITE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> WRITE_A {
+        match self.bits {
+            false => WRITE_A::DISABLED,
+            true => WRITE_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == WRITE_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == WRITE_A::ENABLED
+    }
+}
+#[doc = "Field `WRITE` writer - Write permission for key slot"]
+pub type WRITE_W<'a, const O: u8> = crate::BitWriter<'a, u32, PERM_SPEC, WRITE_A, O>;
+impl<'a, const O: u8> WRITE_W<'a, O> {
+    #[doc = "Disable write to the key value registers"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(WRITE_A::DISABLED)
+    }
+    #[doc = "Enable write to the key value registers"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(WRITE_A::ENABLED)
+    }
+}
+#[doc = "Field `READ` reader - Read permission for key slot"]
+pub type READ_R = crate::BitReader<READ_A>;
+#[doc = "Read permission for key slot\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum READ_A {
+    #[doc = "0: Disable read from key value registers"]
+    DISABLED = 0,
+    #[doc = "1: Enable read from key value registers"]
+    ENABLED = 1,
+}
+impl From<READ_A> for bool {
+    #[inline(always)]
+    fn from(variant: READ_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl READ_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> READ_A {
+        match self.bits {
+            false => READ_A::DISABLED,
+            true => READ_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == READ_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == READ_A::ENABLED
+    }
+}
+#[doc = "Field `READ` writer - Read permission for key slot"]
+pub type READ_W<'a, const O: u8> = crate::BitWriter<'a, u32, PERM_SPEC, READ_A, O>;
+impl<'a, const O: u8> READ_W<'a, O> {
+    #[doc = "Disable read from key value registers"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(READ_A::DISABLED)
+    }
+    #[doc = "Enable read from key value registers"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(READ_A::ENABLED)
+    }
+}
+#[doc = "Field `PUSH` reader - Push permission for key slot"]
+pub type PUSH_R = crate::BitReader<PUSH_A>;
+#[doc = "Push permission for key slot\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum PUSH_A {
+    #[doc = "0: Disable pushing of key value registers over secure APB, but can be read if field READ is Enabled"]
+    DISABLED = 0,
+    #[doc = "1: Enable pushing of key value registers over secure APB. Register KEYSLOT.CONFIGn.DEST must contain a valid destination address!"]
+    ENABLED = 1,
+}
+impl From<PUSH_A> for bool {
+    #[inline(always)]
+    fn from(variant: PUSH_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl PUSH_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> PUSH_A {
+        match self.bits {
+            false => PUSH_A::DISABLED,
+            true => PUSH_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == PUSH_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == PUSH_A::ENABLED
+    }
+}
+#[doc = "Field `PUSH` writer - Push permission for key slot"]
+pub type PUSH_W<'a, const O: u8> = crate::BitWriter<'a, u32, PERM_SPEC, PUSH_A, O>;
+impl<'a, const O: u8> PUSH_W<'a, O> {
+    #[doc = "Disable pushing of key value registers over secure APB, but can be read if field READ is Enabled"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(PUSH_A::DISABLED)
+    }
+    #[doc = "Enable pushing of key value registers over secure APB. Register KEYSLOT.CONFIGn.DEST must contain a valid destination address!"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(PUSH_A::ENABLED)
+    }
+}
+#[doc = "Field `STATE` reader - Revocation state for the key slot"]
+pub type STATE_R = crate::BitReader<STATE_A>;
+#[doc = "Revocation state for the key slot\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STATE_A {
+    #[doc = "0: Key value registers can no longer be read or pushed"]
+    REVOKED = 0,
+    #[doc = "1: Key value registers are readable (if enabled) and can be pushed (if enabled)"]
+    ACTIVE = 1,
+}
+impl From<STATE_A> for bool {
+    #[inline(always)]
+    fn from(variant: STATE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STATE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STATE_A {
+        match self.bits {
+            false => STATE_A::REVOKED,
+            true => STATE_A::ACTIVE,
+        }
+    }
+    #[doc = "Checks if the value of the field is `REVOKED`"]
+    #[inline(always)]
+    pub fn is_revoked(&self) -> bool {
+        *self == STATE_A::REVOKED
+    }
+    #[doc = "Checks if the value of the field is `ACTIVE`"]
+    #[inline(always)]
+    pub fn is_active(&self) -> bool {
+        *self == STATE_A::ACTIVE
+    }
+}
+#[doc = "Field `STATE` writer - Revocation state for the key slot"]
+pub type STATE_W<'a, const O: u8> = crate::BitWriter<'a, u32, PERM_SPEC, STATE_A, O>;
+impl<'a, const O: u8> STATE_W<'a, O> {
+    #[doc = "Key value registers can no longer be read or pushed"]
+    #[inline(always)]
+    pub fn revoked(self) -> &'a mut W {
+        self.variant(STATE_A::REVOKED)
+    }
+    #[doc = "Key value registers are readable (if enabled) and can be pushed (if enabled)"]
+    #[inline(always)]
+    pub fn active(self) -> &'a mut W {
+        self.variant(STATE_A::ACTIVE)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Write permission for key slot"]
+    #[inline(always)]
+    pub fn write(&self) -> WRITE_R {
+        WRITE_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Read permission for key slot"]
+    #[inline(always)]
+    pub fn read(&self) -> READ_R {
+        READ_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - Push permission for key slot"]
+    #[inline(always)]
+    pub fn push(&self) -> PUSH_R {
+        PUSH_R::new(((self.bits >> 2) & 1) != 0)
+    }
+    #[doc = "Bit 16 - Revocation state for the key slot"]
+    #[inline(always)]
+    pub fn state(&self) -> STATE_R {
+        STATE_R::new(((self.bits >> 16) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Write permission for key slot"]
+    #[inline(always)]
+    pub fn write(&mut self) -> WRITE_W<0> {
+        WRITE_W::new(self)
+    }
+    #[doc = "Bit 1 - Read permission for key slot"]
+    #[inline(always)]
+    pub fn read(&mut self) -> READ_W<1> {
+        READ_W::new(self)
+    }
+    #[doc = "Bit 2 - Push permission for key slot"]
+    #[inline(always)]
+    pub fn push(&mut self) -> PUSH_W<2> {
+        PUSH_W::new(self)
+    }
+    #[doc = "Bit 16 - Revocation state for the key slot"]
+    #[inline(always)]
+    pub fn state(&mut self) -> STATE_W<16> {
+        STATE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description cluster: Define permissions for the key slot. Bits 0-15 and 16-31 can only be written when equal to 0xFFFF.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [perm](index.html) module"]
+pub struct PERM_SPEC;
+impl crate::RegisterSpec for PERM_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [perm::R](R) reader structure"]
+impl crate::Readable for PERM_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [perm::W](W) writer structure"]
+impl crate::Writable for PERM_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PERM to value 0xffff_ffff"]
+impl crate::Resettable for PERM_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0xffff_ffff
+    }
+}

vendor/nrf5340-app-pac/src/uicr_s/keyslot/key.rs

@@ -0,0 +1,12 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct KEY {
+    #[doc = "0x00..0x10 - Description collection: Define bits \\[31+o*32:0+o*32\\]
+of value assigned to KMU key slot."]
+    pub value: [VALUE; 4],
+}
+#[doc = "VALUE (rw) register accessor: an alias for `Reg<VALUE_SPEC>`"]
+pub type VALUE = crate::Reg<value::VALUE_SPEC>;
+#[doc = "Description collection: Define bits \\[31+o*32:0+o*32\\]
+of value assigned to KMU key slot."]
+pub mod value;

vendor/nrf5340-app-pac/src/uicr_s/keyslot/key/value.rs

@@ -0,0 +1,86 @@
+#[doc = "Register `VALUE[%s]` reader"]
+pub struct R(crate::R<VALUE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<VALUE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<VALUE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<VALUE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `VALUE[%s]` writer"]
+pub struct W(crate::W<VALUE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<VALUE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<VALUE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<VALUE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `VALUE` reader - Define bits \\[31+o*32:0+o*32\\]
+of value assigned to KMU key slot"]
+pub type VALUE_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `VALUE` writer - Define bits \\[31+o*32:0+o*32\\]
+of value assigned to KMU key slot"]
+pub type VALUE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, VALUE_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - Define bits \\[31+o*32:0+o*32\\]
+of value assigned to KMU key slot"]
+    #[inline(always)]
+    pub fn value(&self) -> VALUE_R {
+        VALUE_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Define bits \\[31+o*32:0+o*32\\]
+of value assigned to KMU key slot"]
+    #[inline(always)]
+    pub fn value(&mut self) -> VALUE_W<0> {
+        VALUE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description collection: Define bits \\[31+o*32:0+o*32\\]
+of value assigned to KMU key slot.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [value](index.html) module"]
+pub struct VALUE_SPEC;
+impl crate::RegisterSpec for VALUE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [value::R](R) reader structure"]
+impl crate::Readable for VALUE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [value::W](W) writer structure"]
+impl crate::Writable for VALUE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets VALUE[%s]
+to value 0xffff_ffff"]
+impl crate::Resettable for VALUE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0xffff_ffff
+    }
+}

vendor/nrf5340-app-pac/src/uicr_s/nfcpins.rs

@@ -0,0 +1,126 @@
+#[doc = "Register `NFCPINS` reader"]
+pub struct R(crate::R<NFCPINS_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<NFCPINS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<NFCPINS_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<NFCPINS_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `NFCPINS` writer"]
+pub struct W(crate::W<NFCPINS_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<NFCPINS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<NFCPINS_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<NFCPINS_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `PROTECT` reader - Setting of pins dedicated to NFC functionality"]
+pub type PROTECT_R = crate::BitReader<PROTECT_A>;
+#[doc = "Setting of pins dedicated to NFC functionality\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum PROTECT_A {
+    #[doc = "0: Operation as GPIO pins. Same protection as normal GPIO pins"]
+    DISABLED = 0,
+    #[doc = "1: Operation as NFC antenna pins. Configures the protection for NFC operation"]
+    NFC = 1,
+}
+impl From<PROTECT_A> for bool {
+    #[inline(always)]
+    fn from(variant: PROTECT_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl PROTECT_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> PROTECT_A {
+        match self.bits {
+            false => PROTECT_A::DISABLED,
+            true => PROTECT_A::NFC,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == PROTECT_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `NFC`"]
+    #[inline(always)]
+    pub fn is_nfc(&self) -> bool {
+        *self == PROTECT_A::NFC
+    }
+}
+#[doc = "Field `PROTECT` writer - Setting of pins dedicated to NFC functionality"]
+pub type PROTECT_W<'a, const O: u8> = crate::BitWriter<'a, u32, NFCPINS_SPEC, PROTECT_A, O>;
+impl<'a, const O: u8> PROTECT_W<'a, O> {
+    #[doc = "Operation as GPIO pins. Same protection as normal GPIO pins"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(PROTECT_A::DISABLED)
+    }
+    #[doc = "Operation as NFC antenna pins. Configures the protection for NFC operation"]
+    #[inline(always)]
+    pub fn nfc(self) -> &'a mut W {
+        self.variant(PROTECT_A::NFC)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Setting of pins dedicated to NFC functionality"]
+    #[inline(always)]
+    pub fn protect(&self) -> PROTECT_R {
+        PROTECT_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Setting of pins dedicated to NFC functionality"]
+    #[inline(always)]
+    pub fn protect(&mut self) -> PROTECT_W<0> {
+        PROTECT_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Setting of pins dedicated to NFC functionality: NFC antenna or GPIO\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [nfcpins](index.html) module"]
+pub struct NFCPINS_SPEC;
+impl crate::RegisterSpec for NFCPINS_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [nfcpins::R](R) reader structure"]
+impl crate::Readable for NFCPINS_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [nfcpins::W](W) writer structure"]
+impl crate::Writable for NFCPINS_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets NFCPINS to value 0xffff_ffff"]
+impl crate::Resettable for NFCPINS_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0xffff_ffff
+    }
+}

vendor/nrf5340-app-pac/src/uicr_s/otp.rs

@@ -0,0 +1,95 @@
+#[doc = "Register `OTP[%s]` reader"]
+pub struct R(crate::R<OTP_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<OTP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<OTP_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<OTP_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `OTP[%s]` writer"]
+pub struct W(crate::W<OTP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<OTP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<OTP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<OTP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `LOWER` reader - Lower half word"]
+pub type LOWER_R = crate::FieldReader<u16, u16>;
+#[doc = "Field `LOWER` writer - Lower half word"]
+pub type LOWER_W<'a, const O: u8> = crate::FieldWriter<'a, u32, OTP_SPEC, u16, u16, 16, O>;
+#[doc = "Field `UPPER` reader - Upper half word"]
+pub type UPPER_R = crate::FieldReader<u16, u16>;
+#[doc = "Field `UPPER` writer - Upper half word"]
+pub type UPPER_W<'a, const O: u8> = crate::FieldWriter<'a, u32, OTP_SPEC, u16, u16, 16, O>;
+impl R {
+    #[doc = "Bits 0:15 - Lower half word"]
+    #[inline(always)]
+    pub fn lower(&self) -> LOWER_R {
+        LOWER_R::new((self.bits & 0xffff) as u16)
+    }
+    #[doc = "Bits 16:31 - Upper half word"]
+    #[inline(always)]
+    pub fn upper(&self) -> UPPER_R {
+        UPPER_R::new(((self.bits >> 16) & 0xffff) as u16)
+    }
+}
+impl W {
+    #[doc = "Bits 0:15 - Lower half word"]
+    #[inline(always)]
+    pub fn lower(&mut self) -> LOWER_W<0> {
+        LOWER_W::new(self)
+    }
+    #[doc = "Bits 16:31 - Upper half word"]
+    #[inline(always)]
+    pub fn upper(&mut self) -> UPPER_W<16> {
+        UPPER_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description collection: One time programmable memory\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [otp](index.html) module"]
+pub struct OTP_SPEC;
+impl crate::RegisterSpec for OTP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [otp::R](R) reader structure"]
+impl crate::Readable for OTP_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [otp::W](W) writer structure"]
+impl crate::Writable for OTP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets OTP[%s]
+to value 0xffff_ffff"]
+impl crate::Resettable for OTP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0xffff_ffff
+    }
+}

vendor/nrf5340-app-pac/src/uicr_s/secureapprotect.rs

@@ -0,0 +1,129 @@
+#[doc = "Register `SECUREAPPROTECT` reader"]
+pub struct R(crate::R<SECUREAPPROTECT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SECUREAPPROTECT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SECUREAPPROTECT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SECUREAPPROTECT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SECUREAPPROTECT` writer"]
+pub struct W(crate::W<SECUREAPPROTECT_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SECUREAPPROTECT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SECUREAPPROTECT_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SECUREAPPROTECT_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `PALL` reader - Blocks debugger read/write access to all secure CPU registers and secure memory mapped addresses."]
+pub type PALL_R = crate::FieldReader<u32, PALL_A>;
+#[doc = "Blocks debugger read/write access to all secure CPU registers and secure memory mapped addresses.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u32)]
+pub enum PALL_A {
+    #[doc = "1358582010: Unprotected"]
+    UNPROTECTED = 1358582010,
+    #[doc = "0: Protected"]
+    PROTECTED = 0,
+}
+impl From<PALL_A> for u32 {
+    #[inline(always)]
+    fn from(variant: PALL_A) -> Self {
+        variant as _
+    }
+}
+impl PALL_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<PALL_A> {
+        match self.bits {
+            1358582010 => Some(PALL_A::UNPROTECTED),
+            0 => Some(PALL_A::PROTECTED),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `UNPROTECTED`"]
+    #[inline(always)]
+    pub fn is_unprotected(&self) -> bool {
+        *self == PALL_A::UNPROTECTED
+    }
+    #[doc = "Checks if the value of the field is `PROTECTED`"]
+    #[inline(always)]
+    pub fn is_protected(&self) -> bool {
+        *self == PALL_A::PROTECTED
+    }
+}
+#[doc = "Field `PALL` writer - Blocks debugger read/write access to all secure CPU registers and secure memory mapped addresses."]
+pub type PALL_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, SECUREAPPROTECT_SPEC, u32, PALL_A, 32, O>;
+impl<'a, const O: u8> PALL_W<'a, O> {
+    #[doc = "Unprotected"]
+    #[inline(always)]
+    pub fn unprotected(self) -> &'a mut W {
+        self.variant(PALL_A::UNPROTECTED)
+    }
+    #[doc = "Protected"]
+    #[inline(always)]
+    pub fn protected(self) -> &'a mut W {
+        self.variant(PALL_A::PROTECTED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:31 - Blocks debugger read/write access to all secure CPU registers and secure memory mapped addresses."]
+    #[inline(always)]
+    pub fn pall(&self) -> PALL_R {
+        PALL_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Blocks debugger read/write access to all secure CPU registers and secure memory mapped addresses."]
+    #[inline(always)]
+    pub fn pall(&mut self) -> PALL_W<0> {
+        PALL_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Secure access port protection\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [secureapprotect](index.html) module"]
+pub struct SECUREAPPROTECT_SPEC;
+impl crate::RegisterSpec for SECUREAPPROTECT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [secureapprotect::R](R) reader structure"]
+impl crate::Readable for SECUREAPPROTECT_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [secureapprotect::W](W) writer structure"]
+impl crate::Writable for SECUREAPPROTECT_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SECUREAPPROTECT to value 0"]
+impl crate::Resettable for SECUREAPPROTECT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-app-pac/src/uicr_s/tinstance.rs

@@ -0,0 +1,80 @@
+#[doc = "Register `TINSTANCE` reader"]
+pub struct R(crate::R<TINSTANCE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<TINSTANCE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<TINSTANCE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<TINSTANCE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `TINSTANCE` writer"]
+pub struct W(crate::W<TINSTANCE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TINSTANCE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TINSTANCE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TINSTANCE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `TINSTANCE` reader - TINSTANCE bits are negated and used in the SW-DP DLPIDR.TINSTANCE field. E.g. 0xF in this field is translated to 0x0 in DLPIDR.TINSTANCE field."]
+pub type TINSTANCE_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `TINSTANCE` writer - TINSTANCE bits are negated and used in the SW-DP DLPIDR.TINSTANCE field. E.g. 0xF in this field is translated to 0x0 in DLPIDR.TINSTANCE field."]
+pub type TINSTANCE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TINSTANCE_SPEC, u8, u8, 4, O>;
+impl R {
+    #[doc = "Bits 28:31 - TINSTANCE bits are negated and used in the SW-DP DLPIDR.TINSTANCE field. E.g. 0xF in this field is translated to 0x0 in DLPIDR.TINSTANCE field."]
+    #[inline(always)]
+    pub fn tinstance(&self) -> TINSTANCE_R {
+        TINSTANCE_R::new(((self.bits >> 28) & 0x0f) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 28:31 - TINSTANCE bits are negated and used in the SW-DP DLPIDR.TINSTANCE field. E.g. 0xF in this field is translated to 0x0 in DLPIDR.TINSTANCE field."]
+    #[inline(always)]
+    pub fn tinstance(&mut self) -> TINSTANCE_W<28> {
+        TINSTANCE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "SW-DP Target instance\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tinstance](index.html) module"]
+pub struct TINSTANCE_SPEC;
+impl crate::RegisterSpec for TINSTANCE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [tinstance::R](R) reader structure"]
+impl crate::Readable for TINSTANCE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [tinstance::W](W) writer structure"]
+impl crate::Writable for TINSTANCE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TINSTANCE to value 0xffff_ffff"]
+impl crate::Resettable for TINSTANCE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0xffff_ffff
+    }
+}

vendor/nrf5340-app-pac/src/uicr_s/vreghvout.rs

@@ -0,0 +1,194 @@
+#[doc = "Register `VREGHVOUT` reader"]
+pub struct R(crate::R<VREGHVOUT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<VREGHVOUT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<VREGHVOUT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<VREGHVOUT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `VREGHVOUT` writer"]
+pub struct W(crate::W<VREGHVOUT_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<VREGHVOUT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<VREGHVOUT_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<VREGHVOUT_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `VREGHVOUT` reader - VREGH regulator output voltage."]
+pub type VREGHVOUT_R = crate::FieldReader<u8, VREGHVOUT_A>;
+#[doc = "VREGH regulator output voltage.\n\nValue on reset: 7"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum VREGHVOUT_A {
+    #[doc = "0: 1.8 V"]
+    _1V8 = 0,
+    #[doc = "1: 2.1 V"]
+    _2V1 = 1,
+    #[doc = "2: 2.4 V"]
+    _2V4 = 2,
+    #[doc = "3: 2.7 V"]
+    _2V7 = 3,
+    #[doc = "4: 3.0 V"]
+    _3V0 = 4,
+    #[doc = "5: 3.3 V"]
+    _3V3 = 5,
+    #[doc = "7: Default voltage: 1.8 V"]
+    DEFAULT = 7,
+}
+impl From<VREGHVOUT_A> for u8 {
+    #[inline(always)]
+    fn from(variant: VREGHVOUT_A) -> Self {
+        variant as _
+    }
+}
+impl VREGHVOUT_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<VREGHVOUT_A> {
+        match self.bits {
+            0 => Some(VREGHVOUT_A::_1V8),
+            1 => Some(VREGHVOUT_A::_2V1),
+            2 => Some(VREGHVOUT_A::_2V4),
+            3 => Some(VREGHVOUT_A::_2V7),
+            4 => Some(VREGHVOUT_A::_3V0),
+            5 => Some(VREGHVOUT_A::_3V3),
+            7 => Some(VREGHVOUT_A::DEFAULT),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `_1V8`"]
+    #[inline(always)]
+    pub fn is_1v8(&self) -> bool {
+        *self == VREGHVOUT_A::_1V8
+    }
+    #[doc = "Checks if the value of the field is `_2V1`"]
+    #[inline(always)]
+    pub fn is_2v1(&self) -> bool {
+        *self == VREGHVOUT_A::_2V1
+    }
+    #[doc = "Checks if the value of the field is `_2V4`"]
+    #[inline(always)]
+    pub fn is_2v4(&self) -> bool {
+        *self == VREGHVOUT_A::_2V4
+    }
+    #[doc = "Checks if the value of the field is `_2V7`"]
+    #[inline(always)]
+    pub fn is_2v7(&self) -> bool {
+        *self == VREGHVOUT_A::_2V7
+    }
+    #[doc = "Checks if the value of the field is `_3V0`"]
+    #[inline(always)]
+    pub fn is_3v0(&self) -> bool {
+        *self == VREGHVOUT_A::_3V0
+    }
+    #[doc = "Checks if the value of the field is `_3V3`"]
+    #[inline(always)]
+    pub fn is_3v3(&self) -> bool {
+        *self == VREGHVOUT_A::_3V3
+    }
+    #[doc = "Checks if the value of the field is `DEFAULT`"]
+    #[inline(always)]
+    pub fn is_default(&self) -> bool {
+        *self == VREGHVOUT_A::DEFAULT
+    }
+}
+#[doc = "Field `VREGHVOUT` writer - VREGH regulator output voltage."]
+pub type VREGHVOUT_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, VREGHVOUT_SPEC, u8, VREGHVOUT_A, 3, O>;
+impl<'a, const O: u8> VREGHVOUT_W<'a, O> {
+    #[doc = "1.8 V"]
+    #[inline(always)]
+    pub fn _1v8(self) -> &'a mut W {
+        self.variant(VREGHVOUT_A::_1V8)
+    }
+    #[doc = "2.1 V"]
+    #[inline(always)]
+    pub fn _2v1(self) -> &'a mut W {
+        self.variant(VREGHVOUT_A::_2V1)
+    }
+    #[doc = "2.4 V"]
+    #[inline(always)]
+    pub fn _2v4(self) -> &'a mut W {
+        self.variant(VREGHVOUT_A::_2V4)
+    }
+    #[doc = "2.7 V"]
+    #[inline(always)]
+    pub fn _2v7(self) -> &'a mut W {
+        self.variant(VREGHVOUT_A::_2V7)
+    }
+    #[doc = "3.0 V"]
+    #[inline(always)]
+    pub fn _3v0(self) -> &'a mut W {
+        self.variant(VREGHVOUT_A::_3V0)
+    }
+    #[doc = "3.3 V"]
+    #[inline(always)]
+    pub fn _3v3(self) -> &'a mut W {
+        self.variant(VREGHVOUT_A::_3V3)
+    }
+    #[doc = "Default voltage: 1.8 V"]
+    #[inline(always)]
+    pub fn default(self) -> &'a mut W {
+        self.variant(VREGHVOUT_A::DEFAULT)
+    }
+}
+impl R {
+    #[doc = "Bits 0:2 - VREGH regulator output voltage."]
+    #[inline(always)]
+    pub fn vreghvout(&self) -> VREGHVOUT_R {
+        VREGHVOUT_R::new((self.bits & 7) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:2 - VREGH regulator output voltage."]
+    #[inline(always)]
+    pub fn vreghvout(&mut self) -> VREGHVOUT_W<0> {
+        VREGHVOUT_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Output voltage from the high voltage (VREGH) regulator stage. The maximum output voltage from this stage is given as VDDH - VREGHDROP.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [vreghvout](index.html) module"]
+pub struct VREGHVOUT_SPEC;
+impl crate::RegisterSpec for VREGHVOUT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [vreghvout::R](R) reader structure"]
+impl crate::Readable for VREGHVOUT_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [vreghvout::W](W) writer structure"]
+impl crate::Writable for VREGHVOUT_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets VREGHVOUT to value 0xffff_ffff"]
+impl crate::Resettable for VREGHVOUT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0xffff_ffff
+    }
+}