feat: add display UI with splash screen, dashboard, and RSSI sparkline

Implement full SSD1306 OLED display support:
- Splash screen on boot (1.5s) with project name, version, board
- Dashboard showing radio state, config, counters, RSSI/SNR
- RSSI history sparkline (64-sample ring buffer, 2px-wide bars)
- DisplayOn/DisplayOff host commands routed via dedicated channel
- Pure render functions against generic DrawTarget (no hardware coupling)
- Display on/off control bypasses radio task entirely

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>

vendor/nrf5340-net-pac/src/aar_ns.rs

@@ -0,0 +1,121 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct RegisterBlock {
+    #[doc = "0x00 - Start resolving addresses based on IRKs specified in the IRK data structure"]
+    pub tasks_start: TASKS_START,
+    _reserved1: [u8; 0x04],
+    #[doc = "0x08 - Stop resolving addresses"]
+    pub tasks_stop: TASKS_STOP,
+    _reserved2: [u8; 0x74],
+    #[doc = "0x80 - Subscribe configuration for task START"]
+    pub subscribe_start: SUBSCRIBE_START,
+    _reserved3: [u8; 0x04],
+    #[doc = "0x88 - Subscribe configuration for task STOP"]
+    pub subscribe_stop: SUBSCRIBE_STOP,
+    _reserved4: [u8; 0x74],
+    #[doc = "0x100 - Address resolution procedure complete"]
+    pub events_end: EVENTS_END,
+    #[doc = "0x104 - Address resolved"]
+    pub events_resolved: EVENTS_RESOLVED,
+    #[doc = "0x108 - Address not resolved"]
+    pub events_notresolved: EVENTS_NOTRESOLVED,
+    _reserved7: [u8; 0x74],
+    #[doc = "0x180 - Publish configuration for event END"]
+    pub publish_end: PUBLISH_END,
+    #[doc = "0x184 - Publish configuration for event RESOLVED"]
+    pub publish_resolved: PUBLISH_RESOLVED,
+    #[doc = "0x188 - Publish configuration for event NOTRESOLVED"]
+    pub publish_notresolved: PUBLISH_NOTRESOLVED,
+    _reserved10: [u8; 0x0178],
+    #[doc = "0x304 - Enable interrupt"]
+    pub intenset: INTENSET,
+    #[doc = "0x308 - Disable interrupt"]
+    pub intenclr: INTENCLR,
+    _reserved12: [u8; 0xf4],
+    #[doc = "0x400 - Resolution status"]
+    pub status: STATUS,
+    _reserved13: [u8; 0xfc],
+    #[doc = "0x500 - Enable AAR"]
+    pub enable: ENABLE,
+    #[doc = "0x504 - Number of IRKs"]
+    pub nirk: NIRK,
+    #[doc = "0x508 - Pointer to IRK data structure"]
+    pub irkptr: IRKPTR,
+    _reserved16: [u8; 0x04],
+    #[doc = "0x510 - Pointer to the resolvable address"]
+    pub addrptr: ADDRPTR,
+    #[doc = "0x514 - Pointer to data area used for temporary storage"]
+    pub scratchptr: SCRATCHPTR,
+}
+#[doc = "TASKS_START (w) register accessor: an alias for `Reg<TASKS_START_SPEC>`"]
+pub type TASKS_START = crate::Reg<tasks_start::TASKS_START_SPEC>;
+#[doc = "Start resolving addresses based on IRKs specified in the IRK data structure"]
+pub mod tasks_start;
+#[doc = "TASKS_STOP (w) register accessor: an alias for `Reg<TASKS_STOP_SPEC>`"]
+pub type TASKS_STOP = crate::Reg<tasks_stop::TASKS_STOP_SPEC>;
+#[doc = "Stop resolving addresses"]
+pub mod tasks_stop;
+#[doc = "SUBSCRIBE_START (rw) register accessor: an alias for `Reg<SUBSCRIBE_START_SPEC>`"]
+pub type SUBSCRIBE_START = crate::Reg<subscribe_start::SUBSCRIBE_START_SPEC>;
+#[doc = "Subscribe configuration for task START"]
+pub mod subscribe_start;
+#[doc = "SUBSCRIBE_STOP (rw) register accessor: an alias for `Reg<SUBSCRIBE_STOP_SPEC>`"]
+pub type SUBSCRIBE_STOP = crate::Reg<subscribe_stop::SUBSCRIBE_STOP_SPEC>;
+#[doc = "Subscribe configuration for task STOP"]
+pub mod subscribe_stop;
+#[doc = "EVENTS_END (rw) register accessor: an alias for `Reg<EVENTS_END_SPEC>`"]
+pub type EVENTS_END = crate::Reg<events_end::EVENTS_END_SPEC>;
+#[doc = "Address resolution procedure complete"]
+pub mod events_end;
+#[doc = "EVENTS_RESOLVED (rw) register accessor: an alias for `Reg<EVENTS_RESOLVED_SPEC>`"]
+pub type EVENTS_RESOLVED = crate::Reg<events_resolved::EVENTS_RESOLVED_SPEC>;
+#[doc = "Address resolved"]
+pub mod events_resolved;
+#[doc = "EVENTS_NOTRESOLVED (rw) register accessor: an alias for `Reg<EVENTS_NOTRESOLVED_SPEC>`"]
+pub type EVENTS_NOTRESOLVED = crate::Reg<events_notresolved::EVENTS_NOTRESOLVED_SPEC>;
+#[doc = "Address not resolved"]
+pub mod events_notresolved;
+#[doc = "PUBLISH_END (rw) register accessor: an alias for `Reg<PUBLISH_END_SPEC>`"]
+pub type PUBLISH_END = crate::Reg<publish_end::PUBLISH_END_SPEC>;
+#[doc = "Publish configuration for event END"]
+pub mod publish_end;
+#[doc = "PUBLISH_RESOLVED (rw) register accessor: an alias for `Reg<PUBLISH_RESOLVED_SPEC>`"]
+pub type PUBLISH_RESOLVED = crate::Reg<publish_resolved::PUBLISH_RESOLVED_SPEC>;
+#[doc = "Publish configuration for event RESOLVED"]
+pub mod publish_resolved;
+#[doc = "PUBLISH_NOTRESOLVED (rw) register accessor: an alias for `Reg<PUBLISH_NOTRESOLVED_SPEC>`"]
+pub type PUBLISH_NOTRESOLVED = crate::Reg<publish_notresolved::PUBLISH_NOTRESOLVED_SPEC>;
+#[doc = "Publish configuration for event NOTRESOLVED"]
+pub mod publish_notresolved;
+#[doc = "INTENSET (rw) register accessor: an alias for `Reg<INTENSET_SPEC>`"]
+pub type INTENSET = crate::Reg<intenset::INTENSET_SPEC>;
+#[doc = "Enable interrupt"]
+pub mod intenset;
+#[doc = "INTENCLR (rw) register accessor: an alias for `Reg<INTENCLR_SPEC>`"]
+pub type INTENCLR = crate::Reg<intenclr::INTENCLR_SPEC>;
+#[doc = "Disable interrupt"]
+pub mod intenclr;
+#[doc = "STATUS (r) register accessor: an alias for `Reg<STATUS_SPEC>`"]
+pub type STATUS = crate::Reg<status::STATUS_SPEC>;
+#[doc = "Resolution status"]
+pub mod status;
+#[doc = "ENABLE (rw) register accessor: an alias for `Reg<ENABLE_SPEC>`"]
+pub type ENABLE = crate::Reg<enable::ENABLE_SPEC>;
+#[doc = "Enable AAR"]
+pub mod enable;
+#[doc = "NIRK (rw) register accessor: an alias for `Reg<NIRK_SPEC>`"]
+pub type NIRK = crate::Reg<nirk::NIRK_SPEC>;
+#[doc = "Number of IRKs"]
+pub mod nirk;
+#[doc = "IRKPTR (rw) register accessor: an alias for `Reg<IRKPTR_SPEC>`"]
+pub type IRKPTR = crate::Reg<irkptr::IRKPTR_SPEC>;
+#[doc = "Pointer to IRK data structure"]
+pub mod irkptr;
+#[doc = "ADDRPTR (rw) register accessor: an alias for `Reg<ADDRPTR_SPEC>`"]
+pub type ADDRPTR = crate::Reg<addrptr::ADDRPTR_SPEC>;
+#[doc = "Pointer to the resolvable address"]
+pub mod addrptr;
+#[doc = "SCRATCHPTR (rw) register accessor: an alias for `Reg<SCRATCHPTR_SPEC>`"]
+pub type SCRATCHPTR = crate::Reg<scratchptr::SCRATCHPTR_SPEC>;
+#[doc = "Pointer to data area used for temporary storage"]
+pub mod scratchptr;

vendor/nrf5340-net-pac/src/aar_ns/addrptr.rs

@@ -0,0 +1,80 @@
+#[doc = "Register `ADDRPTR` reader"]
+pub struct R(crate::R<ADDRPTR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ADDRPTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ADDRPTR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ADDRPTR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ADDRPTR` writer"]
+pub struct W(crate::W<ADDRPTR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ADDRPTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ADDRPTR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ADDRPTR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ADDRPTR` reader - Pointer to the resolvable address (6-bytes)"]
+pub type ADDRPTR_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `ADDRPTR` writer - Pointer to the resolvable address (6-bytes)"]
+pub type ADDRPTR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ADDRPTR_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - Pointer to the resolvable address (6-bytes)"]
+    #[inline(always)]
+    pub fn addrptr(&self) -> ADDRPTR_R {
+        ADDRPTR_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Pointer to the resolvable address (6-bytes)"]
+    #[inline(always)]
+    pub fn addrptr(&mut self) -> ADDRPTR_W<0> {
+        ADDRPTR_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Pointer to the resolvable address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [addrptr](index.html) module"]
+pub struct ADDRPTR_SPEC;
+impl crate::RegisterSpec for ADDRPTR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [addrptr::R](R) reader structure"]
+impl crate::Readable for ADDRPTR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [addrptr::W](W) writer structure"]
+impl crate::Writable for ADDRPTR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets ADDRPTR to value 0"]
+impl crate::Resettable for ADDRPTR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/aar_ns/enable.rs

@@ -0,0 +1,128 @@
+#[doc = "Register `ENABLE` reader"]
+pub struct R(crate::R<ENABLE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ENABLE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ENABLE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ENABLE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ENABLE` writer"]
+pub struct W(crate::W<ENABLE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ENABLE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ENABLE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ENABLE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ENABLE` reader - Enable or disable AAR"]
+pub type ENABLE_R = crate::FieldReader<u8, ENABLE_A>;
+#[doc = "Enable or disable AAR\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum ENABLE_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "3: Enable"]
+    ENABLED = 3,
+}
+impl From<ENABLE_A> for u8 {
+    #[inline(always)]
+    fn from(variant: ENABLE_A) -> Self {
+        variant as _
+    }
+}
+impl ENABLE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<ENABLE_A> {
+        match self.bits {
+            0 => Some(ENABLE_A::DISABLED),
+            3 => Some(ENABLE_A::ENABLED),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == ENABLE_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == ENABLE_A::ENABLED
+    }
+}
+#[doc = "Field `ENABLE` writer - Enable or disable AAR"]
+pub type ENABLE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ENABLE_SPEC, u8, ENABLE_A, 2, O>;
+impl<'a, const O: u8> ENABLE_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(ENABLE_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(ENABLE_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:1 - Enable or disable AAR"]
+    #[inline(always)]
+    pub fn enable(&self) -> ENABLE_R {
+        ENABLE_R::new((self.bits & 3) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:1 - Enable or disable AAR"]
+    #[inline(always)]
+    pub fn enable(&mut self) -> ENABLE_W<0> {
+        ENABLE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Enable AAR\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [enable](index.html) module"]
+pub struct ENABLE_SPEC;
+impl crate::RegisterSpec for ENABLE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [enable::R](R) reader structure"]
+impl crate::Readable for ENABLE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [enable::W](W) writer structure"]
+impl crate::Writable for ENABLE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets ENABLE to value 0"]
+impl crate::Resettable for ENABLE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/aar_ns/events_end.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_END` reader"]
+pub struct R(crate::R<EVENTS_END_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_END_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_END_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_END_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_END` writer"]
+pub struct W(crate::W<EVENTS_END_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_END_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_END_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_END_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_END` reader - Address resolution procedure complete"]
+pub type EVENTS_END_R = crate::BitReader<EVENTS_END_A>;
+#[doc = "Address resolution procedure complete\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_END_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_END_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_END_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_END_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_END_A {
+        match self.bits {
+            false => EVENTS_END_A::NOT_GENERATED,
+            true => EVENTS_END_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_END_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_END_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_END` writer - Address resolution procedure complete"]
+pub type EVENTS_END_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_END_SPEC, EVENTS_END_A, O>;
+impl<'a, const O: u8> EVENTS_END_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_END_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_END_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Address resolution procedure complete"]
+    #[inline(always)]
+    pub fn events_end(&self) -> EVENTS_END_R {
+        EVENTS_END_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Address resolution procedure complete"]
+    #[inline(always)]
+    pub fn events_end(&mut self) -> EVENTS_END_W<0> {
+        EVENTS_END_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Address resolution procedure complete\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_end](index.html) module"]
+pub struct EVENTS_END_SPEC;
+impl crate::RegisterSpec for EVENTS_END_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_end::R](R) reader structure"]
+impl crate::Readable for EVENTS_END_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_end::W](W) writer structure"]
+impl crate::Writable for EVENTS_END_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_END to value 0"]
+impl crate::Resettable for EVENTS_END_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/aar_ns/events_notresolved.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_NOTRESOLVED` reader"]
+pub struct R(crate::R<EVENTS_NOTRESOLVED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_NOTRESOLVED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_NOTRESOLVED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_NOTRESOLVED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_NOTRESOLVED` writer"]
+pub struct W(crate::W<EVENTS_NOTRESOLVED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_NOTRESOLVED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_NOTRESOLVED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_NOTRESOLVED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_NOTRESOLVED` reader - Address not resolved"]
+pub type EVENTS_NOTRESOLVED_R = crate::BitReader<EVENTS_NOTRESOLVED_A>;
+#[doc = "Address not resolved\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_NOTRESOLVED_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_NOTRESOLVED_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_NOTRESOLVED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_NOTRESOLVED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_NOTRESOLVED_A {
+        match self.bits {
+            false => EVENTS_NOTRESOLVED_A::NOT_GENERATED,
+            true => EVENTS_NOTRESOLVED_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_NOTRESOLVED_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_NOTRESOLVED_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_NOTRESOLVED` writer - Address not resolved"]
+pub type EVENTS_NOTRESOLVED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_NOTRESOLVED_SPEC, EVENTS_NOTRESOLVED_A, O>;
+impl<'a, const O: u8> EVENTS_NOTRESOLVED_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_NOTRESOLVED_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_NOTRESOLVED_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Address not resolved"]
+    #[inline(always)]
+    pub fn events_notresolved(&self) -> EVENTS_NOTRESOLVED_R {
+        EVENTS_NOTRESOLVED_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Address not resolved"]
+    #[inline(always)]
+    pub fn events_notresolved(&mut self) -> EVENTS_NOTRESOLVED_W<0> {
+        EVENTS_NOTRESOLVED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Address not resolved\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_notresolved](index.html) module"]
+pub struct EVENTS_NOTRESOLVED_SPEC;
+impl crate::RegisterSpec for EVENTS_NOTRESOLVED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_notresolved::R](R) reader structure"]
+impl crate::Readable for EVENTS_NOTRESOLVED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_notresolved::W](W) writer structure"]
+impl crate::Writable for EVENTS_NOTRESOLVED_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_NOTRESOLVED to value 0"]
+impl crate::Resettable for EVENTS_NOTRESOLVED_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/aar_ns/events_resolved.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_RESOLVED` reader"]
+pub struct R(crate::R<EVENTS_RESOLVED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_RESOLVED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_RESOLVED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_RESOLVED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_RESOLVED` writer"]
+pub struct W(crate::W<EVENTS_RESOLVED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_RESOLVED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_RESOLVED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_RESOLVED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_RESOLVED` reader - Address resolved"]
+pub type EVENTS_RESOLVED_R = crate::BitReader<EVENTS_RESOLVED_A>;
+#[doc = "Address resolved\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_RESOLVED_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_RESOLVED_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_RESOLVED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_RESOLVED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_RESOLVED_A {
+        match self.bits {
+            false => EVENTS_RESOLVED_A::NOT_GENERATED,
+            true => EVENTS_RESOLVED_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_RESOLVED_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_RESOLVED_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_RESOLVED` writer - Address resolved"]
+pub type EVENTS_RESOLVED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_RESOLVED_SPEC, EVENTS_RESOLVED_A, O>;
+impl<'a, const O: u8> EVENTS_RESOLVED_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_RESOLVED_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_RESOLVED_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Address resolved"]
+    #[inline(always)]
+    pub fn events_resolved(&self) -> EVENTS_RESOLVED_R {
+        EVENTS_RESOLVED_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Address resolved"]
+    #[inline(always)]
+    pub fn events_resolved(&mut self) -> EVENTS_RESOLVED_W<0> {
+        EVENTS_RESOLVED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Address resolved\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_resolved](index.html) module"]
+pub struct EVENTS_RESOLVED_SPEC;
+impl crate::RegisterSpec for EVENTS_RESOLVED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_resolved::R](R) reader structure"]
+impl crate::Readable for EVENTS_RESOLVED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_resolved::W](W) writer structure"]
+impl crate::Writable for EVENTS_RESOLVED_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_RESOLVED to value 0"]
+impl crate::Resettable for EVENTS_RESOLVED_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/aar_ns/intenclr.rs

@@ -0,0 +1,268 @@
+#[doc = "Register `INTENCLR` reader"]
+pub struct R(crate::R<INTENCLR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENCLR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENCLR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENCLR` writer"]
+pub struct W(crate::W<INTENCLR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENCLR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENCLR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `END` reader - Write '1' to disable interrupt for event END"]
+pub type END_R = crate::BitReader<END_A>;
+#[doc = "Write '1' to disable interrupt for event END\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum END_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<END_A> for bool {
+    #[inline(always)]
+    fn from(variant: END_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl END_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> END_A {
+        match self.bits {
+            false => END_A::DISABLED,
+            true => END_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == END_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == END_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event END\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum END_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<END_AW> for bool {
+    #[inline(always)]
+    fn from(variant: END_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `END` writer - Write '1' to disable interrupt for event END"]
+pub type END_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, END_AW, O>;
+impl<'a, const O: u8> END_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(END_AW::CLEAR)
+    }
+}
+#[doc = "Field `RESOLVED` reader - Write '1' to disable interrupt for event RESOLVED"]
+pub type RESOLVED_R = crate::BitReader<RESOLVED_A>;
+#[doc = "Write '1' to disable interrupt for event RESOLVED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum RESOLVED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<RESOLVED_A> for bool {
+    #[inline(always)]
+    fn from(variant: RESOLVED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl RESOLVED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> RESOLVED_A {
+        match self.bits {
+            false => RESOLVED_A::DISABLED,
+            true => RESOLVED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == RESOLVED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == RESOLVED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event RESOLVED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum RESOLVED_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<RESOLVED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: RESOLVED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `RESOLVED` writer - Write '1' to disable interrupt for event RESOLVED"]
+pub type RESOLVED_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, RESOLVED_AW, O>;
+impl<'a, const O: u8> RESOLVED_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(RESOLVED_AW::CLEAR)
+    }
+}
+#[doc = "Field `NOTRESOLVED` reader - Write '1' to disable interrupt for event NOTRESOLVED"]
+pub type NOTRESOLVED_R = crate::BitReader<NOTRESOLVED_A>;
+#[doc = "Write '1' to disable interrupt for event NOTRESOLVED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum NOTRESOLVED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<NOTRESOLVED_A> for bool {
+    #[inline(always)]
+    fn from(variant: NOTRESOLVED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl NOTRESOLVED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> NOTRESOLVED_A {
+        match self.bits {
+            false => NOTRESOLVED_A::DISABLED,
+            true => NOTRESOLVED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == NOTRESOLVED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == NOTRESOLVED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event NOTRESOLVED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum NOTRESOLVED_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<NOTRESOLVED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: NOTRESOLVED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `NOTRESOLVED` writer - Write '1' to disable interrupt for event NOTRESOLVED"]
+pub type NOTRESOLVED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENCLR_SPEC, NOTRESOLVED_AW, O>;
+impl<'a, const O: u8> NOTRESOLVED_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(NOTRESOLVED_AW::CLEAR)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Write '1' to disable interrupt for event END"]
+    #[inline(always)]
+    pub fn end(&self) -> END_R {
+        END_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Write '1' to disable interrupt for event RESOLVED"]
+    #[inline(always)]
+    pub fn resolved(&self) -> RESOLVED_R {
+        RESOLVED_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - Write '1' to disable interrupt for event NOTRESOLVED"]
+    #[inline(always)]
+    pub fn notresolved(&self) -> NOTRESOLVED_R {
+        NOTRESOLVED_R::new(((self.bits >> 2) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Write '1' to disable interrupt for event END"]
+    #[inline(always)]
+    pub fn end(&mut self) -> END_W<0> {
+        END_W::new(self)
+    }
+    #[doc = "Bit 1 - Write '1' to disable interrupt for event RESOLVED"]
+    #[inline(always)]
+    pub fn resolved(&mut self) -> RESOLVED_W<1> {
+        RESOLVED_W::new(self)
+    }
+    #[doc = "Bit 2 - Write '1' to disable interrupt for event NOTRESOLVED"]
+    #[inline(always)]
+    pub fn notresolved(&mut self) -> NOTRESOLVED_W<2> {
+        NOTRESOLVED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Disable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"]
+pub struct INTENCLR_SPEC;
+impl crate::RegisterSpec for INTENCLR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [intenclr::R](R) reader structure"]
+impl crate::Readable for INTENCLR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"]
+impl crate::Writable for INTENCLR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTENCLR to value 0"]
+impl crate::Resettable for INTENCLR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/aar_ns/intenset.rs

@@ -0,0 +1,268 @@
+#[doc = "Register `INTENSET` reader"]
+pub struct R(crate::R<INTENSET_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENSET_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENSET_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENSET` writer"]
+pub struct W(crate::W<INTENSET_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENSET_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENSET_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `END` reader - Write '1' to enable interrupt for event END"]
+pub type END_R = crate::BitReader<END_A>;
+#[doc = "Write '1' to enable interrupt for event END\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum END_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<END_A> for bool {
+    #[inline(always)]
+    fn from(variant: END_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl END_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> END_A {
+        match self.bits {
+            false => END_A::DISABLED,
+            true => END_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == END_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == END_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event END\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum END_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<END_AW> for bool {
+    #[inline(always)]
+    fn from(variant: END_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `END` writer - Write '1' to enable interrupt for event END"]
+pub type END_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, END_AW, O>;
+impl<'a, const O: u8> END_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(END_AW::SET)
+    }
+}
+#[doc = "Field `RESOLVED` reader - Write '1' to enable interrupt for event RESOLVED"]
+pub type RESOLVED_R = crate::BitReader<RESOLVED_A>;
+#[doc = "Write '1' to enable interrupt for event RESOLVED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum RESOLVED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<RESOLVED_A> for bool {
+    #[inline(always)]
+    fn from(variant: RESOLVED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl RESOLVED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> RESOLVED_A {
+        match self.bits {
+            false => RESOLVED_A::DISABLED,
+            true => RESOLVED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == RESOLVED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == RESOLVED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event RESOLVED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum RESOLVED_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<RESOLVED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: RESOLVED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `RESOLVED` writer - Write '1' to enable interrupt for event RESOLVED"]
+pub type RESOLVED_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, RESOLVED_AW, O>;
+impl<'a, const O: u8> RESOLVED_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(RESOLVED_AW::SET)
+    }
+}
+#[doc = "Field `NOTRESOLVED` reader - Write '1' to enable interrupt for event NOTRESOLVED"]
+pub type NOTRESOLVED_R = crate::BitReader<NOTRESOLVED_A>;
+#[doc = "Write '1' to enable interrupt for event NOTRESOLVED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum NOTRESOLVED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<NOTRESOLVED_A> for bool {
+    #[inline(always)]
+    fn from(variant: NOTRESOLVED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl NOTRESOLVED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> NOTRESOLVED_A {
+        match self.bits {
+            false => NOTRESOLVED_A::DISABLED,
+            true => NOTRESOLVED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == NOTRESOLVED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == NOTRESOLVED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event NOTRESOLVED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum NOTRESOLVED_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<NOTRESOLVED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: NOTRESOLVED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `NOTRESOLVED` writer - Write '1' to enable interrupt for event NOTRESOLVED"]
+pub type NOTRESOLVED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENSET_SPEC, NOTRESOLVED_AW, O>;
+impl<'a, const O: u8> NOTRESOLVED_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(NOTRESOLVED_AW::SET)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Write '1' to enable interrupt for event END"]
+    #[inline(always)]
+    pub fn end(&self) -> END_R {
+        END_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Write '1' to enable interrupt for event RESOLVED"]
+    #[inline(always)]
+    pub fn resolved(&self) -> RESOLVED_R {
+        RESOLVED_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - Write '1' to enable interrupt for event NOTRESOLVED"]
+    #[inline(always)]
+    pub fn notresolved(&self) -> NOTRESOLVED_R {
+        NOTRESOLVED_R::new(((self.bits >> 2) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Write '1' to enable interrupt for event END"]
+    #[inline(always)]
+    pub fn end(&mut self) -> END_W<0> {
+        END_W::new(self)
+    }
+    #[doc = "Bit 1 - Write '1' to enable interrupt for event RESOLVED"]
+    #[inline(always)]
+    pub fn resolved(&mut self) -> RESOLVED_W<1> {
+        RESOLVED_W::new(self)
+    }
+    #[doc = "Bit 2 - Write '1' to enable interrupt for event NOTRESOLVED"]
+    #[inline(always)]
+    pub fn notresolved(&mut self) -> NOTRESOLVED_W<2> {
+        NOTRESOLVED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Enable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"]
+pub struct INTENSET_SPEC;
+impl crate::RegisterSpec for INTENSET_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [intenset::R](R) reader structure"]
+impl crate::Readable for INTENSET_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"]
+impl crate::Writable for INTENSET_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTENSET to value 0"]
+impl crate::Resettable for INTENSET_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/aar_ns/irkptr.rs

@@ -0,0 +1,80 @@
+#[doc = "Register `IRKPTR` reader"]
+pub struct R(crate::R<IRKPTR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<IRKPTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<IRKPTR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<IRKPTR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `IRKPTR` writer"]
+pub struct W(crate::W<IRKPTR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<IRKPTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<IRKPTR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<IRKPTR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `IRKPTR` reader - Pointer to the IRK data structure"]
+pub type IRKPTR_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `IRKPTR` writer - Pointer to the IRK data structure"]
+pub type IRKPTR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, IRKPTR_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - Pointer to the IRK data structure"]
+    #[inline(always)]
+    pub fn irkptr(&self) -> IRKPTR_R {
+        IRKPTR_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Pointer to the IRK data structure"]
+    #[inline(always)]
+    pub fn irkptr(&mut self) -> IRKPTR_W<0> {
+        IRKPTR_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Pointer to IRK data structure\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irkptr](index.html) module"]
+pub struct IRKPTR_SPEC;
+impl crate::RegisterSpec for IRKPTR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [irkptr::R](R) reader structure"]
+impl crate::Readable for IRKPTR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [irkptr::W](W) writer structure"]
+impl crate::Writable for IRKPTR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets IRKPTR to value 0"]
+impl crate::Resettable for IRKPTR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/aar_ns/nirk.rs

@@ -0,0 +1,80 @@
+#[doc = "Register `NIRK` reader"]
+pub struct R(crate::R<NIRK_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<NIRK_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<NIRK_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<NIRK_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `NIRK` writer"]
+pub struct W(crate::W<NIRK_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<NIRK_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<NIRK_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<NIRK_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `NIRK` reader - Number of Identity Root Keys available in the IRK data structure"]
+pub type NIRK_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `NIRK` writer - Number of Identity Root Keys available in the IRK data structure"]
+pub type NIRK_W<'a, const O: u8> = crate::FieldWriter<'a, u32, NIRK_SPEC, u8, u8, 5, O>;
+impl R {
+    #[doc = "Bits 0:4 - Number of Identity Root Keys available in the IRK data structure"]
+    #[inline(always)]
+    pub fn nirk(&self) -> NIRK_R {
+        NIRK_R::new((self.bits & 0x1f) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:4 - Number of Identity Root Keys available in the IRK data structure"]
+    #[inline(always)]
+    pub fn nirk(&mut self) -> NIRK_W<0> {
+        NIRK_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Number of IRKs\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [nirk](index.html) module"]
+pub struct NIRK_SPEC;
+impl crate::RegisterSpec for NIRK_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [nirk::R](R) reader structure"]
+impl crate::Readable for NIRK_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [nirk::W](W) writer structure"]
+impl crate::Writable for NIRK_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets NIRK to value 0x01"]
+impl crate::Resettable for NIRK_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x01
+    }
+}

vendor/nrf5340-net-pac/src/aar_ns/publish_end.rs

@@ -0,0 +1,140 @@
+#[doc = "Register `PUBLISH_END` reader"]
+pub struct R(crate::R<PUBLISH_END_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PUBLISH_END_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PUBLISH_END_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PUBLISH_END_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PUBLISH_END` writer"]
+pub struct W(crate::W<PUBLISH_END_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PUBLISH_END_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PUBLISH_END_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PUBLISH_END_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that event END will publish to."]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that event END will publish to."]
+pub type CHIDX_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PUBLISH_END_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable publishing"]
+    DISABLED = 0,
+    #[doc = "1: Enable publishing"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PUBLISH_END_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable publishing"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable publishing"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that event END will publish to."]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that event END will publish to."]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Publish configuration for event END\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [publish_end](index.html) module"]
+pub struct PUBLISH_END_SPEC;
+impl crate::RegisterSpec for PUBLISH_END_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [publish_end::R](R) reader structure"]
+impl crate::Readable for PUBLISH_END_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [publish_end::W](W) writer structure"]
+impl crate::Writable for PUBLISH_END_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PUBLISH_END to value 0"]
+impl crate::Resettable for PUBLISH_END_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/aar_ns/publish_notresolved.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `PUBLISH_NOTRESOLVED` reader"]
+pub struct R(crate::R<PUBLISH_NOTRESOLVED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PUBLISH_NOTRESOLVED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PUBLISH_NOTRESOLVED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PUBLISH_NOTRESOLVED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PUBLISH_NOTRESOLVED` writer"]
+pub struct W(crate::W<PUBLISH_NOTRESOLVED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PUBLISH_NOTRESOLVED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PUBLISH_NOTRESOLVED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PUBLISH_NOTRESOLVED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that event NOTRESOLVED will publish to."]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that event NOTRESOLVED will publish to."]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, PUBLISH_NOTRESOLVED_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable publishing"]
+    DISABLED = 0,
+    #[doc = "1: Enable publishing"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PUBLISH_NOTRESOLVED_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable publishing"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable publishing"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that event NOTRESOLVED will publish to."]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that event NOTRESOLVED will publish to."]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Publish configuration for event NOTRESOLVED\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [publish_notresolved](index.html) module"]
+pub struct PUBLISH_NOTRESOLVED_SPEC;
+impl crate::RegisterSpec for PUBLISH_NOTRESOLVED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [publish_notresolved::R](R) reader structure"]
+impl crate::Readable for PUBLISH_NOTRESOLVED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [publish_notresolved::W](W) writer structure"]
+impl crate::Writable for PUBLISH_NOTRESOLVED_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PUBLISH_NOTRESOLVED to value 0"]
+impl crate::Resettable for PUBLISH_NOTRESOLVED_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/aar_ns/publish_resolved.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `PUBLISH_RESOLVED` reader"]
+pub struct R(crate::R<PUBLISH_RESOLVED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PUBLISH_RESOLVED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PUBLISH_RESOLVED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PUBLISH_RESOLVED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PUBLISH_RESOLVED` writer"]
+pub struct W(crate::W<PUBLISH_RESOLVED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PUBLISH_RESOLVED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PUBLISH_RESOLVED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PUBLISH_RESOLVED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that event RESOLVED will publish to."]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that event RESOLVED will publish to."]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, PUBLISH_RESOLVED_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable publishing"]
+    DISABLED = 0,
+    #[doc = "1: Enable publishing"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PUBLISH_RESOLVED_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable publishing"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable publishing"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that event RESOLVED will publish to."]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that event RESOLVED will publish to."]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Publish configuration for event RESOLVED\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [publish_resolved](index.html) module"]
+pub struct PUBLISH_RESOLVED_SPEC;
+impl crate::RegisterSpec for PUBLISH_RESOLVED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [publish_resolved::R](R) reader structure"]
+impl crate::Readable for PUBLISH_RESOLVED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [publish_resolved::W](W) writer structure"]
+impl crate::Writable for PUBLISH_RESOLVED_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PUBLISH_RESOLVED to value 0"]
+impl crate::Resettable for PUBLISH_RESOLVED_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/aar_ns/scratchptr.rs

@@ -0,0 +1,81 @@
+#[doc = "Register `SCRATCHPTR` reader"]
+pub struct R(crate::R<SCRATCHPTR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SCRATCHPTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SCRATCHPTR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SCRATCHPTR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SCRATCHPTR` writer"]
+pub struct W(crate::W<SCRATCHPTR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SCRATCHPTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SCRATCHPTR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SCRATCHPTR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `SCRATCHPTR` reader - Pointer to a scratch data area used for temporary storage during resolution. A space of minimum 3 bytes must be reserved."]
+pub type SCRATCHPTR_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `SCRATCHPTR` writer - Pointer to a scratch data area used for temporary storage during resolution. A space of minimum 3 bytes must be reserved."]
+pub type SCRATCHPTR_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, SCRATCHPTR_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - Pointer to a scratch data area used for temporary storage during resolution. A space of minimum 3 bytes must be reserved."]
+    #[inline(always)]
+    pub fn scratchptr(&self) -> SCRATCHPTR_R {
+        SCRATCHPTR_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Pointer to a scratch data area used for temporary storage during resolution. A space of minimum 3 bytes must be reserved."]
+    #[inline(always)]
+    pub fn scratchptr(&mut self) -> SCRATCHPTR_W<0> {
+        SCRATCHPTR_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Pointer to data area used for temporary storage\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scratchptr](index.html) module"]
+pub struct SCRATCHPTR_SPEC;
+impl crate::RegisterSpec for SCRATCHPTR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [scratchptr::R](R) reader structure"]
+impl crate::Readable for SCRATCHPTR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [scratchptr::W](W) writer structure"]
+impl crate::Writable for SCRATCHPTR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SCRATCHPTR to value 0"]
+impl crate::Resettable for SCRATCHPTR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/aar_ns/status.rs

@@ -0,0 +1,40 @@
+#[doc = "Register `STATUS` reader"]
+pub struct R(crate::R<STATUS_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<STATUS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<STATUS_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<STATUS_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `STATUS` reader - The IRK that was used last time an address was resolved"]
+pub type STATUS_R = crate::FieldReader<u8, u8>;
+impl R {
+    #[doc = "Bits 0:3 - The IRK that was used last time an address was resolved"]
+    #[inline(always)]
+    pub fn status(&self) -> STATUS_R {
+        STATUS_R::new((self.bits & 0x0f) as u8)
+    }
+}
+#[doc = "Resolution status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"]
+pub struct STATUS_SPEC;
+impl crate::RegisterSpec for STATUS_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [status::R](R) reader structure"]
+impl crate::Readable for STATUS_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets STATUS to value 0"]
+impl crate::Resettable for STATUS_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/aar_ns/subscribe_start.rs

@@ -0,0 +1,140 @@
+#[doc = "Register `SUBSCRIBE_START` reader"]
+pub struct R(crate::R<SUBSCRIBE_START_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_START_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_START_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_START_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_START` writer"]
+pub struct W(crate::W<SUBSCRIBE_START_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_START_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_START_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_START_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that task START will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that task START will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SUBSCRIBE_START_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_START_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that task START will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that task START will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task START\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_start](index.html) module"]
+pub struct SUBSCRIBE_START_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_START_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_start::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_START_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_start::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_START_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_START to value 0"]
+impl crate::Resettable for SUBSCRIBE_START_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/aar_ns/subscribe_stop.rs

@@ -0,0 +1,140 @@
+#[doc = "Register `SUBSCRIBE_STOP` reader"]
+pub struct R(crate::R<SUBSCRIBE_STOP_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_STOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_STOP_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_STOP_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_STOP` writer"]
+pub struct W(crate::W<SUBSCRIBE_STOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_STOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_STOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_STOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that task STOP will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that task STOP will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SUBSCRIBE_STOP_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_STOP_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that task STOP will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that task STOP will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task STOP\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_stop](index.html) module"]
+pub struct SUBSCRIBE_STOP_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_STOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_stop::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_STOP_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_stop::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_STOP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_STOP to value 0"]
+impl crate::Resettable for SUBSCRIBE_STOP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/aar_ns/tasks_start.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_START` writer"]
+pub struct W(crate::W<TASKS_START_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_START_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_START_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_START_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Start resolving addresses based on IRKs specified in the IRK data structure\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_START_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_START_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_START_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_START` writer - Start resolving addresses based on IRKs specified in the IRK data structure"]
+pub type TASKS_START_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_START_SPEC, TASKS_START_AW, O>;
+impl<'a, const O: u8> TASKS_START_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_START_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Start resolving addresses based on IRKs specified in the IRK data structure"]
+    #[inline(always)]
+    pub fn tasks_start(&mut self) -> TASKS_START_W<0> {
+        TASKS_START_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Start resolving addresses based on IRKs specified in the IRK data structure\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_start](index.html) module"]
+pub struct TASKS_START_SPEC;
+impl crate::RegisterSpec for TASKS_START_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_start::W](W) writer structure"]
+impl crate::Writable for TASKS_START_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_START to value 0"]
+impl crate::Resettable for TASKS_START_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/aar_ns/tasks_stop.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_STOP` writer"]
+pub struct W(crate::W<TASKS_STOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_STOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_STOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_STOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Stop resolving addresses\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_STOP_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_STOP_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_STOP_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_STOP` writer - Stop resolving addresses"]
+pub type TASKS_STOP_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_STOP_SPEC, TASKS_STOP_AW, O>;
+impl<'a, const O: u8> TASKS_STOP_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_STOP_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Stop resolving addresses"]
+    #[inline(always)]
+    pub fn tasks_stop(&mut self) -> TASKS_STOP_W<0> {
+        TASKS_STOP_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Stop resolving addresses\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_stop](index.html) module"]
+pub struct TASKS_STOP_SPEC;
+impl crate::RegisterSpec for TASKS_STOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_stop::W](W) writer structure"]
+impl crate::Writable for TASKS_STOP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_STOP to value 0"]
+impl crate::Resettable for TASKS_STOP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/acl_ns.rs

@@ -0,0 +1,33 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct RegisterBlock {
+    _reserved0: [u8; 0x0800],
+    #[doc = "0x800..0x80c - Unspecified"]
+    pub acl0: ACL,
+    _reserved1: [u8; 0x04],
+    #[doc = "0x810..0x81c - Unspecified"]
+    pub acl1: ACL,
+    _reserved2: [u8; 0x04],
+    #[doc = "0x820..0x82c - Unspecified"]
+    pub acl2: ACL,
+    _reserved3: [u8; 0x04],
+    #[doc = "0x830..0x83c - Unspecified"]
+    pub acl3: ACL,
+    _reserved4: [u8; 0x04],
+    #[doc = "0x840..0x84c - Unspecified"]
+    pub acl4: ACL,
+    _reserved5: [u8; 0x04],
+    #[doc = "0x850..0x85c - Unspecified"]
+    pub acl5: ACL,
+    _reserved6: [u8; 0x04],
+    #[doc = "0x860..0x86c - Unspecified"]
+    pub acl6: ACL,
+    _reserved7: [u8; 0x04],
+    #[doc = "0x870..0x87c - Unspecified"]
+    pub acl7: ACL,
+}
+#[doc = "Unspecified"]
+pub use acl::ACL;
+#[doc = r"Cluster"]
+#[doc = "Unspecified"]
+pub mod acl;

vendor/nrf5340-net-pac/src/acl_ns/acl.rs

@@ -0,0 +1,22 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct ACL {
+    #[doc = "0x00 - Description cluster: Start address of region to protect. The start address must be word-aligned."]
+    pub addr: ADDR,
+    #[doc = "0x04 - Description cluster: Size of region to protect counting from address ACL\\[n\\].ADDR. Writing a '0' has no effect."]
+    pub size: SIZE,
+    #[doc = "0x08 - Description cluster: Access permissions for region n as defined by start address ACL\\[n\\].ADDR and size ACL\\[n\\].SIZE"]
+    pub perm: PERM,
+}
+#[doc = "ADDR (rw) register accessor: an alias for `Reg<ADDR_SPEC>`"]
+pub type ADDR = crate::Reg<addr::ADDR_SPEC>;
+#[doc = "Description cluster: Start address of region to protect. The start address must be word-aligned."]
+pub mod addr;
+#[doc = "SIZE (rw) register accessor: an alias for `Reg<SIZE_SPEC>`"]
+pub type SIZE = crate::Reg<size::SIZE_SPEC>;
+#[doc = "Description cluster: Size of region to protect counting from address ACL\\[n\\].ADDR. Writing a '0' has no effect."]
+pub mod size;
+#[doc = "PERM (rw) register accessor: an alias for `Reg<PERM_SPEC>`"]
+pub type PERM = crate::Reg<perm::PERM_SPEC>;
+#[doc = "Description cluster: Access permissions for region n as defined by start address ACL\\[n\\].ADDR and size ACL\\[n\\].SIZE"]
+pub mod perm;

vendor/nrf5340-net-pac/src/acl_ns/acl/addr.rs

@@ -0,0 +1,80 @@
+#[doc = "Register `ADDR` reader"]
+pub struct R(crate::R<ADDR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ADDR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ADDR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ADDR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ADDR` writer"]
+pub struct W(crate::W<ADDR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ADDR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ADDR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ADDR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ADDR` reader - Start address of flash region n. The start address must point to a flash page boundary."]
+pub type ADDR_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `ADDR` writer - Start address of flash region n. The start address must point to a flash page boundary."]
+pub type ADDR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ADDR_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - Start address of flash region n. The start address must point to a flash page boundary."]
+    #[inline(always)]
+    pub fn addr(&self) -> ADDR_R {
+        ADDR_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Start address of flash region n. The start address must point to a flash page boundary."]
+    #[inline(always)]
+    pub fn addr(&mut self) -> ADDR_W<0> {
+        ADDR_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description cluster: Start address of region to protect. The start address must be word-aligned.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [addr](index.html) module"]
+pub struct ADDR_SPEC;
+impl crate::RegisterSpec for ADDR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [addr::R](R) reader structure"]
+impl crate::Readable for ADDR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [addr::W](W) writer structure"]
+impl crate::Writable for ADDR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets ADDR to value 0"]
+impl crate::Resettable for ADDR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/acl_ns/acl/perm.rs

@@ -0,0 +1,186 @@
+#[doc = "Register `PERM` reader"]
+pub struct R(crate::R<PERM_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PERM_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PERM_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PERM_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PERM` writer"]
+pub struct W(crate::W<PERM_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PERM_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PERM_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PERM_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `WRITE` reader - Configure write and erase permissions for region n. Writing a '0' has no effect."]
+pub type WRITE_R = crate::BitReader<WRITE_A>;
+#[doc = "Configure write and erase permissions for region n. Writing a '0' has no effect.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum WRITE_A {
+    #[doc = "0: Allow write and erase instructions to region n."]
+    ENABLE = 0,
+    #[doc = "1: Block write and erase instructions to region n."]
+    DISABLE = 1,
+}
+impl From<WRITE_A> for bool {
+    #[inline(always)]
+    fn from(variant: WRITE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl WRITE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> WRITE_A {
+        match self.bits {
+            false => WRITE_A::ENABLE,
+            true => WRITE_A::DISABLE,
+        }
+    }
+    #[doc = "Checks if the value of the field is `ENABLE`"]
+    #[inline(always)]
+    pub fn is_enable(&self) -> bool {
+        *self == WRITE_A::ENABLE
+    }
+    #[doc = "Checks if the value of the field is `DISABLE`"]
+    #[inline(always)]
+    pub fn is_disable(&self) -> bool {
+        *self == WRITE_A::DISABLE
+    }
+}
+#[doc = "Field `WRITE` writer - Configure write and erase permissions for region n. Writing a '0' has no effect."]
+pub type WRITE_W<'a, const O: u8> = crate::BitWriter<'a, u32, PERM_SPEC, WRITE_A, O>;
+impl<'a, const O: u8> WRITE_W<'a, O> {
+    #[doc = "Allow write and erase instructions to region n."]
+    #[inline(always)]
+    pub fn enable(self) -> &'a mut W {
+        self.variant(WRITE_A::ENABLE)
+    }
+    #[doc = "Block write and erase instructions to region n."]
+    #[inline(always)]
+    pub fn disable(self) -> &'a mut W {
+        self.variant(WRITE_A::DISABLE)
+    }
+}
+#[doc = "Field `READ` reader - Configure read permissions for region n. Writing a '0' has no effect."]
+pub type READ_R = crate::BitReader<READ_A>;
+#[doc = "Configure read permissions for region n. Writing a '0' has no effect.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum READ_A {
+    #[doc = "0: Allow read instructions to region n."]
+    ENABLE = 0,
+    #[doc = "1: Block read instructions to region n."]
+    DISABLE = 1,
+}
+impl From<READ_A> for bool {
+    #[inline(always)]
+    fn from(variant: READ_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl READ_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> READ_A {
+        match self.bits {
+            false => READ_A::ENABLE,
+            true => READ_A::DISABLE,
+        }
+    }
+    #[doc = "Checks if the value of the field is `ENABLE`"]
+    #[inline(always)]
+    pub fn is_enable(&self) -> bool {
+        *self == READ_A::ENABLE
+    }
+    #[doc = "Checks if the value of the field is `DISABLE`"]
+    #[inline(always)]
+    pub fn is_disable(&self) -> bool {
+        *self == READ_A::DISABLE
+    }
+}
+#[doc = "Field `READ` writer - Configure read permissions for region n. Writing a '0' has no effect."]
+pub type READ_W<'a, const O: u8> = crate::BitWriter<'a, u32, PERM_SPEC, READ_A, O>;
+impl<'a, const O: u8> READ_W<'a, O> {
+    #[doc = "Allow read instructions to region n."]
+    #[inline(always)]
+    pub fn enable(self) -> &'a mut W {
+        self.variant(READ_A::ENABLE)
+    }
+    #[doc = "Block read instructions to region n."]
+    #[inline(always)]
+    pub fn disable(self) -> &'a mut W {
+        self.variant(READ_A::DISABLE)
+    }
+}
+impl R {
+    #[doc = "Bit 1 - Configure write and erase permissions for region n. Writing a '0' has no effect."]
+    #[inline(always)]
+    pub fn write(&self) -> WRITE_R {
+        WRITE_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - Configure read permissions for region n. Writing a '0' has no effect."]
+    #[inline(always)]
+    pub fn read(&self) -> READ_R {
+        READ_R::new(((self.bits >> 2) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 1 - Configure write and erase permissions for region n. Writing a '0' has no effect."]
+    #[inline(always)]
+    pub fn write(&mut self) -> WRITE_W<1> {
+        WRITE_W::new(self)
+    }
+    #[doc = "Bit 2 - Configure read permissions for region n. Writing a '0' has no effect."]
+    #[inline(always)]
+    pub fn read(&mut self) -> READ_W<2> {
+        READ_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description cluster: Access permissions for region n as defined by start address ACL\\[n\\].ADDR and size ACL\\[n\\].SIZE\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [perm](index.html) module"]
+pub struct PERM_SPEC;
+impl crate::RegisterSpec for PERM_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [perm::R](R) reader structure"]
+impl crate::Readable for PERM_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [perm::W](W) writer structure"]
+impl crate::Writable for PERM_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PERM to value 0"]
+impl crate::Resettable for PERM_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/acl_ns/acl/size.rs

@@ -0,0 +1,80 @@
+#[doc = "Register `SIZE` reader"]
+pub struct R(crate::R<SIZE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SIZE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SIZE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SIZE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SIZE` writer"]
+pub struct W(crate::W<SIZE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SIZE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SIZE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SIZE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `SIZE` reader - Size of flash region n in bytes. Must be a multiple of the flash page size."]
+pub type SIZE_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `SIZE` writer - Size of flash region n in bytes. Must be a multiple of the flash page size."]
+pub type SIZE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SIZE_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - Size of flash region n in bytes. Must be a multiple of the flash page size."]
+    #[inline(always)]
+    pub fn size(&self) -> SIZE_R {
+        SIZE_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Size of flash region n in bytes. Must be a multiple of the flash page size."]
+    #[inline(always)]
+    pub fn size(&mut self) -> SIZE_W<0> {
+        SIZE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description cluster: Size of region to protect counting from address ACL\\[n\\].ADDR. Writing a '0' has no effect.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [size](index.html) module"]
+pub struct SIZE_SPEC;
+impl crate::RegisterSpec for SIZE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [size::R](R) reader structure"]
+impl crate::Readable for SIZE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [size::W](W) writer structure"]
+impl crate::Writable for SIZE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SIZE to value 0"]
+impl crate::Resettable for SIZE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/appmutex_ns.rs

@@ -0,0 +1,11 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct RegisterBlock {
+    _reserved0: [u8; 0x0400],
+    #[doc = "0x400..0x440 - Description collection: Mutex register"]
+    pub mutex: [MUTEX; 16],
+}
+#[doc = "MUTEX (rw) register accessor: an alias for `Reg<MUTEX_SPEC>`"]
+pub type MUTEX = crate::Reg<mutex::MUTEX_SPEC>;
+#[doc = "Description collection: Mutex register"]
+pub mod mutex;

vendor/nrf5340-net-pac/src/appmutex_ns/mutex.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `MUTEX[%s]` reader"]
+pub struct R(crate::R<MUTEX_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<MUTEX_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<MUTEX_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<MUTEX_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `MUTEX[%s]` writer"]
+pub struct W(crate::W<MUTEX_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<MUTEX_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<MUTEX_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<MUTEX_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `MUTEX` reader - Mutex register n"]
+pub type MUTEX_R = crate::BitReader<MUTEX_A>;
+#[doc = "Mutex register n\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum MUTEX_A {
+    #[doc = "0: Mutex n is in unlocked state"]
+    UNLOCKED = 0,
+    #[doc = "1: Mutex n is in locked state"]
+    LOCKED = 1,
+}
+impl From<MUTEX_A> for bool {
+    #[inline(always)]
+    fn from(variant: MUTEX_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl MUTEX_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> MUTEX_A {
+        match self.bits {
+            false => MUTEX_A::UNLOCKED,
+            true => MUTEX_A::LOCKED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `UNLOCKED`"]
+    #[inline(always)]
+    pub fn is_unlocked(&self) -> bool {
+        *self == MUTEX_A::UNLOCKED
+    }
+    #[doc = "Checks if the value of the field is `LOCKED`"]
+    #[inline(always)]
+    pub fn is_locked(&self) -> bool {
+        *self == MUTEX_A::LOCKED
+    }
+}
+#[doc = "Field `MUTEX` writer - Mutex register n"]
+pub type MUTEX_W<'a, const O: u8> = crate::BitWriter<'a, u32, MUTEX_SPEC, MUTEX_A, O>;
+impl<'a, const O: u8> MUTEX_W<'a, O> {
+    #[doc = "Mutex n is in unlocked state"]
+    #[inline(always)]
+    pub fn unlocked(self) -> &'a mut W {
+        self.variant(MUTEX_A::UNLOCKED)
+    }
+    #[doc = "Mutex n is in locked state"]
+    #[inline(always)]
+    pub fn locked(self) -> &'a mut W {
+        self.variant(MUTEX_A::LOCKED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Mutex register n"]
+    #[inline(always)]
+    pub fn mutex(&self) -> MUTEX_R {
+        MUTEX_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Mutex register n"]
+    #[inline(always)]
+    pub fn mutex(&mut self) -> MUTEX_W<0> {
+        MUTEX_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description collection: Mutex register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mutex](index.html) module"]
+pub struct MUTEX_SPEC;
+impl crate::RegisterSpec for MUTEX_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [mutex::R](R) reader structure"]
+impl crate::Readable for MUTEX_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [mutex::W](W) writer structure"]
+impl crate::Writable for MUTEX_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets MUTEX[%s]
+to value 0"]
+impl crate::Resettable for MUTEX_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/ccm_ns.rs

@@ -0,0 +1,173 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct RegisterBlock {
+    #[doc = "0x00 - Start generation of keystream. This operation will stop by itself when completed."]
+    pub tasks_ksgen: TASKS_KSGEN,
+    #[doc = "0x04 - Start encryption/decryption. This operation will stop by itself when completed."]
+    pub tasks_crypt: TASKS_CRYPT,
+    #[doc = "0x08 - Stop encryption/decryption"]
+    pub tasks_stop: TASKS_STOP,
+    #[doc = "0x0c - Override DATARATE setting in MODE register with the contents of the RATEOVERRIDE register for any ongoing encryption/decryption"]
+    pub tasks_rateoverride: TASKS_RATEOVERRIDE,
+    _reserved4: [u8; 0x70],
+    #[doc = "0x80 - Subscribe configuration for task KSGEN"]
+    pub subscribe_ksgen: SUBSCRIBE_KSGEN,
+    #[doc = "0x84 - Subscribe configuration for task CRYPT"]
+    pub subscribe_crypt: SUBSCRIBE_CRYPT,
+    #[doc = "0x88 - Subscribe configuration for task STOP"]
+    pub subscribe_stop: SUBSCRIBE_STOP,
+    #[doc = "0x8c - Subscribe configuration for task RATEOVERRIDE"]
+    pub subscribe_rateoverride: SUBSCRIBE_RATEOVERRIDE,
+    _reserved8: [u8; 0x70],
+    #[doc = "0x100 - Keystream generation complete"]
+    pub events_endksgen: EVENTS_ENDKSGEN,
+    #[doc = "0x104 - Encrypt/decrypt complete"]
+    pub events_endcrypt: EVENTS_ENDCRYPT,
+    #[doc = "0x108 - Deprecated register - CCM error event"]
+    pub events_error: EVENTS_ERROR,
+    _reserved11: [u8; 0x74],
+    #[doc = "0x180 - Publish configuration for event ENDKSGEN"]
+    pub publish_endksgen: PUBLISH_ENDKSGEN,
+    #[doc = "0x184 - Publish configuration for event ENDCRYPT"]
+    pub publish_endcrypt: PUBLISH_ENDCRYPT,
+    #[doc = "0x188 - Deprecated register - Publish configuration for event ERROR"]
+    pub publish_error: PUBLISH_ERROR,
+    _reserved14: [u8; 0x74],
+    #[doc = "0x200 - Shortcuts between local events and tasks"]
+    pub shorts: SHORTS,
+    _reserved15: [u8; 0x0100],
+    #[doc = "0x304 - Enable interrupt"]
+    pub intenset: INTENSET,
+    #[doc = "0x308 - Disable interrupt"]
+    pub intenclr: INTENCLR,
+    _reserved17: [u8; 0xf4],
+    #[doc = "0x400 - MIC check result"]
+    pub micstatus: MICSTATUS,
+    _reserved18: [u8; 0xfc],
+    #[doc = "0x500 - Enable"]
+    pub enable: ENABLE,
+    #[doc = "0x504 - Operation mode"]
+    pub mode: MODE,
+    #[doc = "0x508 - Pointer to data structure holding the AES key and the NONCE vector"]
+    pub cnfptr: CNFPTR,
+    #[doc = "0x50c - Input pointer"]
+    pub inptr: INPTR,
+    #[doc = "0x510 - Output pointer"]
+    pub outptr: OUTPTR,
+    #[doc = "0x514 - Pointer to data area used for temporary storage"]
+    pub scratchptr: SCRATCHPTR,
+    #[doc = "0x518 - Length of keystream generated when MODE.LENGTH = Extended"]
+    pub maxpacketsize: MAXPACKETSIZE,
+    #[doc = "0x51c - Data rate override setting."]
+    pub rateoverride: RATEOVERRIDE,
+    #[doc = "0x520 - Header (S0) mask."]
+    pub headermask: HEADERMASK,
+}
+#[doc = "TASKS_KSGEN (w) register accessor: an alias for `Reg<TASKS_KSGEN_SPEC>`"]
+pub type TASKS_KSGEN = crate::Reg<tasks_ksgen::TASKS_KSGEN_SPEC>;
+#[doc = "Start generation of keystream. This operation will stop by itself when completed."]
+pub mod tasks_ksgen;
+#[doc = "TASKS_CRYPT (w) register accessor: an alias for `Reg<TASKS_CRYPT_SPEC>`"]
+pub type TASKS_CRYPT = crate::Reg<tasks_crypt::TASKS_CRYPT_SPEC>;
+#[doc = "Start encryption/decryption. This operation will stop by itself when completed."]
+pub mod tasks_crypt;
+#[doc = "TASKS_STOP (w) register accessor: an alias for `Reg<TASKS_STOP_SPEC>`"]
+pub type TASKS_STOP = crate::Reg<tasks_stop::TASKS_STOP_SPEC>;
+#[doc = "Stop encryption/decryption"]
+pub mod tasks_stop;
+#[doc = "TASKS_RATEOVERRIDE (w) register accessor: an alias for `Reg<TASKS_RATEOVERRIDE_SPEC>`"]
+pub type TASKS_RATEOVERRIDE = crate::Reg<tasks_rateoverride::TASKS_RATEOVERRIDE_SPEC>;
+#[doc = "Override DATARATE setting in MODE register with the contents of the RATEOVERRIDE register for any ongoing encryption/decryption"]
+pub mod tasks_rateoverride;
+#[doc = "SUBSCRIBE_KSGEN (rw) register accessor: an alias for `Reg<SUBSCRIBE_KSGEN_SPEC>`"]
+pub type SUBSCRIBE_KSGEN = crate::Reg<subscribe_ksgen::SUBSCRIBE_KSGEN_SPEC>;
+#[doc = "Subscribe configuration for task KSGEN"]
+pub mod subscribe_ksgen;
+#[doc = "SUBSCRIBE_CRYPT (rw) register accessor: an alias for `Reg<SUBSCRIBE_CRYPT_SPEC>`"]
+pub type SUBSCRIBE_CRYPT = crate::Reg<subscribe_crypt::SUBSCRIBE_CRYPT_SPEC>;
+#[doc = "Subscribe configuration for task CRYPT"]
+pub mod subscribe_crypt;
+#[doc = "SUBSCRIBE_STOP (rw) register accessor: an alias for `Reg<SUBSCRIBE_STOP_SPEC>`"]
+pub type SUBSCRIBE_STOP = crate::Reg<subscribe_stop::SUBSCRIBE_STOP_SPEC>;
+#[doc = "Subscribe configuration for task STOP"]
+pub mod subscribe_stop;
+#[doc = "SUBSCRIBE_RATEOVERRIDE (rw) register accessor: an alias for `Reg<SUBSCRIBE_RATEOVERRIDE_SPEC>`"]
+pub type SUBSCRIBE_RATEOVERRIDE = crate::Reg<subscribe_rateoverride::SUBSCRIBE_RATEOVERRIDE_SPEC>;
+#[doc = "Subscribe configuration for task RATEOVERRIDE"]
+pub mod subscribe_rateoverride;
+#[doc = "EVENTS_ENDKSGEN (rw) register accessor: an alias for `Reg<EVENTS_ENDKSGEN_SPEC>`"]
+pub type EVENTS_ENDKSGEN = crate::Reg<events_endksgen::EVENTS_ENDKSGEN_SPEC>;
+#[doc = "Keystream generation complete"]
+pub mod events_endksgen;
+#[doc = "EVENTS_ENDCRYPT (rw) register accessor: an alias for `Reg<EVENTS_ENDCRYPT_SPEC>`"]
+pub type EVENTS_ENDCRYPT = crate::Reg<events_endcrypt::EVENTS_ENDCRYPT_SPEC>;
+#[doc = "Encrypt/decrypt complete"]
+pub mod events_endcrypt;
+#[doc = "EVENTS_ERROR (rw) register accessor: an alias for `Reg<EVENTS_ERROR_SPEC>`"]
+pub type EVENTS_ERROR = crate::Reg<events_error::EVENTS_ERROR_SPEC>;
+#[doc = "Deprecated register - CCM error event"]
+pub mod events_error;
+#[doc = "PUBLISH_ENDKSGEN (rw) register accessor: an alias for `Reg<PUBLISH_ENDKSGEN_SPEC>`"]
+pub type PUBLISH_ENDKSGEN = crate::Reg<publish_endksgen::PUBLISH_ENDKSGEN_SPEC>;
+#[doc = "Publish configuration for event ENDKSGEN"]
+pub mod publish_endksgen;
+#[doc = "PUBLISH_ENDCRYPT (rw) register accessor: an alias for `Reg<PUBLISH_ENDCRYPT_SPEC>`"]
+pub type PUBLISH_ENDCRYPT = crate::Reg<publish_endcrypt::PUBLISH_ENDCRYPT_SPEC>;
+#[doc = "Publish configuration for event ENDCRYPT"]
+pub mod publish_endcrypt;
+#[doc = "PUBLISH_ERROR (rw) register accessor: an alias for `Reg<PUBLISH_ERROR_SPEC>`"]
+pub type PUBLISH_ERROR = crate::Reg<publish_error::PUBLISH_ERROR_SPEC>;
+#[doc = "Deprecated register - Publish configuration for event ERROR"]
+pub mod publish_error;
+#[doc = "SHORTS (rw) register accessor: an alias for `Reg<SHORTS_SPEC>`"]
+pub type SHORTS = crate::Reg<shorts::SHORTS_SPEC>;
+#[doc = "Shortcuts between local events and tasks"]
+pub mod shorts;
+#[doc = "INTENSET (rw) register accessor: an alias for `Reg<INTENSET_SPEC>`"]
+pub type INTENSET = crate::Reg<intenset::INTENSET_SPEC>;
+#[doc = "Enable interrupt"]
+pub mod intenset;
+#[doc = "INTENCLR (rw) register accessor: an alias for `Reg<INTENCLR_SPEC>`"]
+pub type INTENCLR = crate::Reg<intenclr::INTENCLR_SPEC>;
+#[doc = "Disable interrupt"]
+pub mod intenclr;
+#[doc = "MICSTATUS (r) register accessor: an alias for `Reg<MICSTATUS_SPEC>`"]
+pub type MICSTATUS = crate::Reg<micstatus::MICSTATUS_SPEC>;
+#[doc = "MIC check result"]
+pub mod micstatus;
+#[doc = "ENABLE (rw) register accessor: an alias for `Reg<ENABLE_SPEC>`"]
+pub type ENABLE = crate::Reg<enable::ENABLE_SPEC>;
+#[doc = "Enable"]
+pub mod enable;
+#[doc = "MODE (rw) register accessor: an alias for `Reg<MODE_SPEC>`"]
+pub type MODE = crate::Reg<mode::MODE_SPEC>;
+#[doc = "Operation mode"]
+pub mod mode;
+#[doc = "CNFPTR (rw) register accessor: an alias for `Reg<CNFPTR_SPEC>`"]
+pub type CNFPTR = crate::Reg<cnfptr::CNFPTR_SPEC>;
+#[doc = "Pointer to data structure holding the AES key and the NONCE vector"]
+pub mod cnfptr;
+#[doc = "INPTR (rw) register accessor: an alias for `Reg<INPTR_SPEC>`"]
+pub type INPTR = crate::Reg<inptr::INPTR_SPEC>;
+#[doc = "Input pointer"]
+pub mod inptr;
+#[doc = "OUTPTR (rw) register accessor: an alias for `Reg<OUTPTR_SPEC>`"]
+pub type OUTPTR = crate::Reg<outptr::OUTPTR_SPEC>;
+#[doc = "Output pointer"]
+pub mod outptr;
+#[doc = "SCRATCHPTR (rw) register accessor: an alias for `Reg<SCRATCHPTR_SPEC>`"]
+pub type SCRATCHPTR = crate::Reg<scratchptr::SCRATCHPTR_SPEC>;
+#[doc = "Pointer to data area used for temporary storage"]
+pub mod scratchptr;
+#[doc = "MAXPACKETSIZE (rw) register accessor: an alias for `Reg<MAXPACKETSIZE_SPEC>`"]
+pub type MAXPACKETSIZE = crate::Reg<maxpacketsize::MAXPACKETSIZE_SPEC>;
+#[doc = "Length of keystream generated when MODE.LENGTH = Extended"]
+pub mod maxpacketsize;
+#[doc = "RATEOVERRIDE (rw) register accessor: an alias for `Reg<RATEOVERRIDE_SPEC>`"]
+pub type RATEOVERRIDE = crate::Reg<rateoverride::RATEOVERRIDE_SPEC>;
+#[doc = "Data rate override setting."]
+pub mod rateoverride;
+#[doc = "HEADERMASK (rw) register accessor: an alias for `Reg<HEADERMASK_SPEC>`"]
+pub type HEADERMASK = crate::Reg<headermask::HEADERMASK_SPEC>;
+#[doc = "Header (S0) mask."]
+pub mod headermask;

vendor/nrf5340-net-pac/src/ccm_ns/cnfptr.rs

@@ -0,0 +1,80 @@
+#[doc = "Register `CNFPTR` reader"]
+pub struct R(crate::R<CNFPTR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CNFPTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CNFPTR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CNFPTR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CNFPTR` writer"]
+pub struct W(crate::W<CNFPTR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CNFPTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CNFPTR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CNFPTR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CNFPTR` reader - Pointer to the data structure holding the AES key and the CCM NONCE vector (see table CCM data structure overview)"]
+pub type CNFPTR_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `CNFPTR` writer - Pointer to the data structure holding the AES key and the CCM NONCE vector (see table CCM data structure overview)"]
+pub type CNFPTR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CNFPTR_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - Pointer to the data structure holding the AES key and the CCM NONCE vector (see table CCM data structure overview)"]
+    #[inline(always)]
+    pub fn cnfptr(&self) -> CNFPTR_R {
+        CNFPTR_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Pointer to the data structure holding the AES key and the CCM NONCE vector (see table CCM data structure overview)"]
+    #[inline(always)]
+    pub fn cnfptr(&mut self) -> CNFPTR_W<0> {
+        CNFPTR_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Pointer to data structure holding the AES key and the NONCE vector\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnfptr](index.html) module"]
+pub struct CNFPTR_SPEC;
+impl crate::RegisterSpec for CNFPTR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [cnfptr::R](R) reader structure"]
+impl crate::Readable for CNFPTR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [cnfptr::W](W) writer structure"]
+impl crate::Writable for CNFPTR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CNFPTR to value 0"]
+impl crate::Resettable for CNFPTR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/ccm_ns/enable.rs

@@ -0,0 +1,128 @@
+#[doc = "Register `ENABLE` reader"]
+pub struct R(crate::R<ENABLE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ENABLE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ENABLE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ENABLE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ENABLE` writer"]
+pub struct W(crate::W<ENABLE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ENABLE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ENABLE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ENABLE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ENABLE` reader - Enable or disable CCM"]
+pub type ENABLE_R = crate::FieldReader<u8, ENABLE_A>;
+#[doc = "Enable or disable CCM\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum ENABLE_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "2: Enable"]
+    ENABLED = 2,
+}
+impl From<ENABLE_A> for u8 {
+    #[inline(always)]
+    fn from(variant: ENABLE_A) -> Self {
+        variant as _
+    }
+}
+impl ENABLE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<ENABLE_A> {
+        match self.bits {
+            0 => Some(ENABLE_A::DISABLED),
+            2 => Some(ENABLE_A::ENABLED),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == ENABLE_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == ENABLE_A::ENABLED
+    }
+}
+#[doc = "Field `ENABLE` writer - Enable or disable CCM"]
+pub type ENABLE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ENABLE_SPEC, u8, ENABLE_A, 2, O>;
+impl<'a, const O: u8> ENABLE_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(ENABLE_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(ENABLE_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:1 - Enable or disable CCM"]
+    #[inline(always)]
+    pub fn enable(&self) -> ENABLE_R {
+        ENABLE_R::new((self.bits & 3) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:1 - Enable or disable CCM"]
+    #[inline(always)]
+    pub fn enable(&mut self) -> ENABLE_W<0> {
+        ENABLE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [enable](index.html) module"]
+pub struct ENABLE_SPEC;
+impl crate::RegisterSpec for ENABLE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [enable::R](R) reader structure"]
+impl crate::Readable for ENABLE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [enable::W](W) writer structure"]
+impl crate::Writable for ENABLE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets ENABLE to value 0"]
+impl crate::Resettable for ENABLE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/ccm_ns/events_endcrypt.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_ENDCRYPT` reader"]
+pub struct R(crate::R<EVENTS_ENDCRYPT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_ENDCRYPT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_ENDCRYPT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_ENDCRYPT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_ENDCRYPT` writer"]
+pub struct W(crate::W<EVENTS_ENDCRYPT_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_ENDCRYPT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_ENDCRYPT_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_ENDCRYPT_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_ENDCRYPT` reader - Encrypt/decrypt complete"]
+pub type EVENTS_ENDCRYPT_R = crate::BitReader<EVENTS_ENDCRYPT_A>;
+#[doc = "Encrypt/decrypt complete\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_ENDCRYPT_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_ENDCRYPT_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_ENDCRYPT_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_ENDCRYPT_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_ENDCRYPT_A {
+        match self.bits {
+            false => EVENTS_ENDCRYPT_A::NOT_GENERATED,
+            true => EVENTS_ENDCRYPT_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_ENDCRYPT_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_ENDCRYPT_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_ENDCRYPT` writer - Encrypt/decrypt complete"]
+pub type EVENTS_ENDCRYPT_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_ENDCRYPT_SPEC, EVENTS_ENDCRYPT_A, O>;
+impl<'a, const O: u8> EVENTS_ENDCRYPT_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_ENDCRYPT_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_ENDCRYPT_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Encrypt/decrypt complete"]
+    #[inline(always)]
+    pub fn events_endcrypt(&self) -> EVENTS_ENDCRYPT_R {
+        EVENTS_ENDCRYPT_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Encrypt/decrypt complete"]
+    #[inline(always)]
+    pub fn events_endcrypt(&mut self) -> EVENTS_ENDCRYPT_W<0> {
+        EVENTS_ENDCRYPT_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Encrypt/decrypt complete\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_endcrypt](index.html) module"]
+pub struct EVENTS_ENDCRYPT_SPEC;
+impl crate::RegisterSpec for EVENTS_ENDCRYPT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_endcrypt::R](R) reader structure"]
+impl crate::Readable for EVENTS_ENDCRYPT_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_endcrypt::W](W) writer structure"]
+impl crate::Writable for EVENTS_ENDCRYPT_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_ENDCRYPT to value 0"]
+impl crate::Resettable for EVENTS_ENDCRYPT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/ccm_ns/events_endksgen.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_ENDKSGEN` reader"]
+pub struct R(crate::R<EVENTS_ENDKSGEN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_ENDKSGEN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_ENDKSGEN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_ENDKSGEN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_ENDKSGEN` writer"]
+pub struct W(crate::W<EVENTS_ENDKSGEN_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_ENDKSGEN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_ENDKSGEN_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_ENDKSGEN_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_ENDKSGEN` reader - Keystream generation complete"]
+pub type EVENTS_ENDKSGEN_R = crate::BitReader<EVENTS_ENDKSGEN_A>;
+#[doc = "Keystream generation complete\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_ENDKSGEN_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_ENDKSGEN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_ENDKSGEN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_ENDKSGEN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_ENDKSGEN_A {
+        match self.bits {
+            false => EVENTS_ENDKSGEN_A::NOT_GENERATED,
+            true => EVENTS_ENDKSGEN_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_ENDKSGEN_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_ENDKSGEN_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_ENDKSGEN` writer - Keystream generation complete"]
+pub type EVENTS_ENDKSGEN_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_ENDKSGEN_SPEC, EVENTS_ENDKSGEN_A, O>;
+impl<'a, const O: u8> EVENTS_ENDKSGEN_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_ENDKSGEN_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_ENDKSGEN_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Keystream generation complete"]
+    #[inline(always)]
+    pub fn events_endksgen(&self) -> EVENTS_ENDKSGEN_R {
+        EVENTS_ENDKSGEN_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Keystream generation complete"]
+    #[inline(always)]
+    pub fn events_endksgen(&mut self) -> EVENTS_ENDKSGEN_W<0> {
+        EVENTS_ENDKSGEN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Keystream generation complete\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_endksgen](index.html) module"]
+pub struct EVENTS_ENDKSGEN_SPEC;
+impl crate::RegisterSpec for EVENTS_ENDKSGEN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_endksgen::R](R) reader structure"]
+impl crate::Readable for EVENTS_ENDKSGEN_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_endksgen::W](W) writer structure"]
+impl crate::Writable for EVENTS_ENDKSGEN_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_ENDKSGEN to value 0"]
+impl crate::Resettable for EVENTS_ENDKSGEN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/ccm_ns/events_error.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_ERROR` reader"]
+pub struct R(crate::R<EVENTS_ERROR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_ERROR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_ERROR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_ERROR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_ERROR` writer"]
+pub struct W(crate::W<EVENTS_ERROR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_ERROR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_ERROR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_ERROR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_ERROR` reader - Deprecated field - CCM error event"]
+pub type EVENTS_ERROR_R = crate::BitReader<EVENTS_ERROR_A>;
+#[doc = "Deprecated field - CCM error event\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_ERROR_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_ERROR_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_ERROR_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_ERROR_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_ERROR_A {
+        match self.bits {
+            false => EVENTS_ERROR_A::NOT_GENERATED,
+            true => EVENTS_ERROR_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_ERROR_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_ERROR_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_ERROR` writer - Deprecated field - CCM error event"]
+pub type EVENTS_ERROR_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_ERROR_SPEC, EVENTS_ERROR_A, O>;
+impl<'a, const O: u8> EVENTS_ERROR_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_ERROR_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_ERROR_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Deprecated field - CCM error event"]
+    #[inline(always)]
+    pub fn events_error(&self) -> EVENTS_ERROR_R {
+        EVENTS_ERROR_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Deprecated field - CCM error event"]
+    #[inline(always)]
+    pub fn events_error(&mut self) -> EVENTS_ERROR_W<0> {
+        EVENTS_ERROR_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Deprecated register - CCM error event\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_error](index.html) module"]
+pub struct EVENTS_ERROR_SPEC;
+impl crate::RegisterSpec for EVENTS_ERROR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_error::R](R) reader structure"]
+impl crate::Readable for EVENTS_ERROR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_error::W](W) writer structure"]
+impl crate::Writable for EVENTS_ERROR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_ERROR to value 0"]
+impl crate::Resettable for EVENTS_ERROR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/ccm_ns/headermask.rs

@@ -0,0 +1,80 @@
+#[doc = "Register `HEADERMASK` reader"]
+pub struct R(crate::R<HEADERMASK_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HEADERMASK_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HEADERMASK_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HEADERMASK_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `HEADERMASK` writer"]
+pub struct W(crate::W<HEADERMASK_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<HEADERMASK_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<HEADERMASK_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<HEADERMASK_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `HEADERMASK` reader - Header (S0) mask"]
+pub type HEADERMASK_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `HEADERMASK` writer - Header (S0) mask"]
+pub type HEADERMASK_W<'a, const O: u8> = crate::FieldWriter<'a, u32, HEADERMASK_SPEC, u8, u8, 8, O>;
+impl R {
+    #[doc = "Bits 0:7 - Header (S0) mask"]
+    #[inline(always)]
+    pub fn headermask(&self) -> HEADERMASK_R {
+        HEADERMASK_R::new((self.bits & 0xff) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - Header (S0) mask"]
+    #[inline(always)]
+    pub fn headermask(&mut self) -> HEADERMASK_W<0> {
+        HEADERMASK_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Header (S0) mask.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [headermask](index.html) module"]
+pub struct HEADERMASK_SPEC;
+impl crate::RegisterSpec for HEADERMASK_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [headermask::R](R) reader structure"]
+impl crate::Readable for HEADERMASK_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [headermask::W](W) writer structure"]
+impl crate::Writable for HEADERMASK_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets HEADERMASK to value 0xe3"]
+impl crate::Resettable for HEADERMASK_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0xe3
+    }
+}

vendor/nrf5340-net-pac/src/ccm_ns/inptr.rs

@@ -0,0 +1,80 @@
+#[doc = "Register `INPTR` reader"]
+pub struct R(crate::R<INPTR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INPTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INPTR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INPTR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INPTR` writer"]
+pub struct W(crate::W<INPTR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INPTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INPTR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INPTR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `INPTR` reader - Input pointer"]
+pub type INPTR_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `INPTR` writer - Input pointer"]
+pub type INPTR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, INPTR_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - Input pointer"]
+    #[inline(always)]
+    pub fn inptr(&self) -> INPTR_R {
+        INPTR_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Input pointer"]
+    #[inline(always)]
+    pub fn inptr(&mut self) -> INPTR_W<0> {
+        INPTR_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Input pointer\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [inptr](index.html) module"]
+pub struct INPTR_SPEC;
+impl crate::RegisterSpec for INPTR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [inptr::R](R) reader structure"]
+impl crate::Readable for INPTR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [inptr::W](W) writer structure"]
+impl crate::Writable for INPTR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INPTR to value 0"]
+impl crate::Resettable for INPTR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/ccm_ns/intenclr.rs

@@ -0,0 +1,267 @@
+#[doc = "Register `INTENCLR` reader"]
+pub struct R(crate::R<INTENCLR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENCLR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENCLR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENCLR` writer"]
+pub struct W(crate::W<INTENCLR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENCLR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENCLR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ENDKSGEN` reader - Write '1' to disable interrupt for event ENDKSGEN"]
+pub type ENDKSGEN_R = crate::BitReader<ENDKSGEN_A>;
+#[doc = "Write '1' to disable interrupt for event ENDKSGEN\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ENDKSGEN_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<ENDKSGEN_A> for bool {
+    #[inline(always)]
+    fn from(variant: ENDKSGEN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ENDKSGEN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ENDKSGEN_A {
+        match self.bits {
+            false => ENDKSGEN_A::DISABLED,
+            true => ENDKSGEN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == ENDKSGEN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == ENDKSGEN_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event ENDKSGEN\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ENDKSGEN_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<ENDKSGEN_AW> for bool {
+    #[inline(always)]
+    fn from(variant: ENDKSGEN_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `ENDKSGEN` writer - Write '1' to disable interrupt for event ENDKSGEN"]
+pub type ENDKSGEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, ENDKSGEN_AW, O>;
+impl<'a, const O: u8> ENDKSGEN_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(ENDKSGEN_AW::CLEAR)
+    }
+}
+#[doc = "Field `ENDCRYPT` reader - Write '1' to disable interrupt for event ENDCRYPT"]
+pub type ENDCRYPT_R = crate::BitReader<ENDCRYPT_A>;
+#[doc = "Write '1' to disable interrupt for event ENDCRYPT\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ENDCRYPT_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<ENDCRYPT_A> for bool {
+    #[inline(always)]
+    fn from(variant: ENDCRYPT_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ENDCRYPT_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ENDCRYPT_A {
+        match self.bits {
+            false => ENDCRYPT_A::DISABLED,
+            true => ENDCRYPT_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == ENDCRYPT_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == ENDCRYPT_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event ENDCRYPT\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ENDCRYPT_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<ENDCRYPT_AW> for bool {
+    #[inline(always)]
+    fn from(variant: ENDCRYPT_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `ENDCRYPT` writer - Write '1' to disable interrupt for event ENDCRYPT"]
+pub type ENDCRYPT_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, ENDCRYPT_AW, O>;
+impl<'a, const O: u8> ENDCRYPT_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(ENDCRYPT_AW::CLEAR)
+    }
+}
+#[doc = "Field `ERROR` reader - Deprecated intclrfield - Write '1' to disable interrupt for event ERROR"]
+pub type ERROR_R = crate::BitReader<ERROR_A>;
+#[doc = "Deprecated intclrfield - Write '1' to disable interrupt for event ERROR\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ERROR_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<ERROR_A> for bool {
+    #[inline(always)]
+    fn from(variant: ERROR_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ERROR_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ERROR_A {
+        match self.bits {
+            false => ERROR_A::DISABLED,
+            true => ERROR_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == ERROR_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == ERROR_A::ENABLED
+    }
+}
+#[doc = "Deprecated intclrfield - Write '1' to disable interrupt for event ERROR\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ERROR_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<ERROR_AW> for bool {
+    #[inline(always)]
+    fn from(variant: ERROR_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `ERROR` writer - Deprecated intclrfield - Write '1' to disable interrupt for event ERROR"]
+pub type ERROR_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, ERROR_AW, O>;
+impl<'a, const O: u8> ERROR_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(ERROR_AW::CLEAR)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Write '1' to disable interrupt for event ENDKSGEN"]
+    #[inline(always)]
+    pub fn endksgen(&self) -> ENDKSGEN_R {
+        ENDKSGEN_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Write '1' to disable interrupt for event ENDCRYPT"]
+    #[inline(always)]
+    pub fn endcrypt(&self) -> ENDCRYPT_R {
+        ENDCRYPT_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - Deprecated intclrfield - Write '1' to disable interrupt for event ERROR"]
+    #[inline(always)]
+    pub fn error(&self) -> ERROR_R {
+        ERROR_R::new(((self.bits >> 2) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Write '1' to disable interrupt for event ENDKSGEN"]
+    #[inline(always)]
+    pub fn endksgen(&mut self) -> ENDKSGEN_W<0> {
+        ENDKSGEN_W::new(self)
+    }
+    #[doc = "Bit 1 - Write '1' to disable interrupt for event ENDCRYPT"]
+    #[inline(always)]
+    pub fn endcrypt(&mut self) -> ENDCRYPT_W<1> {
+        ENDCRYPT_W::new(self)
+    }
+    #[doc = "Bit 2 - Deprecated intclrfield - Write '1' to disable interrupt for event ERROR"]
+    #[inline(always)]
+    pub fn error(&mut self) -> ERROR_W<2> {
+        ERROR_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Disable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"]
+pub struct INTENCLR_SPEC;
+impl crate::RegisterSpec for INTENCLR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [intenclr::R](R) reader structure"]
+impl crate::Readable for INTENCLR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"]
+impl crate::Writable for INTENCLR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTENCLR to value 0"]
+impl crate::Resettable for INTENCLR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/ccm_ns/intenset.rs

@@ -0,0 +1,267 @@
+#[doc = "Register `INTENSET` reader"]
+pub struct R(crate::R<INTENSET_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENSET_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENSET_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENSET` writer"]
+pub struct W(crate::W<INTENSET_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENSET_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENSET_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ENDKSGEN` reader - Write '1' to enable interrupt for event ENDKSGEN"]
+pub type ENDKSGEN_R = crate::BitReader<ENDKSGEN_A>;
+#[doc = "Write '1' to enable interrupt for event ENDKSGEN\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ENDKSGEN_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<ENDKSGEN_A> for bool {
+    #[inline(always)]
+    fn from(variant: ENDKSGEN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ENDKSGEN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ENDKSGEN_A {
+        match self.bits {
+            false => ENDKSGEN_A::DISABLED,
+            true => ENDKSGEN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == ENDKSGEN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == ENDKSGEN_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event ENDKSGEN\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ENDKSGEN_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<ENDKSGEN_AW> for bool {
+    #[inline(always)]
+    fn from(variant: ENDKSGEN_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `ENDKSGEN` writer - Write '1' to enable interrupt for event ENDKSGEN"]
+pub type ENDKSGEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, ENDKSGEN_AW, O>;
+impl<'a, const O: u8> ENDKSGEN_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(ENDKSGEN_AW::SET)
+    }
+}
+#[doc = "Field `ENDCRYPT` reader - Write '1' to enable interrupt for event ENDCRYPT"]
+pub type ENDCRYPT_R = crate::BitReader<ENDCRYPT_A>;
+#[doc = "Write '1' to enable interrupt for event ENDCRYPT\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ENDCRYPT_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<ENDCRYPT_A> for bool {
+    #[inline(always)]
+    fn from(variant: ENDCRYPT_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ENDCRYPT_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ENDCRYPT_A {
+        match self.bits {
+            false => ENDCRYPT_A::DISABLED,
+            true => ENDCRYPT_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == ENDCRYPT_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == ENDCRYPT_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event ENDCRYPT\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ENDCRYPT_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<ENDCRYPT_AW> for bool {
+    #[inline(always)]
+    fn from(variant: ENDCRYPT_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `ENDCRYPT` writer - Write '1' to enable interrupt for event ENDCRYPT"]
+pub type ENDCRYPT_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, ENDCRYPT_AW, O>;
+impl<'a, const O: u8> ENDCRYPT_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(ENDCRYPT_AW::SET)
+    }
+}
+#[doc = "Field `ERROR` reader - Deprecated intsetfield - Write '1' to enable interrupt for event ERROR"]
+pub type ERROR_R = crate::BitReader<ERROR_A>;
+#[doc = "Deprecated intsetfield - Write '1' to enable interrupt for event ERROR\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ERROR_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<ERROR_A> for bool {
+    #[inline(always)]
+    fn from(variant: ERROR_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ERROR_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ERROR_A {
+        match self.bits {
+            false => ERROR_A::DISABLED,
+            true => ERROR_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == ERROR_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == ERROR_A::ENABLED
+    }
+}
+#[doc = "Deprecated intsetfield - Write '1' to enable interrupt for event ERROR\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ERROR_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<ERROR_AW> for bool {
+    #[inline(always)]
+    fn from(variant: ERROR_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `ERROR` writer - Deprecated intsetfield - Write '1' to enable interrupt for event ERROR"]
+pub type ERROR_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, ERROR_AW, O>;
+impl<'a, const O: u8> ERROR_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(ERROR_AW::SET)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Write '1' to enable interrupt for event ENDKSGEN"]
+    #[inline(always)]
+    pub fn endksgen(&self) -> ENDKSGEN_R {
+        ENDKSGEN_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Write '1' to enable interrupt for event ENDCRYPT"]
+    #[inline(always)]
+    pub fn endcrypt(&self) -> ENDCRYPT_R {
+        ENDCRYPT_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - Deprecated intsetfield - Write '1' to enable interrupt for event ERROR"]
+    #[inline(always)]
+    pub fn error(&self) -> ERROR_R {
+        ERROR_R::new(((self.bits >> 2) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Write '1' to enable interrupt for event ENDKSGEN"]
+    #[inline(always)]
+    pub fn endksgen(&mut self) -> ENDKSGEN_W<0> {
+        ENDKSGEN_W::new(self)
+    }
+    #[doc = "Bit 1 - Write '1' to enable interrupt for event ENDCRYPT"]
+    #[inline(always)]
+    pub fn endcrypt(&mut self) -> ENDCRYPT_W<1> {
+        ENDCRYPT_W::new(self)
+    }
+    #[doc = "Bit 2 - Deprecated intsetfield - Write '1' to enable interrupt for event ERROR"]
+    #[inline(always)]
+    pub fn error(&mut self) -> ERROR_W<2> {
+        ERROR_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Enable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"]
+pub struct INTENSET_SPEC;
+impl crate::RegisterSpec for INTENSET_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [intenset::R](R) reader structure"]
+impl crate::Readable for INTENSET_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"]
+impl crate::Writable for INTENSET_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTENSET to value 0"]
+impl crate::Resettable for INTENSET_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/ccm_ns/maxpacketsize.rs

@@ -0,0 +1,81 @@
+#[doc = "Register `MAXPACKETSIZE` reader"]
+pub struct R(crate::R<MAXPACKETSIZE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<MAXPACKETSIZE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<MAXPACKETSIZE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<MAXPACKETSIZE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `MAXPACKETSIZE` writer"]
+pub struct W(crate::W<MAXPACKETSIZE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<MAXPACKETSIZE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<MAXPACKETSIZE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<MAXPACKETSIZE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `MAXPACKETSIZE` reader - Length of keystream generated when MODE.LENGTH = Extended. This value must be greater than or equal to the subsequent packet payload to be encrypted/decrypted."]
+pub type MAXPACKETSIZE_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `MAXPACKETSIZE` writer - Length of keystream generated when MODE.LENGTH = Extended. This value must be greater than or equal to the subsequent packet payload to be encrypted/decrypted."]
+pub type MAXPACKETSIZE_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, MAXPACKETSIZE_SPEC, u8, u8, 8, O>;
+impl R {
+    #[doc = "Bits 0:7 - Length of keystream generated when MODE.LENGTH = Extended. This value must be greater than or equal to the subsequent packet payload to be encrypted/decrypted."]
+    #[inline(always)]
+    pub fn maxpacketsize(&self) -> MAXPACKETSIZE_R {
+        MAXPACKETSIZE_R::new((self.bits & 0xff) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - Length of keystream generated when MODE.LENGTH = Extended. This value must be greater than or equal to the subsequent packet payload to be encrypted/decrypted."]
+    #[inline(always)]
+    pub fn maxpacketsize(&mut self) -> MAXPACKETSIZE_W<0> {
+        MAXPACKETSIZE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Length of keystream generated when MODE.LENGTH = Extended\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [maxpacketsize](index.html) module"]
+pub struct MAXPACKETSIZE_SPEC;
+impl crate::RegisterSpec for MAXPACKETSIZE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [maxpacketsize::R](R) reader structure"]
+impl crate::Readable for MAXPACKETSIZE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [maxpacketsize::W](W) writer structure"]
+impl crate::Writable for MAXPACKETSIZE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets MAXPACKETSIZE to value 0xfb"]
+impl crate::Resettable for MAXPACKETSIZE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0xfb
+    }
+}

vendor/nrf5340-net-pac/src/ccm_ns/micstatus.rs

@@ -0,0 +1,74 @@
+#[doc = "Register `MICSTATUS` reader"]
+pub struct R(crate::R<MICSTATUS_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<MICSTATUS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<MICSTATUS_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<MICSTATUS_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `MICSTATUS` reader - The result of the MIC check performed during the previous decryption operation"]
+pub type MICSTATUS_R = crate::BitReader<MICSTATUS_A>;
+#[doc = "The result of the MIC check performed during the previous decryption operation\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum MICSTATUS_A {
+    #[doc = "0: MIC check failed"]
+    CHECK_FAILED = 0,
+    #[doc = "1: MIC check passed"]
+    CHECK_PASSED = 1,
+}
+impl From<MICSTATUS_A> for bool {
+    #[inline(always)]
+    fn from(variant: MICSTATUS_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl MICSTATUS_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> MICSTATUS_A {
+        match self.bits {
+            false => MICSTATUS_A::CHECK_FAILED,
+            true => MICSTATUS_A::CHECK_PASSED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `CHECK_FAILED`"]
+    #[inline(always)]
+    pub fn is_check_failed(&self) -> bool {
+        *self == MICSTATUS_A::CHECK_FAILED
+    }
+    #[doc = "Checks if the value of the field is `CHECK_PASSED`"]
+    #[inline(always)]
+    pub fn is_check_passed(&self) -> bool {
+        *self == MICSTATUS_A::CHECK_PASSED
+    }
+}
+impl R {
+    #[doc = "Bit 0 - The result of the MIC check performed during the previous decryption operation"]
+    #[inline(always)]
+    pub fn micstatus(&self) -> MICSTATUS_R {
+        MICSTATUS_R::new((self.bits & 1) != 0)
+    }
+}
+#[doc = "MIC check result\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [micstatus](index.html) module"]
+pub struct MICSTATUS_SPEC;
+impl crate::RegisterSpec for MICSTATUS_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [micstatus::R](R) reader structure"]
+impl crate::Readable for MICSTATUS_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets MICSTATUS to value 0"]
+impl crate::Resettable for MICSTATUS_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/ccm_ns/mode.rs

@@ -0,0 +1,275 @@
+#[doc = "Register `MODE` reader"]
+pub struct R(crate::R<MODE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<MODE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<MODE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<MODE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `MODE` writer"]
+pub struct W(crate::W<MODE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<MODE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<MODE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<MODE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `MODE` reader - The mode of operation to be used. Settings in this register apply whenever either the KSGEN task or the CRYPT task is triggered."]
+pub type MODE_R = crate::BitReader<MODE_A>;
+#[doc = "The mode of operation to be used. Settings in this register apply whenever either the KSGEN task or the CRYPT task is triggered.\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum MODE_A {
+    #[doc = "0: AES CCM packet encryption mode"]
+    ENCRYPTION = 0,
+    #[doc = "1: AES CCM packet decryption mode"]
+    DECRYPTION = 1,
+}
+impl From<MODE_A> for bool {
+    #[inline(always)]
+    fn from(variant: MODE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl MODE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> MODE_A {
+        match self.bits {
+            false => MODE_A::ENCRYPTION,
+            true => MODE_A::DECRYPTION,
+        }
+    }
+    #[doc = "Checks if the value of the field is `ENCRYPTION`"]
+    #[inline(always)]
+    pub fn is_encryption(&self) -> bool {
+        *self == MODE_A::ENCRYPTION
+    }
+    #[doc = "Checks if the value of the field is `DECRYPTION`"]
+    #[inline(always)]
+    pub fn is_decryption(&self) -> bool {
+        *self == MODE_A::DECRYPTION
+    }
+}
+#[doc = "Field `MODE` writer - The mode of operation to be used. Settings in this register apply whenever either the KSGEN task or the CRYPT task is triggered."]
+pub type MODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, MODE_SPEC, MODE_A, O>;
+impl<'a, const O: u8> MODE_W<'a, O> {
+    #[doc = "AES CCM packet encryption mode"]
+    #[inline(always)]
+    pub fn encryption(self) -> &'a mut W {
+        self.variant(MODE_A::ENCRYPTION)
+    }
+    #[doc = "AES CCM packet decryption mode"]
+    #[inline(always)]
+    pub fn decryption(self) -> &'a mut W {
+        self.variant(MODE_A::DECRYPTION)
+    }
+}
+#[doc = "Field `DATARATE` reader - Radio data rate that the CCM shall run synchronous with"]
+pub type DATARATE_R = crate::FieldReader<u8, DATARATE_A>;
+#[doc = "Radio data rate that the CCM shall run synchronous with\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum DATARATE_A {
+    #[doc = "0: 1 Mbps"]
+    _1MBIT = 0,
+    #[doc = "1: 2 Mbps"]
+    _2MBIT = 1,
+    #[doc = "2: 125 kbps"]
+    _125KBPS = 2,
+    #[doc = "3: 500 kbps"]
+    _500KBPS = 3,
+}
+impl From<DATARATE_A> for u8 {
+    #[inline(always)]
+    fn from(variant: DATARATE_A) -> Self {
+        variant as _
+    }
+}
+impl DATARATE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DATARATE_A {
+        match self.bits {
+            0 => DATARATE_A::_1MBIT,
+            1 => DATARATE_A::_2MBIT,
+            2 => DATARATE_A::_125KBPS,
+            3 => DATARATE_A::_500KBPS,
+            _ => unreachable!(),
+        }
+    }
+    #[doc = "Checks if the value of the field is `_1MBIT`"]
+    #[inline(always)]
+    pub fn is_1mbit(&self) -> bool {
+        *self == DATARATE_A::_1MBIT
+    }
+    #[doc = "Checks if the value of the field is `_2MBIT`"]
+    #[inline(always)]
+    pub fn is_2mbit(&self) -> bool {
+        *self == DATARATE_A::_2MBIT
+    }
+    #[doc = "Checks if the value of the field is `_125KBPS`"]
+    #[inline(always)]
+    pub fn is_125kbps(&self) -> bool {
+        *self == DATARATE_A::_125KBPS
+    }
+    #[doc = "Checks if the value of the field is `_500KBPS`"]
+    #[inline(always)]
+    pub fn is_500kbps(&self) -> bool {
+        *self == DATARATE_A::_500KBPS
+    }
+}
+#[doc = "Field `DATARATE` writer - Radio data rate that the CCM shall run synchronous with"]
+pub type DATARATE_W<'a, const O: u8> =
+    crate::FieldWriterSafe<'a, u32, MODE_SPEC, u8, DATARATE_A, 2, O>;
+impl<'a, const O: u8> DATARATE_W<'a, O> {
+    #[doc = "1 Mbps"]
+    #[inline(always)]
+    pub fn _1mbit(self) -> &'a mut W {
+        self.variant(DATARATE_A::_1MBIT)
+    }
+    #[doc = "2 Mbps"]
+    #[inline(always)]
+    pub fn _2mbit(self) -> &'a mut W {
+        self.variant(DATARATE_A::_2MBIT)
+    }
+    #[doc = "125 kbps"]
+    #[inline(always)]
+    pub fn _125kbps(self) -> &'a mut W {
+        self.variant(DATARATE_A::_125KBPS)
+    }
+    #[doc = "500 kbps"]
+    #[inline(always)]
+    pub fn _500kbps(self) -> &'a mut W {
+        self.variant(DATARATE_A::_500KBPS)
+    }
+}
+#[doc = "Field `LENGTH` reader - Packet length configuration"]
+pub type LENGTH_R = crate::BitReader<LENGTH_A>;
+#[doc = "Packet length configuration\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum LENGTH_A {
+    #[doc = "0: Default length. Effective length of LENGTH field in encrypted/decrypted packet is 5 bits. A keystream for packet payloads up to 27 bytes will be generated."]
+    DEFAULT = 0,
+    #[doc = "1: Extended length. Effective length of LENGTH field in encrypted/decrypted packet is 8 bits. A keystream for packet payloads up to MAXPACKETSIZE bytes will be generated."]
+    EXTENDED = 1,
+}
+impl From<LENGTH_A> for bool {
+    #[inline(always)]
+    fn from(variant: LENGTH_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl LENGTH_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> LENGTH_A {
+        match self.bits {
+            false => LENGTH_A::DEFAULT,
+            true => LENGTH_A::EXTENDED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DEFAULT`"]
+    #[inline(always)]
+    pub fn is_default(&self) -> bool {
+        *self == LENGTH_A::DEFAULT
+    }
+    #[doc = "Checks if the value of the field is `EXTENDED`"]
+    #[inline(always)]
+    pub fn is_extended(&self) -> bool {
+        *self == LENGTH_A::EXTENDED
+    }
+}
+#[doc = "Field `LENGTH` writer - Packet length configuration"]
+pub type LENGTH_W<'a, const O: u8> = crate::BitWriter<'a, u32, MODE_SPEC, LENGTH_A, O>;
+impl<'a, const O: u8> LENGTH_W<'a, O> {
+    #[doc = "Default length. Effective length of LENGTH field in encrypted/decrypted packet is 5 bits. A keystream for packet payloads up to 27 bytes will be generated."]
+    #[inline(always)]
+    pub fn default(self) -> &'a mut W {
+        self.variant(LENGTH_A::DEFAULT)
+    }
+    #[doc = "Extended length. Effective length of LENGTH field in encrypted/decrypted packet is 8 bits. A keystream for packet payloads up to MAXPACKETSIZE bytes will be generated."]
+    #[inline(always)]
+    pub fn extended(self) -> &'a mut W {
+        self.variant(LENGTH_A::EXTENDED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - The mode of operation to be used. Settings in this register apply whenever either the KSGEN task or the CRYPT task is triggered."]
+    #[inline(always)]
+    pub fn mode(&self) -> MODE_R {
+        MODE_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bits 16:17 - Radio data rate that the CCM shall run synchronous with"]
+    #[inline(always)]
+    pub fn datarate(&self) -> DATARATE_R {
+        DATARATE_R::new(((self.bits >> 16) & 3) as u8)
+    }
+    #[doc = "Bit 24 - Packet length configuration"]
+    #[inline(always)]
+    pub fn length(&self) -> LENGTH_R {
+        LENGTH_R::new(((self.bits >> 24) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - The mode of operation to be used. Settings in this register apply whenever either the KSGEN task or the CRYPT task is triggered."]
+    #[inline(always)]
+    pub fn mode(&mut self) -> MODE_W<0> {
+        MODE_W::new(self)
+    }
+    #[doc = "Bits 16:17 - Radio data rate that the CCM shall run synchronous with"]
+    #[inline(always)]
+    pub fn datarate(&mut self) -> DATARATE_W<16> {
+        DATARATE_W::new(self)
+    }
+    #[doc = "Bit 24 - Packet length configuration"]
+    #[inline(always)]
+    pub fn length(&mut self) -> LENGTH_W<24> {
+        LENGTH_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Operation mode\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mode](index.html) module"]
+pub struct MODE_SPEC;
+impl crate::RegisterSpec for MODE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [mode::R](R) reader structure"]
+impl crate::Readable for MODE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [mode::W](W) writer structure"]
+impl crate::Writable for MODE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets MODE to value 0x01"]
+impl crate::Resettable for MODE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x01
+    }
+}

vendor/nrf5340-net-pac/src/ccm_ns/outptr.rs

@@ -0,0 +1,80 @@
+#[doc = "Register `OUTPTR` reader"]
+pub struct R(crate::R<OUTPTR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<OUTPTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<OUTPTR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<OUTPTR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `OUTPTR` writer"]
+pub struct W(crate::W<OUTPTR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<OUTPTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<OUTPTR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<OUTPTR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `OUTPTR` reader - Output pointer"]
+pub type OUTPTR_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `OUTPTR` writer - Output pointer"]
+pub type OUTPTR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, OUTPTR_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - Output pointer"]
+    #[inline(always)]
+    pub fn outptr(&self) -> OUTPTR_R {
+        OUTPTR_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Output pointer"]
+    #[inline(always)]
+    pub fn outptr(&mut self) -> OUTPTR_W<0> {
+        OUTPTR_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Output pointer\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [outptr](index.html) module"]
+pub struct OUTPTR_SPEC;
+impl crate::RegisterSpec for OUTPTR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [outptr::R](R) reader structure"]
+impl crate::Readable for OUTPTR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [outptr::W](W) writer structure"]
+impl crate::Writable for OUTPTR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets OUTPTR to value 0"]
+impl crate::Resettable for OUTPTR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/ccm_ns/publish_endcrypt.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `PUBLISH_ENDCRYPT` reader"]
+pub struct R(crate::R<PUBLISH_ENDCRYPT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PUBLISH_ENDCRYPT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PUBLISH_ENDCRYPT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PUBLISH_ENDCRYPT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PUBLISH_ENDCRYPT` writer"]
+pub struct W(crate::W<PUBLISH_ENDCRYPT_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PUBLISH_ENDCRYPT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PUBLISH_ENDCRYPT_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PUBLISH_ENDCRYPT_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that event ENDCRYPT will publish to."]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that event ENDCRYPT will publish to."]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, PUBLISH_ENDCRYPT_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable publishing"]
+    DISABLED = 0,
+    #[doc = "1: Enable publishing"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PUBLISH_ENDCRYPT_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable publishing"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable publishing"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that event ENDCRYPT will publish to."]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that event ENDCRYPT will publish to."]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Publish configuration for event ENDCRYPT\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [publish_endcrypt](index.html) module"]
+pub struct PUBLISH_ENDCRYPT_SPEC;
+impl crate::RegisterSpec for PUBLISH_ENDCRYPT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [publish_endcrypt::R](R) reader structure"]
+impl crate::Readable for PUBLISH_ENDCRYPT_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [publish_endcrypt::W](W) writer structure"]
+impl crate::Writable for PUBLISH_ENDCRYPT_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PUBLISH_ENDCRYPT to value 0"]
+impl crate::Resettable for PUBLISH_ENDCRYPT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/ccm_ns/publish_endksgen.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `PUBLISH_ENDKSGEN` reader"]
+pub struct R(crate::R<PUBLISH_ENDKSGEN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PUBLISH_ENDKSGEN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PUBLISH_ENDKSGEN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PUBLISH_ENDKSGEN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PUBLISH_ENDKSGEN` writer"]
+pub struct W(crate::W<PUBLISH_ENDKSGEN_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PUBLISH_ENDKSGEN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PUBLISH_ENDKSGEN_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PUBLISH_ENDKSGEN_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that event ENDKSGEN will publish to."]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that event ENDKSGEN will publish to."]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, PUBLISH_ENDKSGEN_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable publishing"]
+    DISABLED = 0,
+    #[doc = "1: Enable publishing"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PUBLISH_ENDKSGEN_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable publishing"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable publishing"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that event ENDKSGEN will publish to."]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that event ENDKSGEN will publish to."]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Publish configuration for event ENDKSGEN\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [publish_endksgen](index.html) module"]
+pub struct PUBLISH_ENDKSGEN_SPEC;
+impl crate::RegisterSpec for PUBLISH_ENDKSGEN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [publish_endksgen::R](R) reader structure"]
+impl crate::Readable for PUBLISH_ENDKSGEN_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [publish_endksgen::W](W) writer structure"]
+impl crate::Writable for PUBLISH_ENDKSGEN_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PUBLISH_ENDKSGEN to value 0"]
+impl crate::Resettable for PUBLISH_ENDKSGEN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/ccm_ns/publish_error.rs

@@ -0,0 +1,140 @@
+#[doc = "Register `PUBLISH_ERROR` reader"]
+pub struct R(crate::R<PUBLISH_ERROR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PUBLISH_ERROR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PUBLISH_ERROR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PUBLISH_ERROR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PUBLISH_ERROR` writer"]
+pub struct W(crate::W<PUBLISH_ERROR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PUBLISH_ERROR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PUBLISH_ERROR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PUBLISH_ERROR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that event ERROR will publish to."]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that event ERROR will publish to."]
+pub type CHIDX_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PUBLISH_ERROR_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable publishing"]
+    DISABLED = 0,
+    #[doc = "1: Enable publishing"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PUBLISH_ERROR_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable publishing"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable publishing"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that event ERROR will publish to."]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that event ERROR will publish to."]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Deprecated register - Publish configuration for event ERROR\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [publish_error](index.html) module"]
+pub struct PUBLISH_ERROR_SPEC;
+impl crate::RegisterSpec for PUBLISH_ERROR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [publish_error::R](R) reader structure"]
+impl crate::Readable for PUBLISH_ERROR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [publish_error::W](W) writer structure"]
+impl crate::Writable for PUBLISH_ERROR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PUBLISH_ERROR to value 0"]
+impl crate::Resettable for PUBLISH_ERROR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/ccm_ns/rateoverride.rs

@@ -0,0 +1,155 @@
+#[doc = "Register `RATEOVERRIDE` reader"]
+pub struct R(crate::R<RATEOVERRIDE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<RATEOVERRIDE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<RATEOVERRIDE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<RATEOVERRIDE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `RATEOVERRIDE` writer"]
+pub struct W(crate::W<RATEOVERRIDE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<RATEOVERRIDE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<RATEOVERRIDE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<RATEOVERRIDE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `RATEOVERRIDE` reader - Data rate override setting"]
+pub type RATEOVERRIDE_R = crate::FieldReader<u8, RATEOVERRIDE_A>;
+#[doc = "Data rate override setting\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum RATEOVERRIDE_A {
+    #[doc = "0: 1 Mbps"]
+    _1MBIT = 0,
+    #[doc = "1: 2 Mbps"]
+    _2MBIT = 1,
+    #[doc = "2: 125 kbps"]
+    _125KBPS = 2,
+    #[doc = "3: 500 kbps"]
+    _500KBPS = 3,
+}
+impl From<RATEOVERRIDE_A> for u8 {
+    #[inline(always)]
+    fn from(variant: RATEOVERRIDE_A) -> Self {
+        variant as _
+    }
+}
+impl RATEOVERRIDE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> RATEOVERRIDE_A {
+        match self.bits {
+            0 => RATEOVERRIDE_A::_1MBIT,
+            1 => RATEOVERRIDE_A::_2MBIT,
+            2 => RATEOVERRIDE_A::_125KBPS,
+            3 => RATEOVERRIDE_A::_500KBPS,
+            _ => unreachable!(),
+        }
+    }
+    #[doc = "Checks if the value of the field is `_1MBIT`"]
+    #[inline(always)]
+    pub fn is_1mbit(&self) -> bool {
+        *self == RATEOVERRIDE_A::_1MBIT
+    }
+    #[doc = "Checks if the value of the field is `_2MBIT`"]
+    #[inline(always)]
+    pub fn is_2mbit(&self) -> bool {
+        *self == RATEOVERRIDE_A::_2MBIT
+    }
+    #[doc = "Checks if the value of the field is `_125KBPS`"]
+    #[inline(always)]
+    pub fn is_125kbps(&self) -> bool {
+        *self == RATEOVERRIDE_A::_125KBPS
+    }
+    #[doc = "Checks if the value of the field is `_500KBPS`"]
+    #[inline(always)]
+    pub fn is_500kbps(&self) -> bool {
+        *self == RATEOVERRIDE_A::_500KBPS
+    }
+}
+#[doc = "Field `RATEOVERRIDE` writer - Data rate override setting"]
+pub type RATEOVERRIDE_W<'a, const O: u8> =
+    crate::FieldWriterSafe<'a, u32, RATEOVERRIDE_SPEC, u8, RATEOVERRIDE_A, 2, O>;
+impl<'a, const O: u8> RATEOVERRIDE_W<'a, O> {
+    #[doc = "1 Mbps"]
+    #[inline(always)]
+    pub fn _1mbit(self) -> &'a mut W {
+        self.variant(RATEOVERRIDE_A::_1MBIT)
+    }
+    #[doc = "2 Mbps"]
+    #[inline(always)]
+    pub fn _2mbit(self) -> &'a mut W {
+        self.variant(RATEOVERRIDE_A::_2MBIT)
+    }
+    #[doc = "125 kbps"]
+    #[inline(always)]
+    pub fn _125kbps(self) -> &'a mut W {
+        self.variant(RATEOVERRIDE_A::_125KBPS)
+    }
+    #[doc = "500 kbps"]
+    #[inline(always)]
+    pub fn _500kbps(self) -> &'a mut W {
+        self.variant(RATEOVERRIDE_A::_500KBPS)
+    }
+}
+impl R {
+    #[doc = "Bits 0:1 - Data rate override setting"]
+    #[inline(always)]
+    pub fn rateoverride(&self) -> RATEOVERRIDE_R {
+        RATEOVERRIDE_R::new((self.bits & 3) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:1 - Data rate override setting"]
+    #[inline(always)]
+    pub fn rateoverride(&mut self) -> RATEOVERRIDE_W<0> {
+        RATEOVERRIDE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Data rate override setting.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rateoverride](index.html) module"]
+pub struct RATEOVERRIDE_SPEC;
+impl crate::RegisterSpec for RATEOVERRIDE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [rateoverride::R](R) reader structure"]
+impl crate::Readable for RATEOVERRIDE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [rateoverride::W](W) writer structure"]
+impl crate::Writable for RATEOVERRIDE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets RATEOVERRIDE to value 0"]
+impl crate::Resettable for RATEOVERRIDE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/ccm_ns/scratchptr.rs

@@ -0,0 +1,81 @@
+#[doc = "Register `SCRATCHPTR` reader"]
+pub struct R(crate::R<SCRATCHPTR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SCRATCHPTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SCRATCHPTR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SCRATCHPTR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SCRATCHPTR` writer"]
+pub struct W(crate::W<SCRATCHPTR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SCRATCHPTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SCRATCHPTR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SCRATCHPTR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `SCRATCHPTR` reader - Pointer to a scratch data area used for temporary storage during keystream generation, MIC generation and encryption/decryption."]
+pub type SCRATCHPTR_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `SCRATCHPTR` writer - Pointer to a scratch data area used for temporary storage during keystream generation, MIC generation and encryption/decryption."]
+pub type SCRATCHPTR_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, SCRATCHPTR_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - Pointer to a scratch data area used for temporary storage during keystream generation, MIC generation and encryption/decryption."]
+    #[inline(always)]
+    pub fn scratchptr(&self) -> SCRATCHPTR_R {
+        SCRATCHPTR_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Pointer to a scratch data area used for temporary storage during keystream generation, MIC generation and encryption/decryption."]
+    #[inline(always)]
+    pub fn scratchptr(&mut self) -> SCRATCHPTR_W<0> {
+        SCRATCHPTR_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Pointer to data area used for temporary storage\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scratchptr](index.html) module"]
+pub struct SCRATCHPTR_SPEC;
+impl crate::RegisterSpec for SCRATCHPTR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [scratchptr::R](R) reader structure"]
+impl crate::Readable for SCRATCHPTR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [scratchptr::W](W) writer structure"]
+impl crate::Writable for SCRATCHPTR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SCRATCHPTR to value 0"]
+impl crate::Resettable for SCRATCHPTR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/ccm_ns/shorts.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `SHORTS` reader"]
+pub struct R(crate::R<SHORTS_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SHORTS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SHORTS_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SHORTS_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SHORTS` writer"]
+pub struct W(crate::W<SHORTS_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SHORTS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SHORTS_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SHORTS_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ENDKSGEN_CRYPT` reader - Shortcut between event ENDKSGEN and task CRYPT"]
+pub type ENDKSGEN_CRYPT_R = crate::BitReader<ENDKSGEN_CRYPT_A>;
+#[doc = "Shortcut between event ENDKSGEN and task CRYPT\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ENDKSGEN_CRYPT_A {
+    #[doc = "0: Disable shortcut"]
+    DISABLED = 0,
+    #[doc = "1: Enable shortcut"]
+    ENABLED = 1,
+}
+impl From<ENDKSGEN_CRYPT_A> for bool {
+    #[inline(always)]
+    fn from(variant: ENDKSGEN_CRYPT_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ENDKSGEN_CRYPT_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ENDKSGEN_CRYPT_A {
+        match self.bits {
+            false => ENDKSGEN_CRYPT_A::DISABLED,
+            true => ENDKSGEN_CRYPT_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == ENDKSGEN_CRYPT_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == ENDKSGEN_CRYPT_A::ENABLED
+    }
+}
+#[doc = "Field `ENDKSGEN_CRYPT` writer - Shortcut between event ENDKSGEN and task CRYPT"]
+pub type ENDKSGEN_CRYPT_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, SHORTS_SPEC, ENDKSGEN_CRYPT_A, O>;
+impl<'a, const O: u8> ENDKSGEN_CRYPT_W<'a, O> {
+    #[doc = "Disable shortcut"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(ENDKSGEN_CRYPT_A::DISABLED)
+    }
+    #[doc = "Enable shortcut"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(ENDKSGEN_CRYPT_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Shortcut between event ENDKSGEN and task CRYPT"]
+    #[inline(always)]
+    pub fn endksgen_crypt(&self) -> ENDKSGEN_CRYPT_R {
+        ENDKSGEN_CRYPT_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Shortcut between event ENDKSGEN and task CRYPT"]
+    #[inline(always)]
+    pub fn endksgen_crypt(&mut self) -> ENDKSGEN_CRYPT_W<0> {
+        ENDKSGEN_CRYPT_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Shortcuts between local events and tasks\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [shorts](index.html) module"]
+pub struct SHORTS_SPEC;
+impl crate::RegisterSpec for SHORTS_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [shorts::R](R) reader structure"]
+impl crate::Readable for SHORTS_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [shorts::W](W) writer structure"]
+impl crate::Writable for SHORTS_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SHORTS to value 0"]
+impl crate::Resettable for SHORTS_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/ccm_ns/subscribe_crypt.rs

@@ -0,0 +1,140 @@
+#[doc = "Register `SUBSCRIBE_CRYPT` reader"]
+pub struct R(crate::R<SUBSCRIBE_CRYPT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_CRYPT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_CRYPT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_CRYPT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_CRYPT` writer"]
+pub struct W(crate::W<SUBSCRIBE_CRYPT_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_CRYPT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_CRYPT_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_CRYPT_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that task CRYPT will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that task CRYPT will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SUBSCRIBE_CRYPT_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_CRYPT_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that task CRYPT will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that task CRYPT will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task CRYPT\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_crypt](index.html) module"]
+pub struct SUBSCRIBE_CRYPT_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_CRYPT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_crypt::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_CRYPT_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_crypt::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_CRYPT_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_CRYPT to value 0"]
+impl crate::Resettable for SUBSCRIBE_CRYPT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/ccm_ns/subscribe_ksgen.rs

@@ -0,0 +1,140 @@
+#[doc = "Register `SUBSCRIBE_KSGEN` reader"]
+pub struct R(crate::R<SUBSCRIBE_KSGEN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_KSGEN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_KSGEN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_KSGEN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_KSGEN` writer"]
+pub struct W(crate::W<SUBSCRIBE_KSGEN_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_KSGEN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_KSGEN_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_KSGEN_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that task KSGEN will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that task KSGEN will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SUBSCRIBE_KSGEN_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_KSGEN_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that task KSGEN will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that task KSGEN will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task KSGEN\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_ksgen](index.html) module"]
+pub struct SUBSCRIBE_KSGEN_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_KSGEN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_ksgen::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_KSGEN_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_ksgen::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_KSGEN_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_KSGEN to value 0"]
+impl crate::Resettable for SUBSCRIBE_KSGEN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/ccm_ns/subscribe_rateoverride.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `SUBSCRIBE_RATEOVERRIDE` reader"]
+pub struct R(crate::R<SUBSCRIBE_RATEOVERRIDE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_RATEOVERRIDE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_RATEOVERRIDE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_RATEOVERRIDE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_RATEOVERRIDE` writer"]
+pub struct W(crate::W<SUBSCRIBE_RATEOVERRIDE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_RATEOVERRIDE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_RATEOVERRIDE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_RATEOVERRIDE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that task RATEOVERRIDE will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that task RATEOVERRIDE will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, SUBSCRIBE_RATEOVERRIDE_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_RATEOVERRIDE_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that task RATEOVERRIDE will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that task RATEOVERRIDE will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task RATEOVERRIDE\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_rateoverride](index.html) module"]
+pub struct SUBSCRIBE_RATEOVERRIDE_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_RATEOVERRIDE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_rateoverride::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_RATEOVERRIDE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_rateoverride::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_RATEOVERRIDE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_RATEOVERRIDE to value 0"]
+impl crate::Resettable for SUBSCRIBE_RATEOVERRIDE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/ccm_ns/subscribe_stop.rs

@@ -0,0 +1,140 @@
+#[doc = "Register `SUBSCRIBE_STOP` reader"]
+pub struct R(crate::R<SUBSCRIBE_STOP_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_STOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_STOP_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_STOP_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_STOP` writer"]
+pub struct W(crate::W<SUBSCRIBE_STOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_STOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_STOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_STOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that task STOP will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that task STOP will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SUBSCRIBE_STOP_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_STOP_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that task STOP will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that task STOP will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task STOP\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_stop](index.html) module"]
+pub struct SUBSCRIBE_STOP_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_STOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_stop::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_STOP_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_stop::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_STOP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_STOP to value 0"]
+impl crate::Resettable for SUBSCRIBE_STOP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/ccm_ns/tasks_crypt.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_CRYPT` writer"]
+pub struct W(crate::W<TASKS_CRYPT_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_CRYPT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_CRYPT_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_CRYPT_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Start encryption/decryption. This operation will stop by itself when completed.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_CRYPT_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_CRYPT_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_CRYPT_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_CRYPT` writer - Start encryption/decryption. This operation will stop by itself when completed."]
+pub type TASKS_CRYPT_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_CRYPT_SPEC, TASKS_CRYPT_AW, O>;
+impl<'a, const O: u8> TASKS_CRYPT_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_CRYPT_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Start encryption/decryption. This operation will stop by itself when completed."]
+    #[inline(always)]
+    pub fn tasks_crypt(&mut self) -> TASKS_CRYPT_W<0> {
+        TASKS_CRYPT_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Start encryption/decryption. This operation will stop by itself when completed.\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_crypt](index.html) module"]
+pub struct TASKS_CRYPT_SPEC;
+impl crate::RegisterSpec for TASKS_CRYPT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_crypt::W](W) writer structure"]
+impl crate::Writable for TASKS_CRYPT_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_CRYPT to value 0"]
+impl crate::Resettable for TASKS_CRYPT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/ccm_ns/tasks_ksgen.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_KSGEN` writer"]
+pub struct W(crate::W<TASKS_KSGEN_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_KSGEN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_KSGEN_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_KSGEN_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Start generation of keystream. This operation will stop by itself when completed.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_KSGEN_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_KSGEN_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_KSGEN_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_KSGEN` writer - Start generation of keystream. This operation will stop by itself when completed."]
+pub type TASKS_KSGEN_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_KSGEN_SPEC, TASKS_KSGEN_AW, O>;
+impl<'a, const O: u8> TASKS_KSGEN_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_KSGEN_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Start generation of keystream. This operation will stop by itself when completed."]
+    #[inline(always)]
+    pub fn tasks_ksgen(&mut self) -> TASKS_KSGEN_W<0> {
+        TASKS_KSGEN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Start generation of keystream. This operation will stop by itself when completed.\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_ksgen](index.html) module"]
+pub struct TASKS_KSGEN_SPEC;
+impl crate::RegisterSpec for TASKS_KSGEN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_ksgen::W](W) writer structure"]
+impl crate::Writable for TASKS_KSGEN_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_KSGEN to value 0"]
+impl crate::Resettable for TASKS_KSGEN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/ccm_ns/tasks_rateoverride.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_RATEOVERRIDE` writer"]
+pub struct W(crate::W<TASKS_RATEOVERRIDE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_RATEOVERRIDE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_RATEOVERRIDE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_RATEOVERRIDE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Override DATARATE setting in MODE register with the contents of the RATEOVERRIDE register for any ongoing encryption/decryption\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_RATEOVERRIDE_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_RATEOVERRIDE_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_RATEOVERRIDE_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_RATEOVERRIDE` writer - Override DATARATE setting in MODE register with the contents of the RATEOVERRIDE register for any ongoing encryption/decryption"]
+pub type TASKS_RATEOVERRIDE_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_RATEOVERRIDE_SPEC, TASKS_RATEOVERRIDE_AW, O>;
+impl<'a, const O: u8> TASKS_RATEOVERRIDE_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_RATEOVERRIDE_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Override DATARATE setting in MODE register with the contents of the RATEOVERRIDE register for any ongoing encryption/decryption"]
+    #[inline(always)]
+    pub fn tasks_rateoverride(&mut self) -> TASKS_RATEOVERRIDE_W<0> {
+        TASKS_RATEOVERRIDE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Override DATARATE setting in MODE register with the contents of the RATEOVERRIDE register for any ongoing encryption/decryption\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_rateoverride](index.html) module"]
+pub struct TASKS_RATEOVERRIDE_SPEC;
+impl crate::RegisterSpec for TASKS_RATEOVERRIDE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_rateoverride::W](W) writer structure"]
+impl crate::Writable for TASKS_RATEOVERRIDE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_RATEOVERRIDE to value 0"]
+impl crate::Resettable for TASKS_RATEOVERRIDE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/ccm_ns/tasks_stop.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_STOP` writer"]
+pub struct W(crate::W<TASKS_STOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_STOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_STOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_STOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Stop encryption/decryption\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_STOP_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_STOP_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_STOP_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_STOP` writer - Stop encryption/decryption"]
+pub type TASKS_STOP_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_STOP_SPEC, TASKS_STOP_AW, O>;
+impl<'a, const O: u8> TASKS_STOP_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_STOP_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Stop encryption/decryption"]
+    #[inline(always)]
+    pub fn tasks_stop(&mut self) -> TASKS_STOP_W<0> {
+        TASKS_STOP_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Stop encryption/decryption\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_stop](index.html) module"]
+pub struct TASKS_STOP_SPEC;
+impl crate::RegisterSpec for TASKS_STOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_stop::W](W) writer structure"]
+impl crate::Writable for TASKS_STOP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_STOP to value 0"]
+impl crate::Resettable for TASKS_STOP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/clock_ns.rs

@@ -0,0 +1,195 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct RegisterBlock {
+    #[doc = "0x00 - Start HFCLK128M/HFCLK64M source as selected in HFCLKSRC"]
+    pub tasks_hfclkstart: TASKS_HFCLKSTART,
+    #[doc = "0x04 - Stop HFCLK128M/HFCLK64M source"]
+    pub tasks_hfclkstop: TASKS_HFCLKSTOP,
+    #[doc = "0x08 - Start LFCLK source as selected in LFCLKSRC"]
+    pub tasks_lfclkstart: TASKS_LFCLKSTART,
+    #[doc = "0x0c - Stop LFCLK source"]
+    pub tasks_lfclkstop: TASKS_LFCLKSTOP,
+    #[doc = "0x10 - Start calibration of LFRC oscillator"]
+    pub tasks_cal: TASKS_CAL,
+    _reserved5: [u8; 0x6c],
+    #[doc = "0x80 - Subscribe configuration for task HFCLKSTART"]
+    pub subscribe_hfclkstart: SUBSCRIBE_HFCLKSTART,
+    #[doc = "0x84 - Subscribe configuration for task HFCLKSTOP"]
+    pub subscribe_hfclkstop: SUBSCRIBE_HFCLKSTOP,
+    #[doc = "0x88 - Subscribe configuration for task LFCLKSTART"]
+    pub subscribe_lfclkstart: SUBSCRIBE_LFCLKSTART,
+    #[doc = "0x8c - Subscribe configuration for task LFCLKSTOP"]
+    pub subscribe_lfclkstop: SUBSCRIBE_LFCLKSTOP,
+    #[doc = "0x90 - Subscribe configuration for task CAL"]
+    pub subscribe_cal: SUBSCRIBE_CAL,
+    _reserved10: [u8; 0x6c],
+    #[doc = "0x100 - HFCLK128M/HFCLK64M source started"]
+    pub events_hfclkstarted: EVENTS_HFCLKSTARTED,
+    #[doc = "0x104 - LFCLK source started"]
+    pub events_lfclkstarted: EVENTS_LFCLKSTARTED,
+    _reserved12: [u8; 0x14],
+    #[doc = "0x11c - Calibration of LFRC oscillator complete event"]
+    pub events_done: EVENTS_DONE,
+    _reserved13: [u8; 0x60],
+    #[doc = "0x180 - Publish configuration for event HFCLKSTARTED"]
+    pub publish_hfclkstarted: PUBLISH_HFCLKSTARTED,
+    #[doc = "0x184 - Publish configuration for event LFCLKSTARTED"]
+    pub publish_lfclkstarted: PUBLISH_LFCLKSTARTED,
+    _reserved15: [u8; 0x14],
+    #[doc = "0x19c - Publish configuration for event DONE"]
+    pub publish_done: PUBLISH_DONE,
+    _reserved16: [u8; 0x0160],
+    #[doc = "0x300 - Enable or disable interrupt"]
+    pub inten: INTEN,
+    #[doc = "0x304 - Enable interrupt"]
+    pub intenset: INTENSET,
+    #[doc = "0x308 - Disable interrupt"]
+    pub intenclr: INTENCLR,
+    #[doc = "0x30c - Pending interrupts"]
+    pub intpend: INTPEND,
+    _reserved20: [u8; 0xf8],
+    #[doc = "0x408 - Status indicating that HFCLKSTART task has been triggered"]
+    pub hfclkrun: HFCLKRUN,
+    #[doc = "0x40c - Status indicating which HFCLK128M/HFCLK64M source is running This register value in any CLOCK instance reflects status only due to configurations/actions in that CLOCK instance."]
+    pub hfclkstat: HFCLKSTAT,
+    _reserved22: [u8; 0x04],
+    #[doc = "0x414 - Status indicating that LFCLKSTART task has been triggered"]
+    pub lfclkrun: LFCLKRUN,
+    #[doc = "0x418 - Status indicating which LFCLK source is running This register value in any CLOCK instance reflects status only due to configurations/actions in that CLOCK instance."]
+    pub lfclkstat: LFCLKSTAT,
+    #[doc = "0x41c - Copy of LFCLKSRC register, set when LFCLKSTART task was triggered"]
+    pub lfclksrccopy: LFCLKSRCCOPY,
+    _reserved25: [u8; 0xf4],
+    #[doc = "0x514 - Clock source for HFCLK128M/HFCLK64M"]
+    pub hfclksrc: HFCLKSRC,
+    #[doc = "0x518 - Clock source for LFCLK"]
+    pub lfclksrc: LFCLKSRC,
+    _reserved27: [u8; 0x3c],
+    #[doc = "0x558 - HFCLK128M frequency configuration"]
+    pub hfclkctrl: HFCLKCTRL,
+    _reserved28: [u8; 0x14],
+    #[doc = "0x570 - Automatic or manual control of HFCLK128M/HFCLK64M"]
+    pub hfclkalwaysrun: HFCLKALWAYSRUN,
+    #[doc = "0x574 - Automatic or manual control of LFCLK"]
+    pub lfclkalwaysrun: LFCLKALWAYSRUN,
+}
+#[doc = "TASKS_HFCLKSTART (w) register accessor: an alias for `Reg<TASKS_HFCLKSTART_SPEC>`"]
+pub type TASKS_HFCLKSTART = crate::Reg<tasks_hfclkstart::TASKS_HFCLKSTART_SPEC>;
+#[doc = "Start HFCLK128M/HFCLK64M source as selected in HFCLKSRC"]
+pub mod tasks_hfclkstart;
+#[doc = "TASKS_HFCLKSTOP (w) register accessor: an alias for `Reg<TASKS_HFCLKSTOP_SPEC>`"]
+pub type TASKS_HFCLKSTOP = crate::Reg<tasks_hfclkstop::TASKS_HFCLKSTOP_SPEC>;
+#[doc = "Stop HFCLK128M/HFCLK64M source"]
+pub mod tasks_hfclkstop;
+#[doc = "TASKS_LFCLKSTART (w) register accessor: an alias for `Reg<TASKS_LFCLKSTART_SPEC>`"]
+pub type TASKS_LFCLKSTART = crate::Reg<tasks_lfclkstart::TASKS_LFCLKSTART_SPEC>;
+#[doc = "Start LFCLK source as selected in LFCLKSRC"]
+pub mod tasks_lfclkstart;
+#[doc = "TASKS_LFCLKSTOP (w) register accessor: an alias for `Reg<TASKS_LFCLKSTOP_SPEC>`"]
+pub type TASKS_LFCLKSTOP = crate::Reg<tasks_lfclkstop::TASKS_LFCLKSTOP_SPEC>;
+#[doc = "Stop LFCLK source"]
+pub mod tasks_lfclkstop;
+#[doc = "TASKS_CAL (w) register accessor: an alias for `Reg<TASKS_CAL_SPEC>`"]
+pub type TASKS_CAL = crate::Reg<tasks_cal::TASKS_CAL_SPEC>;
+#[doc = "Start calibration of LFRC oscillator"]
+pub mod tasks_cal;
+#[doc = "SUBSCRIBE_HFCLKSTART (rw) register accessor: an alias for `Reg<SUBSCRIBE_HFCLKSTART_SPEC>`"]
+pub type SUBSCRIBE_HFCLKSTART = crate::Reg<subscribe_hfclkstart::SUBSCRIBE_HFCLKSTART_SPEC>;
+#[doc = "Subscribe configuration for task HFCLKSTART"]
+pub mod subscribe_hfclkstart;
+#[doc = "SUBSCRIBE_HFCLKSTOP (rw) register accessor: an alias for `Reg<SUBSCRIBE_HFCLKSTOP_SPEC>`"]
+pub type SUBSCRIBE_HFCLKSTOP = crate::Reg<subscribe_hfclkstop::SUBSCRIBE_HFCLKSTOP_SPEC>;
+#[doc = "Subscribe configuration for task HFCLKSTOP"]
+pub mod subscribe_hfclkstop;
+#[doc = "SUBSCRIBE_LFCLKSTART (rw) register accessor: an alias for `Reg<SUBSCRIBE_LFCLKSTART_SPEC>`"]
+pub type SUBSCRIBE_LFCLKSTART = crate::Reg<subscribe_lfclkstart::SUBSCRIBE_LFCLKSTART_SPEC>;
+#[doc = "Subscribe configuration for task LFCLKSTART"]
+pub mod subscribe_lfclkstart;
+#[doc = "SUBSCRIBE_LFCLKSTOP (rw) register accessor: an alias for `Reg<SUBSCRIBE_LFCLKSTOP_SPEC>`"]
+pub type SUBSCRIBE_LFCLKSTOP = crate::Reg<subscribe_lfclkstop::SUBSCRIBE_LFCLKSTOP_SPEC>;
+#[doc = "Subscribe configuration for task LFCLKSTOP"]
+pub mod subscribe_lfclkstop;
+#[doc = "SUBSCRIBE_CAL (rw) register accessor: an alias for `Reg<SUBSCRIBE_CAL_SPEC>`"]
+pub type SUBSCRIBE_CAL = crate::Reg<subscribe_cal::SUBSCRIBE_CAL_SPEC>;
+#[doc = "Subscribe configuration for task CAL"]
+pub mod subscribe_cal;
+#[doc = "EVENTS_HFCLKSTARTED (rw) register accessor: an alias for `Reg<EVENTS_HFCLKSTARTED_SPEC>`"]
+pub type EVENTS_HFCLKSTARTED = crate::Reg<events_hfclkstarted::EVENTS_HFCLKSTARTED_SPEC>;
+#[doc = "HFCLK128M/HFCLK64M source started"]
+pub mod events_hfclkstarted;
+#[doc = "EVENTS_LFCLKSTARTED (rw) register accessor: an alias for `Reg<EVENTS_LFCLKSTARTED_SPEC>`"]
+pub type EVENTS_LFCLKSTARTED = crate::Reg<events_lfclkstarted::EVENTS_LFCLKSTARTED_SPEC>;
+#[doc = "LFCLK source started"]
+pub mod events_lfclkstarted;
+#[doc = "EVENTS_DONE (rw) register accessor: an alias for `Reg<EVENTS_DONE_SPEC>`"]
+pub type EVENTS_DONE = crate::Reg<events_done::EVENTS_DONE_SPEC>;
+#[doc = "Calibration of LFRC oscillator complete event"]
+pub mod events_done;
+#[doc = "PUBLISH_HFCLKSTARTED (rw) register accessor: an alias for `Reg<PUBLISH_HFCLKSTARTED_SPEC>`"]
+pub type PUBLISH_HFCLKSTARTED = crate::Reg<publish_hfclkstarted::PUBLISH_HFCLKSTARTED_SPEC>;
+#[doc = "Publish configuration for event HFCLKSTARTED"]
+pub mod publish_hfclkstarted;
+#[doc = "PUBLISH_LFCLKSTARTED (rw) register accessor: an alias for `Reg<PUBLISH_LFCLKSTARTED_SPEC>`"]
+pub type PUBLISH_LFCLKSTARTED = crate::Reg<publish_lfclkstarted::PUBLISH_LFCLKSTARTED_SPEC>;
+#[doc = "Publish configuration for event LFCLKSTARTED"]
+pub mod publish_lfclkstarted;
+#[doc = "PUBLISH_DONE (rw) register accessor: an alias for `Reg<PUBLISH_DONE_SPEC>`"]
+pub type PUBLISH_DONE = crate::Reg<publish_done::PUBLISH_DONE_SPEC>;
+#[doc = "Publish configuration for event DONE"]
+pub mod publish_done;
+#[doc = "INTEN (rw) register accessor: an alias for `Reg<INTEN_SPEC>`"]
+pub type INTEN = crate::Reg<inten::INTEN_SPEC>;
+#[doc = "Enable or disable interrupt"]
+pub mod inten;
+#[doc = "INTENSET (rw) register accessor: an alias for `Reg<INTENSET_SPEC>`"]
+pub type INTENSET = crate::Reg<intenset::INTENSET_SPEC>;
+#[doc = "Enable interrupt"]
+pub mod intenset;
+#[doc = "INTENCLR (rw) register accessor: an alias for `Reg<INTENCLR_SPEC>`"]
+pub type INTENCLR = crate::Reg<intenclr::INTENCLR_SPEC>;
+#[doc = "Disable interrupt"]
+pub mod intenclr;
+#[doc = "INTPEND (r) register accessor: an alias for `Reg<INTPEND_SPEC>`"]
+pub type INTPEND = crate::Reg<intpend::INTPEND_SPEC>;
+#[doc = "Pending interrupts"]
+pub mod intpend;
+#[doc = "HFCLKRUN (r) register accessor: an alias for `Reg<HFCLKRUN_SPEC>`"]
+pub type HFCLKRUN = crate::Reg<hfclkrun::HFCLKRUN_SPEC>;
+#[doc = "Status indicating that HFCLKSTART task has been triggered"]
+pub mod hfclkrun;
+#[doc = "HFCLKSTAT (r) register accessor: an alias for `Reg<HFCLKSTAT_SPEC>`"]
+pub type HFCLKSTAT = crate::Reg<hfclkstat::HFCLKSTAT_SPEC>;
+#[doc = "Status indicating which HFCLK128M/HFCLK64M source is running This register value in any CLOCK instance reflects status only due to configurations/actions in that CLOCK instance."]
+pub mod hfclkstat;
+#[doc = "LFCLKRUN (r) register accessor: an alias for `Reg<LFCLKRUN_SPEC>`"]
+pub type LFCLKRUN = crate::Reg<lfclkrun::LFCLKRUN_SPEC>;
+#[doc = "Status indicating that LFCLKSTART task has been triggered"]
+pub mod lfclkrun;
+#[doc = "LFCLKSTAT (r) register accessor: an alias for `Reg<LFCLKSTAT_SPEC>`"]
+pub type LFCLKSTAT = crate::Reg<lfclkstat::LFCLKSTAT_SPEC>;
+#[doc = "Status indicating which LFCLK source is running This register value in any CLOCK instance reflects status only due to configurations/actions in that CLOCK instance."]
+pub mod lfclkstat;
+#[doc = "LFCLKSRCCOPY (r) register accessor: an alias for `Reg<LFCLKSRCCOPY_SPEC>`"]
+pub type LFCLKSRCCOPY = crate::Reg<lfclksrccopy::LFCLKSRCCOPY_SPEC>;
+#[doc = "Copy of LFCLKSRC register, set when LFCLKSTART task was triggered"]
+pub mod lfclksrccopy;
+#[doc = "HFCLKSRC (rw) register accessor: an alias for `Reg<HFCLKSRC_SPEC>`"]
+pub type HFCLKSRC = crate::Reg<hfclksrc::HFCLKSRC_SPEC>;
+#[doc = "Clock source for HFCLK128M/HFCLK64M"]
+pub mod hfclksrc;
+#[doc = "LFCLKSRC (rw) register accessor: an alias for `Reg<LFCLKSRC_SPEC>`"]
+pub type LFCLKSRC = crate::Reg<lfclksrc::LFCLKSRC_SPEC>;
+#[doc = "Clock source for LFCLK"]
+pub mod lfclksrc;
+#[doc = "HFCLKCTRL (rw) register accessor: an alias for `Reg<HFCLKCTRL_SPEC>`"]
+pub type HFCLKCTRL = crate::Reg<hfclkctrl::HFCLKCTRL_SPEC>;
+#[doc = "HFCLK128M frequency configuration"]
+pub mod hfclkctrl;
+#[doc = "HFCLKALWAYSRUN (rw) register accessor: an alias for `Reg<HFCLKALWAYSRUN_SPEC>`"]
+pub type HFCLKALWAYSRUN = crate::Reg<hfclkalwaysrun::HFCLKALWAYSRUN_SPEC>;
+#[doc = "Automatic or manual control of HFCLK128M/HFCLK64M"]
+pub mod hfclkalwaysrun;
+#[doc = "LFCLKALWAYSRUN (rw) register accessor: an alias for `Reg<LFCLKALWAYSRUN_SPEC>`"]
+pub type LFCLKALWAYSRUN = crate::Reg<lfclkalwaysrun::LFCLKALWAYSRUN_SPEC>;
+#[doc = "Automatic or manual control of LFCLK"]
+pub mod lfclkalwaysrun;

vendor/nrf5340-net-pac/src/clock_ns/events_done.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_DONE` reader"]
+pub struct R(crate::R<EVENTS_DONE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_DONE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_DONE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_DONE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_DONE` writer"]
+pub struct W(crate::W<EVENTS_DONE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_DONE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_DONE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_DONE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_DONE` reader - Calibration of LFRC oscillator complete event"]
+pub type EVENTS_DONE_R = crate::BitReader<EVENTS_DONE_A>;
+#[doc = "Calibration of LFRC oscillator complete event\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_DONE_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_DONE_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_DONE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_DONE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_DONE_A {
+        match self.bits {
+            false => EVENTS_DONE_A::NOT_GENERATED,
+            true => EVENTS_DONE_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_DONE_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_DONE_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_DONE` writer - Calibration of LFRC oscillator complete event"]
+pub type EVENTS_DONE_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_DONE_SPEC, EVENTS_DONE_A, O>;
+impl<'a, const O: u8> EVENTS_DONE_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_DONE_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_DONE_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Calibration of LFRC oscillator complete event"]
+    #[inline(always)]
+    pub fn events_done(&self) -> EVENTS_DONE_R {
+        EVENTS_DONE_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Calibration of LFRC oscillator complete event"]
+    #[inline(always)]
+    pub fn events_done(&mut self) -> EVENTS_DONE_W<0> {
+        EVENTS_DONE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Calibration of LFRC oscillator complete event\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_done](index.html) module"]
+pub struct EVENTS_DONE_SPEC;
+impl crate::RegisterSpec for EVENTS_DONE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_done::R](R) reader structure"]
+impl crate::Readable for EVENTS_DONE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_done::W](W) writer structure"]
+impl crate::Writable for EVENTS_DONE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_DONE to value 0"]
+impl crate::Resettable for EVENTS_DONE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/clock_ns/events_hfclkstarted.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_HFCLKSTARTED` reader"]
+pub struct R(crate::R<EVENTS_HFCLKSTARTED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_HFCLKSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_HFCLKSTARTED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_HFCLKSTARTED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_HFCLKSTARTED` writer"]
+pub struct W(crate::W<EVENTS_HFCLKSTARTED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_HFCLKSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_HFCLKSTARTED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_HFCLKSTARTED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_HFCLKSTARTED` reader - HFCLK128M/HFCLK64M source started"]
+pub type EVENTS_HFCLKSTARTED_R = crate::BitReader<EVENTS_HFCLKSTARTED_A>;
+#[doc = "HFCLK128M/HFCLK64M source started\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_HFCLKSTARTED_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_HFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_HFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_HFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_HFCLKSTARTED_A {
+        match self.bits {
+            false => EVENTS_HFCLKSTARTED_A::NOT_GENERATED,
+            true => EVENTS_HFCLKSTARTED_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_HFCLKSTARTED_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_HFCLKSTARTED_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_HFCLKSTARTED` writer - HFCLK128M/HFCLK64M source started"]
+pub type EVENTS_HFCLKSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_HFCLKSTARTED_SPEC, EVENTS_HFCLKSTARTED_A, O>;
+impl<'a, const O: u8> EVENTS_HFCLKSTARTED_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_HFCLKSTARTED_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_HFCLKSTARTED_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - HFCLK128M/HFCLK64M source started"]
+    #[inline(always)]
+    pub fn events_hfclkstarted(&self) -> EVENTS_HFCLKSTARTED_R {
+        EVENTS_HFCLKSTARTED_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - HFCLK128M/HFCLK64M source started"]
+    #[inline(always)]
+    pub fn events_hfclkstarted(&mut self) -> EVENTS_HFCLKSTARTED_W<0> {
+        EVENTS_HFCLKSTARTED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "HFCLK128M/HFCLK64M source started\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_hfclkstarted](index.html) module"]
+pub struct EVENTS_HFCLKSTARTED_SPEC;
+impl crate::RegisterSpec for EVENTS_HFCLKSTARTED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_hfclkstarted::R](R) reader structure"]
+impl crate::Readable for EVENTS_HFCLKSTARTED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_hfclkstarted::W](W) writer structure"]
+impl crate::Writable for EVENTS_HFCLKSTARTED_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_HFCLKSTARTED to value 0"]
+impl crate::Resettable for EVENTS_HFCLKSTARTED_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/clock_ns/events_lfclkstarted.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_LFCLKSTARTED` reader"]
+pub struct R(crate::R<EVENTS_LFCLKSTARTED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_LFCLKSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_LFCLKSTARTED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_LFCLKSTARTED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_LFCLKSTARTED` writer"]
+pub struct W(crate::W<EVENTS_LFCLKSTARTED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_LFCLKSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_LFCLKSTARTED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_LFCLKSTARTED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_LFCLKSTARTED` reader - LFCLK source started"]
+pub type EVENTS_LFCLKSTARTED_R = crate::BitReader<EVENTS_LFCLKSTARTED_A>;
+#[doc = "LFCLK source started\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_LFCLKSTARTED_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_LFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_LFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_LFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_LFCLKSTARTED_A {
+        match self.bits {
+            false => EVENTS_LFCLKSTARTED_A::NOT_GENERATED,
+            true => EVENTS_LFCLKSTARTED_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_LFCLKSTARTED_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_LFCLKSTARTED_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_LFCLKSTARTED` writer - LFCLK source started"]
+pub type EVENTS_LFCLKSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_LFCLKSTARTED_SPEC, EVENTS_LFCLKSTARTED_A, O>;
+impl<'a, const O: u8> EVENTS_LFCLKSTARTED_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_LFCLKSTARTED_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_LFCLKSTARTED_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - LFCLK source started"]
+    #[inline(always)]
+    pub fn events_lfclkstarted(&self) -> EVENTS_LFCLKSTARTED_R {
+        EVENTS_LFCLKSTARTED_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - LFCLK source started"]
+    #[inline(always)]
+    pub fn events_lfclkstarted(&mut self) -> EVENTS_LFCLKSTARTED_W<0> {
+        EVENTS_LFCLKSTARTED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "LFCLK source started\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_lfclkstarted](index.html) module"]
+pub struct EVENTS_LFCLKSTARTED_SPEC;
+impl crate::RegisterSpec for EVENTS_LFCLKSTARTED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_lfclkstarted::R](R) reader structure"]
+impl crate::Readable for EVENTS_LFCLKSTARTED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_lfclkstarted::W](W) writer structure"]
+impl crate::Writable for EVENTS_LFCLKSTARTED_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_LFCLKSTARTED to value 0"]
+impl crate::Resettable for EVENTS_LFCLKSTARTED_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/clock_ns/hfclkalwaysrun.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `HFCLKALWAYSRUN` reader"]
+pub struct R(crate::R<HFCLKALWAYSRUN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFCLKALWAYSRUN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFCLKALWAYSRUN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFCLKALWAYSRUN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `HFCLKALWAYSRUN` writer"]
+pub struct W(crate::W<HFCLKALWAYSRUN_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<HFCLKALWAYSRUN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<HFCLKALWAYSRUN_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<HFCLKALWAYSRUN_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ALWAYSRUN` reader - Ensure clock is always running"]
+pub type ALWAYSRUN_R = crate::BitReader<ALWAYSRUN_A>;
+#[doc = "Ensure clock is always running\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ALWAYSRUN_A {
+    #[doc = "0: Use automatic clock control"]
+    AUTOMATIC = 0,
+    #[doc = "1: Ensure clock is always running"]
+    ALWAYS_RUN = 1,
+}
+impl From<ALWAYSRUN_A> for bool {
+    #[inline(always)]
+    fn from(variant: ALWAYSRUN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ALWAYSRUN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ALWAYSRUN_A {
+        match self.bits {
+            false => ALWAYSRUN_A::AUTOMATIC,
+            true => ALWAYSRUN_A::ALWAYS_RUN,
+        }
+    }
+    #[doc = "Checks if the value of the field is `AUTOMATIC`"]
+    #[inline(always)]
+    pub fn is_automatic(&self) -> bool {
+        *self == ALWAYSRUN_A::AUTOMATIC
+    }
+    #[doc = "Checks if the value of the field is `ALWAYS_RUN`"]
+    #[inline(always)]
+    pub fn is_always_run(&self) -> bool {
+        *self == ALWAYSRUN_A::ALWAYS_RUN
+    }
+}
+#[doc = "Field `ALWAYSRUN` writer - Ensure clock is always running"]
+pub type ALWAYSRUN_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, HFCLKALWAYSRUN_SPEC, ALWAYSRUN_A, O>;
+impl<'a, const O: u8> ALWAYSRUN_W<'a, O> {
+    #[doc = "Use automatic clock control"]
+    #[inline(always)]
+    pub fn automatic(self) -> &'a mut W {
+        self.variant(ALWAYSRUN_A::AUTOMATIC)
+    }
+    #[doc = "Ensure clock is always running"]
+    #[inline(always)]
+    pub fn always_run(self) -> &'a mut W {
+        self.variant(ALWAYSRUN_A::ALWAYS_RUN)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Ensure clock is always running"]
+    #[inline(always)]
+    pub fn alwaysrun(&self) -> ALWAYSRUN_R {
+        ALWAYSRUN_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Ensure clock is always running"]
+    #[inline(always)]
+    pub fn alwaysrun(&mut self) -> ALWAYSRUN_W<0> {
+        ALWAYSRUN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Automatic or manual control of HFCLK128M/HFCLK64M\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclkalwaysrun](index.html) module"]
+pub struct HFCLKALWAYSRUN_SPEC;
+impl crate::RegisterSpec for HFCLKALWAYSRUN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfclkalwaysrun::R](R) reader structure"]
+impl crate::Readable for HFCLKALWAYSRUN_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [hfclkalwaysrun::W](W) writer structure"]
+impl crate::Writable for HFCLKALWAYSRUN_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets HFCLKALWAYSRUN to value 0"]
+impl crate::Resettable for HFCLKALWAYSRUN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/clock_ns/hfclkctrl.rs

@@ -0,0 +1,128 @@
+#[doc = "Register `HFCLKCTRL` reader"]
+pub struct R(crate::R<HFCLKCTRL_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFCLKCTRL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFCLKCTRL_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFCLKCTRL_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `HFCLKCTRL` writer"]
+pub struct W(crate::W<HFCLKCTRL_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<HFCLKCTRL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<HFCLKCTRL_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<HFCLKCTRL_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `HCLK` reader - High frequency clock HCLK"]
+pub type HCLK_R = crate::FieldReader<u8, HCLK_A>;
+#[doc = "High frequency clock HCLK\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum HCLK_A {
+    #[doc = "0: Divide HFCLK by 1"]
+    DIV1 = 0,
+    #[doc = "1: Divide HFCLK by 2"]
+    DIV2 = 1,
+}
+impl From<HCLK_A> for u8 {
+    #[inline(always)]
+    fn from(variant: HCLK_A) -> Self {
+        variant as _
+    }
+}
+impl HCLK_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<HCLK_A> {
+        match self.bits {
+            0 => Some(HCLK_A::DIV1),
+            1 => Some(HCLK_A::DIV2),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DIV1`"]
+    #[inline(always)]
+    pub fn is_div1(&self) -> bool {
+        *self == HCLK_A::DIV1
+    }
+    #[doc = "Checks if the value of the field is `DIV2`"]
+    #[inline(always)]
+    pub fn is_div2(&self) -> bool {
+        *self == HCLK_A::DIV2
+    }
+}
+#[doc = "Field `HCLK` writer - High frequency clock HCLK"]
+pub type HCLK_W<'a, const O: u8> = crate::FieldWriter<'a, u32, HFCLKCTRL_SPEC, u8, HCLK_A, 2, O>;
+impl<'a, const O: u8> HCLK_W<'a, O> {
+    #[doc = "Divide HFCLK by 1"]
+    #[inline(always)]
+    pub fn div1(self) -> &'a mut W {
+        self.variant(HCLK_A::DIV1)
+    }
+    #[doc = "Divide HFCLK by 2"]
+    #[inline(always)]
+    pub fn div2(self) -> &'a mut W {
+        self.variant(HCLK_A::DIV2)
+    }
+}
+impl R {
+    #[doc = "Bits 0:1 - High frequency clock HCLK"]
+    #[inline(always)]
+    pub fn hclk(&self) -> HCLK_R {
+        HCLK_R::new((self.bits & 3) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:1 - High frequency clock HCLK"]
+    #[inline(always)]
+    pub fn hclk(&mut self) -> HCLK_W<0> {
+        HCLK_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "HFCLK128M frequency configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclkctrl](index.html) module"]
+pub struct HFCLKCTRL_SPEC;
+impl crate::RegisterSpec for HFCLKCTRL_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfclkctrl::R](R) reader structure"]
+impl crate::Readable for HFCLKCTRL_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [hfclkctrl::W](W) writer structure"]
+impl crate::Writable for HFCLKCTRL_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets HFCLKCTRL to value 0"]
+impl crate::Resettable for HFCLKCTRL_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/clock_ns/hfclkrun.rs

@@ -0,0 +1,74 @@
+#[doc = "Register `HFCLKRUN` reader"]
+pub struct R(crate::R<HFCLKRUN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFCLKRUN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFCLKRUN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFCLKRUN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `STATUS` reader - HFCLKSTART task triggered or not"]
+pub type STATUS_R = crate::BitReader<STATUS_A>;
+#[doc = "HFCLKSTART task triggered or not\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STATUS_A {
+    #[doc = "0: Task not triggered"]
+    NOT_TRIGGERED = 0,
+    #[doc = "1: Task triggered"]
+    TRIGGERED = 1,
+}
+impl From<STATUS_A> for bool {
+    #[inline(always)]
+    fn from(variant: STATUS_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STATUS_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STATUS_A {
+        match self.bits {
+            false => STATUS_A::NOT_TRIGGERED,
+            true => STATUS_A::TRIGGERED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_TRIGGERED`"]
+    #[inline(always)]
+    pub fn is_not_triggered(&self) -> bool {
+        *self == STATUS_A::NOT_TRIGGERED
+    }
+    #[doc = "Checks if the value of the field is `TRIGGERED`"]
+    #[inline(always)]
+    pub fn is_triggered(&self) -> bool {
+        *self == STATUS_A::TRIGGERED
+    }
+}
+impl R {
+    #[doc = "Bit 0 - HFCLKSTART task triggered or not"]
+    #[inline(always)]
+    pub fn status(&self) -> STATUS_R {
+        STATUS_R::new((self.bits & 1) != 0)
+    }
+}
+#[doc = "Status indicating that HFCLKSTART task has been triggered\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclkrun](index.html) module"]
+pub struct HFCLKRUN_SPEC;
+impl crate::RegisterSpec for HFCLKRUN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfclkrun::R](R) reader structure"]
+impl crate::Readable for HFCLKRUN_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets HFCLKRUN to value 0"]
+impl crate::Resettable for HFCLKRUN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/clock_ns/hfclksrc.rs

@@ -0,0 +1,126 @@
+#[doc = "Register `HFCLKSRC` reader"]
+pub struct R(crate::R<HFCLKSRC_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFCLKSRC_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFCLKSRC_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFCLKSRC_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `HFCLKSRC` writer"]
+pub struct W(crate::W<HFCLKSRC_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<HFCLKSRC_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<HFCLKSRC_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<HFCLKSRC_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `SRC` reader - Select which HFCLK source is started by the HFCLKSTART task"]
+pub type SRC_R = crate::BitReader<SRC_A>;
+#[doc = "Select which HFCLK source is started by the HFCLKSTART task\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SRC_A {
+    #[doc = "0: HFCLKSTART task starts HFINT oscillator"]
+    HFINT = 0,
+    #[doc = "1: HFCLKSTART task starts HFXO oscillator"]
+    HFXO = 1,
+}
+impl From<SRC_A> for bool {
+    #[inline(always)]
+    fn from(variant: SRC_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl SRC_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> SRC_A {
+        match self.bits {
+            false => SRC_A::HFINT,
+            true => SRC_A::HFXO,
+        }
+    }
+    #[doc = "Checks if the value of the field is `HFINT`"]
+    #[inline(always)]
+    pub fn is_hfint(&self) -> bool {
+        *self == SRC_A::HFINT
+    }
+    #[doc = "Checks if the value of the field is `HFXO`"]
+    #[inline(always)]
+    pub fn is_hfxo(&self) -> bool {
+        *self == SRC_A::HFXO
+    }
+}
+#[doc = "Field `SRC` writer - Select which HFCLK source is started by the HFCLKSTART task"]
+pub type SRC_W<'a, const O: u8> = crate::BitWriter<'a, u32, HFCLKSRC_SPEC, SRC_A, O>;
+impl<'a, const O: u8> SRC_W<'a, O> {
+    #[doc = "HFCLKSTART task starts HFINT oscillator"]
+    #[inline(always)]
+    pub fn hfint(self) -> &'a mut W {
+        self.variant(SRC_A::HFINT)
+    }
+    #[doc = "HFCLKSTART task starts HFXO oscillator"]
+    #[inline(always)]
+    pub fn hfxo(self) -> &'a mut W {
+        self.variant(SRC_A::HFXO)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Select which HFCLK source is started by the HFCLKSTART task"]
+    #[inline(always)]
+    pub fn src(&self) -> SRC_R {
+        SRC_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Select which HFCLK source is started by the HFCLKSTART task"]
+    #[inline(always)]
+    pub fn src(&mut self) -> SRC_W<0> {
+        SRC_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Clock source for HFCLK128M/HFCLK64M\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclksrc](index.html) module"]
+pub struct HFCLKSRC_SPEC;
+impl crate::RegisterSpec for HFCLKSRC_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfclksrc::R](R) reader structure"]
+impl crate::Readable for HFCLKSRC_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [hfclksrc::W](W) writer structure"]
+impl crate::Writable for HFCLKSRC_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets HFCLKSRC to value 0x01"]
+impl crate::Resettable for HFCLKSRC_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x01
+    }
+}

vendor/nrf5340-net-pac/src/clock_ns/hfclkstat.rs

@@ -0,0 +1,156 @@
+#[doc = "Register `HFCLKSTAT` reader"]
+pub struct R(crate::R<HFCLKSTAT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFCLKSTAT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFCLKSTAT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFCLKSTAT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `SRC` reader - Active clock source"]
+pub type SRC_R = crate::BitReader<SRC_A>;
+#[doc = "Active clock source\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SRC_A {
+    #[doc = "0: Clock source: HFINT - 128 MHz on-chip oscillator"]
+    HFINT = 0,
+    #[doc = "1: Clock source: HFXO - 128 MHz clock derived from external 32 MHz crystal oscillator"]
+    HFXO = 1,
+}
+impl From<SRC_A> for bool {
+    #[inline(always)]
+    fn from(variant: SRC_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl SRC_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> SRC_A {
+        match self.bits {
+            false => SRC_A::HFINT,
+            true => SRC_A::HFXO,
+        }
+    }
+    #[doc = "Checks if the value of the field is `HFINT`"]
+    #[inline(always)]
+    pub fn is_hfint(&self) -> bool {
+        *self == SRC_A::HFINT
+    }
+    #[doc = "Checks if the value of the field is `HFXO`"]
+    #[inline(always)]
+    pub fn is_hfxo(&self) -> bool {
+        *self == SRC_A::HFXO
+    }
+}
+#[doc = "Field `ALWAYSRUNNING` reader - ALWAYSRUN activated"]
+pub type ALWAYSRUNNING_R = crate::BitReader<ALWAYSRUNNING_A>;
+#[doc = "ALWAYSRUN activated\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ALWAYSRUNNING_A {
+    #[doc = "0: Automatic clock control enabled"]
+    NOT_RUNNING = 0,
+    #[doc = "1: Oscillator is always running"]
+    RUNNING = 1,
+}
+impl From<ALWAYSRUNNING_A> for bool {
+    #[inline(always)]
+    fn from(variant: ALWAYSRUNNING_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ALWAYSRUNNING_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ALWAYSRUNNING_A {
+        match self.bits {
+            false => ALWAYSRUNNING_A::NOT_RUNNING,
+            true => ALWAYSRUNNING_A::RUNNING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_RUNNING`"]
+    #[inline(always)]
+    pub fn is_not_running(&self) -> bool {
+        *self == ALWAYSRUNNING_A::NOT_RUNNING
+    }
+    #[doc = "Checks if the value of the field is `RUNNING`"]
+    #[inline(always)]
+    pub fn is_running(&self) -> bool {
+        *self == ALWAYSRUNNING_A::RUNNING
+    }
+}
+#[doc = "Field `STATE` reader - HFCLK state"]
+pub type STATE_R = crate::BitReader<STATE_A>;
+#[doc = "HFCLK state\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STATE_A {
+    #[doc = "0: HFCLK not running"]
+    NOT_RUNNING = 0,
+    #[doc = "1: HFCLK running"]
+    RUNNING = 1,
+}
+impl From<STATE_A> for bool {
+    #[inline(always)]
+    fn from(variant: STATE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STATE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STATE_A {
+        match self.bits {
+            false => STATE_A::NOT_RUNNING,
+            true => STATE_A::RUNNING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_RUNNING`"]
+    #[inline(always)]
+    pub fn is_not_running(&self) -> bool {
+        *self == STATE_A::NOT_RUNNING
+    }
+    #[doc = "Checks if the value of the field is `RUNNING`"]
+    #[inline(always)]
+    pub fn is_running(&self) -> bool {
+        *self == STATE_A::RUNNING
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Active clock source"]
+    #[inline(always)]
+    pub fn src(&self) -> SRC_R {
+        SRC_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 4 - ALWAYSRUN activated"]
+    #[inline(always)]
+    pub fn alwaysrunning(&self) -> ALWAYSRUNNING_R {
+        ALWAYSRUNNING_R::new(((self.bits >> 4) & 1) != 0)
+    }
+    #[doc = "Bit 16 - HFCLK state"]
+    #[inline(always)]
+    pub fn state(&self) -> STATE_R {
+        STATE_R::new(((self.bits >> 16) & 1) != 0)
+    }
+}
+#[doc = "Status indicating which HFCLK128M/HFCLK64M source is running This register value in any CLOCK instance reflects status only due to configurations/actions in that CLOCK instance.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclkstat](index.html) module"]
+pub struct HFCLKSTAT_SPEC;
+impl crate::RegisterSpec for HFCLKSTAT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfclkstat::R](R) reader structure"]
+impl crate::Readable for HFCLKSTAT_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets HFCLKSTAT to value 0"]
+impl crate::Resettable for HFCLKSTAT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/clock_ns/inten.rs

@@ -0,0 +1,246 @@
+#[doc = "Register `INTEN` reader"]
+pub struct R(crate::R<INTEN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTEN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTEN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTEN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTEN` writer"]
+pub struct W(crate::W<INTEN_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTEN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTEN_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTEN_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `HFCLKSTARTED` reader - Enable or disable interrupt for event HFCLKSTARTED"]
+pub type HFCLKSTARTED_R = crate::BitReader<HFCLKSTARTED_A>;
+#[doc = "Enable or disable interrupt for event HFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLKSTARTED_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "1: Enable"]
+    ENABLED = 1,
+}
+impl From<HFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl HFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> HFCLKSTARTED_A {
+        match self.bits {
+            false => HFCLKSTARTED_A::DISABLED,
+            true => HFCLKSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == HFCLKSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == HFCLKSTARTED_A::ENABLED
+    }
+}
+#[doc = "Field `HFCLKSTARTED` writer - Enable or disable interrupt for event HFCLKSTARTED"]
+pub type HFCLKSTARTED_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, HFCLKSTARTED_A, O>;
+impl<'a, const O: u8> HFCLKSTARTED_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(HFCLKSTARTED_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(HFCLKSTARTED_A::ENABLED)
+    }
+}
+#[doc = "Field `LFCLKSTARTED` reader - Enable or disable interrupt for event LFCLKSTARTED"]
+pub type LFCLKSTARTED_R = crate::BitReader<LFCLKSTARTED_A>;
+#[doc = "Enable or disable interrupt for event LFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum LFCLKSTARTED_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "1: Enable"]
+    ENABLED = 1,
+}
+impl From<LFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: LFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl LFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> LFCLKSTARTED_A {
+        match self.bits {
+            false => LFCLKSTARTED_A::DISABLED,
+            true => LFCLKSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == LFCLKSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == LFCLKSTARTED_A::ENABLED
+    }
+}
+#[doc = "Field `LFCLKSTARTED` writer - Enable or disable interrupt for event LFCLKSTARTED"]
+pub type LFCLKSTARTED_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, LFCLKSTARTED_A, O>;
+impl<'a, const O: u8> LFCLKSTARTED_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(LFCLKSTARTED_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(LFCLKSTARTED_A::ENABLED)
+    }
+}
+#[doc = "Field `DONE` reader - Enable or disable interrupt for event DONE"]
+pub type DONE_R = crate::BitReader<DONE_A>;
+#[doc = "Enable or disable interrupt for event DONE\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum DONE_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "1: Enable"]
+    ENABLED = 1,
+}
+impl From<DONE_A> for bool {
+    #[inline(always)]
+    fn from(variant: DONE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl DONE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DONE_A {
+        match self.bits {
+            false => DONE_A::DISABLED,
+            true => DONE_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == DONE_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == DONE_A::ENABLED
+    }
+}
+#[doc = "Field `DONE` writer - Enable or disable interrupt for event DONE"]
+pub type DONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, DONE_A, O>;
+impl<'a, const O: u8> DONE_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(DONE_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(DONE_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Enable or disable interrupt for event HFCLKSTARTED"]
+    #[inline(always)]
+    pub fn hfclkstarted(&self) -> HFCLKSTARTED_R {
+        HFCLKSTARTED_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Enable or disable interrupt for event LFCLKSTARTED"]
+    #[inline(always)]
+    pub fn lfclkstarted(&self) -> LFCLKSTARTED_R {
+        LFCLKSTARTED_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 7 - Enable or disable interrupt for event DONE"]
+    #[inline(always)]
+    pub fn done(&self) -> DONE_R {
+        DONE_R::new(((self.bits >> 7) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Enable or disable interrupt for event HFCLKSTARTED"]
+    #[inline(always)]
+    pub fn hfclkstarted(&mut self) -> HFCLKSTARTED_W<0> {
+        HFCLKSTARTED_W::new(self)
+    }
+    #[doc = "Bit 1 - Enable or disable interrupt for event LFCLKSTARTED"]
+    #[inline(always)]
+    pub fn lfclkstarted(&mut self) -> LFCLKSTARTED_W<1> {
+        LFCLKSTARTED_W::new(self)
+    }
+    #[doc = "Bit 7 - Enable or disable interrupt for event DONE"]
+    #[inline(always)]
+    pub fn done(&mut self) -> DONE_W<7> {
+        DONE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Enable or disable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [inten](index.html) module"]
+pub struct INTEN_SPEC;
+impl crate::RegisterSpec for INTEN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [inten::R](R) reader structure"]
+impl crate::Readable for INTEN_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [inten::W](W) writer structure"]
+impl crate::Writable for INTEN_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTEN to value 0"]
+impl crate::Resettable for INTEN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/clock_ns/intenclr.rs

@@ -0,0 +1,269 @@
+#[doc = "Register `INTENCLR` reader"]
+pub struct R(crate::R<INTENCLR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENCLR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENCLR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENCLR` writer"]
+pub struct W(crate::W<INTENCLR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENCLR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENCLR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `HFCLKSTARTED` reader - Write '1' to disable interrupt for event HFCLKSTARTED"]
+pub type HFCLKSTARTED_R = crate::BitReader<HFCLKSTARTED_A>;
+#[doc = "Write '1' to disable interrupt for event HFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLKSTARTED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<HFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl HFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> HFCLKSTARTED_A {
+        match self.bits {
+            false => HFCLKSTARTED_A::DISABLED,
+            true => HFCLKSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == HFCLKSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == HFCLKSTARTED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event HFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLKSTARTED_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<HFCLKSTARTED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKSTARTED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `HFCLKSTARTED` writer - Write '1' to disable interrupt for event HFCLKSTARTED"]
+pub type HFCLKSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENCLR_SPEC, HFCLKSTARTED_AW, O>;
+impl<'a, const O: u8> HFCLKSTARTED_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(HFCLKSTARTED_AW::CLEAR)
+    }
+}
+#[doc = "Field `LFCLKSTARTED` reader - Write '1' to disable interrupt for event LFCLKSTARTED"]
+pub type LFCLKSTARTED_R = crate::BitReader<LFCLKSTARTED_A>;
+#[doc = "Write '1' to disable interrupt for event LFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum LFCLKSTARTED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<LFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: LFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl LFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> LFCLKSTARTED_A {
+        match self.bits {
+            false => LFCLKSTARTED_A::DISABLED,
+            true => LFCLKSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == LFCLKSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == LFCLKSTARTED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event LFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum LFCLKSTARTED_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<LFCLKSTARTED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: LFCLKSTARTED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `LFCLKSTARTED` writer - Write '1' to disable interrupt for event LFCLKSTARTED"]
+pub type LFCLKSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENCLR_SPEC, LFCLKSTARTED_AW, O>;
+impl<'a, const O: u8> LFCLKSTARTED_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(LFCLKSTARTED_AW::CLEAR)
+    }
+}
+#[doc = "Field `DONE` reader - Write '1' to disable interrupt for event DONE"]
+pub type DONE_R = crate::BitReader<DONE_A>;
+#[doc = "Write '1' to disable interrupt for event DONE\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum DONE_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<DONE_A> for bool {
+    #[inline(always)]
+    fn from(variant: DONE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl DONE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DONE_A {
+        match self.bits {
+            false => DONE_A::DISABLED,
+            true => DONE_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == DONE_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == DONE_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event DONE\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum DONE_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<DONE_AW> for bool {
+    #[inline(always)]
+    fn from(variant: DONE_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `DONE` writer - Write '1' to disable interrupt for event DONE"]
+pub type DONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, DONE_AW, O>;
+impl<'a, const O: u8> DONE_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(DONE_AW::CLEAR)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Write '1' to disable interrupt for event HFCLKSTARTED"]
+    #[inline(always)]
+    pub fn hfclkstarted(&self) -> HFCLKSTARTED_R {
+        HFCLKSTARTED_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Write '1' to disable interrupt for event LFCLKSTARTED"]
+    #[inline(always)]
+    pub fn lfclkstarted(&self) -> LFCLKSTARTED_R {
+        LFCLKSTARTED_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 7 - Write '1' to disable interrupt for event DONE"]
+    #[inline(always)]
+    pub fn done(&self) -> DONE_R {
+        DONE_R::new(((self.bits >> 7) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Write '1' to disable interrupt for event HFCLKSTARTED"]
+    #[inline(always)]
+    pub fn hfclkstarted(&mut self) -> HFCLKSTARTED_W<0> {
+        HFCLKSTARTED_W::new(self)
+    }
+    #[doc = "Bit 1 - Write '1' to disable interrupt for event LFCLKSTARTED"]
+    #[inline(always)]
+    pub fn lfclkstarted(&mut self) -> LFCLKSTARTED_W<1> {
+        LFCLKSTARTED_W::new(self)
+    }
+    #[doc = "Bit 7 - Write '1' to disable interrupt for event DONE"]
+    #[inline(always)]
+    pub fn done(&mut self) -> DONE_W<7> {
+        DONE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Disable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"]
+pub struct INTENCLR_SPEC;
+impl crate::RegisterSpec for INTENCLR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [intenclr::R](R) reader structure"]
+impl crate::Readable for INTENCLR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"]
+impl crate::Writable for INTENCLR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTENCLR to value 0"]
+impl crate::Resettable for INTENCLR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/clock_ns/intenset.rs

@@ -0,0 +1,269 @@
+#[doc = "Register `INTENSET` reader"]
+pub struct R(crate::R<INTENSET_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENSET_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENSET_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENSET` writer"]
+pub struct W(crate::W<INTENSET_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENSET_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENSET_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `HFCLKSTARTED` reader - Write '1' to enable interrupt for event HFCLKSTARTED"]
+pub type HFCLKSTARTED_R = crate::BitReader<HFCLKSTARTED_A>;
+#[doc = "Write '1' to enable interrupt for event HFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLKSTARTED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<HFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl HFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> HFCLKSTARTED_A {
+        match self.bits {
+            false => HFCLKSTARTED_A::DISABLED,
+            true => HFCLKSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == HFCLKSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == HFCLKSTARTED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event HFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLKSTARTED_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<HFCLKSTARTED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKSTARTED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `HFCLKSTARTED` writer - Write '1' to enable interrupt for event HFCLKSTARTED"]
+pub type HFCLKSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENSET_SPEC, HFCLKSTARTED_AW, O>;
+impl<'a, const O: u8> HFCLKSTARTED_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(HFCLKSTARTED_AW::SET)
+    }
+}
+#[doc = "Field `LFCLKSTARTED` reader - Write '1' to enable interrupt for event LFCLKSTARTED"]
+pub type LFCLKSTARTED_R = crate::BitReader<LFCLKSTARTED_A>;
+#[doc = "Write '1' to enable interrupt for event LFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum LFCLKSTARTED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<LFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: LFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl LFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> LFCLKSTARTED_A {
+        match self.bits {
+            false => LFCLKSTARTED_A::DISABLED,
+            true => LFCLKSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == LFCLKSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == LFCLKSTARTED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event LFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum LFCLKSTARTED_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<LFCLKSTARTED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: LFCLKSTARTED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `LFCLKSTARTED` writer - Write '1' to enable interrupt for event LFCLKSTARTED"]
+pub type LFCLKSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENSET_SPEC, LFCLKSTARTED_AW, O>;
+impl<'a, const O: u8> LFCLKSTARTED_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(LFCLKSTARTED_AW::SET)
+    }
+}
+#[doc = "Field `DONE` reader - Write '1' to enable interrupt for event DONE"]
+pub type DONE_R = crate::BitReader<DONE_A>;
+#[doc = "Write '1' to enable interrupt for event DONE\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum DONE_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<DONE_A> for bool {
+    #[inline(always)]
+    fn from(variant: DONE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl DONE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DONE_A {
+        match self.bits {
+            false => DONE_A::DISABLED,
+            true => DONE_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == DONE_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == DONE_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event DONE\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum DONE_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<DONE_AW> for bool {
+    #[inline(always)]
+    fn from(variant: DONE_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `DONE` writer - Write '1' to enable interrupt for event DONE"]
+pub type DONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, DONE_AW, O>;
+impl<'a, const O: u8> DONE_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(DONE_AW::SET)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Write '1' to enable interrupt for event HFCLKSTARTED"]
+    #[inline(always)]
+    pub fn hfclkstarted(&self) -> HFCLKSTARTED_R {
+        HFCLKSTARTED_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Write '1' to enable interrupt for event LFCLKSTARTED"]
+    #[inline(always)]
+    pub fn lfclkstarted(&self) -> LFCLKSTARTED_R {
+        LFCLKSTARTED_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 7 - Write '1' to enable interrupt for event DONE"]
+    #[inline(always)]
+    pub fn done(&self) -> DONE_R {
+        DONE_R::new(((self.bits >> 7) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Write '1' to enable interrupt for event HFCLKSTARTED"]
+    #[inline(always)]
+    pub fn hfclkstarted(&mut self) -> HFCLKSTARTED_W<0> {
+        HFCLKSTARTED_W::new(self)
+    }
+    #[doc = "Bit 1 - Write '1' to enable interrupt for event LFCLKSTARTED"]
+    #[inline(always)]
+    pub fn lfclkstarted(&mut self) -> LFCLKSTARTED_W<1> {
+        LFCLKSTARTED_W::new(self)
+    }
+    #[doc = "Bit 7 - Write '1' to enable interrupt for event DONE"]
+    #[inline(always)]
+    pub fn done(&mut self) -> DONE_W<7> {
+        DONE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Enable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"]
+pub struct INTENSET_SPEC;
+impl crate::RegisterSpec for INTENSET_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [intenset::R](R) reader structure"]
+impl crate::Readable for INTENSET_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"]
+impl crate::Writable for INTENSET_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTENSET to value 0"]
+impl crate::Resettable for INTENSET_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/clock_ns/intpend.rs

@@ -0,0 +1,156 @@
+#[doc = "Register `INTPEND` reader"]
+pub struct R(crate::R<INTPEND_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTPEND_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTPEND_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTPEND_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `HFCLKSTARTED` reader - Read pending status of interrupt for event HFCLKSTARTED"]
+pub type HFCLKSTARTED_R = crate::BitReader<HFCLKSTARTED_A>;
+#[doc = "Read pending status of interrupt for event HFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum HFCLKSTARTED_A {
+    #[doc = "0: Read: Not pending"]
+    NOT_PENDING = 0,
+    #[doc = "1: Read: Pending"]
+    PENDING = 1,
+}
+impl From<HFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl HFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> HFCLKSTARTED_A {
+        match self.bits {
+            false => HFCLKSTARTED_A::NOT_PENDING,
+            true => HFCLKSTARTED_A::PENDING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_PENDING`"]
+    #[inline(always)]
+    pub fn is_not_pending(&self) -> bool {
+        *self == HFCLKSTARTED_A::NOT_PENDING
+    }
+    #[doc = "Checks if the value of the field is `PENDING`"]
+    #[inline(always)]
+    pub fn is_pending(&self) -> bool {
+        *self == HFCLKSTARTED_A::PENDING
+    }
+}
+#[doc = "Field `LFCLKSTARTED` reader - Read pending status of interrupt for event LFCLKSTARTED"]
+pub type LFCLKSTARTED_R = crate::BitReader<LFCLKSTARTED_A>;
+#[doc = "Read pending status of interrupt for event LFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum LFCLKSTARTED_A {
+    #[doc = "0: Read: Not pending"]
+    NOT_PENDING = 0,
+    #[doc = "1: Read: Pending"]
+    PENDING = 1,
+}
+impl From<LFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: LFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl LFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> LFCLKSTARTED_A {
+        match self.bits {
+            false => LFCLKSTARTED_A::NOT_PENDING,
+            true => LFCLKSTARTED_A::PENDING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_PENDING`"]
+    #[inline(always)]
+    pub fn is_not_pending(&self) -> bool {
+        *self == LFCLKSTARTED_A::NOT_PENDING
+    }
+    #[doc = "Checks if the value of the field is `PENDING`"]
+    #[inline(always)]
+    pub fn is_pending(&self) -> bool {
+        *self == LFCLKSTARTED_A::PENDING
+    }
+}
+#[doc = "Field `DONE` reader - Read pending status of interrupt for event DONE"]
+pub type DONE_R = crate::BitReader<DONE_A>;
+#[doc = "Read pending status of interrupt for event DONE\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum DONE_A {
+    #[doc = "0: Read: Not pending"]
+    NOT_PENDING = 0,
+    #[doc = "1: Read: Pending"]
+    PENDING = 1,
+}
+impl From<DONE_A> for bool {
+    #[inline(always)]
+    fn from(variant: DONE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl DONE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DONE_A {
+        match self.bits {
+            false => DONE_A::NOT_PENDING,
+            true => DONE_A::PENDING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_PENDING`"]
+    #[inline(always)]
+    pub fn is_not_pending(&self) -> bool {
+        *self == DONE_A::NOT_PENDING
+    }
+    #[doc = "Checks if the value of the field is `PENDING`"]
+    #[inline(always)]
+    pub fn is_pending(&self) -> bool {
+        *self == DONE_A::PENDING
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Read pending status of interrupt for event HFCLKSTARTED"]
+    #[inline(always)]
+    pub fn hfclkstarted(&self) -> HFCLKSTARTED_R {
+        HFCLKSTARTED_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Read pending status of interrupt for event LFCLKSTARTED"]
+    #[inline(always)]
+    pub fn lfclkstarted(&self) -> LFCLKSTARTED_R {
+        LFCLKSTARTED_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 7 - Read pending status of interrupt for event DONE"]
+    #[inline(always)]
+    pub fn done(&self) -> DONE_R {
+        DONE_R::new(((self.bits >> 7) & 1) != 0)
+    }
+}
+#[doc = "Pending interrupts\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intpend](index.html) module"]
+pub struct INTPEND_SPEC;
+impl crate::RegisterSpec for INTPEND_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [intpend::R](R) reader structure"]
+impl crate::Readable for INTPEND_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets INTPEND to value 0"]
+impl crate::Resettable for INTPEND_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/clock_ns/lfclkalwaysrun.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `LFCLKALWAYSRUN` reader"]
+pub struct R(crate::R<LFCLKALWAYSRUN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<LFCLKALWAYSRUN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<LFCLKALWAYSRUN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<LFCLKALWAYSRUN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `LFCLKALWAYSRUN` writer"]
+pub struct W(crate::W<LFCLKALWAYSRUN_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<LFCLKALWAYSRUN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<LFCLKALWAYSRUN_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<LFCLKALWAYSRUN_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ALWAYSRUN` reader - Ensure clock is always running"]
+pub type ALWAYSRUN_R = crate::BitReader<ALWAYSRUN_A>;
+#[doc = "Ensure clock is always running\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ALWAYSRUN_A {
+    #[doc = "0: Use automatic clock control"]
+    AUTOMATIC = 0,
+    #[doc = "1: Ensure clock is always running"]
+    ALWAYS_RUN = 1,
+}
+impl From<ALWAYSRUN_A> for bool {
+    #[inline(always)]
+    fn from(variant: ALWAYSRUN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ALWAYSRUN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ALWAYSRUN_A {
+        match self.bits {
+            false => ALWAYSRUN_A::AUTOMATIC,
+            true => ALWAYSRUN_A::ALWAYS_RUN,
+        }
+    }
+    #[doc = "Checks if the value of the field is `AUTOMATIC`"]
+    #[inline(always)]
+    pub fn is_automatic(&self) -> bool {
+        *self == ALWAYSRUN_A::AUTOMATIC
+    }
+    #[doc = "Checks if the value of the field is `ALWAYS_RUN`"]
+    #[inline(always)]
+    pub fn is_always_run(&self) -> bool {
+        *self == ALWAYSRUN_A::ALWAYS_RUN
+    }
+}
+#[doc = "Field `ALWAYSRUN` writer - Ensure clock is always running"]
+pub type ALWAYSRUN_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, LFCLKALWAYSRUN_SPEC, ALWAYSRUN_A, O>;
+impl<'a, const O: u8> ALWAYSRUN_W<'a, O> {
+    #[doc = "Use automatic clock control"]
+    #[inline(always)]
+    pub fn automatic(self) -> &'a mut W {
+        self.variant(ALWAYSRUN_A::AUTOMATIC)
+    }
+    #[doc = "Ensure clock is always running"]
+    #[inline(always)]
+    pub fn always_run(self) -> &'a mut W {
+        self.variant(ALWAYSRUN_A::ALWAYS_RUN)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Ensure clock is always running"]
+    #[inline(always)]
+    pub fn alwaysrun(&self) -> ALWAYSRUN_R {
+        ALWAYSRUN_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Ensure clock is always running"]
+    #[inline(always)]
+    pub fn alwaysrun(&mut self) -> ALWAYSRUN_W<0> {
+        ALWAYSRUN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Automatic or manual control of LFCLK\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfclkalwaysrun](index.html) module"]
+pub struct LFCLKALWAYSRUN_SPEC;
+impl crate::RegisterSpec for LFCLKALWAYSRUN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [lfclkalwaysrun::R](R) reader structure"]
+impl crate::Readable for LFCLKALWAYSRUN_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [lfclkalwaysrun::W](W) writer structure"]
+impl crate::Writable for LFCLKALWAYSRUN_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets LFCLKALWAYSRUN to value 0"]
+impl crate::Resettable for LFCLKALWAYSRUN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/clock_ns/lfclkrun.rs

@@ -0,0 +1,74 @@
+#[doc = "Register `LFCLKRUN` reader"]
+pub struct R(crate::R<LFCLKRUN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<LFCLKRUN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<LFCLKRUN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<LFCLKRUN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `STATUS` reader - LFCLKSTART task triggered or not"]
+pub type STATUS_R = crate::BitReader<STATUS_A>;
+#[doc = "LFCLKSTART task triggered or not\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STATUS_A {
+    #[doc = "0: Task not triggered"]
+    NOT_TRIGGERED = 0,
+    #[doc = "1: Task triggered"]
+    TRIGGERED = 1,
+}
+impl From<STATUS_A> for bool {
+    #[inline(always)]
+    fn from(variant: STATUS_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STATUS_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STATUS_A {
+        match self.bits {
+            false => STATUS_A::NOT_TRIGGERED,
+            true => STATUS_A::TRIGGERED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_TRIGGERED`"]
+    #[inline(always)]
+    pub fn is_not_triggered(&self) -> bool {
+        *self == STATUS_A::NOT_TRIGGERED
+    }
+    #[doc = "Checks if the value of the field is `TRIGGERED`"]
+    #[inline(always)]
+    pub fn is_triggered(&self) -> bool {
+        *self == STATUS_A::TRIGGERED
+    }
+}
+impl R {
+    #[doc = "Bit 0 - LFCLKSTART task triggered or not"]
+    #[inline(always)]
+    pub fn status(&self) -> STATUS_R {
+        STATUS_R::new((self.bits & 1) != 0)
+    }
+}
+#[doc = "Status indicating that LFCLKSTART task has been triggered\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfclkrun](index.html) module"]
+pub struct LFCLKRUN_SPEC;
+impl crate::RegisterSpec for LFCLKRUN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [lfclkrun::R](R) reader structure"]
+impl crate::Readable for LFCLKRUN_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets LFCLKRUN to value 0"]
+impl crate::Resettable for LFCLKRUN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/clock_ns/lfclksrc.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `LFCLKSRC` reader"]
+pub struct R(crate::R<LFCLKSRC_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<LFCLKSRC_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<LFCLKSRC_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<LFCLKSRC_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `LFCLKSRC` writer"]
+pub struct W(crate::W<LFCLKSRC_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<LFCLKSRC_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<LFCLKSRC_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<LFCLKSRC_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `SRC` reader - Select which LFCLK source is started by the LFCLKSTART task"]
+pub type SRC_R = crate::FieldReader<u8, SRC_A>;
+#[doc = "Select which LFCLK source is started by the LFCLKSTART task\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum SRC_A {
+    #[doc = "1: 32.768 kHz RC oscillator"]
+    LFRC = 1,
+    #[doc = "2: 32.768 kHz crystal oscillator"]
+    LFXO = 2,
+    #[doc = "3: 32.768 kHz synthesized from HFCLK"]
+    LFSYNT = 3,
+}
+impl From<SRC_A> for u8 {
+    #[inline(always)]
+    fn from(variant: SRC_A) -> Self {
+        variant as _
+    }
+}
+impl SRC_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<SRC_A> {
+        match self.bits {
+            1 => Some(SRC_A::LFRC),
+            2 => Some(SRC_A::LFXO),
+            3 => Some(SRC_A::LFSYNT),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `LFRC`"]
+    #[inline(always)]
+    pub fn is_lfrc(&self) -> bool {
+        *self == SRC_A::LFRC
+    }
+    #[doc = "Checks if the value of the field is `LFXO`"]
+    #[inline(always)]
+    pub fn is_lfxo(&self) -> bool {
+        *self == SRC_A::LFXO
+    }
+    #[doc = "Checks if the value of the field is `LFSYNT`"]
+    #[inline(always)]
+    pub fn is_lfsynt(&self) -> bool {
+        *self == SRC_A::LFSYNT
+    }
+}
+#[doc = "Field `SRC` writer - Select which LFCLK source is started by the LFCLKSTART task"]
+pub type SRC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, LFCLKSRC_SPEC, u8, SRC_A, 2, O>;
+impl<'a, const O: u8> SRC_W<'a, O> {
+    #[doc = "32.768 kHz RC oscillator"]
+    #[inline(always)]
+    pub fn lfrc(self) -> &'a mut W {
+        self.variant(SRC_A::LFRC)
+    }
+    #[doc = "32.768 kHz crystal oscillator"]
+    #[inline(always)]
+    pub fn lfxo(self) -> &'a mut W {
+        self.variant(SRC_A::LFXO)
+    }
+    #[doc = "32.768 kHz synthesized from HFCLK"]
+    #[inline(always)]
+    pub fn lfsynt(self) -> &'a mut W {
+        self.variant(SRC_A::LFSYNT)
+    }
+}
+impl R {
+    #[doc = "Bits 0:1 - Select which LFCLK source is started by the LFCLKSTART task"]
+    #[inline(always)]
+    pub fn src(&self) -> SRC_R {
+        SRC_R::new((self.bits & 3) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:1 - Select which LFCLK source is started by the LFCLKSTART task"]
+    #[inline(always)]
+    pub fn src(&mut self) -> SRC_W<0> {
+        SRC_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Clock source for LFCLK\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfclksrc](index.html) module"]
+pub struct LFCLKSRC_SPEC;
+impl crate::RegisterSpec for LFCLKSRC_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [lfclksrc::R](R) reader structure"]
+impl crate::Readable for LFCLKSRC_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [lfclksrc::W](W) writer structure"]
+impl crate::Writable for LFCLKSRC_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets LFCLKSRC to value 0x01"]
+impl crate::Resettable for LFCLKSRC_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x01
+    }
+}

vendor/nrf5340-net-pac/src/clock_ns/lfclksrccopy.rs

@@ -0,0 +1,84 @@
+#[doc = "Register `LFCLKSRCCOPY` reader"]
+pub struct R(crate::R<LFCLKSRCCOPY_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<LFCLKSRCCOPY_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<LFCLKSRCCOPY_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<LFCLKSRCCOPY_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `SRC` reader - Clock source"]
+pub type SRC_R = crate::FieldReader<u8, SRC_A>;
+#[doc = "Clock source\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum SRC_A {
+    #[doc = "1: 32.768 kHz RC oscillator"]
+    LFRC = 1,
+    #[doc = "2: 32.768 kHz crystal oscillator"]
+    LFXO = 2,
+    #[doc = "3: 32.768 kHz synthesized from HFCLK"]
+    LFSYNT = 3,
+}
+impl From<SRC_A> for u8 {
+    #[inline(always)]
+    fn from(variant: SRC_A) -> Self {
+        variant as _
+    }
+}
+impl SRC_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<SRC_A> {
+        match self.bits {
+            1 => Some(SRC_A::LFRC),
+            2 => Some(SRC_A::LFXO),
+            3 => Some(SRC_A::LFSYNT),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `LFRC`"]
+    #[inline(always)]
+    pub fn is_lfrc(&self) -> bool {
+        *self == SRC_A::LFRC
+    }
+    #[doc = "Checks if the value of the field is `LFXO`"]
+    #[inline(always)]
+    pub fn is_lfxo(&self) -> bool {
+        *self == SRC_A::LFXO
+    }
+    #[doc = "Checks if the value of the field is `LFSYNT`"]
+    #[inline(always)]
+    pub fn is_lfsynt(&self) -> bool {
+        *self == SRC_A::LFSYNT
+    }
+}
+impl R {
+    #[doc = "Bits 0:1 - Clock source"]
+    #[inline(always)]
+    pub fn src(&self) -> SRC_R {
+        SRC_R::new((self.bits & 3) as u8)
+    }
+}
+#[doc = "Copy of LFCLKSRC register, set when LFCLKSTART task was triggered\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfclksrccopy](index.html) module"]
+pub struct LFCLKSRCCOPY_SPEC;
+impl crate::RegisterSpec for LFCLKSRCCOPY_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [lfclksrccopy::R](R) reader structure"]
+impl crate::Readable for LFCLKSRCCOPY_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets LFCLKSRCCOPY to value 0x01"]
+impl crate::Resettable for LFCLKSRCCOPY_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x01
+    }
+}

vendor/nrf5340-net-pac/src/clock_ns/lfclkstat.rs

@@ -0,0 +1,166 @@
+#[doc = "Register `LFCLKSTAT` reader"]
+pub struct R(crate::R<LFCLKSTAT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<LFCLKSTAT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<LFCLKSTAT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<LFCLKSTAT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `SRC` reader - Active clock source"]
+pub type SRC_R = crate::FieldReader<u8, SRC_A>;
+#[doc = "Active clock source\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum SRC_A {
+    #[doc = "1: 32.768 kHz RC oscillator"]
+    LFRC = 1,
+    #[doc = "2: 32.768 kHz crystal oscillator"]
+    LFXO = 2,
+    #[doc = "3: 32.768 kHz synthesized from HFCLK"]
+    LFSYNT = 3,
+}
+impl From<SRC_A> for u8 {
+    #[inline(always)]
+    fn from(variant: SRC_A) -> Self {
+        variant as _
+    }
+}
+impl SRC_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<SRC_A> {
+        match self.bits {
+            1 => Some(SRC_A::LFRC),
+            2 => Some(SRC_A::LFXO),
+            3 => Some(SRC_A::LFSYNT),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `LFRC`"]
+    #[inline(always)]
+    pub fn is_lfrc(&self) -> bool {
+        *self == SRC_A::LFRC
+    }
+    #[doc = "Checks if the value of the field is `LFXO`"]
+    #[inline(always)]
+    pub fn is_lfxo(&self) -> bool {
+        *self == SRC_A::LFXO
+    }
+    #[doc = "Checks if the value of the field is `LFSYNT`"]
+    #[inline(always)]
+    pub fn is_lfsynt(&self) -> bool {
+        *self == SRC_A::LFSYNT
+    }
+}
+#[doc = "Field `ALWAYSRUNNING` reader - ALWAYSRUN activated"]
+pub type ALWAYSRUNNING_R = crate::BitReader<ALWAYSRUNNING_A>;
+#[doc = "ALWAYSRUN activated\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ALWAYSRUNNING_A {
+    #[doc = "0: Automatic clock control enabled"]
+    NOT_RUNNING = 0,
+    #[doc = "1: Oscillator is always running"]
+    RUNNING = 1,
+}
+impl From<ALWAYSRUNNING_A> for bool {
+    #[inline(always)]
+    fn from(variant: ALWAYSRUNNING_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ALWAYSRUNNING_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ALWAYSRUNNING_A {
+        match self.bits {
+            false => ALWAYSRUNNING_A::NOT_RUNNING,
+            true => ALWAYSRUNNING_A::RUNNING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_RUNNING`"]
+    #[inline(always)]
+    pub fn is_not_running(&self) -> bool {
+        *self == ALWAYSRUNNING_A::NOT_RUNNING
+    }
+    #[doc = "Checks if the value of the field is `RUNNING`"]
+    #[inline(always)]
+    pub fn is_running(&self) -> bool {
+        *self == ALWAYSRUNNING_A::RUNNING
+    }
+}
+#[doc = "Field `STATE` reader - LFCLK state"]
+pub type STATE_R = crate::BitReader<STATE_A>;
+#[doc = "LFCLK state\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STATE_A {
+    #[doc = "0: LFCLK not running"]
+    NOT_RUNNING = 0,
+    #[doc = "1: LFCLK running"]
+    RUNNING = 1,
+}
+impl From<STATE_A> for bool {
+    #[inline(always)]
+    fn from(variant: STATE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STATE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STATE_A {
+        match self.bits {
+            false => STATE_A::NOT_RUNNING,
+            true => STATE_A::RUNNING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_RUNNING`"]
+    #[inline(always)]
+    pub fn is_not_running(&self) -> bool {
+        *self == STATE_A::NOT_RUNNING
+    }
+    #[doc = "Checks if the value of the field is `RUNNING`"]
+    #[inline(always)]
+    pub fn is_running(&self) -> bool {
+        *self == STATE_A::RUNNING
+    }
+}
+impl R {
+    #[doc = "Bits 0:1 - Active clock source"]
+    #[inline(always)]
+    pub fn src(&self) -> SRC_R {
+        SRC_R::new((self.bits & 3) as u8)
+    }
+    #[doc = "Bit 4 - ALWAYSRUN activated"]
+    #[inline(always)]
+    pub fn alwaysrunning(&self) -> ALWAYSRUNNING_R {
+        ALWAYSRUNNING_R::new(((self.bits >> 4) & 1) != 0)
+    }
+    #[doc = "Bit 16 - LFCLK state"]
+    #[inline(always)]
+    pub fn state(&self) -> STATE_R {
+        STATE_R::new(((self.bits >> 16) & 1) != 0)
+    }
+}
+#[doc = "Status indicating which LFCLK source is running This register value in any CLOCK instance reflects status only due to configurations/actions in that CLOCK instance.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfclkstat](index.html) module"]
+pub struct LFCLKSTAT_SPEC;
+impl crate::RegisterSpec for LFCLKSTAT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [lfclkstat::R](R) reader structure"]
+impl crate::Readable for LFCLKSTAT_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets LFCLKSTAT to value 0"]
+impl crate::Resettable for LFCLKSTAT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/clock_ns/publish_done.rs

@@ -0,0 +1,140 @@
+#[doc = "Register `PUBLISH_DONE` reader"]
+pub struct R(crate::R<PUBLISH_DONE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PUBLISH_DONE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PUBLISH_DONE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PUBLISH_DONE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PUBLISH_DONE` writer"]
+pub struct W(crate::W<PUBLISH_DONE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PUBLISH_DONE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PUBLISH_DONE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PUBLISH_DONE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that event DONE will publish to."]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that event DONE will publish to."]
+pub type CHIDX_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PUBLISH_DONE_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable publishing"]
+    DISABLED = 0,
+    #[doc = "1: Enable publishing"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PUBLISH_DONE_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable publishing"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable publishing"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that event DONE will publish to."]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that event DONE will publish to."]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Publish configuration for event DONE\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [publish_done](index.html) module"]
+pub struct PUBLISH_DONE_SPEC;
+impl crate::RegisterSpec for PUBLISH_DONE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [publish_done::R](R) reader structure"]
+impl crate::Readable for PUBLISH_DONE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [publish_done::W](W) writer structure"]
+impl crate::Writable for PUBLISH_DONE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PUBLISH_DONE to value 0"]
+impl crate::Resettable for PUBLISH_DONE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/clock_ns/publish_hfclkstarted.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `PUBLISH_HFCLKSTARTED` reader"]
+pub struct R(crate::R<PUBLISH_HFCLKSTARTED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PUBLISH_HFCLKSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PUBLISH_HFCLKSTARTED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PUBLISH_HFCLKSTARTED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PUBLISH_HFCLKSTARTED` writer"]
+pub struct W(crate::W<PUBLISH_HFCLKSTARTED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PUBLISH_HFCLKSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PUBLISH_HFCLKSTARTED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PUBLISH_HFCLKSTARTED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that event HFCLKSTARTED will publish to."]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that event HFCLKSTARTED will publish to."]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, PUBLISH_HFCLKSTARTED_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable publishing"]
+    DISABLED = 0,
+    #[doc = "1: Enable publishing"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PUBLISH_HFCLKSTARTED_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable publishing"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable publishing"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that event HFCLKSTARTED will publish to."]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that event HFCLKSTARTED will publish to."]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Publish configuration for event HFCLKSTARTED\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [publish_hfclkstarted](index.html) module"]
+pub struct PUBLISH_HFCLKSTARTED_SPEC;
+impl crate::RegisterSpec for PUBLISH_HFCLKSTARTED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [publish_hfclkstarted::R](R) reader structure"]
+impl crate::Readable for PUBLISH_HFCLKSTARTED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [publish_hfclkstarted::W](W) writer structure"]
+impl crate::Writable for PUBLISH_HFCLKSTARTED_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PUBLISH_HFCLKSTARTED to value 0"]
+impl crate::Resettable for PUBLISH_HFCLKSTARTED_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/clock_ns/publish_lfclkstarted.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `PUBLISH_LFCLKSTARTED` reader"]
+pub struct R(crate::R<PUBLISH_LFCLKSTARTED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PUBLISH_LFCLKSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PUBLISH_LFCLKSTARTED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PUBLISH_LFCLKSTARTED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PUBLISH_LFCLKSTARTED` writer"]
+pub struct W(crate::W<PUBLISH_LFCLKSTARTED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PUBLISH_LFCLKSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PUBLISH_LFCLKSTARTED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PUBLISH_LFCLKSTARTED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that event LFCLKSTARTED will publish to."]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that event LFCLKSTARTED will publish to."]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, PUBLISH_LFCLKSTARTED_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable publishing"]
+    DISABLED = 0,
+    #[doc = "1: Enable publishing"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PUBLISH_LFCLKSTARTED_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable publishing"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable publishing"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that event LFCLKSTARTED will publish to."]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that event LFCLKSTARTED will publish to."]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Publish configuration for event LFCLKSTARTED\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [publish_lfclkstarted](index.html) module"]
+pub struct PUBLISH_LFCLKSTARTED_SPEC;
+impl crate::RegisterSpec for PUBLISH_LFCLKSTARTED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [publish_lfclkstarted::R](R) reader structure"]
+impl crate::Readable for PUBLISH_LFCLKSTARTED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [publish_lfclkstarted::W](W) writer structure"]
+impl crate::Writable for PUBLISH_LFCLKSTARTED_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PUBLISH_LFCLKSTARTED to value 0"]
+impl crate::Resettable for PUBLISH_LFCLKSTARTED_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/clock_ns/subscribe_cal.rs

@@ -0,0 +1,140 @@
+#[doc = "Register `SUBSCRIBE_CAL` reader"]
+pub struct R(crate::R<SUBSCRIBE_CAL_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_CAL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_CAL_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_CAL_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_CAL` writer"]
+pub struct W(crate::W<SUBSCRIBE_CAL_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_CAL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_CAL_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_CAL_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that task CAL will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that task CAL will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SUBSCRIBE_CAL_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_CAL_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that task CAL will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that task CAL will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task CAL\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_cal](index.html) module"]
+pub struct SUBSCRIBE_CAL_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_CAL_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_cal::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_CAL_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_cal::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_CAL_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_CAL to value 0"]
+impl crate::Resettable for SUBSCRIBE_CAL_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/clock_ns/subscribe_hfclkstart.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `SUBSCRIBE_HFCLKSTART` reader"]
+pub struct R(crate::R<SUBSCRIBE_HFCLKSTART_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_HFCLKSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_HFCLKSTART_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_HFCLKSTART_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_HFCLKSTART` writer"]
+pub struct W(crate::W<SUBSCRIBE_HFCLKSTART_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_HFCLKSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_HFCLKSTART_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_HFCLKSTART_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that task HFCLKSTART will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that task HFCLKSTART will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, SUBSCRIBE_HFCLKSTART_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_HFCLKSTART_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that task HFCLKSTART will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that task HFCLKSTART will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task HFCLKSTART\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_hfclkstart](index.html) module"]
+pub struct SUBSCRIBE_HFCLKSTART_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_HFCLKSTART_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_hfclkstart::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_HFCLKSTART_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_hfclkstart::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_HFCLKSTART_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_HFCLKSTART to value 0"]
+impl crate::Resettable for SUBSCRIBE_HFCLKSTART_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/clock_ns/subscribe_hfclkstop.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `SUBSCRIBE_HFCLKSTOP` reader"]
+pub struct R(crate::R<SUBSCRIBE_HFCLKSTOP_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_HFCLKSTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_HFCLKSTOP_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_HFCLKSTOP_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_HFCLKSTOP` writer"]
+pub struct W(crate::W<SUBSCRIBE_HFCLKSTOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_HFCLKSTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_HFCLKSTOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_HFCLKSTOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that task HFCLKSTOP will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that task HFCLKSTOP will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, SUBSCRIBE_HFCLKSTOP_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_HFCLKSTOP_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that task HFCLKSTOP will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that task HFCLKSTOP will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task HFCLKSTOP\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_hfclkstop](index.html) module"]
+pub struct SUBSCRIBE_HFCLKSTOP_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_HFCLKSTOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_hfclkstop::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_HFCLKSTOP_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_hfclkstop::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_HFCLKSTOP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_HFCLKSTOP to value 0"]
+impl crate::Resettable for SUBSCRIBE_HFCLKSTOP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/clock_ns/subscribe_lfclkstart.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `SUBSCRIBE_LFCLKSTART` reader"]
+pub struct R(crate::R<SUBSCRIBE_LFCLKSTART_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_LFCLKSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_LFCLKSTART_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_LFCLKSTART_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_LFCLKSTART` writer"]
+pub struct W(crate::W<SUBSCRIBE_LFCLKSTART_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_LFCLKSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_LFCLKSTART_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_LFCLKSTART_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that task LFCLKSTART will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that task LFCLKSTART will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, SUBSCRIBE_LFCLKSTART_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_LFCLKSTART_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that task LFCLKSTART will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that task LFCLKSTART will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task LFCLKSTART\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_lfclkstart](index.html) module"]
+pub struct SUBSCRIBE_LFCLKSTART_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_LFCLKSTART_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_lfclkstart::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_LFCLKSTART_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_lfclkstart::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_LFCLKSTART_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_LFCLKSTART to value 0"]
+impl crate::Resettable for SUBSCRIBE_LFCLKSTART_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/clock_ns/subscribe_lfclkstop.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `SUBSCRIBE_LFCLKSTOP` reader"]
+pub struct R(crate::R<SUBSCRIBE_LFCLKSTOP_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_LFCLKSTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_LFCLKSTOP_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_LFCLKSTOP_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_LFCLKSTOP` writer"]
+pub struct W(crate::W<SUBSCRIBE_LFCLKSTOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_LFCLKSTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_LFCLKSTOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_LFCLKSTOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - DPPI channel that task LFCLKSTOP will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - DPPI channel that task LFCLKSTOP will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, SUBSCRIBE_LFCLKSTOP_SPEC, u8, u8, 8, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_LFCLKSTOP_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - DPPI channel that task LFCLKSTOP will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0xff) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - DPPI channel that task LFCLKSTOP will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task LFCLKSTOP\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_lfclkstop](index.html) module"]
+pub struct SUBSCRIBE_LFCLKSTOP_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_LFCLKSTOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_lfclkstop::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_LFCLKSTOP_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_lfclkstop::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_LFCLKSTOP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_LFCLKSTOP to value 0"]
+impl crate::Resettable for SUBSCRIBE_LFCLKSTOP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/clock_ns/tasks_cal.rs

@@ -0,0 +1,71 @@
+#[doc = "Register `TASKS_CAL` writer"]
+pub struct W(crate::W<TASKS_CAL_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_CAL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_CAL_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_CAL_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Start calibration of LFRC oscillator\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_CAL_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_CAL_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_CAL_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_CAL` writer - Start calibration of LFRC oscillator"]
+pub type TASKS_CAL_W<'a, const O: u8> = crate::BitWriter<'a, u32, TASKS_CAL_SPEC, TASKS_CAL_AW, O>;
+impl<'a, const O: u8> TASKS_CAL_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_CAL_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Start calibration of LFRC oscillator"]
+    #[inline(always)]
+    pub fn tasks_cal(&mut self) -> TASKS_CAL_W<0> {
+        TASKS_CAL_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Start calibration of LFRC oscillator\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_cal](index.html) module"]
+pub struct TASKS_CAL_SPEC;
+impl crate::RegisterSpec for TASKS_CAL_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_cal::W](W) writer structure"]
+impl crate::Writable for TASKS_CAL_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_CAL to value 0"]
+impl crate::Resettable for TASKS_CAL_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/clock_ns/tasks_hfclkstart.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_HFCLKSTART` writer"]
+pub struct W(crate::W<TASKS_HFCLKSTART_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_HFCLKSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_HFCLKSTART_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_HFCLKSTART_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Start HFCLK128M/HFCLK64M source as selected in HFCLKSRC\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_HFCLKSTART_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_HFCLKSTART_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_HFCLKSTART_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_HFCLKSTART` writer - Start HFCLK128M/HFCLK64M source as selected in HFCLKSRC"]
+pub type TASKS_HFCLKSTART_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_HFCLKSTART_SPEC, TASKS_HFCLKSTART_AW, O>;
+impl<'a, const O: u8> TASKS_HFCLKSTART_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_HFCLKSTART_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Start HFCLK128M/HFCLK64M source as selected in HFCLKSRC"]
+    #[inline(always)]
+    pub fn tasks_hfclkstart(&mut self) -> TASKS_HFCLKSTART_W<0> {
+        TASKS_HFCLKSTART_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Start HFCLK128M/HFCLK64M source as selected in HFCLKSRC\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_hfclkstart](index.html) module"]
+pub struct TASKS_HFCLKSTART_SPEC;
+impl crate::RegisterSpec for TASKS_HFCLKSTART_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_hfclkstart::W](W) writer structure"]
+impl crate::Writable for TASKS_HFCLKSTART_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_HFCLKSTART to value 0"]
+impl crate::Resettable for TASKS_HFCLKSTART_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/clock_ns/tasks_hfclkstop.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_HFCLKSTOP` writer"]
+pub struct W(crate::W<TASKS_HFCLKSTOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_HFCLKSTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_HFCLKSTOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_HFCLKSTOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Stop HFCLK128M/HFCLK64M source\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_HFCLKSTOP_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_HFCLKSTOP_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_HFCLKSTOP_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_HFCLKSTOP` writer - Stop HFCLK128M/HFCLK64M source"]
+pub type TASKS_HFCLKSTOP_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_HFCLKSTOP_SPEC, TASKS_HFCLKSTOP_AW, O>;
+impl<'a, const O: u8> TASKS_HFCLKSTOP_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_HFCLKSTOP_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Stop HFCLK128M/HFCLK64M source"]
+    #[inline(always)]
+    pub fn tasks_hfclkstop(&mut self) -> TASKS_HFCLKSTOP_W<0> {
+        TASKS_HFCLKSTOP_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Stop HFCLK128M/HFCLK64M source\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_hfclkstop](index.html) module"]
+pub struct TASKS_HFCLKSTOP_SPEC;
+impl crate::RegisterSpec for TASKS_HFCLKSTOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_hfclkstop::W](W) writer structure"]
+impl crate::Writable for TASKS_HFCLKSTOP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_HFCLKSTOP to value 0"]
+impl crate::Resettable for TASKS_HFCLKSTOP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/clock_ns/tasks_lfclkstart.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_LFCLKSTART` writer"]
+pub struct W(crate::W<TASKS_LFCLKSTART_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_LFCLKSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_LFCLKSTART_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_LFCLKSTART_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Start LFCLK source as selected in LFCLKSRC\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_LFCLKSTART_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_LFCLKSTART_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_LFCLKSTART_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_LFCLKSTART` writer - Start LFCLK source as selected in LFCLKSRC"]
+pub type TASKS_LFCLKSTART_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_LFCLKSTART_SPEC, TASKS_LFCLKSTART_AW, O>;
+impl<'a, const O: u8> TASKS_LFCLKSTART_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_LFCLKSTART_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Start LFCLK source as selected in LFCLKSRC"]
+    #[inline(always)]
+    pub fn tasks_lfclkstart(&mut self) -> TASKS_LFCLKSTART_W<0> {
+        TASKS_LFCLKSTART_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Start LFCLK source as selected in LFCLKSRC\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_lfclkstart](index.html) module"]
+pub struct TASKS_LFCLKSTART_SPEC;
+impl crate::RegisterSpec for TASKS_LFCLKSTART_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_lfclkstart::W](W) writer structure"]
+impl crate::Writable for TASKS_LFCLKSTART_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_LFCLKSTART to value 0"]
+impl crate::Resettable for TASKS_LFCLKSTART_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/clock_ns/tasks_lfclkstop.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_LFCLKSTOP` writer"]
+pub struct W(crate::W<TASKS_LFCLKSTOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_LFCLKSTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_LFCLKSTOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_LFCLKSTOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Stop LFCLK source\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_LFCLKSTOP_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_LFCLKSTOP_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_LFCLKSTOP_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_LFCLKSTOP` writer - Stop LFCLK source"]
+pub type TASKS_LFCLKSTOP_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_LFCLKSTOP_SPEC, TASKS_LFCLKSTOP_AW, O>;
+impl<'a, const O: u8> TASKS_LFCLKSTOP_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_LFCLKSTOP_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Stop LFCLK source"]
+    #[inline(always)]
+    pub fn tasks_lfclkstop(&mut self) -> TASKS_LFCLKSTOP_W<0> {
+        TASKS_LFCLKSTOP_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Stop LFCLK source\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_lfclkstop](index.html) module"]
+pub struct TASKS_LFCLKSTOP_SPEC;
+impl crate::RegisterSpec for TASKS_LFCLKSTOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_lfclkstop::W](W) writer structure"]
+impl crate::Writable for TASKS_LFCLKSTOP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_LFCLKSTOP to value 0"]
+impl crate::Resettable for TASKS_LFCLKSTOP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/cti_ns.rs

@@ -0,0 +1,166 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct RegisterBlock {
+    #[doc = "0x00 - CTI Control register"]
+    pub cticontrol: CTICONTROL,
+    _reserved1: [u8; 0x0c],
+    #[doc = "0x10 - CTI Interrupt Acknowledge register"]
+    pub ctiintack: CTIINTACK,
+    #[doc = "0x14 - CTI Application Trigger Set register"]
+    pub ctiappset: CTIAPPSET,
+    #[doc = "0x18 - CTI Application Trigger Clear register"]
+    pub ctiappclear: CTIAPPCLEAR,
+    #[doc = "0x1c - CTI Application Pulse register"]
+    pub ctiapppulse: CTIAPPPULSE,
+    #[doc = "0x20..0x40 - Description collection: CTI Trigger input"]
+    pub ctiinen: [CTIINEN; 8],
+    _reserved6: [u8; 0x60],
+    #[doc = "0xa0..0xc0 - Description collection: CTI Trigger output"]
+    pub ctiouten: [CTIOUTEN; 8],
+    _reserved7: [u8; 0x70],
+    #[doc = "0x130 - CTI Trigger In Status register"]
+    pub ctitriginstatus: CTITRIGINSTATUS,
+    #[doc = "0x134 - CTI Trigger Out Status register"]
+    pub ctitrigoutstatus: CTITRIGOUTSTATUS,
+    #[doc = "0x138 - CTI Channel In Status register"]
+    pub ctichinstatus: CTICHINSTATUS,
+    _reserved10: [u8; 0x04],
+    #[doc = "0x140 - Enable CTI Channel Gate register"]
+    pub ctigate: CTIGATE,
+    _reserved11: [u8; 0x0e78],
+    #[doc = "0xfbc - Device Architecture register"]
+    pub devarch: DEVARCH,
+    _reserved12: [u8; 0x08],
+    #[doc = "0xfc8 - Device Configuration register"]
+    pub devid: DEVID,
+    #[doc = "0xfcc - Device Type Identifier register"]
+    pub devtype: DEVTYPE,
+    #[doc = "0xfd0 - Peripheral ID4 Register"]
+    pub pidr4: PIDR4,
+    #[doc = "0xfd4 - Peripheral ID5 register"]
+    pub pidr5: PIDR5,
+    #[doc = "0xfd8 - Peripheral ID6 register"]
+    pub pidr6: PIDR6,
+    #[doc = "0xfdc - Peripheral ID7 register"]
+    pub pidr7: PIDR7,
+    #[doc = "0xfe0 - Peripheral ID0 Register"]
+    pub pidr0: PIDR0,
+    #[doc = "0xfe4 - Peripheral ID1 Register"]
+    pub pidr1: PIDR1,
+    #[doc = "0xfe8 - Peripheral ID2 Register"]
+    pub pidr2: PIDR2,
+    #[doc = "0xfec - Peripheral ID3 Register"]
+    pub pidr3: PIDR3,
+    #[doc = "0xff0 - Component ID0 Register"]
+    pub cidr0: CIDR0,
+    #[doc = "0xff4 - Component ID1 Register"]
+    pub cidr1: CIDR1,
+    #[doc = "0xff8 - Component ID2 Register"]
+    pub cidr2: CIDR2,
+    #[doc = "0xffc - Component ID3 Register"]
+    pub cidr3: CIDR3,
+}
+#[doc = "CTICONTROL (rw) register accessor: an alias for `Reg<CTICONTROL_SPEC>`"]
+pub type CTICONTROL = crate::Reg<cticontrol::CTICONTROL_SPEC>;
+#[doc = "CTI Control register"]
+pub mod cticontrol;
+#[doc = "CTIINTACK (w) register accessor: an alias for `Reg<CTIINTACK_SPEC>`"]
+pub type CTIINTACK = crate::Reg<ctiintack::CTIINTACK_SPEC>;
+#[doc = "CTI Interrupt Acknowledge register"]
+pub mod ctiintack;
+#[doc = "CTIAPPSET (rw) register accessor: an alias for `Reg<CTIAPPSET_SPEC>`"]
+pub type CTIAPPSET = crate::Reg<ctiappset::CTIAPPSET_SPEC>;
+#[doc = "CTI Application Trigger Set register"]
+pub mod ctiappset;
+#[doc = "CTIAPPCLEAR (w) register accessor: an alias for `Reg<CTIAPPCLEAR_SPEC>`"]
+pub type CTIAPPCLEAR = crate::Reg<ctiappclear::CTIAPPCLEAR_SPEC>;
+#[doc = "CTI Application Trigger Clear register"]
+pub mod ctiappclear;
+#[doc = "CTIAPPPULSE (w) register accessor: an alias for `Reg<CTIAPPPULSE_SPEC>`"]
+pub type CTIAPPPULSE = crate::Reg<ctiapppulse::CTIAPPPULSE_SPEC>;
+#[doc = "CTI Application Pulse register"]
+pub mod ctiapppulse;
+#[doc = "CTIINEN (rw) register accessor: an alias for `Reg<CTIINEN_SPEC>`"]
+pub type CTIINEN = crate::Reg<ctiinen::CTIINEN_SPEC>;
+#[doc = "Description collection: CTI Trigger input"]
+pub mod ctiinen;
+#[doc = "CTIOUTEN (rw) register accessor: an alias for `Reg<CTIOUTEN_SPEC>`"]
+pub type CTIOUTEN = crate::Reg<ctiouten::CTIOUTEN_SPEC>;
+#[doc = "Description collection: CTI Trigger output"]
+pub mod ctiouten;
+#[doc = "CTITRIGINSTATUS (r) register accessor: an alias for `Reg<CTITRIGINSTATUS_SPEC>`"]
+pub type CTITRIGINSTATUS = crate::Reg<ctitriginstatus::CTITRIGINSTATUS_SPEC>;
+#[doc = "CTI Trigger In Status register"]
+pub mod ctitriginstatus;
+#[doc = "CTITRIGOUTSTATUS (r) register accessor: an alias for `Reg<CTITRIGOUTSTATUS_SPEC>`"]
+pub type CTITRIGOUTSTATUS = crate::Reg<ctitrigoutstatus::CTITRIGOUTSTATUS_SPEC>;
+#[doc = "CTI Trigger Out Status register"]
+pub mod ctitrigoutstatus;
+#[doc = "CTICHINSTATUS (r) register accessor: an alias for `Reg<CTICHINSTATUS_SPEC>`"]
+pub type CTICHINSTATUS = crate::Reg<ctichinstatus::CTICHINSTATUS_SPEC>;
+#[doc = "CTI Channel In Status register"]
+pub mod ctichinstatus;
+#[doc = "CTIGATE (rw) register accessor: an alias for `Reg<CTIGATE_SPEC>`"]
+pub type CTIGATE = crate::Reg<ctigate::CTIGATE_SPEC>;
+#[doc = "Enable CTI Channel Gate register"]
+pub mod ctigate;
+#[doc = "DEVARCH (r) register accessor: an alias for `Reg<DEVARCH_SPEC>`"]
+pub type DEVARCH = crate::Reg<devarch::DEVARCH_SPEC>;
+#[doc = "Device Architecture register"]
+pub mod devarch;
+#[doc = "DEVID (r) register accessor: an alias for `Reg<DEVID_SPEC>`"]
+pub type DEVID = crate::Reg<devid::DEVID_SPEC>;
+#[doc = "Device Configuration register"]
+pub mod devid;
+#[doc = "DEVTYPE (r) register accessor: an alias for `Reg<DEVTYPE_SPEC>`"]
+pub type DEVTYPE = crate::Reg<devtype::DEVTYPE_SPEC>;
+#[doc = "Device Type Identifier register"]
+pub mod devtype;
+#[doc = "PIDR4 (r) register accessor: an alias for `Reg<PIDR4_SPEC>`"]
+pub type PIDR4 = crate::Reg<pidr4::PIDR4_SPEC>;
+#[doc = "Peripheral ID4 Register"]
+pub mod pidr4;
+#[doc = "PIDR5 (r) register accessor: an alias for `Reg<PIDR5_SPEC>`"]
+pub type PIDR5 = crate::Reg<pidr5::PIDR5_SPEC>;
+#[doc = "Peripheral ID5 register"]
+pub mod pidr5;
+#[doc = "PIDR6 (r) register accessor: an alias for `Reg<PIDR6_SPEC>`"]
+pub type PIDR6 = crate::Reg<pidr6::PIDR6_SPEC>;
+#[doc = "Peripheral ID6 register"]
+pub mod pidr6;
+#[doc = "PIDR7 (r) register accessor: an alias for `Reg<PIDR7_SPEC>`"]
+pub type PIDR7 = crate::Reg<pidr7::PIDR7_SPEC>;
+#[doc = "Peripheral ID7 register"]
+pub mod pidr7;
+#[doc = "PIDR0 (r) register accessor: an alias for `Reg<PIDR0_SPEC>`"]
+pub type PIDR0 = crate::Reg<pidr0::PIDR0_SPEC>;
+#[doc = "Peripheral ID0 Register"]
+pub mod pidr0;
+#[doc = "PIDR1 (r) register accessor: an alias for `Reg<PIDR1_SPEC>`"]
+pub type PIDR1 = crate::Reg<pidr1::PIDR1_SPEC>;
+#[doc = "Peripheral ID1 Register"]
+pub mod pidr1;
+#[doc = "PIDR2 (r) register accessor: an alias for `Reg<PIDR2_SPEC>`"]
+pub type PIDR2 = crate::Reg<pidr2::PIDR2_SPEC>;
+#[doc = "Peripheral ID2 Register"]
+pub mod pidr2;
+#[doc = "PIDR3 (r) register accessor: an alias for `Reg<PIDR3_SPEC>`"]
+pub type PIDR3 = crate::Reg<pidr3::PIDR3_SPEC>;
+#[doc = "Peripheral ID3 Register"]
+pub mod pidr3;
+#[doc = "CIDR0 (r) register accessor: an alias for `Reg<CIDR0_SPEC>`"]
+pub type CIDR0 = crate::Reg<cidr0::CIDR0_SPEC>;
+#[doc = "Component ID0 Register"]
+pub mod cidr0;
+#[doc = "CIDR1 (r) register accessor: an alias for `Reg<CIDR1_SPEC>`"]
+pub type CIDR1 = crate::Reg<cidr1::CIDR1_SPEC>;
+#[doc = "Component ID1 Register"]
+pub mod cidr1;
+#[doc = "CIDR2 (r) register accessor: an alias for `Reg<CIDR2_SPEC>`"]
+pub type CIDR2 = crate::Reg<cidr2::CIDR2_SPEC>;
+#[doc = "Component ID2 Register"]
+pub mod cidr2;
+#[doc = "CIDR3 (r) register accessor: an alias for `Reg<CIDR3_SPEC>`"]
+pub type CIDR3 = crate::Reg<cidr3::CIDR3_SPEC>;
+#[doc = "Component ID3 Register"]
+pub mod cidr3;

vendor/nrf5340-net-pac/src/cti_ns/cidr0.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `CIDR0` reader"]
+pub struct R(crate::R<CIDR0_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CIDR0_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CIDR0_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CIDR0_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `PRMBL_0` reader - Preamble\\[0\\]. Contains bits\\[7:0\\]
+of the component identification code."]
+pub type PRMBL_0_R = crate::FieldReader<u8, PRMBL_0_A>;
+#[doc = "Preamble\\[0\\]. Contains bits\\[7:0\\]
+of the component identification code.\n\nValue on reset: 13"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum PRMBL_0_A {
+    #[doc = "13: Bits\\[7:0\\]
+of the identification code."]
+    VALUE = 13,
+}
+impl From<PRMBL_0_A> for u8 {
+    #[inline(always)]
+    fn from(variant: PRMBL_0_A) -> Self {
+        variant as _
+    }
+}
+impl PRMBL_0_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<PRMBL_0_A> {
+        match self.bits {
+            13 => Some(PRMBL_0_A::VALUE),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `VALUE`"]
+    #[inline(always)]
+    pub fn is_value(&self) -> bool {
+        *self == PRMBL_0_A::VALUE
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - Preamble\\[0\\]. Contains bits\\[7:0\\]
+of the component identification code."]
+    #[inline(always)]
+    pub fn prmbl_0(&self) -> PRMBL_0_R {
+        PRMBL_0_R::new((self.bits & 0xff) as u8)
+    }
+}
+#[doc = "Component ID0 Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cidr0](index.html) module"]
+pub struct CIDR0_SPEC;
+impl crate::RegisterSpec for CIDR0_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [cidr0::R](R) reader structure"]
+impl crate::Readable for CIDR0_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets CIDR0 to value 0x0d"]
+impl crate::Resettable for CIDR0_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x0d
+    }
+}

vendor/nrf5340-net-pac/src/cti_ns/cidr1.rs

@@ -0,0 +1,110 @@
+#[doc = "Register `CIDR1` reader"]
+pub struct R(crate::R<CIDR1_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CIDR1_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CIDR1_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CIDR1_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `PRMBL_1` reader - Preamble\\[1\\]. Contains bits\\[11:8\\]
+of the component identification code."]
+pub type PRMBL_1_R = crate::FieldReader<u8, PRMBL_1_A>;
+#[doc = "Preamble\\[1\\]. Contains bits\\[11:8\\]
+of the component identification code.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum PRMBL_1_A {
+    #[doc = "0: Bits\\[11:8\\]
+of the identification code."]
+    VALUE = 0,
+}
+impl From<PRMBL_1_A> for u8 {
+    #[inline(always)]
+    fn from(variant: PRMBL_1_A) -> Self {
+        variant as _
+    }
+}
+impl PRMBL_1_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<PRMBL_1_A> {
+        match self.bits {
+            0 => Some(PRMBL_1_A::VALUE),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `VALUE`"]
+    #[inline(always)]
+    pub fn is_value(&self) -> bool {
+        *self == PRMBL_1_A::VALUE
+    }
+}
+#[doc = "Field `CLASS` reader - Class of the component, for example, whether the component is a ROM table or a generic CoreSight component. Contains bits\\[15:12\\]
+of the component identification code"]
+pub type CLASS_R = crate::FieldReader<u8, CLASS_A>;
+#[doc = "Class of the component, for example, whether the component is a ROM table or a generic CoreSight component. Contains bits\\[15:12\\]
+of the component identification code\n\nValue on reset: 9"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum CLASS_A {
+    #[doc = "9: Indicates that the component is a CoreSight component."]
+    CORESIGHT = 9,
+}
+impl From<CLASS_A> for u8 {
+    #[inline(always)]
+    fn from(variant: CLASS_A) -> Self {
+        variant as _
+    }
+}
+impl CLASS_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<CLASS_A> {
+        match self.bits {
+            9 => Some(CLASS_A::CORESIGHT),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `CORESIGHT`"]
+    #[inline(always)]
+    pub fn is_coresight(&self) -> bool {
+        *self == CLASS_A::CORESIGHT
+    }
+}
+impl R {
+    #[doc = "Bits 0:3 - Preamble\\[1\\]. Contains bits\\[11:8\\]
+of the component identification code."]
+    #[inline(always)]
+    pub fn prmbl_1(&self) -> PRMBL_1_R {
+        PRMBL_1_R::new((self.bits & 0x0f) as u8)
+    }
+    #[doc = "Bits 4:7 - Class of the component, for example, whether the component is a ROM table or a generic CoreSight component. Contains bits\\[15:12\\]
+of the component identification code"]
+    #[inline(always)]
+    pub fn class(&self) -> CLASS_R {
+        CLASS_R::new(((self.bits >> 4) & 0x0f) as u8)
+    }
+}
+#[doc = "Component ID1 Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cidr1](index.html) module"]
+pub struct CIDR1_SPEC;
+impl crate::RegisterSpec for CIDR1_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [cidr1::R](R) reader structure"]
+impl crate::Readable for CIDR1_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets CIDR1 to value 0x90"]
+impl crate::Resettable for CIDR1_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x90
+    }
+}

vendor/nrf5340-net-pac/src/cti_ns/cidr2.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `CIDR2` reader"]
+pub struct R(crate::R<CIDR2_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CIDR2_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CIDR2_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CIDR2_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `PRMBL_2` reader - Preamble\\[2\\]. Contains bits\\[23:16\\]
+of the component identification code."]
+pub type PRMBL_2_R = crate::FieldReader<u8, PRMBL_2_A>;
+#[doc = "Preamble\\[2\\]. Contains bits\\[23:16\\]
+of the component identification code.\n\nValue on reset: 5"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum PRMBL_2_A {
+    #[doc = "5: Bits\\[23:16\\]
+of the identification code."]
+    VALUE = 5,
+}
+impl From<PRMBL_2_A> for u8 {
+    #[inline(always)]
+    fn from(variant: PRMBL_2_A) -> Self {
+        variant as _
+    }
+}
+impl PRMBL_2_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<PRMBL_2_A> {
+        match self.bits {
+            5 => Some(PRMBL_2_A::VALUE),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `VALUE`"]
+    #[inline(always)]
+    pub fn is_value(&self) -> bool {
+        *self == PRMBL_2_A::VALUE
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - Preamble\\[2\\]. Contains bits\\[23:16\\]
+of the component identification code."]
+    #[inline(always)]
+    pub fn prmbl_2(&self) -> PRMBL_2_R {
+        PRMBL_2_R::new((self.bits & 0xff) as u8)
+    }
+}
+#[doc = "Component ID2 Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cidr2](index.html) module"]
+pub struct CIDR2_SPEC;
+impl crate::RegisterSpec for CIDR2_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [cidr2::R](R) reader structure"]
+impl crate::Readable for CIDR2_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets CIDR2 to value 0x05"]
+impl crate::Resettable for CIDR2_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x05
+    }
+}

vendor/nrf5340-net-pac/src/cti_ns/cidr3.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `CIDR3` reader"]
+pub struct R(crate::R<CIDR3_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CIDR3_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CIDR3_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CIDR3_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `PRMBL_3` reader - Preamble\\[3\\]. Contains bits\\[31:24\\]
+of the component identification code."]
+pub type PRMBL_3_R = crate::FieldReader<u8, PRMBL_3_A>;
+#[doc = "Preamble\\[3\\]. Contains bits\\[31:24\\]
+of the component identification code.\n\nValue on reset: 177"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum PRMBL_3_A {
+    #[doc = "177: Bits\\[31:24\\]
+of the identification code."]
+    VALUE = 177,
+}
+impl From<PRMBL_3_A> for u8 {
+    #[inline(always)]
+    fn from(variant: PRMBL_3_A) -> Self {
+        variant as _
+    }
+}
+impl PRMBL_3_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<PRMBL_3_A> {
+        match self.bits {
+            177 => Some(PRMBL_3_A::VALUE),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `VALUE`"]
+    #[inline(always)]
+    pub fn is_value(&self) -> bool {
+        *self == PRMBL_3_A::VALUE
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - Preamble\\[3\\]. Contains bits\\[31:24\\]
+of the component identification code."]
+    #[inline(always)]
+    pub fn prmbl_3(&self) -> PRMBL_3_R {
+        PRMBL_3_R::new((self.bits & 0xff) as u8)
+    }
+}
+#[doc = "Component ID3 Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cidr3](index.html) module"]
+pub struct CIDR3_SPEC;
+impl crate::RegisterSpec for CIDR3_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [cidr3::R](R) reader structure"]
+impl crate::Readable for CIDR3_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets CIDR3 to value 0xb1"]
+impl crate::Resettable for CIDR3_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0xb1
+    }
+}

vendor/nrf5340-net-pac/src/cti_ns/ctiappclear.rs

@@ -0,0 +1,153 @@
+#[doc = "Register `CTIAPPCLEAR` writer"]
+pub struct W(crate::W<CTIAPPCLEAR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CTIAPPCLEAR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CTIAPPCLEAR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CTIAPPCLEAR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Sets the corresponding bits in the CTIAPPSET to 0. There is one bit of the register for each channel.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum APPCLEAR_0_AW {
+    #[doc = "1: Clears the event for channel 0."]
+    CLEAR = 1,
+}
+impl From<APPCLEAR_0_AW> for bool {
+    #[inline(always)]
+    fn from(variant: APPCLEAR_0_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `APPCLEAR_0` writer - Sets the corresponding bits in the CTIAPPSET to 0. There is one bit of the register for each channel."]
+pub type APPCLEAR_0_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, CTIAPPCLEAR_SPEC, APPCLEAR_0_AW, O>;
+impl<'a, const O: u8> APPCLEAR_0_W<'a, O> {
+    #[doc = "Clears the event for channel 0."]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(APPCLEAR_0_AW::CLEAR)
+    }
+}
+#[doc = "Sets the corresponding bits in the CTIAPPSET to 0. There is one bit of the register for each channel.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum APPCLEAR_1_AW {
+    #[doc = "1: Clears the event for channel 1."]
+    CLEAR = 1,
+}
+impl From<APPCLEAR_1_AW> for bool {
+    #[inline(always)]
+    fn from(variant: APPCLEAR_1_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `APPCLEAR_1` writer - Sets the corresponding bits in the CTIAPPSET to 0. There is one bit of the register for each channel."]
+pub type APPCLEAR_1_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, CTIAPPCLEAR_SPEC, APPCLEAR_1_AW, O>;
+impl<'a, const O: u8> APPCLEAR_1_W<'a, O> {
+    #[doc = "Clears the event for channel 1."]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(APPCLEAR_1_AW::CLEAR)
+    }
+}
+#[doc = "Sets the corresponding bits in the CTIAPPSET to 0. There is one bit of the register for each channel.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum APPCLEAR_2_AW {
+    #[doc = "1: Clears the event for channel 2."]
+    CLEAR = 1,
+}
+impl From<APPCLEAR_2_AW> for bool {
+    #[inline(always)]
+    fn from(variant: APPCLEAR_2_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `APPCLEAR_2` writer - Sets the corresponding bits in the CTIAPPSET to 0. There is one bit of the register for each channel."]
+pub type APPCLEAR_2_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, CTIAPPCLEAR_SPEC, APPCLEAR_2_AW, O>;
+impl<'a, const O: u8> APPCLEAR_2_W<'a, O> {
+    #[doc = "Clears the event for channel 2."]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(APPCLEAR_2_AW::CLEAR)
+    }
+}
+#[doc = "Sets the corresponding bits in the CTIAPPSET to 0. There is one bit of the register for each channel.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum APPCLEAR_3_AW {
+    #[doc = "1: Clears the event for channel 3."]
+    CLEAR = 1,
+}
+impl From<APPCLEAR_3_AW> for bool {
+    #[inline(always)]
+    fn from(variant: APPCLEAR_3_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `APPCLEAR_3` writer - Sets the corresponding bits in the CTIAPPSET to 0. There is one bit of the register for each channel."]
+pub type APPCLEAR_3_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, CTIAPPCLEAR_SPEC, APPCLEAR_3_AW, O>;
+impl<'a, const O: u8> APPCLEAR_3_W<'a, O> {
+    #[doc = "Clears the event for channel 3."]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(APPCLEAR_3_AW::CLEAR)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Sets the corresponding bits in the CTIAPPSET to 0. There is one bit of the register for each channel."]
+    #[inline(always)]
+    pub fn appclear_0(&mut self) -> APPCLEAR_0_W<0> {
+        APPCLEAR_0_W::new(self)
+    }
+    #[doc = "Bit 1 - Sets the corresponding bits in the CTIAPPSET to 0. There is one bit of the register for each channel."]
+    #[inline(always)]
+    pub fn appclear_1(&mut self) -> APPCLEAR_1_W<1> {
+        APPCLEAR_1_W::new(self)
+    }
+    #[doc = "Bit 2 - Sets the corresponding bits in the CTIAPPSET to 0. There is one bit of the register for each channel."]
+    #[inline(always)]
+    pub fn appclear_2(&mut self) -> APPCLEAR_2_W<2> {
+        APPCLEAR_2_W::new(self)
+    }
+    #[doc = "Bit 3 - Sets the corresponding bits in the CTIAPPSET to 0. There is one bit of the register for each channel."]
+    #[inline(always)]
+    pub fn appclear_3(&mut self) -> APPCLEAR_3_W<3> {
+        APPCLEAR_3_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "CTI Application Trigger Clear register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctiappclear](index.html) module"]
+pub struct CTIAPPCLEAR_SPEC;
+impl crate::RegisterSpec for CTIAPPCLEAR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [ctiappclear::W](W) writer structure"]
+impl crate::Writable for CTIAPPCLEAR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CTIAPPCLEAR to value 0"]
+impl crate::Resettable for CTIAPPCLEAR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/cti_ns/ctiapppulse.rs

@@ -0,0 +1,153 @@
+#[doc = "Register `CTIAPPPULSE` writer"]
+pub struct W(crate::W<CTIAPPPULSE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CTIAPPPULSE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CTIAPPPULSE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CTIAPPPULSE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Setting a bit HIGH generates a channel event pulse for the selected channel. There is one bit of the register for each channel.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum APPULSE_0_AW {
+    #[doc = "1: Generates an event pulse on channel 0."]
+    GENERATE = 1,
+}
+impl From<APPULSE_0_AW> for bool {
+    #[inline(always)]
+    fn from(variant: APPULSE_0_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `APPULSE_0` writer - Setting a bit HIGH generates a channel event pulse for the selected channel. There is one bit of the register for each channel."]
+pub type APPULSE_0_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, CTIAPPPULSE_SPEC, APPULSE_0_AW, O>;
+impl<'a, const O: u8> APPULSE_0_W<'a, O> {
+    #[doc = "Generates an event pulse on channel 0."]
+    #[inline(always)]
+    pub fn generate(self) -> &'a mut W {
+        self.variant(APPULSE_0_AW::GENERATE)
+    }
+}
+#[doc = "Setting a bit HIGH generates a channel event pulse for the selected channel. There is one bit of the register for each channel.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum APPULSE_1_AW {
+    #[doc = "1: Generates an event pulse on channel 1."]
+    GENERATE = 1,
+}
+impl From<APPULSE_1_AW> for bool {
+    #[inline(always)]
+    fn from(variant: APPULSE_1_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `APPULSE_1` writer - Setting a bit HIGH generates a channel event pulse for the selected channel. There is one bit of the register for each channel."]
+pub type APPULSE_1_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, CTIAPPPULSE_SPEC, APPULSE_1_AW, O>;
+impl<'a, const O: u8> APPULSE_1_W<'a, O> {
+    #[doc = "Generates an event pulse on channel 1."]
+    #[inline(always)]
+    pub fn generate(self) -> &'a mut W {
+        self.variant(APPULSE_1_AW::GENERATE)
+    }
+}
+#[doc = "Setting a bit HIGH generates a channel event pulse for the selected channel. There is one bit of the register for each channel.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum APPULSE_2_AW {
+    #[doc = "1: Generates an event pulse on channel 2."]
+    GENERATE = 1,
+}
+impl From<APPULSE_2_AW> for bool {
+    #[inline(always)]
+    fn from(variant: APPULSE_2_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `APPULSE_2` writer - Setting a bit HIGH generates a channel event pulse for the selected channel. There is one bit of the register for each channel."]
+pub type APPULSE_2_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, CTIAPPPULSE_SPEC, APPULSE_2_AW, O>;
+impl<'a, const O: u8> APPULSE_2_W<'a, O> {
+    #[doc = "Generates an event pulse on channel 2."]
+    #[inline(always)]
+    pub fn generate(self) -> &'a mut W {
+        self.variant(APPULSE_2_AW::GENERATE)
+    }
+}
+#[doc = "Setting a bit HIGH generates a channel event pulse for the selected channel. There is one bit of the register for each channel.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum APPULSE_3_AW {
+    #[doc = "1: Generates an event pulse on channel 3."]
+    GENERATE = 1,
+}
+impl From<APPULSE_3_AW> for bool {
+    #[inline(always)]
+    fn from(variant: APPULSE_3_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `APPULSE_3` writer - Setting a bit HIGH generates a channel event pulse for the selected channel. There is one bit of the register for each channel."]
+pub type APPULSE_3_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, CTIAPPPULSE_SPEC, APPULSE_3_AW, O>;
+impl<'a, const O: u8> APPULSE_3_W<'a, O> {
+    #[doc = "Generates an event pulse on channel 3."]
+    #[inline(always)]
+    pub fn generate(self) -> &'a mut W {
+        self.variant(APPULSE_3_AW::GENERATE)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Setting a bit HIGH generates a channel event pulse for the selected channel. There is one bit of the register for each channel."]
+    #[inline(always)]
+    pub fn appulse_0(&mut self) -> APPULSE_0_W<0> {
+        APPULSE_0_W::new(self)
+    }
+    #[doc = "Bit 1 - Setting a bit HIGH generates a channel event pulse for the selected channel. There is one bit of the register for each channel."]
+    #[inline(always)]
+    pub fn appulse_1(&mut self) -> APPULSE_1_W<1> {
+        APPULSE_1_W::new(self)
+    }
+    #[doc = "Bit 2 - Setting a bit HIGH generates a channel event pulse for the selected channel. There is one bit of the register for each channel."]
+    #[inline(always)]
+    pub fn appulse_2(&mut self) -> APPULSE_2_W<2> {
+        APPULSE_2_W::new(self)
+    }
+    #[doc = "Bit 3 - Setting a bit HIGH generates a channel event pulse for the selected channel. There is one bit of the register for each channel."]
+    #[inline(always)]
+    pub fn appulse_3(&mut self) -> APPULSE_3_W<3> {
+        APPULSE_3_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "CTI Application Pulse register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctiapppulse](index.html) module"]
+pub struct CTIAPPPULSE_SPEC;
+impl crate::RegisterSpec for CTIAPPPULSE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [ctiapppulse::W](W) writer structure"]
+impl crate::Writable for CTIAPPPULSE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CTIAPPPULSE to value 0"]
+impl crate::Resettable for CTIAPPPULSE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/cti_ns/ctiappset.rs

@@ -0,0 +1,334 @@
+#[doc = "Register `CTIAPPSET` reader"]
+pub struct R(crate::R<CTIAPPSET_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CTIAPPSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CTIAPPSET_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CTIAPPSET_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CTIAPPSET` writer"]
+pub struct W(crate::W<CTIAPPSET_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CTIAPPSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CTIAPPSET_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CTIAPPSET_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `APPSET_0` reader - Application trigger event for channel 0."]
+pub type APPSET_0_R = crate::BitReader<APPSET_0_A>;
+#[doc = "Application trigger event for channel 0.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum APPSET_0_A {
+    #[doc = "0: Application trigger 0 is inactive."]
+    INACTIVE = 0,
+    #[doc = "1: Application trigger 0 is active."]
+    ACTIVE = 1,
+}
+impl From<APPSET_0_A> for bool {
+    #[inline(always)]
+    fn from(variant: APPSET_0_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl APPSET_0_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> APPSET_0_A {
+        match self.bits {
+            false => APPSET_0_A::INACTIVE,
+            true => APPSET_0_A::ACTIVE,
+        }
+    }
+    #[doc = "Checks if the value of the field is `INACTIVE`"]
+    #[inline(always)]
+    pub fn is_inactive(&self) -> bool {
+        *self == APPSET_0_A::INACTIVE
+    }
+    #[doc = "Checks if the value of the field is `ACTIVE`"]
+    #[inline(always)]
+    pub fn is_active(&self) -> bool {
+        *self == APPSET_0_A::ACTIVE
+    }
+}
+#[doc = "Application trigger event for channel 0.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum APPSET_0_AW {
+    #[doc = "1: Generate channel event for channel 0."]
+    ACTIVATE = 1,
+}
+impl From<APPSET_0_AW> for bool {
+    #[inline(always)]
+    fn from(variant: APPSET_0_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `APPSET_0` writer - Application trigger event for channel 0."]
+pub type APPSET_0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTIAPPSET_SPEC, APPSET_0_AW, O>;
+impl<'a, const O: u8> APPSET_0_W<'a, O> {
+    #[doc = "Generate channel event for channel 0."]
+    #[inline(always)]
+    pub fn activate(self) -> &'a mut W {
+        self.variant(APPSET_0_AW::ACTIVATE)
+    }
+}
+#[doc = "Field `APPSET_1` reader - Application trigger event for channel 1."]
+pub type APPSET_1_R = crate::BitReader<APPSET_1_A>;
+#[doc = "Application trigger event for channel 1.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum APPSET_1_A {
+    #[doc = "0: Application trigger 1 is inactive."]
+    INACTIVE = 0,
+    #[doc = "1: Application trigger 1 is active."]
+    ACTIVE = 1,
+}
+impl From<APPSET_1_A> for bool {
+    #[inline(always)]
+    fn from(variant: APPSET_1_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl APPSET_1_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> APPSET_1_A {
+        match self.bits {
+            false => APPSET_1_A::INACTIVE,
+            true => APPSET_1_A::ACTIVE,
+        }
+    }
+    #[doc = "Checks if the value of the field is `INACTIVE`"]
+    #[inline(always)]
+    pub fn is_inactive(&self) -> bool {
+        *self == APPSET_1_A::INACTIVE
+    }
+    #[doc = "Checks if the value of the field is `ACTIVE`"]
+    #[inline(always)]
+    pub fn is_active(&self) -> bool {
+        *self == APPSET_1_A::ACTIVE
+    }
+}
+#[doc = "Application trigger event for channel 1.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum APPSET_1_AW {
+    #[doc = "1: Generate channel event for channel 1."]
+    ACTIVATE = 1,
+}
+impl From<APPSET_1_AW> for bool {
+    #[inline(always)]
+    fn from(variant: APPSET_1_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `APPSET_1` writer - Application trigger event for channel 1."]
+pub type APPSET_1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTIAPPSET_SPEC, APPSET_1_AW, O>;
+impl<'a, const O: u8> APPSET_1_W<'a, O> {
+    #[doc = "Generate channel event for channel 1."]
+    #[inline(always)]
+    pub fn activate(self) -> &'a mut W {
+        self.variant(APPSET_1_AW::ACTIVATE)
+    }
+}
+#[doc = "Field `APPSET_2` reader - Application trigger event for channel 2."]
+pub type APPSET_2_R = crate::BitReader<APPSET_2_A>;
+#[doc = "Application trigger event for channel 2.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum APPSET_2_A {
+    #[doc = "0: Application trigger 2 is inactive."]
+    INACTIVE = 0,
+    #[doc = "1: Application trigger 2 is active."]
+    ACTIVE = 1,
+}
+impl From<APPSET_2_A> for bool {
+    #[inline(always)]
+    fn from(variant: APPSET_2_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl APPSET_2_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> APPSET_2_A {
+        match self.bits {
+            false => APPSET_2_A::INACTIVE,
+            true => APPSET_2_A::ACTIVE,
+        }
+    }
+    #[doc = "Checks if the value of the field is `INACTIVE`"]
+    #[inline(always)]
+    pub fn is_inactive(&self) -> bool {
+        *self == APPSET_2_A::INACTIVE
+    }
+    #[doc = "Checks if the value of the field is `ACTIVE`"]
+    #[inline(always)]
+    pub fn is_active(&self) -> bool {
+        *self == APPSET_2_A::ACTIVE
+    }
+}
+#[doc = "Application trigger event for channel 2.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum APPSET_2_AW {
+    #[doc = "1: Generate channel event for channel 2."]
+    ACTIVATE = 1,
+}
+impl From<APPSET_2_AW> for bool {
+    #[inline(always)]
+    fn from(variant: APPSET_2_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `APPSET_2` writer - Application trigger event for channel 2."]
+pub type APPSET_2_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTIAPPSET_SPEC, APPSET_2_AW, O>;
+impl<'a, const O: u8> APPSET_2_W<'a, O> {
+    #[doc = "Generate channel event for channel 2."]
+    #[inline(always)]
+    pub fn activate(self) -> &'a mut W {
+        self.variant(APPSET_2_AW::ACTIVATE)
+    }
+}
+#[doc = "Field `APPSET_3` reader - Application trigger event for channel 3."]
+pub type APPSET_3_R = crate::BitReader<APPSET_3_A>;
+#[doc = "Application trigger event for channel 3.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum APPSET_3_A {
+    #[doc = "0: Application trigger 3 is inactive."]
+    INACTIVE = 0,
+    #[doc = "1: Application trigger 3 is active."]
+    ACTIVE = 1,
+}
+impl From<APPSET_3_A> for bool {
+    #[inline(always)]
+    fn from(variant: APPSET_3_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl APPSET_3_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> APPSET_3_A {
+        match self.bits {
+            false => APPSET_3_A::INACTIVE,
+            true => APPSET_3_A::ACTIVE,
+        }
+    }
+    #[doc = "Checks if the value of the field is `INACTIVE`"]
+    #[inline(always)]
+    pub fn is_inactive(&self) -> bool {
+        *self == APPSET_3_A::INACTIVE
+    }
+    #[doc = "Checks if the value of the field is `ACTIVE`"]
+    #[inline(always)]
+    pub fn is_active(&self) -> bool {
+        *self == APPSET_3_A::ACTIVE
+    }
+}
+#[doc = "Application trigger event for channel 3.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum APPSET_3_AW {
+    #[doc = "1: Generate channel event for channel 3."]
+    ACTIVATE = 1,
+}
+impl From<APPSET_3_AW> for bool {
+    #[inline(always)]
+    fn from(variant: APPSET_3_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `APPSET_3` writer - Application trigger event for channel 3."]
+pub type APPSET_3_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTIAPPSET_SPEC, APPSET_3_AW, O>;
+impl<'a, const O: u8> APPSET_3_W<'a, O> {
+    #[doc = "Generate channel event for channel 3."]
+    #[inline(always)]
+    pub fn activate(self) -> &'a mut W {
+        self.variant(APPSET_3_AW::ACTIVATE)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Application trigger event for channel 0."]
+    #[inline(always)]
+    pub fn appset_0(&self) -> APPSET_0_R {
+        APPSET_0_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Application trigger event for channel 1."]
+    #[inline(always)]
+    pub fn appset_1(&self) -> APPSET_1_R {
+        APPSET_1_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - Application trigger event for channel 2."]
+    #[inline(always)]
+    pub fn appset_2(&self) -> APPSET_2_R {
+        APPSET_2_R::new(((self.bits >> 2) & 1) != 0)
+    }
+    #[doc = "Bit 3 - Application trigger event for channel 3."]
+    #[inline(always)]
+    pub fn appset_3(&self) -> APPSET_3_R {
+        APPSET_3_R::new(((self.bits >> 3) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Application trigger event for channel 0."]
+    #[inline(always)]
+    pub fn appset_0(&mut self) -> APPSET_0_W<0> {
+        APPSET_0_W::new(self)
+    }
+    #[doc = "Bit 1 - Application trigger event for channel 1."]
+    #[inline(always)]
+    pub fn appset_1(&mut self) -> APPSET_1_W<1> {
+        APPSET_1_W::new(self)
+    }
+    #[doc = "Bit 2 - Application trigger event for channel 2."]
+    #[inline(always)]
+    pub fn appset_2(&mut self) -> APPSET_2_W<2> {
+        APPSET_2_W::new(self)
+    }
+    #[doc = "Bit 3 - Application trigger event for channel 3."]
+    #[inline(always)]
+    pub fn appset_3(&mut self) -> APPSET_3_W<3> {
+        APPSET_3_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "CTI Application Trigger Set register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctiappset](index.html) module"]
+pub struct CTIAPPSET_SPEC;
+impl crate::RegisterSpec for CTIAPPSET_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ctiappset::R](R) reader structure"]
+impl crate::Readable for CTIAPPSET_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ctiappset::W](W) writer structure"]
+impl crate::Writable for CTIAPPSET_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CTIAPPSET to value 0"]
+impl crate::Resettable for CTIAPPSET_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/cti_ns/ctichinstatus.rs

@@ -0,0 +1,197 @@
+#[doc = "Register `CTICHINSTATUS` reader"]
+pub struct R(crate::R<CTICHINSTATUS_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CTICHINSTATUS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CTICHINSTATUS_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CTICHINSTATUS_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `CTICHINSTATUS_0` reader - Shows the status of the ctitrigin 0 input."]
+pub type CTICHINSTATUS_0_R = crate::BitReader<CTICHINSTATUS_0_A>;
+#[doc = "Shows the status of the ctitrigin 0 input.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CTICHINSTATUS_0_A {
+    #[doc = "1: Ctichin 0 is active."]
+    ACTIVE = 1,
+    #[doc = "0: Ctichin 0 is inactive."]
+    INACTIVE = 0,
+}
+impl From<CTICHINSTATUS_0_A> for bool {
+    #[inline(always)]
+    fn from(variant: CTICHINSTATUS_0_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl CTICHINSTATUS_0_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CTICHINSTATUS_0_A {
+        match self.bits {
+            true => CTICHINSTATUS_0_A::ACTIVE,
+            false => CTICHINSTATUS_0_A::INACTIVE,
+        }
+    }
+    #[doc = "Checks if the value of the field is `ACTIVE`"]
+    #[inline(always)]
+    pub fn is_active(&self) -> bool {
+        *self == CTICHINSTATUS_0_A::ACTIVE
+    }
+    #[doc = "Checks if the value of the field is `INACTIVE`"]
+    #[inline(always)]
+    pub fn is_inactive(&self) -> bool {
+        *self == CTICHINSTATUS_0_A::INACTIVE
+    }
+}
+#[doc = "Field `CTICHINSTATUS_1` reader - Shows the status of the ctitrigin 1 input."]
+pub type CTICHINSTATUS_1_R = crate::BitReader<CTICHINSTATUS_1_A>;
+#[doc = "Shows the status of the ctitrigin 1 input.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CTICHINSTATUS_1_A {
+    #[doc = "1: Ctichin 1 is active."]
+    ACTIVE = 1,
+    #[doc = "0: Ctichin 1 is inactive."]
+    INACTIVE = 0,
+}
+impl From<CTICHINSTATUS_1_A> for bool {
+    #[inline(always)]
+    fn from(variant: CTICHINSTATUS_1_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl CTICHINSTATUS_1_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CTICHINSTATUS_1_A {
+        match self.bits {
+            true => CTICHINSTATUS_1_A::ACTIVE,
+            false => CTICHINSTATUS_1_A::INACTIVE,
+        }
+    }
+    #[doc = "Checks if the value of the field is `ACTIVE`"]
+    #[inline(always)]
+    pub fn is_active(&self) -> bool {
+        *self == CTICHINSTATUS_1_A::ACTIVE
+    }
+    #[doc = "Checks if the value of the field is `INACTIVE`"]
+    #[inline(always)]
+    pub fn is_inactive(&self) -> bool {
+        *self == CTICHINSTATUS_1_A::INACTIVE
+    }
+}
+#[doc = "Field `CTICHINSTATUS_2` reader - Shows the status of the ctitrigin 2 input."]
+pub type CTICHINSTATUS_2_R = crate::BitReader<CTICHINSTATUS_2_A>;
+#[doc = "Shows the status of the ctitrigin 2 input.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CTICHINSTATUS_2_A {
+    #[doc = "1: Ctichin 2 is active."]
+    ACTIVE = 1,
+    #[doc = "0: Ctichin 2 is inactive."]
+    INACTIVE = 0,
+}
+impl From<CTICHINSTATUS_2_A> for bool {
+    #[inline(always)]
+    fn from(variant: CTICHINSTATUS_2_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl CTICHINSTATUS_2_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CTICHINSTATUS_2_A {
+        match self.bits {
+            true => CTICHINSTATUS_2_A::ACTIVE,
+            false => CTICHINSTATUS_2_A::INACTIVE,
+        }
+    }
+    #[doc = "Checks if the value of the field is `ACTIVE`"]
+    #[inline(always)]
+    pub fn is_active(&self) -> bool {
+        *self == CTICHINSTATUS_2_A::ACTIVE
+    }
+    #[doc = "Checks if the value of the field is `INACTIVE`"]
+    #[inline(always)]
+    pub fn is_inactive(&self) -> bool {
+        *self == CTICHINSTATUS_2_A::INACTIVE
+    }
+}
+#[doc = "Field `CTICHINSTATUS_3` reader - Shows the status of the ctitrigin 3 input."]
+pub type CTICHINSTATUS_3_R = crate::BitReader<CTICHINSTATUS_3_A>;
+#[doc = "Shows the status of the ctitrigin 3 input.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CTICHINSTATUS_3_A {
+    #[doc = "1: Ctichin 3 is active."]
+    ACTIVE = 1,
+    #[doc = "0: Ctichin 3 is inactive."]
+    INACTIVE = 0,
+}
+impl From<CTICHINSTATUS_3_A> for bool {
+    #[inline(always)]
+    fn from(variant: CTICHINSTATUS_3_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl CTICHINSTATUS_3_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CTICHINSTATUS_3_A {
+        match self.bits {
+            true => CTICHINSTATUS_3_A::ACTIVE,
+            false => CTICHINSTATUS_3_A::INACTIVE,
+        }
+    }
+    #[doc = "Checks if the value of the field is `ACTIVE`"]
+    #[inline(always)]
+    pub fn is_active(&self) -> bool {
+        *self == CTICHINSTATUS_3_A::ACTIVE
+    }
+    #[doc = "Checks if the value of the field is `INACTIVE`"]
+    #[inline(always)]
+    pub fn is_inactive(&self) -> bool {
+        *self == CTICHINSTATUS_3_A::INACTIVE
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Shows the status of the ctitrigin 0 input."]
+    #[inline(always)]
+    pub fn ctichinstatus_0(&self) -> CTICHINSTATUS_0_R {
+        CTICHINSTATUS_0_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Shows the status of the ctitrigin 1 input."]
+    #[inline(always)]
+    pub fn ctichinstatus_1(&self) -> CTICHINSTATUS_1_R {
+        CTICHINSTATUS_1_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - Shows the status of the ctitrigin 2 input."]
+    #[inline(always)]
+    pub fn ctichinstatus_2(&self) -> CTICHINSTATUS_2_R {
+        CTICHINSTATUS_2_R::new(((self.bits >> 2) & 1) != 0)
+    }
+    #[doc = "Bit 3 - Shows the status of the ctitrigin 3 input."]
+    #[inline(always)]
+    pub fn ctichinstatus_3(&self) -> CTICHINSTATUS_3_R {
+        CTICHINSTATUS_3_R::new(((self.bits >> 3) & 1) != 0)
+    }
+}
+#[doc = "CTI Channel In Status register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctichinstatus](index.html) module"]
+pub struct CTICHINSTATUS_SPEC;
+impl crate::RegisterSpec for CTICHINSTATUS_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ctichinstatus::R](R) reader structure"]
+impl crate::Readable for CTICHINSTATUS_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets CTICHINSTATUS to value 0"]
+impl crate::Resettable for CTICHINSTATUS_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/cti_ns/cticontrol.rs

@@ -0,0 +1,126 @@
+#[doc = "Register `CTICONTROL` reader"]
+pub struct R(crate::R<CTICONTROL_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CTICONTROL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CTICONTROL_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CTICONTROL_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CTICONTROL` writer"]
+pub struct W(crate::W<CTICONTROL_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CTICONTROL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CTICONTROL_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CTICONTROL_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `GLBEN` reader - Enables or disables the CTI."]
+pub type GLBEN_R = crate::BitReader<GLBEN_A>;
+#[doc = "Enables or disables the CTI.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum GLBEN_A {
+    #[doc = "0: All cross-triggering mapping logic functionality is disabled."]
+    DISABLED = 0,
+    #[doc = "1: Cross-triggering mapping logic functionality is enabled."]
+    ENABLED = 1,
+}
+impl From<GLBEN_A> for bool {
+    #[inline(always)]
+    fn from(variant: GLBEN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl GLBEN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> GLBEN_A {
+        match self.bits {
+            false => GLBEN_A::DISABLED,
+            true => GLBEN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == GLBEN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == GLBEN_A::ENABLED
+    }
+}
+#[doc = "Field `GLBEN` writer - Enables or disables the CTI."]
+pub type GLBEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTICONTROL_SPEC, GLBEN_A, O>;
+impl<'a, const O: u8> GLBEN_W<'a, O> {
+    #[doc = "All cross-triggering mapping logic functionality is disabled."]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(GLBEN_A::DISABLED)
+    }
+    #[doc = "Cross-triggering mapping logic functionality is enabled."]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(GLBEN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Enables or disables the CTI."]
+    #[inline(always)]
+    pub fn glben(&self) -> GLBEN_R {
+        GLBEN_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Enables or disables the CTI."]
+    #[inline(always)]
+    pub fn glben(&mut self) -> GLBEN_W<0> {
+        GLBEN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "CTI Control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cticontrol](index.html) module"]
+pub struct CTICONTROL_SPEC;
+impl crate::RegisterSpec for CTICONTROL_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [cticontrol::R](R) reader structure"]
+impl crate::Readable for CTICONTROL_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [cticontrol::W](W) writer structure"]
+impl crate::Writable for CTICONTROL_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CTICONTROL to value 0"]
+impl crate::Resettable for CTICONTROL_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/cti_ns/ctigate.rs

@@ -0,0 +1,306 @@
+#[doc = "Register `CTIGATE` reader"]
+pub struct R(crate::R<CTIGATE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CTIGATE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CTIGATE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CTIGATE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CTIGATE` writer"]
+pub struct W(crate::W<CTIGATE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CTIGATE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CTIGATE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CTIGATE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CTIGATEEN_0` reader - Enable ctichout0."]
+pub type CTIGATEEN_0_R = crate::BitReader<CTIGATEEN_0_A>;
+#[doc = "Enable ctichout0.\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CTIGATEEN_0_A {
+    #[doc = "1: Enable ctichout channel 0 propagation."]
+    ENABLED = 1,
+    #[doc = "0: Disable ctichout channel 0 propagation."]
+    DISABLED = 0,
+}
+impl From<CTIGATEEN_0_A> for bool {
+    #[inline(always)]
+    fn from(variant: CTIGATEEN_0_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl CTIGATEEN_0_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CTIGATEEN_0_A {
+        match self.bits {
+            true => CTIGATEEN_0_A::ENABLED,
+            false => CTIGATEEN_0_A::DISABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == CTIGATEEN_0_A::ENABLED
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == CTIGATEEN_0_A::DISABLED
+    }
+}
+#[doc = "Field `CTIGATEEN_0` writer - Enable ctichout0."]
+pub type CTIGATEEN_0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTIGATE_SPEC, CTIGATEEN_0_A, O>;
+impl<'a, const O: u8> CTIGATEEN_0_W<'a, O> {
+    #[doc = "Enable ctichout channel 0 propagation."]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(CTIGATEEN_0_A::ENABLED)
+    }
+    #[doc = "Disable ctichout channel 0 propagation."]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(CTIGATEEN_0_A::DISABLED)
+    }
+}
+#[doc = "Field `CTIGATEEN_1` reader - Enable ctichout1."]
+pub type CTIGATEEN_1_R = crate::BitReader<CTIGATEEN_1_A>;
+#[doc = "Enable ctichout1.\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CTIGATEEN_1_A {
+    #[doc = "1: Enable ctichout channel 1 propagation."]
+    ENABLED = 1,
+    #[doc = "0: Disable ctichout channel 1 propagation."]
+    DISABLED = 0,
+}
+impl From<CTIGATEEN_1_A> for bool {
+    #[inline(always)]
+    fn from(variant: CTIGATEEN_1_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl CTIGATEEN_1_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CTIGATEEN_1_A {
+        match self.bits {
+            true => CTIGATEEN_1_A::ENABLED,
+            false => CTIGATEEN_1_A::DISABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == CTIGATEEN_1_A::ENABLED
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == CTIGATEEN_1_A::DISABLED
+    }
+}
+#[doc = "Field `CTIGATEEN_1` writer - Enable ctichout1."]
+pub type CTIGATEEN_1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTIGATE_SPEC, CTIGATEEN_1_A, O>;
+impl<'a, const O: u8> CTIGATEEN_1_W<'a, O> {
+    #[doc = "Enable ctichout channel 1 propagation."]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(CTIGATEEN_1_A::ENABLED)
+    }
+    #[doc = "Disable ctichout channel 1 propagation."]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(CTIGATEEN_1_A::DISABLED)
+    }
+}
+#[doc = "Field `CTIGATEEN_2` reader - Enable ctichout2."]
+pub type CTIGATEEN_2_R = crate::BitReader<CTIGATEEN_2_A>;
+#[doc = "Enable ctichout2.\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CTIGATEEN_2_A {
+    #[doc = "1: Enable ctichout channel 2 propagation."]
+    ENABLED = 1,
+    #[doc = "0: Disable ctichout channel 2 propagation."]
+    DISABLED = 0,
+}
+impl From<CTIGATEEN_2_A> for bool {
+    #[inline(always)]
+    fn from(variant: CTIGATEEN_2_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl CTIGATEEN_2_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CTIGATEEN_2_A {
+        match self.bits {
+            true => CTIGATEEN_2_A::ENABLED,
+            false => CTIGATEEN_2_A::DISABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == CTIGATEEN_2_A::ENABLED
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == CTIGATEEN_2_A::DISABLED
+    }
+}
+#[doc = "Field `CTIGATEEN_2` writer - Enable ctichout2."]
+pub type CTIGATEEN_2_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTIGATE_SPEC, CTIGATEEN_2_A, O>;
+impl<'a, const O: u8> CTIGATEEN_2_W<'a, O> {
+    #[doc = "Enable ctichout channel 2 propagation."]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(CTIGATEEN_2_A::ENABLED)
+    }
+    #[doc = "Disable ctichout channel 2 propagation."]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(CTIGATEEN_2_A::DISABLED)
+    }
+}
+#[doc = "Field `CTIGATEEN_3` reader - Enable ctichout3."]
+pub type CTIGATEEN_3_R = crate::BitReader<CTIGATEEN_3_A>;
+#[doc = "Enable ctichout3.\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CTIGATEEN_3_A {
+    #[doc = "1: Enable ctichout channel 3 propagation."]
+    ENABLED = 1,
+    #[doc = "0: Disable ctichout channel 3 propagation."]
+    DISABLED = 0,
+}
+impl From<CTIGATEEN_3_A> for bool {
+    #[inline(always)]
+    fn from(variant: CTIGATEEN_3_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl CTIGATEEN_3_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CTIGATEEN_3_A {
+        match self.bits {
+            true => CTIGATEEN_3_A::ENABLED,
+            false => CTIGATEEN_3_A::DISABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == CTIGATEEN_3_A::ENABLED
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == CTIGATEEN_3_A::DISABLED
+    }
+}
+#[doc = "Field `CTIGATEEN_3` writer - Enable ctichout3."]
+pub type CTIGATEEN_3_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTIGATE_SPEC, CTIGATEEN_3_A, O>;
+impl<'a, const O: u8> CTIGATEEN_3_W<'a, O> {
+    #[doc = "Enable ctichout channel 3 propagation."]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(CTIGATEEN_3_A::ENABLED)
+    }
+    #[doc = "Disable ctichout channel 3 propagation."]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(CTIGATEEN_3_A::DISABLED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Enable ctichout0."]
+    #[inline(always)]
+    pub fn ctigateen_0(&self) -> CTIGATEEN_0_R {
+        CTIGATEEN_0_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Enable ctichout1."]
+    #[inline(always)]
+    pub fn ctigateen_1(&self) -> CTIGATEEN_1_R {
+        CTIGATEEN_1_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - Enable ctichout2."]
+    #[inline(always)]
+    pub fn ctigateen_2(&self) -> CTIGATEEN_2_R {
+        CTIGATEEN_2_R::new(((self.bits >> 2) & 1) != 0)
+    }
+    #[doc = "Bit 3 - Enable ctichout3."]
+    #[inline(always)]
+    pub fn ctigateen_3(&self) -> CTIGATEEN_3_R {
+        CTIGATEEN_3_R::new(((self.bits >> 3) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Enable ctichout0."]
+    #[inline(always)]
+    pub fn ctigateen_0(&mut self) -> CTIGATEEN_0_W<0> {
+        CTIGATEEN_0_W::new(self)
+    }
+    #[doc = "Bit 1 - Enable ctichout1."]
+    #[inline(always)]
+    pub fn ctigateen_1(&mut self) -> CTIGATEEN_1_W<1> {
+        CTIGATEEN_1_W::new(self)
+    }
+    #[doc = "Bit 2 - Enable ctichout2."]
+    #[inline(always)]
+    pub fn ctigateen_2(&mut self) -> CTIGATEEN_2_W<2> {
+        CTIGATEEN_2_W::new(self)
+    }
+    #[doc = "Bit 3 - Enable ctichout3."]
+    #[inline(always)]
+    pub fn ctigateen_3(&mut self) -> CTIGATEEN_3_W<3> {
+        CTIGATEEN_3_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Enable CTI Channel Gate register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctigate](index.html) module"]
+pub struct CTIGATE_SPEC;
+impl crate::RegisterSpec for CTIGATE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ctigate::R](R) reader structure"]
+impl crate::Readable for CTIGATE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ctigate::W](W) writer structure"]
+impl crate::Writable for CTIGATE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CTIGATE to value 0x0f"]
+impl crate::Resettable for CTIGATE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x0f
+    }
+}

vendor/nrf5340-net-pac/src/cti_ns/ctiinen.rs

@@ -0,0 +1,307 @@
+#[doc = "Register `CTIINEN[%s]` reader"]
+pub struct R(crate::R<CTIINEN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CTIINEN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CTIINEN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CTIINEN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CTIINEN[%s]` writer"]
+pub struct W(crate::W<CTIINEN_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CTIINEN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CTIINEN_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CTIINEN_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `TRIGINEN_0` reader - Enables a cross trigger event to channel 0 when a ctitrigin input is activated."]
+pub type TRIGINEN_0_R = crate::BitReader<TRIGINEN_0_A>;
+#[doc = "Enables a cross trigger event to channel 0 when a ctitrigin input is activated.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TRIGINEN_0_A {
+    #[doc = "0: Input trigger n events are ignored by channel 0."]
+    DISABLED = 0,
+    #[doc = "1: When an event is received on input trigger n (ctitrigin\\[n\\]), generate an event on channel 0."]
+    ENABLED = 1,
+}
+impl From<TRIGINEN_0_A> for bool {
+    #[inline(always)]
+    fn from(variant: TRIGINEN_0_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl TRIGINEN_0_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> TRIGINEN_0_A {
+        match self.bits {
+            false => TRIGINEN_0_A::DISABLED,
+            true => TRIGINEN_0_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == TRIGINEN_0_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == TRIGINEN_0_A::ENABLED
+    }
+}
+#[doc = "Field `TRIGINEN_0` writer - Enables a cross trigger event to channel 0 when a ctitrigin input is activated."]
+pub type TRIGINEN_0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTIINEN_SPEC, TRIGINEN_0_A, O>;
+impl<'a, const O: u8> TRIGINEN_0_W<'a, O> {
+    #[doc = "Input trigger n events are ignored by channel 0."]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(TRIGINEN_0_A::DISABLED)
+    }
+    #[doc = "When an event is received on input trigger n (ctitrigin\\[n\\]), generate an event on channel 0."]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(TRIGINEN_0_A::ENABLED)
+    }
+}
+#[doc = "Field `TRIGINEN_1` reader - Enables a cross trigger event to channel 1 when a ctitrigin input is activated."]
+pub type TRIGINEN_1_R = crate::BitReader<TRIGINEN_1_A>;
+#[doc = "Enables a cross trigger event to channel 1 when a ctitrigin input is activated.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TRIGINEN_1_A {
+    #[doc = "0: Input trigger n events are ignored by channel 1."]
+    DISABLED = 0,
+    #[doc = "1: When an event is received on input trigger n (ctitrigin\\[n\\]), generate an event on channel 1."]
+    ENABLED = 1,
+}
+impl From<TRIGINEN_1_A> for bool {
+    #[inline(always)]
+    fn from(variant: TRIGINEN_1_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl TRIGINEN_1_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> TRIGINEN_1_A {
+        match self.bits {
+            false => TRIGINEN_1_A::DISABLED,
+            true => TRIGINEN_1_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == TRIGINEN_1_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == TRIGINEN_1_A::ENABLED
+    }
+}
+#[doc = "Field `TRIGINEN_1` writer - Enables a cross trigger event to channel 1 when a ctitrigin input is activated."]
+pub type TRIGINEN_1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTIINEN_SPEC, TRIGINEN_1_A, O>;
+impl<'a, const O: u8> TRIGINEN_1_W<'a, O> {
+    #[doc = "Input trigger n events are ignored by channel 1."]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(TRIGINEN_1_A::DISABLED)
+    }
+    #[doc = "When an event is received on input trigger n (ctitrigin\\[n\\]), generate an event on channel 1."]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(TRIGINEN_1_A::ENABLED)
+    }
+}
+#[doc = "Field `TRIGINEN_2` reader - Enables a cross trigger event to channel 2 when a ctitrigin input is activated."]
+pub type TRIGINEN_2_R = crate::BitReader<TRIGINEN_2_A>;
+#[doc = "Enables a cross trigger event to channel 2 when a ctitrigin input is activated.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TRIGINEN_2_A {
+    #[doc = "0: Input trigger n events are ignored by channel 2."]
+    DISABLED = 0,
+    #[doc = "1: When an event is received on input trigger n (ctitrigin\\[n\\]), generate an event on channel 2."]
+    ENABLED = 1,
+}
+impl From<TRIGINEN_2_A> for bool {
+    #[inline(always)]
+    fn from(variant: TRIGINEN_2_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl TRIGINEN_2_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> TRIGINEN_2_A {
+        match self.bits {
+            false => TRIGINEN_2_A::DISABLED,
+            true => TRIGINEN_2_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == TRIGINEN_2_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == TRIGINEN_2_A::ENABLED
+    }
+}
+#[doc = "Field `TRIGINEN_2` writer - Enables a cross trigger event to channel 2 when a ctitrigin input is activated."]
+pub type TRIGINEN_2_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTIINEN_SPEC, TRIGINEN_2_A, O>;
+impl<'a, const O: u8> TRIGINEN_2_W<'a, O> {
+    #[doc = "Input trigger n events are ignored by channel 2."]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(TRIGINEN_2_A::DISABLED)
+    }
+    #[doc = "When an event is received on input trigger n (ctitrigin\\[n\\]), generate an event on channel 2."]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(TRIGINEN_2_A::ENABLED)
+    }
+}
+#[doc = "Field `TRIGINEN_3` reader - Enables a cross trigger event to channel 3 when a ctitrigin input is activated."]
+pub type TRIGINEN_3_R = crate::BitReader<TRIGINEN_3_A>;
+#[doc = "Enables a cross trigger event to channel 3 when a ctitrigin input is activated.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TRIGINEN_3_A {
+    #[doc = "0: Input trigger n events are ignored by channel 3."]
+    DISABLED = 0,
+    #[doc = "1: When an event is received on input trigger n (ctitrigin\\[n\\]), generate an event on channel 3."]
+    ENABLED = 1,
+}
+impl From<TRIGINEN_3_A> for bool {
+    #[inline(always)]
+    fn from(variant: TRIGINEN_3_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl TRIGINEN_3_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> TRIGINEN_3_A {
+        match self.bits {
+            false => TRIGINEN_3_A::DISABLED,
+            true => TRIGINEN_3_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == TRIGINEN_3_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == TRIGINEN_3_A::ENABLED
+    }
+}
+#[doc = "Field `TRIGINEN_3` writer - Enables a cross trigger event to channel 3 when a ctitrigin input is activated."]
+pub type TRIGINEN_3_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTIINEN_SPEC, TRIGINEN_3_A, O>;
+impl<'a, const O: u8> TRIGINEN_3_W<'a, O> {
+    #[doc = "Input trigger n events are ignored by channel 3."]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(TRIGINEN_3_A::DISABLED)
+    }
+    #[doc = "When an event is received on input trigger n (ctitrigin\\[n\\]), generate an event on channel 3."]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(TRIGINEN_3_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Enables a cross trigger event to channel 0 when a ctitrigin input is activated."]
+    #[inline(always)]
+    pub fn triginen_0(&self) -> TRIGINEN_0_R {
+        TRIGINEN_0_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Enables a cross trigger event to channel 1 when a ctitrigin input is activated."]
+    #[inline(always)]
+    pub fn triginen_1(&self) -> TRIGINEN_1_R {
+        TRIGINEN_1_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - Enables a cross trigger event to channel 2 when a ctitrigin input is activated."]
+    #[inline(always)]
+    pub fn triginen_2(&self) -> TRIGINEN_2_R {
+        TRIGINEN_2_R::new(((self.bits >> 2) & 1) != 0)
+    }
+    #[doc = "Bit 3 - Enables a cross trigger event to channel 3 when a ctitrigin input is activated."]
+    #[inline(always)]
+    pub fn triginen_3(&self) -> TRIGINEN_3_R {
+        TRIGINEN_3_R::new(((self.bits >> 3) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Enables a cross trigger event to channel 0 when a ctitrigin input is activated."]
+    #[inline(always)]
+    pub fn triginen_0(&mut self) -> TRIGINEN_0_W<0> {
+        TRIGINEN_0_W::new(self)
+    }
+    #[doc = "Bit 1 - Enables a cross trigger event to channel 1 when a ctitrigin input is activated."]
+    #[inline(always)]
+    pub fn triginen_1(&mut self) -> TRIGINEN_1_W<1> {
+        TRIGINEN_1_W::new(self)
+    }
+    #[doc = "Bit 2 - Enables a cross trigger event to channel 2 when a ctitrigin input is activated."]
+    #[inline(always)]
+    pub fn triginen_2(&mut self) -> TRIGINEN_2_W<2> {
+        TRIGINEN_2_W::new(self)
+    }
+    #[doc = "Bit 3 - Enables a cross trigger event to channel 3 when a ctitrigin input is activated."]
+    #[inline(always)]
+    pub fn triginen_3(&mut self) -> TRIGINEN_3_W<3> {
+        TRIGINEN_3_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description collection: CTI Trigger input\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctiinen](index.html) module"]
+pub struct CTIINEN_SPEC;
+impl crate::RegisterSpec for CTIINEN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ctiinen::R](R) reader structure"]
+impl crate::Readable for CTIINEN_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ctiinen::W](W) writer structure"]
+impl crate::Writable for CTIINEN_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CTIINEN[%s]
+to value 0"]
+impl crate::Resettable for CTIINEN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/cti_ns/ctiintack.rs

@@ -0,0 +1,254 @@
+#[doc = "Register `CTIINTACK` writer"]
+pub struct W(crate::W<CTIINTACK_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CTIINTACK_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CTIINTACK_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CTIINTACK_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Processor debug request\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum DEBUGREQ_AW {
+    #[doc = "1: Clears the ctitrigout."]
+    ACKNOWLEDGE = 1,
+}
+impl From<DEBUGREQ_AW> for bool {
+    #[inline(always)]
+    fn from(variant: DEBUGREQ_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `DEBUGREQ` writer - Processor debug request"]
+pub type DEBUGREQ_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTIINTACK_SPEC, DEBUGREQ_AW, O>;
+impl<'a, const O: u8> DEBUGREQ_W<'a, O> {
+    #[doc = "Clears the ctitrigout."]
+    #[inline(always)]
+    pub fn acknowledge(self) -> &'a mut W {
+        self.variant(DEBUGREQ_AW::ACKNOWLEDGE)
+    }
+}
+#[doc = "Processor Restart\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CPURESTART_AW {
+    #[doc = "1: Clears the ctitrigout."]
+    ACKNOWLEDGE = 1,
+}
+impl From<CPURESTART_AW> for bool {
+    #[inline(always)]
+    fn from(variant: CPURESTART_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `CPURESTART` writer - Processor Restart"]
+pub type CPURESTART_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, CTIINTACK_SPEC, CPURESTART_AW, O>;
+impl<'a, const O: u8> CPURESTART_W<'a, O> {
+    #[doc = "Clears the ctitrigout."]
+    #[inline(always)]
+    pub fn acknowledge(self) -> &'a mut W {
+        self.variant(CPURESTART_AW::ACKNOWLEDGE)
+    }
+}
+#[doc = "N/A\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum UNUSED0_AW {
+    #[doc = "1: Clears the ctitrigout."]
+    ACKNOWLEDGE = 1,
+}
+impl From<UNUSED0_AW> for bool {
+    #[inline(always)]
+    fn from(variant: UNUSED0_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `UNUSED0` writer - N/A"]
+pub type UNUSED0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTIINTACK_SPEC, UNUSED0_AW, O>;
+impl<'a, const O: u8> UNUSED0_W<'a, O> {
+    #[doc = "Clears the ctitrigout."]
+    #[inline(always)]
+    pub fn acknowledge(self) -> &'a mut W {
+        self.variant(UNUSED0_AW::ACKNOWLEDGE)
+    }
+}
+#[doc = "N/A\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum UNUSED1_AW {
+    #[doc = "1: Clears the ctitrigout."]
+    ACKNOWLEDGE = 1,
+}
+impl From<UNUSED1_AW> for bool {
+    #[inline(always)]
+    fn from(variant: UNUSED1_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `UNUSED1` writer - N/A"]
+pub type UNUSED1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTIINTACK_SPEC, UNUSED1_AW, O>;
+impl<'a, const O: u8> UNUSED1_W<'a, O> {
+    #[doc = "Clears the ctitrigout."]
+    #[inline(always)]
+    pub fn acknowledge(self) -> &'a mut W {
+        self.variant(UNUSED1_AW::ACKNOWLEDGE)
+    }
+}
+#[doc = "N/A\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum UNUSED2_AW {
+    #[doc = "1: Clears the ctitrigout."]
+    ACKNOWLEDGE = 1,
+}
+impl From<UNUSED2_AW> for bool {
+    #[inline(always)]
+    fn from(variant: UNUSED2_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `UNUSED2` writer - N/A"]
+pub type UNUSED2_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTIINTACK_SPEC, UNUSED2_AW, O>;
+impl<'a, const O: u8> UNUSED2_W<'a, O> {
+    #[doc = "Clears the ctitrigout."]
+    #[inline(always)]
+    pub fn acknowledge(self) -> &'a mut W {
+        self.variant(UNUSED2_AW::ACKNOWLEDGE)
+    }
+}
+#[doc = "N/A\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum UNUSED3_AW {
+    #[doc = "1: Clears the ctitrigout."]
+    ACKNOWLEDGE = 1,
+}
+impl From<UNUSED3_AW> for bool {
+    #[inline(always)]
+    fn from(variant: UNUSED3_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `UNUSED3` writer - N/A"]
+pub type UNUSED3_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTIINTACK_SPEC, UNUSED3_AW, O>;
+impl<'a, const O: u8> UNUSED3_W<'a, O> {
+    #[doc = "Clears the ctitrigout."]
+    #[inline(always)]
+    pub fn acknowledge(self) -> &'a mut W {
+        self.variant(UNUSED3_AW::ACKNOWLEDGE)
+    }
+}
+#[doc = "N/A\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum UNUSED4_AW {
+    #[doc = "1: Clears the ctitrigout."]
+    ACKNOWLEDGE = 1,
+}
+impl From<UNUSED4_AW> for bool {
+    #[inline(always)]
+    fn from(variant: UNUSED4_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `UNUSED4` writer - N/A"]
+pub type UNUSED4_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTIINTACK_SPEC, UNUSED4_AW, O>;
+impl<'a, const O: u8> UNUSED4_W<'a, O> {
+    #[doc = "Clears the ctitrigout."]
+    #[inline(always)]
+    pub fn acknowledge(self) -> &'a mut W {
+        self.variant(UNUSED4_AW::ACKNOWLEDGE)
+    }
+}
+#[doc = "N/A\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum UNUSED5_AW {
+    #[doc = "1: Clears the ctitrigout."]
+    ACKNOWLEDGE = 1,
+}
+impl From<UNUSED5_AW> for bool {
+    #[inline(always)]
+    fn from(variant: UNUSED5_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `UNUSED5` writer - N/A"]
+pub type UNUSED5_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTIINTACK_SPEC, UNUSED5_AW, O>;
+impl<'a, const O: u8> UNUSED5_W<'a, O> {
+    #[doc = "Clears the ctitrigout."]
+    #[inline(always)]
+    pub fn acknowledge(self) -> &'a mut W {
+        self.variant(UNUSED5_AW::ACKNOWLEDGE)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Processor debug request"]
+    #[inline(always)]
+    pub fn debugreq(&mut self) -> DEBUGREQ_W<0> {
+        DEBUGREQ_W::new(self)
+    }
+    #[doc = "Bit 1 - Processor Restart"]
+    #[inline(always)]
+    pub fn cpurestart(&mut self) -> CPURESTART_W<1> {
+        CPURESTART_W::new(self)
+    }
+    #[doc = "Bit 2 - N/A"]
+    #[inline(always)]
+    pub fn unused0(&mut self) -> UNUSED0_W<2> {
+        UNUSED0_W::new(self)
+    }
+    #[doc = "Bit 3 - N/A"]
+    #[inline(always)]
+    pub fn unused1(&mut self) -> UNUSED1_W<3> {
+        UNUSED1_W::new(self)
+    }
+    #[doc = "Bit 4 - N/A"]
+    #[inline(always)]
+    pub fn unused2(&mut self) -> UNUSED2_W<4> {
+        UNUSED2_W::new(self)
+    }
+    #[doc = "Bit 5 - N/A"]
+    #[inline(always)]
+    pub fn unused3(&mut self) -> UNUSED3_W<5> {
+        UNUSED3_W::new(self)
+    }
+    #[doc = "Bit 6 - N/A"]
+    #[inline(always)]
+    pub fn unused4(&mut self) -> UNUSED4_W<6> {
+        UNUSED4_W::new(self)
+    }
+    #[doc = "Bit 7 - N/A"]
+    #[inline(always)]
+    pub fn unused5(&mut self) -> UNUSED5_W<7> {
+        UNUSED5_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "CTI Interrupt Acknowledge register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctiintack](index.html) module"]
+pub struct CTIINTACK_SPEC;
+impl crate::RegisterSpec for CTIINTACK_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [ctiintack::W](W) writer structure"]
+impl crate::Writable for CTIINTACK_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CTIINTACK to value 0"]
+impl crate::Resettable for CTIINTACK_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/cti_ns/ctiouten.rs

@@ -0,0 +1,311 @@
+#[doc = "Register `CTIOUTEN[%s]` reader"]
+pub struct R(crate::R<CTIOUTEN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CTIOUTEN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CTIOUTEN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CTIOUTEN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CTIOUTEN[%s]` writer"]
+pub struct W(crate::W<CTIOUTEN_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CTIOUTEN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CTIOUTEN_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CTIOUTEN_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `TRIGOUTEN_0` reader - Enables a cross trigger event to ctitrigout when channel 0 is activated."]
+pub type TRIGOUTEN_0_R = crate::BitReader<TRIGOUTEN_0_A>;
+#[doc = "Enables a cross trigger event to ctitrigout when channel 0 is activated.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TRIGOUTEN_0_A {
+    #[doc = "0: Channel 0 is ignored by output trigger n."]
+    DISABLED = 0,
+    #[doc = "1: When an event occurs on channel 0, generate an event on output event n (ctitrigout\\[n\\])."]
+    ENABLED = 1,
+}
+impl From<TRIGOUTEN_0_A> for bool {
+    #[inline(always)]
+    fn from(variant: TRIGOUTEN_0_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl TRIGOUTEN_0_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> TRIGOUTEN_0_A {
+        match self.bits {
+            false => TRIGOUTEN_0_A::DISABLED,
+            true => TRIGOUTEN_0_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == TRIGOUTEN_0_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == TRIGOUTEN_0_A::ENABLED
+    }
+}
+#[doc = "Field `TRIGOUTEN_0` writer - Enables a cross trigger event to ctitrigout when channel 0 is activated."]
+pub type TRIGOUTEN_0_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, CTIOUTEN_SPEC, TRIGOUTEN_0_A, O>;
+impl<'a, const O: u8> TRIGOUTEN_0_W<'a, O> {
+    #[doc = "Channel 0 is ignored by output trigger n."]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(TRIGOUTEN_0_A::DISABLED)
+    }
+    #[doc = "When an event occurs on channel 0, generate an event on output event n (ctitrigout\\[n\\])."]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(TRIGOUTEN_0_A::ENABLED)
+    }
+}
+#[doc = "Field `TRIGOUTEN_1` reader - Enables a cross trigger event to ctitrigout when channel 1 is activated."]
+pub type TRIGOUTEN_1_R = crate::BitReader<TRIGOUTEN_1_A>;
+#[doc = "Enables a cross trigger event to ctitrigout when channel 1 is activated.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TRIGOUTEN_1_A {
+    #[doc = "0: Channel 1 is ignored by output trigger n."]
+    DISABLED = 0,
+    #[doc = "1: When an event occurs on channel 1, generate an event on output event n (ctitrigout\\[n\\])."]
+    ENABLED = 1,
+}
+impl From<TRIGOUTEN_1_A> for bool {
+    #[inline(always)]
+    fn from(variant: TRIGOUTEN_1_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl TRIGOUTEN_1_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> TRIGOUTEN_1_A {
+        match self.bits {
+            false => TRIGOUTEN_1_A::DISABLED,
+            true => TRIGOUTEN_1_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == TRIGOUTEN_1_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == TRIGOUTEN_1_A::ENABLED
+    }
+}
+#[doc = "Field `TRIGOUTEN_1` writer - Enables a cross trigger event to ctitrigout when channel 1 is activated."]
+pub type TRIGOUTEN_1_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, CTIOUTEN_SPEC, TRIGOUTEN_1_A, O>;
+impl<'a, const O: u8> TRIGOUTEN_1_W<'a, O> {
+    #[doc = "Channel 1 is ignored by output trigger n."]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(TRIGOUTEN_1_A::DISABLED)
+    }
+    #[doc = "When an event occurs on channel 1, generate an event on output event n (ctitrigout\\[n\\])."]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(TRIGOUTEN_1_A::ENABLED)
+    }
+}
+#[doc = "Field `TRIGOUTEN_2` reader - Enables a cross trigger event to ctitrigout when channel 2 is activated."]
+pub type TRIGOUTEN_2_R = crate::BitReader<TRIGOUTEN_2_A>;
+#[doc = "Enables a cross trigger event to ctitrigout when channel 2 is activated.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TRIGOUTEN_2_A {
+    #[doc = "0: Channel 2 is ignored by output trigger n."]
+    DISABLED = 0,
+    #[doc = "1: When an event occurs on channel 2, generate an event on output event n (ctitrigout\\[n\\])."]
+    ENABLED = 1,
+}
+impl From<TRIGOUTEN_2_A> for bool {
+    #[inline(always)]
+    fn from(variant: TRIGOUTEN_2_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl TRIGOUTEN_2_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> TRIGOUTEN_2_A {
+        match self.bits {
+            false => TRIGOUTEN_2_A::DISABLED,
+            true => TRIGOUTEN_2_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == TRIGOUTEN_2_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == TRIGOUTEN_2_A::ENABLED
+    }
+}
+#[doc = "Field `TRIGOUTEN_2` writer - Enables a cross trigger event to ctitrigout when channel 2 is activated."]
+pub type TRIGOUTEN_2_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, CTIOUTEN_SPEC, TRIGOUTEN_2_A, O>;
+impl<'a, const O: u8> TRIGOUTEN_2_W<'a, O> {
+    #[doc = "Channel 2 is ignored by output trigger n."]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(TRIGOUTEN_2_A::DISABLED)
+    }
+    #[doc = "When an event occurs on channel 2, generate an event on output event n (ctitrigout\\[n\\])."]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(TRIGOUTEN_2_A::ENABLED)
+    }
+}
+#[doc = "Field `TRIGOUTEN_3` reader - Enables a cross trigger event to ctitrigout when channel 3 is activated."]
+pub type TRIGOUTEN_3_R = crate::BitReader<TRIGOUTEN_3_A>;
+#[doc = "Enables a cross trigger event to ctitrigout when channel 3 is activated.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TRIGOUTEN_3_A {
+    #[doc = "0: Channel 3 is ignored by output trigger n."]
+    DISABLED = 0,
+    #[doc = "1: When an event occurs on channel 3, generate an event on output event n (ctitrigout\\[n\\])."]
+    ENABLED = 1,
+}
+impl From<TRIGOUTEN_3_A> for bool {
+    #[inline(always)]
+    fn from(variant: TRIGOUTEN_3_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl TRIGOUTEN_3_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> TRIGOUTEN_3_A {
+        match self.bits {
+            false => TRIGOUTEN_3_A::DISABLED,
+            true => TRIGOUTEN_3_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == TRIGOUTEN_3_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == TRIGOUTEN_3_A::ENABLED
+    }
+}
+#[doc = "Field `TRIGOUTEN_3` writer - Enables a cross trigger event to ctitrigout when channel 3 is activated."]
+pub type TRIGOUTEN_3_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, CTIOUTEN_SPEC, TRIGOUTEN_3_A, O>;
+impl<'a, const O: u8> TRIGOUTEN_3_W<'a, O> {
+    #[doc = "Channel 3 is ignored by output trigger n."]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(TRIGOUTEN_3_A::DISABLED)
+    }
+    #[doc = "When an event occurs on channel 3, generate an event on output event n (ctitrigout\\[n\\])."]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(TRIGOUTEN_3_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Enables a cross trigger event to ctitrigout when channel 0 is activated."]
+    #[inline(always)]
+    pub fn trigouten_0(&self) -> TRIGOUTEN_0_R {
+        TRIGOUTEN_0_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Enables a cross trigger event to ctitrigout when channel 1 is activated."]
+    #[inline(always)]
+    pub fn trigouten_1(&self) -> TRIGOUTEN_1_R {
+        TRIGOUTEN_1_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - Enables a cross trigger event to ctitrigout when channel 2 is activated."]
+    #[inline(always)]
+    pub fn trigouten_2(&self) -> TRIGOUTEN_2_R {
+        TRIGOUTEN_2_R::new(((self.bits >> 2) & 1) != 0)
+    }
+    #[doc = "Bit 3 - Enables a cross trigger event to ctitrigout when channel 3 is activated."]
+    #[inline(always)]
+    pub fn trigouten_3(&self) -> TRIGOUTEN_3_R {
+        TRIGOUTEN_3_R::new(((self.bits >> 3) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Enables a cross trigger event to ctitrigout when channel 0 is activated."]
+    #[inline(always)]
+    pub fn trigouten_0(&mut self) -> TRIGOUTEN_0_W<0> {
+        TRIGOUTEN_0_W::new(self)
+    }
+    #[doc = "Bit 1 - Enables a cross trigger event to ctitrigout when channel 1 is activated."]
+    #[inline(always)]
+    pub fn trigouten_1(&mut self) -> TRIGOUTEN_1_W<1> {
+        TRIGOUTEN_1_W::new(self)
+    }
+    #[doc = "Bit 2 - Enables a cross trigger event to ctitrigout when channel 2 is activated."]
+    #[inline(always)]
+    pub fn trigouten_2(&mut self) -> TRIGOUTEN_2_W<2> {
+        TRIGOUTEN_2_W::new(self)
+    }
+    #[doc = "Bit 3 - Enables a cross trigger event to ctitrigout when channel 3 is activated."]
+    #[inline(always)]
+    pub fn trigouten_3(&mut self) -> TRIGOUTEN_3_W<3> {
+        TRIGOUTEN_3_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description collection: CTI Trigger output\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctiouten](index.html) module"]
+pub struct CTIOUTEN_SPEC;
+impl crate::RegisterSpec for CTIOUTEN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ctiouten::R](R) reader structure"]
+impl crate::Readable for CTIOUTEN_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ctiouten::W](W) writer structure"]
+impl crate::Writable for CTIOUTEN_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CTIOUTEN[%s]
+to value 0"]
+impl crate::Resettable for CTIOUTEN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf5340-net-pac/src/cti_ns/ctitriginstatus.rs

@@ -0,0 +1,361 @@
+#[doc = "Register `CTITRIGINSTATUS` reader"]
+pub struct R(crate::R<CTITRIGINSTATUS_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CTITRIGINSTATUS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CTITRIGINSTATUS_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CTITRIGINSTATUS_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `CPUHALTED` reader - Processor Halted"]
+pub type CPUHALTED_R = crate::BitReader<CPUHALTED_A>;
+#[doc = "Processor Halted\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CPUHALTED_A {
+    #[doc = "1: Ctitrigin 0 is active."]
+    ACTIVE = 1,
+    #[doc = "0: Ctitrigin 0 is inactive."]
+    INACTIVE = 0,
+}
+impl From<CPUHALTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: CPUHALTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl CPUHALTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CPUHALTED_A {
+        match self.bits {
+            true => CPUHALTED_A::ACTIVE,
+            false => CPUHALTED_A::INACTIVE,
+        }
+    }
+    #[doc = "Checks if the value of the field is `ACTIVE`"]
+    #[inline(always)]
+    pub fn is_active(&self) -> bool {
+        *self == CPUHALTED_A::ACTIVE
+    }
+    #[doc = "Checks if the value of the field is `INACTIVE`"]
+    #[inline(always)]
+    pub fn is_inactive(&self) -> bool {
+        *self == CPUHALTED_A::INACTIVE
+    }
+}
+#[doc = "Field `DWTCOMPOUT0` reader - DWT Comparator Output 0"]
+pub type DWTCOMPOUT0_R = crate::BitReader<DWTCOMPOUT0_A>;
+#[doc = "DWT Comparator Output 0\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum DWTCOMPOUT0_A {
+    #[doc = "1: Ctitrigin 1 is active."]
+    ACTIVE = 1,
+    #[doc = "0: Ctitrigin 1 is inactive."]
+    INACTIVE = 0,
+}
+impl From<DWTCOMPOUT0_A> for bool {
+    #[inline(always)]
+    fn from(variant: DWTCOMPOUT0_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl DWTCOMPOUT0_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DWTCOMPOUT0_A {
+        match self.bits {
+            true => DWTCOMPOUT0_A::ACTIVE,
+            false => DWTCOMPOUT0_A::INACTIVE,
+        }
+    }
+    #[doc = "Checks if the value of the field is `ACTIVE`"]
+    #[inline(always)]
+    pub fn is_active(&self) -> bool {
+        *self == DWTCOMPOUT0_A::ACTIVE
+    }
+    #[doc = "Checks if the value of the field is `INACTIVE`"]
+    #[inline(always)]
+    pub fn is_inactive(&self) -> bool {
+        *self == DWTCOMPOUT0_A::INACTIVE
+    }
+}
+#[doc = "Field `DWTCOMPOUT1` reader - DWT Comparator Output 1"]
+pub type DWTCOMPOUT1_R = crate::BitReader<DWTCOMPOUT1_A>;
+#[doc = "DWT Comparator Output 1\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum DWTCOMPOUT1_A {
+    #[doc = "1: Ctitrigin 2 is active."]
+    ACTIVE = 1,
+    #[doc = "0: Ctitrigin 2 is inactive."]
+    INACTIVE = 0,
+}
+impl From<DWTCOMPOUT1_A> for bool {
+    #[inline(always)]
+    fn from(variant: DWTCOMPOUT1_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl DWTCOMPOUT1_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DWTCOMPOUT1_A {
+        match self.bits {
+            true => DWTCOMPOUT1_A::ACTIVE,
+            false => DWTCOMPOUT1_A::INACTIVE,
+        }
+    }
+    #[doc = "Checks if the value of the field is `ACTIVE`"]
+    #[inline(always)]
+    pub fn is_active(&self) -> bool {
+        *self == DWTCOMPOUT1_A::ACTIVE
+    }
+    #[doc = "Checks if the value of the field is `INACTIVE`"]
+    #[inline(always)]
+    pub fn is_inactive(&self) -> bool {
+        *self == DWTCOMPOUT1_A::INACTIVE
+    }
+}
+#[doc = "Field `DWTCOMPOUT2` reader - DWT Comparator Output 2"]
+pub type DWTCOMPOUT2_R = crate::BitReader<DWTCOMPOUT2_A>;
+#[doc = "DWT Comparator Output 2\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum DWTCOMPOUT2_A {
+    #[doc = "1: Ctitrigin 3 is active."]
+    ACTIVE = 1,
+    #[doc = "0: Ctitrigin 3 is inactive."]
+    INACTIVE = 0,
+}
+impl From<DWTCOMPOUT2_A> for bool {
+    #[inline(always)]
+    fn from(variant: DWTCOMPOUT2_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl DWTCOMPOUT2_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DWTCOMPOUT2_A {
+        match self.bits {
+            true => DWTCOMPOUT2_A::ACTIVE,
+            false => DWTCOMPOUT2_A::INACTIVE,
+        }
+    }
+    #[doc = "Checks if the value of the field is `ACTIVE`"]
+    #[inline(always)]
+    pub fn is_active(&self) -> bool {
+        *self == DWTCOMPOUT2_A::ACTIVE
+    }
+    #[doc = "Checks if the value of the field is `INACTIVE`"]
+    #[inline(always)]
+    pub fn is_inactive(&self) -> bool {
+        *self == DWTCOMPOUT2_A::INACTIVE
+    }
+}
+#[doc = "Field `UNUSED0` reader - N/A"]
+pub type UNUSED0_R = crate::BitReader<UNUSED0_A>;
+#[doc = "N/A\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum UNUSED0_A {
+    #[doc = "1: Ctitrigin 4 is active."]
+    ACTIVE = 1,
+    #[doc = "0: Ctitrigin 4 is inactive."]
+    INACTIVE = 0,
+}
+impl From<UNUSED0_A> for bool {
+    #[inline(always)]
+    fn from(variant: UNUSED0_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl UNUSED0_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> UNUSED0_A {
+        match self.bits {
+            true => UNUSED0_A::ACTIVE,
+            false => UNUSED0_A::INACTIVE,
+        }
+    }
+    #[doc = "Checks if the value of the field is `ACTIVE`"]
+    #[inline(always)]
+    pub fn is_active(&self) -> bool {
+        *self == UNUSED0_A::ACTIVE
+    }
+    #[doc = "Checks if the value of the field is `INACTIVE`"]
+    #[inline(always)]
+    pub fn is_inactive(&self) -> bool {
+        *self == UNUSED0_A::INACTIVE
+    }
+}
+#[doc = "Field `UNUSED1` reader - N/A"]
+pub type UNUSED1_R = crate::BitReader<UNUSED1_A>;
+#[doc = "N/A\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum UNUSED1_A {
+    #[doc = "1: Ctitrigin 5 is active."]
+    ACTIVE = 1,
+    #[doc = "0: Ctitrigin 5 is inactive."]
+    INACTIVE = 0,
+}
+impl From<UNUSED1_A> for bool {
+    #[inline(always)]
+    fn from(variant: UNUSED1_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl UNUSED1_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> UNUSED1_A {
+        match self.bits {
+            true => UNUSED1_A::ACTIVE,
+            false => UNUSED1_A::INACTIVE,
+        }
+    }
+    #[doc = "Checks if the value of the field is `ACTIVE`"]
+    #[inline(always)]
+    pub fn is_active(&self) -> bool {
+        *self == UNUSED1_A::ACTIVE
+    }
+    #[doc = "Checks if the value of the field is `INACTIVE`"]
+    #[inline(always)]
+    pub fn is_inactive(&self) -> bool {
+        *self == UNUSED1_A::INACTIVE
+    }
+}
+#[doc = "Field `UNUSED2` reader - N/A"]
+pub type UNUSED2_R = crate::BitReader<UNUSED2_A>;
+#[doc = "N/A\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum UNUSED2_A {
+    #[doc = "1: Ctitrigin 6 is active."]
+    ACTIVE = 1,
+    #[doc = "0: Ctitrigin 6 is inactive."]
+    INACTIVE = 0,
+}
+impl From<UNUSED2_A> for bool {
+    #[inline(always)]
+    fn from(variant: UNUSED2_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl UNUSED2_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> UNUSED2_A {
+        match self.bits {
+            true => UNUSED2_A::ACTIVE,
+            false => UNUSED2_A::INACTIVE,
+        }
+    }
+    #[doc = "Checks if the value of the field is `ACTIVE`"]
+    #[inline(always)]
+    pub fn is_active(&self) -> bool {
+        *self == UNUSED2_A::ACTIVE
+    }
+    #[doc = "Checks if the value of the field is `INACTIVE`"]
+    #[inline(always)]
+    pub fn is_inactive(&self) -> bool {
+        *self == UNUSED2_A::INACTIVE
+    }
+}
+#[doc = "Field `UNUSED3` reader - N/A"]
+pub type UNUSED3_R = crate::BitReader<UNUSED3_A>;
+#[doc = "N/A\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum UNUSED3_A {
+    #[doc = "1: Ctitrigin 7 is active."]
+    ACTIVE = 1,
+    #[doc = "0: Ctitrigin 7 is inactive."]
+    INACTIVE = 0,
+}
+impl From<UNUSED3_A> for bool {
+    #[inline(always)]
+    fn from(variant: UNUSED3_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl UNUSED3_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> UNUSED3_A {
+        match self.bits {
+            true => UNUSED3_A::ACTIVE,
+            false => UNUSED3_A::INACTIVE,
+        }
+    }
+    #[doc = "Checks if the value of the field is `ACTIVE`"]
+    #[inline(always)]
+    pub fn is_active(&self) -> bool {
+        *self == UNUSED3_A::ACTIVE
+    }
+    #[doc = "Checks if the value of the field is `INACTIVE`"]
+    #[inline(always)]
+    pub fn is_inactive(&self) -> bool {
+        *self == UNUSED3_A::INACTIVE
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Processor Halted"]
+    #[inline(always)]
+    pub fn cpuhalted(&self) -> CPUHALTED_R {
+        CPUHALTED_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - DWT Comparator Output 0"]
+    #[inline(always)]
+    pub fn dwtcompout0(&self) -> DWTCOMPOUT0_R {
+        DWTCOMPOUT0_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - DWT Comparator Output 1"]
+    #[inline(always)]
+    pub fn dwtcompout1(&self) -> DWTCOMPOUT1_R {
+        DWTCOMPOUT1_R::new(((self.bits >> 2) & 1) != 0)
+    }
+    #[doc = "Bit 3 - DWT Comparator Output 2"]
+    #[inline(always)]
+    pub fn dwtcompout2(&self) -> DWTCOMPOUT2_R {
+        DWTCOMPOUT2_R::new(((self.bits >> 3) & 1) != 0)
+    }
+    #[doc = "Bit 4 - N/A"]
+    #[inline(always)]
+    pub fn unused0(&self) -> UNUSED0_R {
+        UNUSED0_R::new(((self.bits >> 4) & 1) != 0)
+    }
+    #[doc = "Bit 5 - N/A"]
+    #[inline(always)]
+    pub fn unused1(&self) -> UNUSED1_R {
+        UNUSED1_R::new(((self.bits >> 5) & 1) != 0)
+    }
+    #[doc = "Bit 6 - N/A"]
+    #[inline(always)]
+    pub fn unused2(&self) -> UNUSED2_R {
+        UNUSED2_R::new(((self.bits >> 6) & 1) != 0)
+    }
+    #[doc = "Bit 7 - N/A"]
+    #[inline(always)]
+    pub fn unused3(&self) -> UNUSED3_R {
+        UNUSED3_R::new(((self.bits >> 7) & 1) != 0)
+    }
+}
+#[doc = "CTI Trigger In Status register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctitriginstatus](index.html) module"]
+pub struct CTITRIGINSTATUS_SPEC;
+impl crate::RegisterSpec for CTITRIGINSTATUS_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ctitriginstatus::R](R) reader structure"]
+impl crate::Readable for CTITRIGINSTATUS_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets CTITRIGINSTATUS to value 0"]
+impl crate::Resettable for CTITRIGINSTATUS_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}