feat: add display UI with splash screen, dashboard, and RSSI sparkline

Implement full SSD1306 OLED display support:
- Splash screen on boot (1.5s) with project name, version, board
- Dashboard showing radio state, config, counters, RSSI/SNR
- RSSI history sparkline (64-sample ring buffer, 2px-wide bars)
- DisplayOn/DisplayOff host commands routed via dedicated channel
- Pure render functions against generic DrawTarget (no hardware coupling)
- Display on/off control bypasses radio task entirely

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>

vendor/nrf9160-pac/src/pwm0_ns/countertop.rs

@@ -0,0 +1,81 @@
+#[doc = "Register `COUNTERTOP` reader"]
+pub struct R(crate::R<COUNTERTOP_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<COUNTERTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<COUNTERTOP_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<COUNTERTOP_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `COUNTERTOP` writer"]
+pub struct W(crate::W<COUNTERTOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<COUNTERTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<COUNTERTOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<COUNTERTOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `COUNTERTOP` reader - Value up to which the pulse generator counter counts. This register is ignored when DECODER.MODE=WaveForm and only values from RAM are used."]
+pub type COUNTERTOP_R = crate::FieldReader<u16, u16>;
+#[doc = "Field `COUNTERTOP` writer - Value up to which the pulse generator counter counts. This register is ignored when DECODER.MODE=WaveForm and only values from RAM are used."]
+pub type COUNTERTOP_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, COUNTERTOP_SPEC, u16, u16, 15, O>;
+impl R {
+    #[doc = "Bits 0:14 - Value up to which the pulse generator counter counts. This register is ignored when DECODER.MODE=WaveForm and only values from RAM are used."]
+    #[inline(always)]
+    pub fn countertop(&self) -> COUNTERTOP_R {
+        COUNTERTOP_R::new((self.bits & 0x7fff) as u16)
+    }
+}
+impl W {
+    #[doc = "Bits 0:14 - Value up to which the pulse generator counter counts. This register is ignored when DECODER.MODE=WaveForm and only values from RAM are used."]
+    #[inline(always)]
+    pub fn countertop(&mut self) -> COUNTERTOP_W<0> {
+        COUNTERTOP_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Value up to which the pulse generator counter counts\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [countertop](index.html) module"]
+pub struct COUNTERTOP_SPEC;
+impl crate::RegisterSpec for COUNTERTOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [countertop::R](R) reader structure"]
+impl crate::Readable for COUNTERTOP_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [countertop::W](W) writer structure"]
+impl crate::Writable for COUNTERTOP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets COUNTERTOP to value 0x03ff"]
+impl crate::Resettable for COUNTERTOP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x03ff
+    }
+}

vendor/nrf9160-pac/src/pwm0_ns/decoder.rs

@@ -0,0 +1,214 @@
+#[doc = "Register `DECODER` reader"]
+pub struct R(crate::R<DECODER_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<DECODER_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<DECODER_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<DECODER_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `DECODER` writer"]
+pub struct W(crate::W<DECODER_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<DECODER_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<DECODER_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<DECODER_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `LOAD` reader - How a sequence is read from RAM and spread to the compare register"]
+pub type LOAD_R = crate::FieldReader<u8, LOAD_A>;
+#[doc = "How a sequence is read from RAM and spread to the compare register\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum LOAD_A {
+    #[doc = "0: 1st half word (16-bit) used in all PWM channels 0..3"]
+    COMMON = 0,
+    #[doc = "1: 1st half word (16-bit) used in channel 0..1; 2nd word in channel 2..3"]
+    GROUPED = 1,
+    #[doc = "2: 1st half word (16-bit) in ch.0; 2nd in ch.1; ...; 4th in ch.3"]
+    INDIVIDUAL = 2,
+    #[doc = "3: 1st half word (16-bit) in ch.0; 2nd in ch.1; ...; 4th in COUNTERTOP"]
+    WAVE_FORM = 3,
+}
+impl From<LOAD_A> for u8 {
+    #[inline(always)]
+    fn from(variant: LOAD_A) -> Self {
+        variant as _
+    }
+}
+impl LOAD_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> LOAD_A {
+        match self.bits {
+            0 => LOAD_A::COMMON,
+            1 => LOAD_A::GROUPED,
+            2 => LOAD_A::INDIVIDUAL,
+            3 => LOAD_A::WAVE_FORM,
+            _ => unreachable!(),
+        }
+    }
+    #[doc = "Checks if the value of the field is `COMMON`"]
+    #[inline(always)]
+    pub fn is_common(&self) -> bool {
+        *self == LOAD_A::COMMON
+    }
+    #[doc = "Checks if the value of the field is `GROUPED`"]
+    #[inline(always)]
+    pub fn is_grouped(&self) -> bool {
+        *self == LOAD_A::GROUPED
+    }
+    #[doc = "Checks if the value of the field is `INDIVIDUAL`"]
+    #[inline(always)]
+    pub fn is_individual(&self) -> bool {
+        *self == LOAD_A::INDIVIDUAL
+    }
+    #[doc = "Checks if the value of the field is `WAVE_FORM`"]
+    #[inline(always)]
+    pub fn is_wave_form(&self) -> bool {
+        *self == LOAD_A::WAVE_FORM
+    }
+}
+#[doc = "Field `LOAD` writer - How a sequence is read from RAM and spread to the compare register"]
+pub type LOAD_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, DECODER_SPEC, u8, LOAD_A, 2, O>;
+impl<'a, const O: u8> LOAD_W<'a, O> {
+    #[doc = "1st half word (16-bit) used in all PWM channels 0..3"]
+    #[inline(always)]
+    pub fn common(self) -> &'a mut W {
+        self.variant(LOAD_A::COMMON)
+    }
+    #[doc = "1st half word (16-bit) used in channel 0..1; 2nd word in channel 2..3"]
+    #[inline(always)]
+    pub fn grouped(self) -> &'a mut W {
+        self.variant(LOAD_A::GROUPED)
+    }
+    #[doc = "1st half word (16-bit) in ch.0; 2nd in ch.1; ...; 4th in ch.3"]
+    #[inline(always)]
+    pub fn individual(self) -> &'a mut W {
+        self.variant(LOAD_A::INDIVIDUAL)
+    }
+    #[doc = "1st half word (16-bit) in ch.0; 2nd in ch.1; ...; 4th in COUNTERTOP"]
+    #[inline(always)]
+    pub fn wave_form(self) -> &'a mut W {
+        self.variant(LOAD_A::WAVE_FORM)
+    }
+}
+#[doc = "Field `MODE` reader - Selects source for advancing the active sequence"]
+pub type MODE_R = crate::BitReader<MODE_A>;
+#[doc = "Selects source for advancing the active sequence\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum MODE_A {
+    #[doc = "0: SEQ\\[n\\].REFRESH is used to determine loading internal compare registers"]
+    REFRESH_COUNT = 0,
+    #[doc = "1: NEXTSTEP task causes a new value to be loaded to internal compare registers"]
+    NEXT_STEP = 1,
+}
+impl From<MODE_A> for bool {
+    #[inline(always)]
+    fn from(variant: MODE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl MODE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> MODE_A {
+        match self.bits {
+            false => MODE_A::REFRESH_COUNT,
+            true => MODE_A::NEXT_STEP,
+        }
+    }
+    #[doc = "Checks if the value of the field is `REFRESH_COUNT`"]
+    #[inline(always)]
+    pub fn is_refresh_count(&self) -> bool {
+        *self == MODE_A::REFRESH_COUNT
+    }
+    #[doc = "Checks if the value of the field is `NEXT_STEP`"]
+    #[inline(always)]
+    pub fn is_next_step(&self) -> bool {
+        *self == MODE_A::NEXT_STEP
+    }
+}
+#[doc = "Field `MODE` writer - Selects source for advancing the active sequence"]
+pub type MODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, DECODER_SPEC, MODE_A, O>;
+impl<'a, const O: u8> MODE_W<'a, O> {
+    #[doc = "SEQ\\[n\\].REFRESH is used to determine loading internal compare registers"]
+    #[inline(always)]
+    pub fn refresh_count(self) -> &'a mut W {
+        self.variant(MODE_A::REFRESH_COUNT)
+    }
+    #[doc = "NEXTSTEP task causes a new value to be loaded to internal compare registers"]
+    #[inline(always)]
+    pub fn next_step(self) -> &'a mut W {
+        self.variant(MODE_A::NEXT_STEP)
+    }
+}
+impl R {
+    #[doc = "Bits 0:1 - How a sequence is read from RAM and spread to the compare register"]
+    #[inline(always)]
+    pub fn load(&self) -> LOAD_R {
+        LOAD_R::new((self.bits & 3) as u8)
+    }
+    #[doc = "Bit 8 - Selects source for advancing the active sequence"]
+    #[inline(always)]
+    pub fn mode(&self) -> MODE_R {
+        MODE_R::new(((self.bits >> 8) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:1 - How a sequence is read from RAM and spread to the compare register"]
+    #[inline(always)]
+    pub fn load(&mut self) -> LOAD_W<0> {
+        LOAD_W::new(self)
+    }
+    #[doc = "Bit 8 - Selects source for advancing the active sequence"]
+    #[inline(always)]
+    pub fn mode(&mut self) -> MODE_W<8> {
+        MODE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Configuration of the decoder\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [decoder](index.html) module"]
+pub struct DECODER_SPEC;
+impl crate::RegisterSpec for DECODER_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [decoder::R](R) reader structure"]
+impl crate::Readable for DECODER_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [decoder::W](W) writer structure"]
+impl crate::Writable for DECODER_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets DECODER to value 0"]
+impl crate::Resettable for DECODER_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf9160-pac/src/pwm0_ns/enable.rs

@@ -0,0 +1,126 @@
+#[doc = "Register `ENABLE` reader"]
+pub struct R(crate::R<ENABLE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ENABLE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ENABLE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ENABLE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ENABLE` writer"]
+pub struct W(crate::W<ENABLE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ENABLE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ENABLE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ENABLE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ENABLE` reader - Enable or disable PWM module"]
+pub type ENABLE_R = crate::BitReader<ENABLE_A>;
+#[doc = "Enable or disable PWM module\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum ENABLE_A {
+    #[doc = "0: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Enable"]
+    ENABLED = 1,
+}
+impl From<ENABLE_A> for bool {
+    #[inline(always)]
+    fn from(variant: ENABLE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ENABLE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ENABLE_A {
+        match self.bits {
+            false => ENABLE_A::DISABLED,
+            true => ENABLE_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == ENABLE_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == ENABLE_A::ENABLED
+    }
+}
+#[doc = "Field `ENABLE` writer - Enable or disable PWM module"]
+pub type ENABLE_W<'a, const O: u8> = crate::BitWriter<'a, u32, ENABLE_SPEC, ENABLE_A, O>;
+impl<'a, const O: u8> ENABLE_W<'a, O> {
+    #[doc = "Disabled"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(ENABLE_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(ENABLE_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Enable or disable PWM module"]
+    #[inline(always)]
+    pub fn enable(&self) -> ENABLE_R {
+        ENABLE_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Enable or disable PWM module"]
+    #[inline(always)]
+    pub fn enable(&mut self) -> ENABLE_W<0> {
+        ENABLE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "PWM module enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [enable](index.html) module"]
+pub struct ENABLE_SPEC;
+impl crate::RegisterSpec for ENABLE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [enable::R](R) reader structure"]
+impl crate::Readable for ENABLE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [enable::W](W) writer structure"]
+impl crate::Writable for ENABLE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets ENABLE to value 0"]
+impl crate::Resettable for ENABLE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf9160-pac/src/pwm0_ns/events_loopsdone.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_LOOPSDONE` reader"]
+pub struct R(crate::R<EVENTS_LOOPSDONE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_LOOPSDONE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_LOOPSDONE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_LOOPSDONE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_LOOPSDONE` writer"]
+pub struct W(crate::W<EVENTS_LOOPSDONE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_LOOPSDONE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_LOOPSDONE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_LOOPSDONE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_LOOPSDONE` reader - Concatenated sequences have been played the amount of times defined in LOOP.CNT"]
+pub type EVENTS_LOOPSDONE_R = crate::BitReader<EVENTS_LOOPSDONE_A>;
+#[doc = "Concatenated sequences have been played the amount of times defined in LOOP.CNT\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_LOOPSDONE_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_LOOPSDONE_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_LOOPSDONE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_LOOPSDONE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_LOOPSDONE_A {
+        match self.bits {
+            false => EVENTS_LOOPSDONE_A::NOT_GENERATED,
+            true => EVENTS_LOOPSDONE_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_LOOPSDONE_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_LOOPSDONE_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_LOOPSDONE` writer - Concatenated sequences have been played the amount of times defined in LOOP.CNT"]
+pub type EVENTS_LOOPSDONE_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_LOOPSDONE_SPEC, EVENTS_LOOPSDONE_A, O>;
+impl<'a, const O: u8> EVENTS_LOOPSDONE_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_LOOPSDONE_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_LOOPSDONE_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Concatenated sequences have been played the amount of times defined in LOOP.CNT"]
+    #[inline(always)]
+    pub fn events_loopsdone(&self) -> EVENTS_LOOPSDONE_R {
+        EVENTS_LOOPSDONE_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Concatenated sequences have been played the amount of times defined in LOOP.CNT"]
+    #[inline(always)]
+    pub fn events_loopsdone(&mut self) -> EVENTS_LOOPSDONE_W<0> {
+        EVENTS_LOOPSDONE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Concatenated sequences have been played the amount of times defined in LOOP.CNT\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_loopsdone](index.html) module"]
+pub struct EVENTS_LOOPSDONE_SPEC;
+impl crate::RegisterSpec for EVENTS_LOOPSDONE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_loopsdone::R](R) reader structure"]
+impl crate::Readable for EVENTS_LOOPSDONE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_loopsdone::W](W) writer structure"]
+impl crate::Writable for EVENTS_LOOPSDONE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_LOOPSDONE to value 0"]
+impl crate::Resettable for EVENTS_LOOPSDONE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf9160-pac/src/pwm0_ns/events_pwmperiodend.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_PWMPERIODEND` reader"]
+pub struct R(crate::R<EVENTS_PWMPERIODEND_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_PWMPERIODEND_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_PWMPERIODEND_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_PWMPERIODEND_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_PWMPERIODEND` writer"]
+pub struct W(crate::W<EVENTS_PWMPERIODEND_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_PWMPERIODEND_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_PWMPERIODEND_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_PWMPERIODEND_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_PWMPERIODEND` reader - Emitted at the end of each PWM period"]
+pub type EVENTS_PWMPERIODEND_R = crate::BitReader<EVENTS_PWMPERIODEND_A>;
+#[doc = "Emitted at the end of each PWM period\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_PWMPERIODEND_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_PWMPERIODEND_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_PWMPERIODEND_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_PWMPERIODEND_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_PWMPERIODEND_A {
+        match self.bits {
+            false => EVENTS_PWMPERIODEND_A::NOT_GENERATED,
+            true => EVENTS_PWMPERIODEND_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_PWMPERIODEND_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_PWMPERIODEND_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_PWMPERIODEND` writer - Emitted at the end of each PWM period"]
+pub type EVENTS_PWMPERIODEND_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_PWMPERIODEND_SPEC, EVENTS_PWMPERIODEND_A, O>;
+impl<'a, const O: u8> EVENTS_PWMPERIODEND_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_PWMPERIODEND_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_PWMPERIODEND_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Emitted at the end of each PWM period"]
+    #[inline(always)]
+    pub fn events_pwmperiodend(&self) -> EVENTS_PWMPERIODEND_R {
+        EVENTS_PWMPERIODEND_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Emitted at the end of each PWM period"]
+    #[inline(always)]
+    pub fn events_pwmperiodend(&mut self) -> EVENTS_PWMPERIODEND_W<0> {
+        EVENTS_PWMPERIODEND_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Emitted at the end of each PWM period\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_pwmperiodend](index.html) module"]
+pub struct EVENTS_PWMPERIODEND_SPEC;
+impl crate::RegisterSpec for EVENTS_PWMPERIODEND_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_pwmperiodend::R](R) reader structure"]
+impl crate::Readable for EVENTS_PWMPERIODEND_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_pwmperiodend::W](W) writer structure"]
+impl crate::Writable for EVENTS_PWMPERIODEND_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_PWMPERIODEND to value 0"]
+impl crate::Resettable for EVENTS_PWMPERIODEND_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf9160-pac/src/pwm0_ns/events_seqend.rs

@@ -0,0 +1,128 @@
+#[doc = "Register `EVENTS_SEQEND[%s]` reader"]
+pub struct R(crate::R<EVENTS_SEQEND_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_SEQEND_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_SEQEND_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_SEQEND_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_SEQEND[%s]` writer"]
+pub struct W(crate::W<EVENTS_SEQEND_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_SEQEND_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_SEQEND_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_SEQEND_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_SEQEND` reader - Emitted at end of every sequence n, when last value from RAM has been applied to wave counter"]
+pub type EVENTS_SEQEND_R = crate::BitReader<EVENTS_SEQEND_A>;
+#[doc = "Emitted at end of every sequence n, when last value from RAM has been applied to wave counter\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_SEQEND_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_SEQEND_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_SEQEND_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_SEQEND_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_SEQEND_A {
+        match self.bits {
+            false => EVENTS_SEQEND_A::NOT_GENERATED,
+            true => EVENTS_SEQEND_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_SEQEND_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_SEQEND_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_SEQEND` writer - Emitted at end of every sequence n, when last value from RAM has been applied to wave counter"]
+pub type EVENTS_SEQEND_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_SEQEND_SPEC, EVENTS_SEQEND_A, O>;
+impl<'a, const O: u8> EVENTS_SEQEND_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_SEQEND_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_SEQEND_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Emitted at end of every sequence n, when last value from RAM has been applied to wave counter"]
+    #[inline(always)]
+    pub fn events_seqend(&self) -> EVENTS_SEQEND_R {
+        EVENTS_SEQEND_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Emitted at end of every sequence n, when last value from RAM has been applied to wave counter"]
+    #[inline(always)]
+    pub fn events_seqend(&mut self) -> EVENTS_SEQEND_W<0> {
+        EVENTS_SEQEND_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description collection: Emitted at end of every sequence n, when last value from RAM has been applied to wave counter\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_seqend](index.html) module"]
+pub struct EVENTS_SEQEND_SPEC;
+impl crate::RegisterSpec for EVENTS_SEQEND_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_seqend::R](R) reader structure"]
+impl crate::Readable for EVENTS_SEQEND_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_seqend::W](W) writer structure"]
+impl crate::Writable for EVENTS_SEQEND_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_SEQEND[%s]
+to value 0"]
+impl crate::Resettable for EVENTS_SEQEND_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf9160-pac/src/pwm0_ns/events_seqstarted.rs

@@ -0,0 +1,128 @@
+#[doc = "Register `EVENTS_SEQSTARTED[%s]` reader"]
+pub struct R(crate::R<EVENTS_SEQSTARTED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_SEQSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_SEQSTARTED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_SEQSTARTED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_SEQSTARTED[%s]` writer"]
+pub struct W(crate::W<EVENTS_SEQSTARTED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_SEQSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_SEQSTARTED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_SEQSTARTED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_SEQSTARTED` reader - First PWM period started on sequence n"]
+pub type EVENTS_SEQSTARTED_R = crate::BitReader<EVENTS_SEQSTARTED_A>;
+#[doc = "First PWM period started on sequence n\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_SEQSTARTED_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_SEQSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_SEQSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_SEQSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_SEQSTARTED_A {
+        match self.bits {
+            false => EVENTS_SEQSTARTED_A::NOT_GENERATED,
+            true => EVENTS_SEQSTARTED_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_SEQSTARTED_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_SEQSTARTED_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_SEQSTARTED` writer - First PWM period started on sequence n"]
+pub type EVENTS_SEQSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_SEQSTARTED_SPEC, EVENTS_SEQSTARTED_A, O>;
+impl<'a, const O: u8> EVENTS_SEQSTARTED_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_SEQSTARTED_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_SEQSTARTED_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - First PWM period started on sequence n"]
+    #[inline(always)]
+    pub fn events_seqstarted(&self) -> EVENTS_SEQSTARTED_R {
+        EVENTS_SEQSTARTED_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - First PWM period started on sequence n"]
+    #[inline(always)]
+    pub fn events_seqstarted(&mut self) -> EVENTS_SEQSTARTED_W<0> {
+        EVENTS_SEQSTARTED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description collection: First PWM period started on sequence n\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_seqstarted](index.html) module"]
+pub struct EVENTS_SEQSTARTED_SPEC;
+impl crate::RegisterSpec for EVENTS_SEQSTARTED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_seqstarted::R](R) reader structure"]
+impl crate::Readable for EVENTS_SEQSTARTED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_seqstarted::W](W) writer structure"]
+impl crate::Writable for EVENTS_SEQSTARTED_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_SEQSTARTED[%s]
+to value 0"]
+impl crate::Resettable for EVENTS_SEQSTARTED_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf9160-pac/src/pwm0_ns/events_stopped.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_STOPPED` reader"]
+pub struct R(crate::R<EVENTS_STOPPED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_STOPPED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_STOPPED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_STOPPED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_STOPPED` writer"]
+pub struct W(crate::W<EVENTS_STOPPED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_STOPPED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_STOPPED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_STOPPED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_STOPPED` reader - Response to STOP task, emitted when PWM pulses are no longer generated"]
+pub type EVENTS_STOPPED_R = crate::BitReader<EVENTS_STOPPED_A>;
+#[doc = "Response to STOP task, emitted when PWM pulses are no longer generated\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EVENTS_STOPPED_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_STOPPED_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_STOPPED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_STOPPED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_STOPPED_A {
+        match self.bits {
+            false => EVENTS_STOPPED_A::NOT_GENERATED,
+            true => EVENTS_STOPPED_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_STOPPED_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_STOPPED_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_STOPPED` writer - Response to STOP task, emitted when PWM pulses are no longer generated"]
+pub type EVENTS_STOPPED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_STOPPED_SPEC, EVENTS_STOPPED_A, O>;
+impl<'a, const O: u8> EVENTS_STOPPED_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_STOPPED_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_STOPPED_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Response to STOP task, emitted when PWM pulses are no longer generated"]
+    #[inline(always)]
+    pub fn events_stopped(&self) -> EVENTS_STOPPED_R {
+        EVENTS_STOPPED_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Response to STOP task, emitted when PWM pulses are no longer generated"]
+    #[inline(always)]
+    pub fn events_stopped(&mut self) -> EVENTS_STOPPED_W<0> {
+        EVENTS_STOPPED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Response to STOP task, emitted when PWM pulses are no longer generated\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_stopped](index.html) module"]
+pub struct EVENTS_STOPPED_SPEC;
+impl crate::RegisterSpec for EVENTS_STOPPED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_stopped::R](R) reader structure"]
+impl crate::Readable for EVENTS_STOPPED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_stopped::W](W) writer structure"]
+impl crate::Writable for EVENTS_STOPPED_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets EVENTS_STOPPED to value 0"]
+impl crate::Resettable for EVENTS_STOPPED_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf9160-pac/src/pwm0_ns/inten.rs

@@ -0,0 +1,486 @@
+#[doc = "Register `INTEN` reader"]
+pub struct R(crate::R<INTEN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTEN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTEN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTEN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTEN` writer"]
+pub struct W(crate::W<INTEN_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTEN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTEN_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTEN_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `STOPPED` reader - Enable or disable interrupt for event STOPPED"]
+pub type STOPPED_R = crate::BitReader<STOPPED_A>;
+#[doc = "Enable or disable interrupt for event STOPPED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STOPPED_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "1: Enable"]
+    ENABLED = 1,
+}
+impl From<STOPPED_A> for bool {
+    #[inline(always)]
+    fn from(variant: STOPPED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STOPPED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STOPPED_A {
+        match self.bits {
+            false => STOPPED_A::DISABLED,
+            true => STOPPED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == STOPPED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == STOPPED_A::ENABLED
+    }
+}
+#[doc = "Field `STOPPED` writer - Enable or disable interrupt for event STOPPED"]
+pub type STOPPED_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, STOPPED_A, O>;
+impl<'a, const O: u8> STOPPED_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(STOPPED_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(STOPPED_A::ENABLED)
+    }
+}
+#[doc = "Field `SEQSTARTED0` reader - Enable or disable interrupt for event SEQSTARTED\\[0\\]"]
+pub type SEQSTARTED0_R = crate::BitReader<SEQSTARTED0_A>;
+#[doc = "Enable or disable interrupt for event SEQSTARTED\\[0\\]\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SEQSTARTED0_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "1: Enable"]
+    ENABLED = 1,
+}
+impl From<SEQSTARTED0_A> for bool {
+    #[inline(always)]
+    fn from(variant: SEQSTARTED0_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl SEQSTARTED0_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> SEQSTARTED0_A {
+        match self.bits {
+            false => SEQSTARTED0_A::DISABLED,
+            true => SEQSTARTED0_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == SEQSTARTED0_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == SEQSTARTED0_A::ENABLED
+    }
+}
+#[doc = "Field `SEQSTARTED0` writer - Enable or disable interrupt for event SEQSTARTED\\[0\\]"]
+pub type SEQSTARTED0_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, SEQSTARTED0_A, O>;
+impl<'a, const O: u8> SEQSTARTED0_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(SEQSTARTED0_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(SEQSTARTED0_A::ENABLED)
+    }
+}
+#[doc = "Field `SEQSTARTED1` reader - Enable or disable interrupt for event SEQSTARTED\\[1\\]"]
+pub type SEQSTARTED1_R = crate::BitReader<SEQSTARTED1_A>;
+#[doc = "Enable or disable interrupt for event SEQSTARTED\\[1\\]\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SEQSTARTED1_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "1: Enable"]
+    ENABLED = 1,
+}
+impl From<SEQSTARTED1_A> for bool {
+    #[inline(always)]
+    fn from(variant: SEQSTARTED1_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl SEQSTARTED1_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> SEQSTARTED1_A {
+        match self.bits {
+            false => SEQSTARTED1_A::DISABLED,
+            true => SEQSTARTED1_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == SEQSTARTED1_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == SEQSTARTED1_A::ENABLED
+    }
+}
+#[doc = "Field `SEQSTARTED1` writer - Enable or disable interrupt for event SEQSTARTED\\[1\\]"]
+pub type SEQSTARTED1_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, SEQSTARTED1_A, O>;
+impl<'a, const O: u8> SEQSTARTED1_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(SEQSTARTED1_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(SEQSTARTED1_A::ENABLED)
+    }
+}
+#[doc = "Field `SEQEND0` reader - Enable or disable interrupt for event SEQEND\\[0\\]"]
+pub type SEQEND0_R = crate::BitReader<SEQEND0_A>;
+#[doc = "Enable or disable interrupt for event SEQEND\\[0\\]\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SEQEND0_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "1: Enable"]
+    ENABLED = 1,
+}
+impl From<SEQEND0_A> for bool {
+    #[inline(always)]
+    fn from(variant: SEQEND0_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl SEQEND0_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> SEQEND0_A {
+        match self.bits {
+            false => SEQEND0_A::DISABLED,
+            true => SEQEND0_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == SEQEND0_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == SEQEND0_A::ENABLED
+    }
+}
+#[doc = "Field `SEQEND0` writer - Enable or disable interrupt for event SEQEND\\[0\\]"]
+pub type SEQEND0_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, SEQEND0_A, O>;
+impl<'a, const O: u8> SEQEND0_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(SEQEND0_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(SEQEND0_A::ENABLED)
+    }
+}
+#[doc = "Field `SEQEND1` reader - Enable or disable interrupt for event SEQEND\\[1\\]"]
+pub type SEQEND1_R = crate::BitReader<SEQEND1_A>;
+#[doc = "Enable or disable interrupt for event SEQEND\\[1\\]\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SEQEND1_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "1: Enable"]
+    ENABLED = 1,
+}
+impl From<SEQEND1_A> for bool {
+    #[inline(always)]
+    fn from(variant: SEQEND1_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl SEQEND1_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> SEQEND1_A {
+        match self.bits {
+            false => SEQEND1_A::DISABLED,
+            true => SEQEND1_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == SEQEND1_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == SEQEND1_A::ENABLED
+    }
+}
+#[doc = "Field `SEQEND1` writer - Enable or disable interrupt for event SEQEND\\[1\\]"]
+pub type SEQEND1_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, SEQEND1_A, O>;
+impl<'a, const O: u8> SEQEND1_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(SEQEND1_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(SEQEND1_A::ENABLED)
+    }
+}
+#[doc = "Field `PWMPERIODEND` reader - Enable or disable interrupt for event PWMPERIODEND"]
+pub type PWMPERIODEND_R = crate::BitReader<PWMPERIODEND_A>;
+#[doc = "Enable or disable interrupt for event PWMPERIODEND\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum PWMPERIODEND_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "1: Enable"]
+    ENABLED = 1,
+}
+impl From<PWMPERIODEND_A> for bool {
+    #[inline(always)]
+    fn from(variant: PWMPERIODEND_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl PWMPERIODEND_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> PWMPERIODEND_A {
+        match self.bits {
+            false => PWMPERIODEND_A::DISABLED,
+            true => PWMPERIODEND_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == PWMPERIODEND_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == PWMPERIODEND_A::ENABLED
+    }
+}
+#[doc = "Field `PWMPERIODEND` writer - Enable or disable interrupt for event PWMPERIODEND"]
+pub type PWMPERIODEND_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, PWMPERIODEND_A, O>;
+impl<'a, const O: u8> PWMPERIODEND_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(PWMPERIODEND_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(PWMPERIODEND_A::ENABLED)
+    }
+}
+#[doc = "Field `LOOPSDONE` reader - Enable or disable interrupt for event LOOPSDONE"]
+pub type LOOPSDONE_R = crate::BitReader<LOOPSDONE_A>;
+#[doc = "Enable or disable interrupt for event LOOPSDONE\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum LOOPSDONE_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "1: Enable"]
+    ENABLED = 1,
+}
+impl From<LOOPSDONE_A> for bool {
+    #[inline(always)]
+    fn from(variant: LOOPSDONE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl LOOPSDONE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> LOOPSDONE_A {
+        match self.bits {
+            false => LOOPSDONE_A::DISABLED,
+            true => LOOPSDONE_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == LOOPSDONE_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == LOOPSDONE_A::ENABLED
+    }
+}
+#[doc = "Field `LOOPSDONE` writer - Enable or disable interrupt for event LOOPSDONE"]
+pub type LOOPSDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, LOOPSDONE_A, O>;
+impl<'a, const O: u8> LOOPSDONE_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(LOOPSDONE_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(LOOPSDONE_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bit 1 - Enable or disable interrupt for event STOPPED"]
+    #[inline(always)]
+    pub fn stopped(&self) -> STOPPED_R {
+        STOPPED_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - Enable or disable interrupt for event SEQSTARTED\\[0\\]"]
+    #[inline(always)]
+    pub fn seqstarted0(&self) -> SEQSTARTED0_R {
+        SEQSTARTED0_R::new(((self.bits >> 2) & 1) != 0)
+    }
+    #[doc = "Bit 3 - Enable or disable interrupt for event SEQSTARTED\\[1\\]"]
+    #[inline(always)]
+    pub fn seqstarted1(&self) -> SEQSTARTED1_R {
+        SEQSTARTED1_R::new(((self.bits >> 3) & 1) != 0)
+    }
+    #[doc = "Bit 4 - Enable or disable interrupt for event SEQEND\\[0\\]"]
+    #[inline(always)]
+    pub fn seqend0(&self) -> SEQEND0_R {
+        SEQEND0_R::new(((self.bits >> 4) & 1) != 0)
+    }
+    #[doc = "Bit 5 - Enable or disable interrupt for event SEQEND\\[1\\]"]
+    #[inline(always)]
+    pub fn seqend1(&self) -> SEQEND1_R {
+        SEQEND1_R::new(((self.bits >> 5) & 1) != 0)
+    }
+    #[doc = "Bit 6 - Enable or disable interrupt for event PWMPERIODEND"]
+    #[inline(always)]
+    pub fn pwmperiodend(&self) -> PWMPERIODEND_R {
+        PWMPERIODEND_R::new(((self.bits >> 6) & 1) != 0)
+    }
+    #[doc = "Bit 7 - Enable or disable interrupt for event LOOPSDONE"]
+    #[inline(always)]
+    pub fn loopsdone(&self) -> LOOPSDONE_R {
+        LOOPSDONE_R::new(((self.bits >> 7) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 1 - Enable or disable interrupt for event STOPPED"]
+    #[inline(always)]
+    pub fn stopped(&mut self) -> STOPPED_W<1> {
+        STOPPED_W::new(self)
+    }
+    #[doc = "Bit 2 - Enable or disable interrupt for event SEQSTARTED\\[0\\]"]
+    #[inline(always)]
+    pub fn seqstarted0(&mut self) -> SEQSTARTED0_W<2> {
+        SEQSTARTED0_W::new(self)
+    }
+    #[doc = "Bit 3 - Enable or disable interrupt for event SEQSTARTED\\[1\\]"]
+    #[inline(always)]
+    pub fn seqstarted1(&mut self) -> SEQSTARTED1_W<3> {
+        SEQSTARTED1_W::new(self)
+    }
+    #[doc = "Bit 4 - Enable or disable interrupt for event SEQEND\\[0\\]"]
+    #[inline(always)]
+    pub fn seqend0(&mut self) -> SEQEND0_W<4> {
+        SEQEND0_W::new(self)
+    }
+    #[doc = "Bit 5 - Enable or disable interrupt for event SEQEND\\[1\\]"]
+    #[inline(always)]
+    pub fn seqend1(&mut self) -> SEQEND1_W<5> {
+        SEQEND1_W::new(self)
+    }
+    #[doc = "Bit 6 - Enable or disable interrupt for event PWMPERIODEND"]
+    #[inline(always)]
+    pub fn pwmperiodend(&mut self) -> PWMPERIODEND_W<6> {
+        PWMPERIODEND_W::new(self)
+    }
+    #[doc = "Bit 7 - Enable or disable interrupt for event LOOPSDONE"]
+    #[inline(always)]
+    pub fn loopsdone(&mut self) -> LOOPSDONE_W<7> {
+        LOOPSDONE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Enable or disable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [inten](index.html) module"]
+pub struct INTEN_SPEC;
+impl crate::RegisterSpec for INTEN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [inten::R](R) reader structure"]
+impl crate::Readable for INTEN_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [inten::W](W) writer structure"]
+impl crate::Writable for INTEN_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTEN to value 0"]
+impl crate::Resettable for INTEN_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf9160-pac/src/pwm0_ns/intenclr.rs

@@ -0,0 +1,538 @@
+#[doc = "Register `INTENCLR` reader"]
+pub struct R(crate::R<INTENCLR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENCLR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENCLR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENCLR` writer"]
+pub struct W(crate::W<INTENCLR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENCLR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENCLR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `STOPPED` reader - Write '1' to disable interrupt for event STOPPED"]
+pub type STOPPED_R = crate::BitReader<STOPPED_A>;
+#[doc = "Write '1' to disable interrupt for event STOPPED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STOPPED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<STOPPED_A> for bool {
+    #[inline(always)]
+    fn from(variant: STOPPED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STOPPED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STOPPED_A {
+        match self.bits {
+            false => STOPPED_A::DISABLED,
+            true => STOPPED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == STOPPED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == STOPPED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event STOPPED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STOPPED_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<STOPPED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: STOPPED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `STOPPED` writer - Write '1' to disable interrupt for event STOPPED"]
+pub type STOPPED_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, STOPPED_AW, O>;
+impl<'a, const O: u8> STOPPED_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(STOPPED_AW::CLEAR)
+    }
+}
+#[doc = "Field `SEQSTARTED0` reader - Write '1' to disable interrupt for event SEQSTARTED\\[0\\]"]
+pub type SEQSTARTED0_R = crate::BitReader<SEQSTARTED0_A>;
+#[doc = "Write '1' to disable interrupt for event SEQSTARTED\\[0\\]\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SEQSTARTED0_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<SEQSTARTED0_A> for bool {
+    #[inline(always)]
+    fn from(variant: SEQSTARTED0_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl SEQSTARTED0_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> SEQSTARTED0_A {
+        match self.bits {
+            false => SEQSTARTED0_A::DISABLED,
+            true => SEQSTARTED0_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == SEQSTARTED0_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == SEQSTARTED0_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event SEQSTARTED\\[0\\]\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SEQSTARTED0_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<SEQSTARTED0_AW> for bool {
+    #[inline(always)]
+    fn from(variant: SEQSTARTED0_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `SEQSTARTED0` writer - Write '1' to disable interrupt for event SEQSTARTED\\[0\\]"]
+pub type SEQSTARTED0_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENCLR_SPEC, SEQSTARTED0_AW, O>;
+impl<'a, const O: u8> SEQSTARTED0_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(SEQSTARTED0_AW::CLEAR)
+    }
+}
+#[doc = "Field `SEQSTARTED1` reader - Write '1' to disable interrupt for event SEQSTARTED\\[1\\]"]
+pub type SEQSTARTED1_R = crate::BitReader<SEQSTARTED1_A>;
+#[doc = "Write '1' to disable interrupt for event SEQSTARTED\\[1\\]\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SEQSTARTED1_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<SEQSTARTED1_A> for bool {
+    #[inline(always)]
+    fn from(variant: SEQSTARTED1_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl SEQSTARTED1_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> SEQSTARTED1_A {
+        match self.bits {
+            false => SEQSTARTED1_A::DISABLED,
+            true => SEQSTARTED1_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == SEQSTARTED1_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == SEQSTARTED1_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event SEQSTARTED\\[1\\]\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SEQSTARTED1_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<SEQSTARTED1_AW> for bool {
+    #[inline(always)]
+    fn from(variant: SEQSTARTED1_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `SEQSTARTED1` writer - Write '1' to disable interrupt for event SEQSTARTED\\[1\\]"]
+pub type SEQSTARTED1_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENCLR_SPEC, SEQSTARTED1_AW, O>;
+impl<'a, const O: u8> SEQSTARTED1_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(SEQSTARTED1_AW::CLEAR)
+    }
+}
+#[doc = "Field `SEQEND0` reader - Write '1' to disable interrupt for event SEQEND\\[0\\]"]
+pub type SEQEND0_R = crate::BitReader<SEQEND0_A>;
+#[doc = "Write '1' to disable interrupt for event SEQEND\\[0\\]\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SEQEND0_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<SEQEND0_A> for bool {
+    #[inline(always)]
+    fn from(variant: SEQEND0_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl SEQEND0_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> SEQEND0_A {
+        match self.bits {
+            false => SEQEND0_A::DISABLED,
+            true => SEQEND0_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == SEQEND0_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == SEQEND0_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event SEQEND\\[0\\]\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SEQEND0_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<SEQEND0_AW> for bool {
+    #[inline(always)]
+    fn from(variant: SEQEND0_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `SEQEND0` writer - Write '1' to disable interrupt for event SEQEND\\[0\\]"]
+pub type SEQEND0_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, SEQEND0_AW, O>;
+impl<'a, const O: u8> SEQEND0_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(SEQEND0_AW::CLEAR)
+    }
+}
+#[doc = "Field `SEQEND1` reader - Write '1' to disable interrupt for event SEQEND\\[1\\]"]
+pub type SEQEND1_R = crate::BitReader<SEQEND1_A>;
+#[doc = "Write '1' to disable interrupt for event SEQEND\\[1\\]\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SEQEND1_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<SEQEND1_A> for bool {
+    #[inline(always)]
+    fn from(variant: SEQEND1_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl SEQEND1_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> SEQEND1_A {
+        match self.bits {
+            false => SEQEND1_A::DISABLED,
+            true => SEQEND1_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == SEQEND1_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == SEQEND1_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event SEQEND\\[1\\]\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SEQEND1_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<SEQEND1_AW> for bool {
+    #[inline(always)]
+    fn from(variant: SEQEND1_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `SEQEND1` writer - Write '1' to disable interrupt for event SEQEND\\[1\\]"]
+pub type SEQEND1_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, SEQEND1_AW, O>;
+impl<'a, const O: u8> SEQEND1_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(SEQEND1_AW::CLEAR)
+    }
+}
+#[doc = "Field `PWMPERIODEND` reader - Write '1' to disable interrupt for event PWMPERIODEND"]
+pub type PWMPERIODEND_R = crate::BitReader<PWMPERIODEND_A>;
+#[doc = "Write '1' to disable interrupt for event PWMPERIODEND\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum PWMPERIODEND_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<PWMPERIODEND_A> for bool {
+    #[inline(always)]
+    fn from(variant: PWMPERIODEND_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl PWMPERIODEND_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> PWMPERIODEND_A {
+        match self.bits {
+            false => PWMPERIODEND_A::DISABLED,
+            true => PWMPERIODEND_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == PWMPERIODEND_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == PWMPERIODEND_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event PWMPERIODEND\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum PWMPERIODEND_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<PWMPERIODEND_AW> for bool {
+    #[inline(always)]
+    fn from(variant: PWMPERIODEND_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `PWMPERIODEND` writer - Write '1' to disable interrupt for event PWMPERIODEND"]
+pub type PWMPERIODEND_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENCLR_SPEC, PWMPERIODEND_AW, O>;
+impl<'a, const O: u8> PWMPERIODEND_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(PWMPERIODEND_AW::CLEAR)
+    }
+}
+#[doc = "Field `LOOPSDONE` reader - Write '1' to disable interrupt for event LOOPSDONE"]
+pub type LOOPSDONE_R = crate::BitReader<LOOPSDONE_A>;
+#[doc = "Write '1' to disable interrupt for event LOOPSDONE\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum LOOPSDONE_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<LOOPSDONE_A> for bool {
+    #[inline(always)]
+    fn from(variant: LOOPSDONE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl LOOPSDONE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> LOOPSDONE_A {
+        match self.bits {
+            false => LOOPSDONE_A::DISABLED,
+            true => LOOPSDONE_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == LOOPSDONE_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == LOOPSDONE_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event LOOPSDONE\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum LOOPSDONE_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<LOOPSDONE_AW> for bool {
+    #[inline(always)]
+    fn from(variant: LOOPSDONE_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `LOOPSDONE` writer - Write '1' to disable interrupt for event LOOPSDONE"]
+pub type LOOPSDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, LOOPSDONE_AW, O>;
+impl<'a, const O: u8> LOOPSDONE_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(LOOPSDONE_AW::CLEAR)
+    }
+}
+impl R {
+    #[doc = "Bit 1 - Write '1' to disable interrupt for event STOPPED"]
+    #[inline(always)]
+    pub fn stopped(&self) -> STOPPED_R {
+        STOPPED_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - Write '1' to disable interrupt for event SEQSTARTED\\[0\\]"]
+    #[inline(always)]
+    pub fn seqstarted0(&self) -> SEQSTARTED0_R {
+        SEQSTARTED0_R::new(((self.bits >> 2) & 1) != 0)
+    }
+    #[doc = "Bit 3 - Write '1' to disable interrupt for event SEQSTARTED\\[1\\]"]
+    #[inline(always)]
+    pub fn seqstarted1(&self) -> SEQSTARTED1_R {
+        SEQSTARTED1_R::new(((self.bits >> 3) & 1) != 0)
+    }
+    #[doc = "Bit 4 - Write '1' to disable interrupt for event SEQEND\\[0\\]"]
+    #[inline(always)]
+    pub fn seqend0(&self) -> SEQEND0_R {
+        SEQEND0_R::new(((self.bits >> 4) & 1) != 0)
+    }
+    #[doc = "Bit 5 - Write '1' to disable interrupt for event SEQEND\\[1\\]"]
+    #[inline(always)]
+    pub fn seqend1(&self) -> SEQEND1_R {
+        SEQEND1_R::new(((self.bits >> 5) & 1) != 0)
+    }
+    #[doc = "Bit 6 - Write '1' to disable interrupt for event PWMPERIODEND"]
+    #[inline(always)]
+    pub fn pwmperiodend(&self) -> PWMPERIODEND_R {
+        PWMPERIODEND_R::new(((self.bits >> 6) & 1) != 0)
+    }
+    #[doc = "Bit 7 - Write '1' to disable interrupt for event LOOPSDONE"]
+    #[inline(always)]
+    pub fn loopsdone(&self) -> LOOPSDONE_R {
+        LOOPSDONE_R::new(((self.bits >> 7) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 1 - Write '1' to disable interrupt for event STOPPED"]
+    #[inline(always)]
+    pub fn stopped(&mut self) -> STOPPED_W<1> {
+        STOPPED_W::new(self)
+    }
+    #[doc = "Bit 2 - Write '1' to disable interrupt for event SEQSTARTED\\[0\\]"]
+    #[inline(always)]
+    pub fn seqstarted0(&mut self) -> SEQSTARTED0_W<2> {
+        SEQSTARTED0_W::new(self)
+    }
+    #[doc = "Bit 3 - Write '1' to disable interrupt for event SEQSTARTED\\[1\\]"]
+    #[inline(always)]
+    pub fn seqstarted1(&mut self) -> SEQSTARTED1_W<3> {
+        SEQSTARTED1_W::new(self)
+    }
+    #[doc = "Bit 4 - Write '1' to disable interrupt for event SEQEND\\[0\\]"]
+    #[inline(always)]
+    pub fn seqend0(&mut self) -> SEQEND0_W<4> {
+        SEQEND0_W::new(self)
+    }
+    #[doc = "Bit 5 - Write '1' to disable interrupt for event SEQEND\\[1\\]"]
+    #[inline(always)]
+    pub fn seqend1(&mut self) -> SEQEND1_W<5> {
+        SEQEND1_W::new(self)
+    }
+    #[doc = "Bit 6 - Write '1' to disable interrupt for event PWMPERIODEND"]
+    #[inline(always)]
+    pub fn pwmperiodend(&mut self) -> PWMPERIODEND_W<6> {
+        PWMPERIODEND_W::new(self)
+    }
+    #[doc = "Bit 7 - Write '1' to disable interrupt for event LOOPSDONE"]
+    #[inline(always)]
+    pub fn loopsdone(&mut self) -> LOOPSDONE_W<7> {
+        LOOPSDONE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Disable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"]
+pub struct INTENCLR_SPEC;
+impl crate::RegisterSpec for INTENCLR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [intenclr::R](R) reader structure"]
+impl crate::Readable for INTENCLR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"]
+impl crate::Writable for INTENCLR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTENCLR to value 0"]
+impl crate::Resettable for INTENCLR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf9160-pac/src/pwm0_ns/intenset.rs

@@ -0,0 +1,538 @@
+#[doc = "Register `INTENSET` reader"]
+pub struct R(crate::R<INTENSET_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENSET_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENSET_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENSET` writer"]
+pub struct W(crate::W<INTENSET_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENSET_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENSET_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `STOPPED` reader - Write '1' to enable interrupt for event STOPPED"]
+pub type STOPPED_R = crate::BitReader<STOPPED_A>;
+#[doc = "Write '1' to enable interrupt for event STOPPED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STOPPED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<STOPPED_A> for bool {
+    #[inline(always)]
+    fn from(variant: STOPPED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STOPPED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STOPPED_A {
+        match self.bits {
+            false => STOPPED_A::DISABLED,
+            true => STOPPED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == STOPPED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == STOPPED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event STOPPED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum STOPPED_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<STOPPED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: STOPPED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `STOPPED` writer - Write '1' to enable interrupt for event STOPPED"]
+pub type STOPPED_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, STOPPED_AW, O>;
+impl<'a, const O: u8> STOPPED_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(STOPPED_AW::SET)
+    }
+}
+#[doc = "Field `SEQSTARTED0` reader - Write '1' to enable interrupt for event SEQSTARTED\\[0\\]"]
+pub type SEQSTARTED0_R = crate::BitReader<SEQSTARTED0_A>;
+#[doc = "Write '1' to enable interrupt for event SEQSTARTED\\[0\\]\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SEQSTARTED0_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<SEQSTARTED0_A> for bool {
+    #[inline(always)]
+    fn from(variant: SEQSTARTED0_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl SEQSTARTED0_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> SEQSTARTED0_A {
+        match self.bits {
+            false => SEQSTARTED0_A::DISABLED,
+            true => SEQSTARTED0_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == SEQSTARTED0_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == SEQSTARTED0_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event SEQSTARTED\\[0\\]\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SEQSTARTED0_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<SEQSTARTED0_AW> for bool {
+    #[inline(always)]
+    fn from(variant: SEQSTARTED0_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `SEQSTARTED0` writer - Write '1' to enable interrupt for event SEQSTARTED\\[0\\]"]
+pub type SEQSTARTED0_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENSET_SPEC, SEQSTARTED0_AW, O>;
+impl<'a, const O: u8> SEQSTARTED0_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(SEQSTARTED0_AW::SET)
+    }
+}
+#[doc = "Field `SEQSTARTED1` reader - Write '1' to enable interrupt for event SEQSTARTED\\[1\\]"]
+pub type SEQSTARTED1_R = crate::BitReader<SEQSTARTED1_A>;
+#[doc = "Write '1' to enable interrupt for event SEQSTARTED\\[1\\]\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SEQSTARTED1_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<SEQSTARTED1_A> for bool {
+    #[inline(always)]
+    fn from(variant: SEQSTARTED1_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl SEQSTARTED1_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> SEQSTARTED1_A {
+        match self.bits {
+            false => SEQSTARTED1_A::DISABLED,
+            true => SEQSTARTED1_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == SEQSTARTED1_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == SEQSTARTED1_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event SEQSTARTED\\[1\\]\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SEQSTARTED1_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<SEQSTARTED1_AW> for bool {
+    #[inline(always)]
+    fn from(variant: SEQSTARTED1_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `SEQSTARTED1` writer - Write '1' to enable interrupt for event SEQSTARTED\\[1\\]"]
+pub type SEQSTARTED1_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENSET_SPEC, SEQSTARTED1_AW, O>;
+impl<'a, const O: u8> SEQSTARTED1_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(SEQSTARTED1_AW::SET)
+    }
+}
+#[doc = "Field `SEQEND0` reader - Write '1' to enable interrupt for event SEQEND\\[0\\]"]
+pub type SEQEND0_R = crate::BitReader<SEQEND0_A>;
+#[doc = "Write '1' to enable interrupt for event SEQEND\\[0\\]\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SEQEND0_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<SEQEND0_A> for bool {
+    #[inline(always)]
+    fn from(variant: SEQEND0_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl SEQEND0_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> SEQEND0_A {
+        match self.bits {
+            false => SEQEND0_A::DISABLED,
+            true => SEQEND0_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == SEQEND0_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == SEQEND0_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event SEQEND\\[0\\]\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SEQEND0_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<SEQEND0_AW> for bool {
+    #[inline(always)]
+    fn from(variant: SEQEND0_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `SEQEND0` writer - Write '1' to enable interrupt for event SEQEND\\[0\\]"]
+pub type SEQEND0_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, SEQEND0_AW, O>;
+impl<'a, const O: u8> SEQEND0_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(SEQEND0_AW::SET)
+    }
+}
+#[doc = "Field `SEQEND1` reader - Write '1' to enable interrupt for event SEQEND\\[1\\]"]
+pub type SEQEND1_R = crate::BitReader<SEQEND1_A>;
+#[doc = "Write '1' to enable interrupt for event SEQEND\\[1\\]\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SEQEND1_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<SEQEND1_A> for bool {
+    #[inline(always)]
+    fn from(variant: SEQEND1_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl SEQEND1_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> SEQEND1_A {
+        match self.bits {
+            false => SEQEND1_A::DISABLED,
+            true => SEQEND1_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == SEQEND1_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == SEQEND1_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event SEQEND\\[1\\]\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SEQEND1_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<SEQEND1_AW> for bool {
+    #[inline(always)]
+    fn from(variant: SEQEND1_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `SEQEND1` writer - Write '1' to enable interrupt for event SEQEND\\[1\\]"]
+pub type SEQEND1_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, SEQEND1_AW, O>;
+impl<'a, const O: u8> SEQEND1_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(SEQEND1_AW::SET)
+    }
+}
+#[doc = "Field `PWMPERIODEND` reader - Write '1' to enable interrupt for event PWMPERIODEND"]
+pub type PWMPERIODEND_R = crate::BitReader<PWMPERIODEND_A>;
+#[doc = "Write '1' to enable interrupt for event PWMPERIODEND\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum PWMPERIODEND_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<PWMPERIODEND_A> for bool {
+    #[inline(always)]
+    fn from(variant: PWMPERIODEND_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl PWMPERIODEND_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> PWMPERIODEND_A {
+        match self.bits {
+            false => PWMPERIODEND_A::DISABLED,
+            true => PWMPERIODEND_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == PWMPERIODEND_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == PWMPERIODEND_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event PWMPERIODEND\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum PWMPERIODEND_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<PWMPERIODEND_AW> for bool {
+    #[inline(always)]
+    fn from(variant: PWMPERIODEND_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `PWMPERIODEND` writer - Write '1' to enable interrupt for event PWMPERIODEND"]
+pub type PWMPERIODEND_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENSET_SPEC, PWMPERIODEND_AW, O>;
+impl<'a, const O: u8> PWMPERIODEND_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(PWMPERIODEND_AW::SET)
+    }
+}
+#[doc = "Field `LOOPSDONE` reader - Write '1' to enable interrupt for event LOOPSDONE"]
+pub type LOOPSDONE_R = crate::BitReader<LOOPSDONE_A>;
+#[doc = "Write '1' to enable interrupt for event LOOPSDONE\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum LOOPSDONE_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<LOOPSDONE_A> for bool {
+    #[inline(always)]
+    fn from(variant: LOOPSDONE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl LOOPSDONE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> LOOPSDONE_A {
+        match self.bits {
+            false => LOOPSDONE_A::DISABLED,
+            true => LOOPSDONE_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == LOOPSDONE_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == LOOPSDONE_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event LOOPSDONE\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum LOOPSDONE_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<LOOPSDONE_AW> for bool {
+    #[inline(always)]
+    fn from(variant: LOOPSDONE_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `LOOPSDONE` writer - Write '1' to enable interrupt for event LOOPSDONE"]
+pub type LOOPSDONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, LOOPSDONE_AW, O>;
+impl<'a, const O: u8> LOOPSDONE_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(LOOPSDONE_AW::SET)
+    }
+}
+impl R {
+    #[doc = "Bit 1 - Write '1' to enable interrupt for event STOPPED"]
+    #[inline(always)]
+    pub fn stopped(&self) -> STOPPED_R {
+        STOPPED_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - Write '1' to enable interrupt for event SEQSTARTED\\[0\\]"]
+    #[inline(always)]
+    pub fn seqstarted0(&self) -> SEQSTARTED0_R {
+        SEQSTARTED0_R::new(((self.bits >> 2) & 1) != 0)
+    }
+    #[doc = "Bit 3 - Write '1' to enable interrupt for event SEQSTARTED\\[1\\]"]
+    #[inline(always)]
+    pub fn seqstarted1(&self) -> SEQSTARTED1_R {
+        SEQSTARTED1_R::new(((self.bits >> 3) & 1) != 0)
+    }
+    #[doc = "Bit 4 - Write '1' to enable interrupt for event SEQEND\\[0\\]"]
+    #[inline(always)]
+    pub fn seqend0(&self) -> SEQEND0_R {
+        SEQEND0_R::new(((self.bits >> 4) & 1) != 0)
+    }
+    #[doc = "Bit 5 - Write '1' to enable interrupt for event SEQEND\\[1\\]"]
+    #[inline(always)]
+    pub fn seqend1(&self) -> SEQEND1_R {
+        SEQEND1_R::new(((self.bits >> 5) & 1) != 0)
+    }
+    #[doc = "Bit 6 - Write '1' to enable interrupt for event PWMPERIODEND"]
+    #[inline(always)]
+    pub fn pwmperiodend(&self) -> PWMPERIODEND_R {
+        PWMPERIODEND_R::new(((self.bits >> 6) & 1) != 0)
+    }
+    #[doc = "Bit 7 - Write '1' to enable interrupt for event LOOPSDONE"]
+    #[inline(always)]
+    pub fn loopsdone(&self) -> LOOPSDONE_R {
+        LOOPSDONE_R::new(((self.bits >> 7) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 1 - Write '1' to enable interrupt for event STOPPED"]
+    #[inline(always)]
+    pub fn stopped(&mut self) -> STOPPED_W<1> {
+        STOPPED_W::new(self)
+    }
+    #[doc = "Bit 2 - Write '1' to enable interrupt for event SEQSTARTED\\[0\\]"]
+    #[inline(always)]
+    pub fn seqstarted0(&mut self) -> SEQSTARTED0_W<2> {
+        SEQSTARTED0_W::new(self)
+    }
+    #[doc = "Bit 3 - Write '1' to enable interrupt for event SEQSTARTED\\[1\\]"]
+    #[inline(always)]
+    pub fn seqstarted1(&mut self) -> SEQSTARTED1_W<3> {
+        SEQSTARTED1_W::new(self)
+    }
+    #[doc = "Bit 4 - Write '1' to enable interrupt for event SEQEND\\[0\\]"]
+    #[inline(always)]
+    pub fn seqend0(&mut self) -> SEQEND0_W<4> {
+        SEQEND0_W::new(self)
+    }
+    #[doc = "Bit 5 - Write '1' to enable interrupt for event SEQEND\\[1\\]"]
+    #[inline(always)]
+    pub fn seqend1(&mut self) -> SEQEND1_W<5> {
+        SEQEND1_W::new(self)
+    }
+    #[doc = "Bit 6 - Write '1' to enable interrupt for event PWMPERIODEND"]
+    #[inline(always)]
+    pub fn pwmperiodend(&mut self) -> PWMPERIODEND_W<6> {
+        PWMPERIODEND_W::new(self)
+    }
+    #[doc = "Bit 7 - Write '1' to enable interrupt for event LOOPSDONE"]
+    #[inline(always)]
+    pub fn loopsdone(&mut self) -> LOOPSDONE_W<7> {
+        LOOPSDONE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Enable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"]
+pub struct INTENSET_SPEC;
+impl crate::RegisterSpec for INTENSET_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [intenset::R](R) reader structure"]
+impl crate::Readable for INTENSET_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"]
+impl crate::Writable for INTENSET_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets INTENSET to value 0"]
+impl crate::Resettable for INTENSET_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf9160-pac/src/pwm0_ns/loop_.rs

@@ -0,0 +1,115 @@
+#[doc = "Register `LOOP` reader"]
+pub struct R(crate::R<LOOP_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<LOOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<LOOP_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<LOOP_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `LOOP` writer"]
+pub struct W(crate::W<LOOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<LOOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<LOOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<LOOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CNT` reader - Number of playbacks of pattern cycles"]
+pub type CNT_R = crate::FieldReader<u16, CNT_A>;
+#[doc = "Number of playbacks of pattern cycles\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u16)]
+pub enum CNT_A {
+    #[doc = "0: Looping disabled (stop at the end of the sequence)"]
+    DISABLED = 0,
+}
+impl From<CNT_A> for u16 {
+    #[inline(always)]
+    fn from(variant: CNT_A) -> Self {
+        variant as _
+    }
+}
+impl CNT_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<CNT_A> {
+        match self.bits {
+            0 => Some(CNT_A::DISABLED),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == CNT_A::DISABLED
+    }
+}
+#[doc = "Field `CNT` writer - Number of playbacks of pattern cycles"]
+pub type CNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, LOOP_SPEC, u16, CNT_A, 16, O>;
+impl<'a, const O: u8> CNT_W<'a, O> {
+    #[doc = "Looping disabled (stop at the end of the sequence)"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(CNT_A::DISABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:15 - Number of playbacks of pattern cycles"]
+    #[inline(always)]
+    pub fn cnt(&self) -> CNT_R {
+        CNT_R::new((self.bits & 0xffff) as u16)
+    }
+}
+impl W {
+    #[doc = "Bits 0:15 - Number of playbacks of pattern cycles"]
+    #[inline(always)]
+    pub fn cnt(&mut self) -> CNT_W<0> {
+        CNT_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Number of playbacks of a loop\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [loop_](index.html) module"]
+pub struct LOOP_SPEC;
+impl crate::RegisterSpec for LOOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [loop_::R](R) reader structure"]
+impl crate::Readable for LOOP_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [loop_::W](W) writer structure"]
+impl crate::Writable for LOOP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets LOOP to value 0"]
+impl crate::Resettable for LOOP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf9160-pac/src/pwm0_ns/mode.rs

@@ -0,0 +1,126 @@
+#[doc = "Register `MODE` reader"]
+pub struct R(crate::R<MODE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<MODE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<MODE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<MODE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `MODE` writer"]
+pub struct W(crate::W<MODE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<MODE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<MODE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<MODE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `UPDOWN` reader - Selects up mode or up-and-down mode for the counter"]
+pub type UPDOWN_R = crate::BitReader<UPDOWN_A>;
+#[doc = "Selects up mode or up-and-down mode for the counter\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum UPDOWN_A {
+    #[doc = "0: Up counter, edge-aligned PWM duty cycle"]
+    UP = 0,
+    #[doc = "1: Up and down counter, center-aligned PWM duty cycle"]
+    UP_AND_DOWN = 1,
+}
+impl From<UPDOWN_A> for bool {
+    #[inline(always)]
+    fn from(variant: UPDOWN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl UPDOWN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> UPDOWN_A {
+        match self.bits {
+            false => UPDOWN_A::UP,
+            true => UPDOWN_A::UP_AND_DOWN,
+        }
+    }
+    #[doc = "Checks if the value of the field is `UP`"]
+    #[inline(always)]
+    pub fn is_up(&self) -> bool {
+        *self == UPDOWN_A::UP
+    }
+    #[doc = "Checks if the value of the field is `UP_AND_DOWN`"]
+    #[inline(always)]
+    pub fn is_up_and_down(&self) -> bool {
+        *self == UPDOWN_A::UP_AND_DOWN
+    }
+}
+#[doc = "Field `UPDOWN` writer - Selects up mode or up-and-down mode for the counter"]
+pub type UPDOWN_W<'a, const O: u8> = crate::BitWriter<'a, u32, MODE_SPEC, UPDOWN_A, O>;
+impl<'a, const O: u8> UPDOWN_W<'a, O> {
+    #[doc = "Up counter, edge-aligned PWM duty cycle"]
+    #[inline(always)]
+    pub fn up(self) -> &'a mut W {
+        self.variant(UPDOWN_A::UP)
+    }
+    #[doc = "Up and down counter, center-aligned PWM duty cycle"]
+    #[inline(always)]
+    pub fn up_and_down(self) -> &'a mut W {
+        self.variant(UPDOWN_A::UP_AND_DOWN)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Selects up mode or up-and-down mode for the counter"]
+    #[inline(always)]
+    pub fn updown(&self) -> UPDOWN_R {
+        UPDOWN_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Selects up mode or up-and-down mode for the counter"]
+    #[inline(always)]
+    pub fn updown(&mut self) -> UPDOWN_W<0> {
+        UPDOWN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Selects operating mode of the wave counter\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mode](index.html) module"]
+pub struct MODE_SPEC;
+impl crate::RegisterSpec for MODE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [mode::R](R) reader structure"]
+impl crate::Readable for MODE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [mode::W](W) writer structure"]
+impl crate::Writable for MODE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets MODE to value 0"]
+impl crate::Resettable for MODE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf9160-pac/src/pwm0_ns/prescaler.rs

@@ -0,0 +1,207 @@
+#[doc = "Register `PRESCALER` reader"]
+pub struct R(crate::R<PRESCALER_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PRESCALER_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PRESCALER_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PRESCALER_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PRESCALER` writer"]
+pub struct W(crate::W<PRESCALER_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PRESCALER_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PRESCALER_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PRESCALER_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `PRESCALER` reader - Prescaler of PWM_CLK"]
+pub type PRESCALER_R = crate::FieldReader<u8, PRESCALER_A>;
+#[doc = "Prescaler of PWM_CLK\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u8)]
+pub enum PRESCALER_A {
+    #[doc = "0: Divide by 1 (16 MHz)"]
+    DIV_1 = 0,
+    #[doc = "1: Divide by 2 (8 MHz)"]
+    DIV_2 = 1,
+    #[doc = "2: Divide by 4 (4 MHz)"]
+    DIV_4 = 2,
+    #[doc = "3: Divide by 8 (2 MHz)"]
+    DIV_8 = 3,
+    #[doc = "4: Divide by 16 (1 MHz)"]
+    DIV_16 = 4,
+    #[doc = "5: Divide by 32 (500 kHz)"]
+    DIV_32 = 5,
+    #[doc = "6: Divide by 64 (250 kHz)"]
+    DIV_64 = 6,
+    #[doc = "7: Divide by 128 (125 kHz)"]
+    DIV_128 = 7,
+}
+impl From<PRESCALER_A> for u8 {
+    #[inline(always)]
+    fn from(variant: PRESCALER_A) -> Self {
+        variant as _
+    }
+}
+impl PRESCALER_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> PRESCALER_A {
+        match self.bits {
+            0 => PRESCALER_A::DIV_1,
+            1 => PRESCALER_A::DIV_2,
+            2 => PRESCALER_A::DIV_4,
+            3 => PRESCALER_A::DIV_8,
+            4 => PRESCALER_A::DIV_16,
+            5 => PRESCALER_A::DIV_32,
+            6 => PRESCALER_A::DIV_64,
+            7 => PRESCALER_A::DIV_128,
+            _ => unreachable!(),
+        }
+    }
+    #[doc = "Checks if the value of the field is `DIV_1`"]
+    #[inline(always)]
+    pub fn is_div_1(&self) -> bool {
+        *self == PRESCALER_A::DIV_1
+    }
+    #[doc = "Checks if the value of the field is `DIV_2`"]
+    #[inline(always)]
+    pub fn is_div_2(&self) -> bool {
+        *self == PRESCALER_A::DIV_2
+    }
+    #[doc = "Checks if the value of the field is `DIV_4`"]
+    #[inline(always)]
+    pub fn is_div_4(&self) -> bool {
+        *self == PRESCALER_A::DIV_4
+    }
+    #[doc = "Checks if the value of the field is `DIV_8`"]
+    #[inline(always)]
+    pub fn is_div_8(&self) -> bool {
+        *self == PRESCALER_A::DIV_8
+    }
+    #[doc = "Checks if the value of the field is `DIV_16`"]
+    #[inline(always)]
+    pub fn is_div_16(&self) -> bool {
+        *self == PRESCALER_A::DIV_16
+    }
+    #[doc = "Checks if the value of the field is `DIV_32`"]
+    #[inline(always)]
+    pub fn is_div_32(&self) -> bool {
+        *self == PRESCALER_A::DIV_32
+    }
+    #[doc = "Checks if the value of the field is `DIV_64`"]
+    #[inline(always)]
+    pub fn is_div_64(&self) -> bool {
+        *self == PRESCALER_A::DIV_64
+    }
+    #[doc = "Checks if the value of the field is `DIV_128`"]
+    #[inline(always)]
+    pub fn is_div_128(&self) -> bool {
+        *self == PRESCALER_A::DIV_128
+    }
+}
+#[doc = "Field `PRESCALER` writer - Prescaler of PWM_CLK"]
+pub type PRESCALER_W<'a, const O: u8> =
+    crate::FieldWriterSafe<'a, u32, PRESCALER_SPEC, u8, PRESCALER_A, 3, O>;
+impl<'a, const O: u8> PRESCALER_W<'a, O> {
+    #[doc = "Divide by 1 (16 MHz)"]
+    #[inline(always)]
+    pub fn div_1(self) -> &'a mut W {
+        self.variant(PRESCALER_A::DIV_1)
+    }
+    #[doc = "Divide by 2 (8 MHz)"]
+    #[inline(always)]
+    pub fn div_2(self) -> &'a mut W {
+        self.variant(PRESCALER_A::DIV_2)
+    }
+    #[doc = "Divide by 4 (4 MHz)"]
+    #[inline(always)]
+    pub fn div_4(self) -> &'a mut W {
+        self.variant(PRESCALER_A::DIV_4)
+    }
+    #[doc = "Divide by 8 (2 MHz)"]
+    #[inline(always)]
+    pub fn div_8(self) -> &'a mut W {
+        self.variant(PRESCALER_A::DIV_8)
+    }
+    #[doc = "Divide by 16 (1 MHz)"]
+    #[inline(always)]
+    pub fn div_16(self) -> &'a mut W {
+        self.variant(PRESCALER_A::DIV_16)
+    }
+    #[doc = "Divide by 32 (500 kHz)"]
+    #[inline(always)]
+    pub fn div_32(self) -> &'a mut W {
+        self.variant(PRESCALER_A::DIV_32)
+    }
+    #[doc = "Divide by 64 (250 kHz)"]
+    #[inline(always)]
+    pub fn div_64(self) -> &'a mut W {
+        self.variant(PRESCALER_A::DIV_64)
+    }
+    #[doc = "Divide by 128 (125 kHz)"]
+    #[inline(always)]
+    pub fn div_128(self) -> &'a mut W {
+        self.variant(PRESCALER_A::DIV_128)
+    }
+}
+impl R {
+    #[doc = "Bits 0:2 - Prescaler of PWM_CLK"]
+    #[inline(always)]
+    pub fn prescaler(&self) -> PRESCALER_R {
+        PRESCALER_R::new((self.bits & 7) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:2 - Prescaler of PWM_CLK"]
+    #[inline(always)]
+    pub fn prescaler(&mut self) -> PRESCALER_W<0> {
+        PRESCALER_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Configuration for PWM_CLK\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prescaler](index.html) module"]
+pub struct PRESCALER_SPEC;
+impl crate::RegisterSpec for PRESCALER_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [prescaler::R](R) reader structure"]
+impl crate::Readable for PRESCALER_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [prescaler::W](W) writer structure"]
+impl crate::Writable for PRESCALER_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PRESCALER to value 0"]
+impl crate::Resettable for PRESCALER_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf9160-pac/src/pwm0_ns/psel.rs

@@ -0,0 +1,10 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct PSEL {
+    #[doc = "0x00..0x10 - Description collection: Output pin select for PWM channel n"]
+    pub out: [OUT; 4],
+}
+#[doc = "OUT (rw) register accessor: an alias for `Reg<OUT_SPEC>`"]
+pub type OUT = crate::Reg<out::OUT_SPEC>;
+#[doc = "Description collection: Output pin select for PWM channel n"]
+pub mod out;

vendor/nrf9160-pac/src/pwm0_ns/psel/out.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `OUT[%s]` reader"]
+pub struct R(crate::R<OUT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<OUT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<OUT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<OUT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `OUT[%s]` writer"]
+pub struct W(crate::W<OUT_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<OUT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<OUT_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<OUT_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `PIN` reader - Pin number"]
+pub type PIN_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `PIN` writer - Pin number"]
+pub type PIN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, OUT_SPEC, u8, u8, 5, O>;
+#[doc = "Field `CONNECT` reader - Connection"]
+pub type CONNECT_R = crate::BitReader<CONNECT_A>;
+#[doc = "Connection\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum CONNECT_A {
+    #[doc = "1: Disconnect"]
+    DISCONNECTED = 1,
+    #[doc = "0: Connect"]
+    CONNECTED = 0,
+}
+impl From<CONNECT_A> for bool {
+    #[inline(always)]
+    fn from(variant: CONNECT_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl CONNECT_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CONNECT_A {
+        match self.bits {
+            true => CONNECT_A::DISCONNECTED,
+            false => CONNECT_A::CONNECTED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISCONNECTED`"]
+    #[inline(always)]
+    pub fn is_disconnected(&self) -> bool {
+        *self == CONNECT_A::DISCONNECTED
+    }
+    #[doc = "Checks if the value of the field is `CONNECTED`"]
+    #[inline(always)]
+    pub fn is_connected(&self) -> bool {
+        *self == CONNECT_A::CONNECTED
+    }
+}
+#[doc = "Field `CONNECT` writer - Connection"]
+pub type CONNECT_W<'a, const O: u8> = crate::BitWriter<'a, u32, OUT_SPEC, CONNECT_A, O>;
+impl<'a, const O: u8> CONNECT_W<'a, O> {
+    #[doc = "Disconnect"]
+    #[inline(always)]
+    pub fn disconnected(self) -> &'a mut W {
+        self.variant(CONNECT_A::DISCONNECTED)
+    }
+    #[doc = "Connect"]
+    #[inline(always)]
+    pub fn connected(self) -> &'a mut W {
+        self.variant(CONNECT_A::CONNECTED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:4 - Pin number"]
+    #[inline(always)]
+    pub fn pin(&self) -> PIN_R {
+        PIN_R::new((self.bits & 0x1f) as u8)
+    }
+    #[doc = "Bit 31 - Connection"]
+    #[inline(always)]
+    pub fn connect(&self) -> CONNECT_R {
+        CONNECT_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:4 - Pin number"]
+    #[inline(always)]
+    pub fn pin(&mut self) -> PIN_W<0> {
+        PIN_W::new(self)
+    }
+    #[doc = "Bit 31 - Connection"]
+    #[inline(always)]
+    pub fn connect(&mut self) -> CONNECT_W<31> {
+        CONNECT_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description collection: Output pin select for PWM channel n\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [out](index.html) module"]
+pub struct OUT_SPEC;
+impl crate::RegisterSpec for OUT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [out::R](R) reader structure"]
+impl crate::Readable for OUT_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [out::W](W) writer structure"]
+impl crate::Writable for OUT_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets OUT[%s]
+to value 0xffff_ffff"]
+impl crate::Resettable for OUT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0xffff_ffff
+    }
+}

vendor/nrf9160-pac/src/pwm0_ns/publish_loopsdone.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `PUBLISH_LOOPSDONE` reader"]
+pub struct R(crate::R<PUBLISH_LOOPSDONE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PUBLISH_LOOPSDONE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PUBLISH_LOOPSDONE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PUBLISH_LOOPSDONE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PUBLISH_LOOPSDONE` writer"]
+pub struct W(crate::W<PUBLISH_LOOPSDONE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PUBLISH_LOOPSDONE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PUBLISH_LOOPSDONE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PUBLISH_LOOPSDONE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - Channel that event LOOPSDONE will publish to."]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - Channel that event LOOPSDONE will publish to."]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, PUBLISH_LOOPSDONE_SPEC, u8, u8, 4, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable publishing"]
+    DISABLED = 0,
+    #[doc = "1: Enable publishing"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PUBLISH_LOOPSDONE_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable publishing"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable publishing"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:3 - Channel that event LOOPSDONE will publish to."]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0x0f) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:3 - Channel that event LOOPSDONE will publish to."]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Publish configuration for event LOOPSDONE\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [publish_loopsdone](index.html) module"]
+pub struct PUBLISH_LOOPSDONE_SPEC;
+impl crate::RegisterSpec for PUBLISH_LOOPSDONE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [publish_loopsdone::R](R) reader structure"]
+impl crate::Readable for PUBLISH_LOOPSDONE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [publish_loopsdone::W](W) writer structure"]
+impl crate::Writable for PUBLISH_LOOPSDONE_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PUBLISH_LOOPSDONE to value 0"]
+impl crate::Resettable for PUBLISH_LOOPSDONE_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf9160-pac/src/pwm0_ns/publish_pwmperiodend.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `PUBLISH_PWMPERIODEND` reader"]
+pub struct R(crate::R<PUBLISH_PWMPERIODEND_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PUBLISH_PWMPERIODEND_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PUBLISH_PWMPERIODEND_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PUBLISH_PWMPERIODEND_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PUBLISH_PWMPERIODEND` writer"]
+pub struct W(crate::W<PUBLISH_PWMPERIODEND_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PUBLISH_PWMPERIODEND_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PUBLISH_PWMPERIODEND_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PUBLISH_PWMPERIODEND_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - Channel that event PWMPERIODEND will publish to."]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - Channel that event PWMPERIODEND will publish to."]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, PUBLISH_PWMPERIODEND_SPEC, u8, u8, 4, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable publishing"]
+    DISABLED = 0,
+    #[doc = "1: Enable publishing"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PUBLISH_PWMPERIODEND_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable publishing"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable publishing"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:3 - Channel that event PWMPERIODEND will publish to."]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0x0f) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:3 - Channel that event PWMPERIODEND will publish to."]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Publish configuration for event PWMPERIODEND\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [publish_pwmperiodend](index.html) module"]
+pub struct PUBLISH_PWMPERIODEND_SPEC;
+impl crate::RegisterSpec for PUBLISH_PWMPERIODEND_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [publish_pwmperiodend::R](R) reader structure"]
+impl crate::Readable for PUBLISH_PWMPERIODEND_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [publish_pwmperiodend::W](W) writer structure"]
+impl crate::Writable for PUBLISH_PWMPERIODEND_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PUBLISH_PWMPERIODEND to value 0"]
+impl crate::Resettable for PUBLISH_PWMPERIODEND_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf9160-pac/src/pwm0_ns/publish_seqend.rs

@@ -0,0 +1,145 @@
+#[doc = "Register `PUBLISH_SEQEND[%s]` reader"]
+pub struct R(crate::R<PUBLISH_SEQEND_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PUBLISH_SEQEND_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PUBLISH_SEQEND_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PUBLISH_SEQEND_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PUBLISH_SEQEND[%s]` writer"]
+pub struct W(crate::W<PUBLISH_SEQEND_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PUBLISH_SEQEND_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PUBLISH_SEQEND_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PUBLISH_SEQEND_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - Channel that event SEQEND\\[n\\]
+will publish to."]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - Channel that event SEQEND\\[n\\]
+will publish to."]
+pub type CHIDX_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PUBLISH_SEQEND_SPEC, u8, u8, 4, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable publishing"]
+    DISABLED = 0,
+    #[doc = "1: Enable publishing"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PUBLISH_SEQEND_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable publishing"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable publishing"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:3 - Channel that event SEQEND\\[n\\]
+will publish to."]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0x0f) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:3 - Channel that event SEQEND\\[n\\]
+will publish to."]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description collection: Publish configuration for event SEQEND\\[n\\]\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [publish_seqend](index.html) module"]
+pub struct PUBLISH_SEQEND_SPEC;
+impl crate::RegisterSpec for PUBLISH_SEQEND_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [publish_seqend::R](R) reader structure"]
+impl crate::Readable for PUBLISH_SEQEND_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [publish_seqend::W](W) writer structure"]
+impl crate::Writable for PUBLISH_SEQEND_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PUBLISH_SEQEND[%s]
+to value 0"]
+impl crate::Resettable for PUBLISH_SEQEND_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf9160-pac/src/pwm0_ns/publish_seqstarted.rs

@@ -0,0 +1,146 @@
+#[doc = "Register `PUBLISH_SEQSTARTED[%s]` reader"]
+pub struct R(crate::R<PUBLISH_SEQSTARTED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PUBLISH_SEQSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PUBLISH_SEQSTARTED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PUBLISH_SEQSTARTED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PUBLISH_SEQSTARTED[%s]` writer"]
+pub struct W(crate::W<PUBLISH_SEQSTARTED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PUBLISH_SEQSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PUBLISH_SEQSTARTED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PUBLISH_SEQSTARTED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - Channel that event SEQSTARTED\\[n\\]
+will publish to."]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - Channel that event SEQSTARTED\\[n\\]
+will publish to."]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, PUBLISH_SEQSTARTED_SPEC, u8, u8, 4, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable publishing"]
+    DISABLED = 0,
+    #[doc = "1: Enable publishing"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PUBLISH_SEQSTARTED_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable publishing"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable publishing"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:3 - Channel that event SEQSTARTED\\[n\\]
+will publish to."]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0x0f) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:3 - Channel that event SEQSTARTED\\[n\\]
+will publish to."]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description collection: Publish configuration for event SEQSTARTED\\[n\\]\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [publish_seqstarted](index.html) module"]
+pub struct PUBLISH_SEQSTARTED_SPEC;
+impl crate::RegisterSpec for PUBLISH_SEQSTARTED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [publish_seqstarted::R](R) reader structure"]
+impl crate::Readable for PUBLISH_SEQSTARTED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [publish_seqstarted::W](W) writer structure"]
+impl crate::Writable for PUBLISH_SEQSTARTED_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PUBLISH_SEQSTARTED[%s]
+to value 0"]
+impl crate::Resettable for PUBLISH_SEQSTARTED_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf9160-pac/src/pwm0_ns/publish_stopped.rs

@@ -0,0 +1,140 @@
+#[doc = "Register `PUBLISH_STOPPED` reader"]
+pub struct R(crate::R<PUBLISH_STOPPED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PUBLISH_STOPPED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PUBLISH_STOPPED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PUBLISH_STOPPED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PUBLISH_STOPPED` writer"]
+pub struct W(crate::W<PUBLISH_STOPPED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PUBLISH_STOPPED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PUBLISH_STOPPED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PUBLISH_STOPPED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - Channel that event STOPPED will publish to."]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - Channel that event STOPPED will publish to."]
+pub type CHIDX_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PUBLISH_STOPPED_SPEC, u8, u8, 4, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable publishing"]
+    DISABLED = 0,
+    #[doc = "1: Enable publishing"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PUBLISH_STOPPED_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable publishing"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable publishing"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:3 - Channel that event STOPPED will publish to."]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0x0f) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:3 - Channel that event STOPPED will publish to."]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Publish configuration for event STOPPED\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [publish_stopped](index.html) module"]
+pub struct PUBLISH_STOPPED_SPEC;
+impl crate::RegisterSpec for PUBLISH_STOPPED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [publish_stopped::R](R) reader structure"]
+impl crate::Readable for PUBLISH_STOPPED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [publish_stopped::W](W) writer structure"]
+impl crate::Writable for PUBLISH_STOPPED_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PUBLISH_STOPPED to value 0"]
+impl crate::Resettable for PUBLISH_STOPPED_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf9160-pac/src/pwm0_ns/seq.rs

@@ -0,0 +1,28 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct SEQ {
+    #[doc = "0x00 - Description cluster: Beginning address in RAM of this sequence"]
+    pub ptr: PTR,
+    #[doc = "0x04 - Description cluster: Number of values (duty cycles) in this sequence"]
+    pub cnt: CNT,
+    #[doc = "0x08 - Description cluster: Number of additional PWM periods between samples loaded into compare register"]
+    pub refresh: REFRESH,
+    #[doc = "0x0c - Description cluster: Time added after the sequence"]
+    pub enddelay: ENDDELAY,
+}
+#[doc = "PTR (rw) register accessor: an alias for `Reg<PTR_SPEC>`"]
+pub type PTR = crate::Reg<ptr::PTR_SPEC>;
+#[doc = "Description cluster: Beginning address in RAM of this sequence"]
+pub mod ptr;
+#[doc = "CNT (rw) register accessor: an alias for `Reg<CNT_SPEC>`"]
+pub type CNT = crate::Reg<cnt::CNT_SPEC>;
+#[doc = "Description cluster: Number of values (duty cycles) in this sequence"]
+pub mod cnt;
+#[doc = "REFRESH (rw) register accessor: an alias for `Reg<REFRESH_SPEC>`"]
+pub type REFRESH = crate::Reg<refresh::REFRESH_SPEC>;
+#[doc = "Description cluster: Number of additional PWM periods between samples loaded into compare register"]
+pub mod refresh;
+#[doc = "ENDDELAY (rw) register accessor: an alias for `Reg<ENDDELAY_SPEC>`"]
+pub type ENDDELAY = crate::Reg<enddelay::ENDDELAY_SPEC>;
+#[doc = "Description cluster: Time added after the sequence"]
+pub mod enddelay;

vendor/nrf9160-pac/src/pwm0_ns/seq/cnt.rs

@@ -0,0 +1,115 @@
+#[doc = "Register `CNT` reader"]
+pub struct R(crate::R<CNT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CNT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CNT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CNT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CNT` writer"]
+pub struct W(crate::W<CNT_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CNT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CNT_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CNT_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CNT` reader - Number of values (duty cycles) in this sequence"]
+pub type CNT_R = crate::FieldReader<u16, CNT_A>;
+#[doc = "Number of values (duty cycles) in this sequence\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u16)]
+pub enum CNT_A {
+    #[doc = "0: Sequence is disabled, and shall not be started as it is empty"]
+    DISABLED = 0,
+}
+impl From<CNT_A> for u16 {
+    #[inline(always)]
+    fn from(variant: CNT_A) -> Self {
+        variant as _
+    }
+}
+impl CNT_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<CNT_A> {
+        match self.bits {
+            0 => Some(CNT_A::DISABLED),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == CNT_A::DISABLED
+    }
+}
+#[doc = "Field `CNT` writer - Number of values (duty cycles) in this sequence"]
+pub type CNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CNT_SPEC, u16, CNT_A, 15, O>;
+impl<'a, const O: u8> CNT_W<'a, O> {
+    #[doc = "Sequence is disabled, and shall not be started as it is empty"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(CNT_A::DISABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:14 - Number of values (duty cycles) in this sequence"]
+    #[inline(always)]
+    pub fn cnt(&self) -> CNT_R {
+        CNT_R::new((self.bits & 0x7fff) as u16)
+    }
+}
+impl W {
+    #[doc = "Bits 0:14 - Number of values (duty cycles) in this sequence"]
+    #[inline(always)]
+    pub fn cnt(&mut self) -> CNT_W<0> {
+        CNT_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description cluster: Number of values (duty cycles) in this sequence\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](index.html) module"]
+pub struct CNT_SPEC;
+impl crate::RegisterSpec for CNT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [cnt::R](R) reader structure"]
+impl crate::Readable for CNT_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [cnt::W](W) writer structure"]
+impl crate::Writable for CNT_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CNT to value 0"]
+impl crate::Resettable for CNT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf9160-pac/src/pwm0_ns/seq/enddelay.rs

@@ -0,0 +1,80 @@
+#[doc = "Register `ENDDELAY` reader"]
+pub struct R(crate::R<ENDDELAY_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ENDDELAY_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ENDDELAY_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ENDDELAY_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ENDDELAY` writer"]
+pub struct W(crate::W<ENDDELAY_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ENDDELAY_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ENDDELAY_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ENDDELAY_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CNT` reader - Time added after the sequence in PWM periods"]
+pub type CNT_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `CNT` writer - Time added after the sequence in PWM periods"]
+pub type CNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ENDDELAY_SPEC, u32, u32, 24, O>;
+impl R {
+    #[doc = "Bits 0:23 - Time added after the sequence in PWM periods"]
+    #[inline(always)]
+    pub fn cnt(&self) -> CNT_R {
+        CNT_R::new((self.bits & 0x00ff_ffff) as u32)
+    }
+}
+impl W {
+    #[doc = "Bits 0:23 - Time added after the sequence in PWM periods"]
+    #[inline(always)]
+    pub fn cnt(&mut self) -> CNT_W<0> {
+        CNT_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description cluster: Time added after the sequence\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [enddelay](index.html) module"]
+pub struct ENDDELAY_SPEC;
+impl crate::RegisterSpec for ENDDELAY_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [enddelay::R](R) reader structure"]
+impl crate::Readable for ENDDELAY_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [enddelay::W](W) writer structure"]
+impl crate::Writable for ENDDELAY_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets ENDDELAY to value 0"]
+impl crate::Resettable for ENDDELAY_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf9160-pac/src/pwm0_ns/seq/ptr.rs

@@ -0,0 +1,80 @@
+#[doc = "Register `PTR` reader"]
+pub struct R(crate::R<PTR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PTR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PTR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PTR` writer"]
+pub struct W(crate::W<PTR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PTR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PTR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `PTR` reader - Beginning address in RAM of this sequence"]
+pub type PTR_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `PTR` writer - Beginning address in RAM of this sequence"]
+pub type PTR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PTR_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - Beginning address in RAM of this sequence"]
+    #[inline(always)]
+    pub fn ptr(&self) -> PTR_R {
+        PTR_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Beginning address in RAM of this sequence"]
+    #[inline(always)]
+    pub fn ptr(&mut self) -> PTR_W<0> {
+        PTR_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description cluster: Beginning address in RAM of this sequence\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ptr](index.html) module"]
+pub struct PTR_SPEC;
+impl crate::RegisterSpec for PTR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ptr::R](R) reader structure"]
+impl crate::Readable for PTR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ptr::W](W) writer structure"]
+impl crate::Writable for PTR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PTR to value 0"]
+impl crate::Resettable for PTR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf9160-pac/src/pwm0_ns/seq/refresh.rs

@@ -0,0 +1,115 @@
+#[doc = "Register `REFRESH` reader"]
+pub struct R(crate::R<REFRESH_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<REFRESH_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<REFRESH_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<REFRESH_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `REFRESH` writer"]
+pub struct W(crate::W<REFRESH_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<REFRESH_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<REFRESH_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<REFRESH_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CNT` reader - Number of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods)"]
+pub type CNT_R = crate::FieldReader<u32, CNT_A>;
+#[doc = "Number of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods)\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u32)]
+pub enum CNT_A {
+    #[doc = "0: Update every PWM period"]
+    CONTINUOUS = 0,
+}
+impl From<CNT_A> for u32 {
+    #[inline(always)]
+    fn from(variant: CNT_A) -> Self {
+        variant as _
+    }
+}
+impl CNT_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<CNT_A> {
+        match self.bits {
+            0 => Some(CNT_A::CONTINUOUS),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `CONTINUOUS`"]
+    #[inline(always)]
+    pub fn is_continuous(&self) -> bool {
+        *self == CNT_A::CONTINUOUS
+    }
+}
+#[doc = "Field `CNT` writer - Number of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods)"]
+pub type CNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, REFRESH_SPEC, u32, CNT_A, 24, O>;
+impl<'a, const O: u8> CNT_W<'a, O> {
+    #[doc = "Update every PWM period"]
+    #[inline(always)]
+    pub fn continuous(self) -> &'a mut W {
+        self.variant(CNT_A::CONTINUOUS)
+    }
+}
+impl R {
+    #[doc = "Bits 0:23 - Number of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods)"]
+    #[inline(always)]
+    pub fn cnt(&self) -> CNT_R {
+        CNT_R::new((self.bits & 0x00ff_ffff) as u32)
+    }
+}
+impl W {
+    #[doc = "Bits 0:23 - Number of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods)"]
+    #[inline(always)]
+    pub fn cnt(&mut self) -> CNT_W<0> {
+        CNT_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description cluster: Number of additional PWM periods between samples loaded into compare register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [refresh](index.html) module"]
+pub struct REFRESH_SPEC;
+impl crate::RegisterSpec for REFRESH_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [refresh::R](R) reader structure"]
+impl crate::Readable for REFRESH_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [refresh::W](W) writer structure"]
+impl crate::Writable for REFRESH_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets REFRESH to value 0x01"]
+impl crate::Resettable for REFRESH_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x01
+    }
+}

vendor/nrf9160-pac/src/pwm0_ns/shorts.rs

@@ -0,0 +1,381 @@
+#[doc = "Register `SHORTS` reader"]
+pub struct R(crate::R<SHORTS_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SHORTS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SHORTS_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SHORTS_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SHORTS` writer"]
+pub struct W(crate::W<SHORTS_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SHORTS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SHORTS_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SHORTS_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `SEQEND0_STOP` reader - Shortcut between event SEQEND\\[0\\]
+and task STOP"]
+pub type SEQEND0_STOP_R = crate::BitReader<SEQEND0_STOP_A>;
+#[doc = "Shortcut between event SEQEND\\[0\\]
+and task STOP\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SEQEND0_STOP_A {
+    #[doc = "0: Disable shortcut"]
+    DISABLED = 0,
+    #[doc = "1: Enable shortcut"]
+    ENABLED = 1,
+}
+impl From<SEQEND0_STOP_A> for bool {
+    #[inline(always)]
+    fn from(variant: SEQEND0_STOP_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl SEQEND0_STOP_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> SEQEND0_STOP_A {
+        match self.bits {
+            false => SEQEND0_STOP_A::DISABLED,
+            true => SEQEND0_STOP_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == SEQEND0_STOP_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == SEQEND0_STOP_A::ENABLED
+    }
+}
+#[doc = "Field `SEQEND0_STOP` writer - Shortcut between event SEQEND\\[0\\]
+and task STOP"]
+pub type SEQEND0_STOP_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, SHORTS_SPEC, SEQEND0_STOP_A, O>;
+impl<'a, const O: u8> SEQEND0_STOP_W<'a, O> {
+    #[doc = "Disable shortcut"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(SEQEND0_STOP_A::DISABLED)
+    }
+    #[doc = "Enable shortcut"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(SEQEND0_STOP_A::ENABLED)
+    }
+}
+#[doc = "Field `SEQEND1_STOP` reader - Shortcut between event SEQEND\\[1\\]
+and task STOP"]
+pub type SEQEND1_STOP_R = crate::BitReader<SEQEND1_STOP_A>;
+#[doc = "Shortcut between event SEQEND\\[1\\]
+and task STOP\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SEQEND1_STOP_A {
+    #[doc = "0: Disable shortcut"]
+    DISABLED = 0,
+    #[doc = "1: Enable shortcut"]
+    ENABLED = 1,
+}
+impl From<SEQEND1_STOP_A> for bool {
+    #[inline(always)]
+    fn from(variant: SEQEND1_STOP_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl SEQEND1_STOP_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> SEQEND1_STOP_A {
+        match self.bits {
+            false => SEQEND1_STOP_A::DISABLED,
+            true => SEQEND1_STOP_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == SEQEND1_STOP_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == SEQEND1_STOP_A::ENABLED
+    }
+}
+#[doc = "Field `SEQEND1_STOP` writer - Shortcut between event SEQEND\\[1\\]
+and task STOP"]
+pub type SEQEND1_STOP_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, SHORTS_SPEC, SEQEND1_STOP_A, O>;
+impl<'a, const O: u8> SEQEND1_STOP_W<'a, O> {
+    #[doc = "Disable shortcut"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(SEQEND1_STOP_A::DISABLED)
+    }
+    #[doc = "Enable shortcut"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(SEQEND1_STOP_A::ENABLED)
+    }
+}
+#[doc = "Field `LOOPSDONE_SEQSTART0` reader - Shortcut between event LOOPSDONE and task SEQSTART\\[0\\]"]
+pub type LOOPSDONE_SEQSTART0_R = crate::BitReader<LOOPSDONE_SEQSTART0_A>;
+#[doc = "Shortcut between event LOOPSDONE and task SEQSTART\\[0\\]\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum LOOPSDONE_SEQSTART0_A {
+    #[doc = "0: Disable shortcut"]
+    DISABLED = 0,
+    #[doc = "1: Enable shortcut"]
+    ENABLED = 1,
+}
+impl From<LOOPSDONE_SEQSTART0_A> for bool {
+    #[inline(always)]
+    fn from(variant: LOOPSDONE_SEQSTART0_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl LOOPSDONE_SEQSTART0_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> LOOPSDONE_SEQSTART0_A {
+        match self.bits {
+            false => LOOPSDONE_SEQSTART0_A::DISABLED,
+            true => LOOPSDONE_SEQSTART0_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == LOOPSDONE_SEQSTART0_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == LOOPSDONE_SEQSTART0_A::ENABLED
+    }
+}
+#[doc = "Field `LOOPSDONE_SEQSTART0` writer - Shortcut between event LOOPSDONE and task SEQSTART\\[0\\]"]
+pub type LOOPSDONE_SEQSTART0_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, SHORTS_SPEC, LOOPSDONE_SEQSTART0_A, O>;
+impl<'a, const O: u8> LOOPSDONE_SEQSTART0_W<'a, O> {
+    #[doc = "Disable shortcut"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(LOOPSDONE_SEQSTART0_A::DISABLED)
+    }
+    #[doc = "Enable shortcut"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(LOOPSDONE_SEQSTART0_A::ENABLED)
+    }
+}
+#[doc = "Field `LOOPSDONE_SEQSTART1` reader - Shortcut between event LOOPSDONE and task SEQSTART\\[1\\]"]
+pub type LOOPSDONE_SEQSTART1_R = crate::BitReader<LOOPSDONE_SEQSTART1_A>;
+#[doc = "Shortcut between event LOOPSDONE and task SEQSTART\\[1\\]\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum LOOPSDONE_SEQSTART1_A {
+    #[doc = "0: Disable shortcut"]
+    DISABLED = 0,
+    #[doc = "1: Enable shortcut"]
+    ENABLED = 1,
+}
+impl From<LOOPSDONE_SEQSTART1_A> for bool {
+    #[inline(always)]
+    fn from(variant: LOOPSDONE_SEQSTART1_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl LOOPSDONE_SEQSTART1_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> LOOPSDONE_SEQSTART1_A {
+        match self.bits {
+            false => LOOPSDONE_SEQSTART1_A::DISABLED,
+            true => LOOPSDONE_SEQSTART1_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == LOOPSDONE_SEQSTART1_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == LOOPSDONE_SEQSTART1_A::ENABLED
+    }
+}
+#[doc = "Field `LOOPSDONE_SEQSTART1` writer - Shortcut between event LOOPSDONE and task SEQSTART\\[1\\]"]
+pub type LOOPSDONE_SEQSTART1_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, SHORTS_SPEC, LOOPSDONE_SEQSTART1_A, O>;
+impl<'a, const O: u8> LOOPSDONE_SEQSTART1_W<'a, O> {
+    #[doc = "Disable shortcut"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(LOOPSDONE_SEQSTART1_A::DISABLED)
+    }
+    #[doc = "Enable shortcut"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(LOOPSDONE_SEQSTART1_A::ENABLED)
+    }
+}
+#[doc = "Field `LOOPSDONE_STOP` reader - Shortcut between event LOOPSDONE and task STOP"]
+pub type LOOPSDONE_STOP_R = crate::BitReader<LOOPSDONE_STOP_A>;
+#[doc = "Shortcut between event LOOPSDONE and task STOP\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum LOOPSDONE_STOP_A {
+    #[doc = "0: Disable shortcut"]
+    DISABLED = 0,
+    #[doc = "1: Enable shortcut"]
+    ENABLED = 1,
+}
+impl From<LOOPSDONE_STOP_A> for bool {
+    #[inline(always)]
+    fn from(variant: LOOPSDONE_STOP_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl LOOPSDONE_STOP_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> LOOPSDONE_STOP_A {
+        match self.bits {
+            false => LOOPSDONE_STOP_A::DISABLED,
+            true => LOOPSDONE_STOP_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == LOOPSDONE_STOP_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == LOOPSDONE_STOP_A::ENABLED
+    }
+}
+#[doc = "Field `LOOPSDONE_STOP` writer - Shortcut between event LOOPSDONE and task STOP"]
+pub type LOOPSDONE_STOP_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, SHORTS_SPEC, LOOPSDONE_STOP_A, O>;
+impl<'a, const O: u8> LOOPSDONE_STOP_W<'a, O> {
+    #[doc = "Disable shortcut"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(LOOPSDONE_STOP_A::DISABLED)
+    }
+    #[doc = "Enable shortcut"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(LOOPSDONE_STOP_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Shortcut between event SEQEND\\[0\\]
+and task STOP"]
+    #[inline(always)]
+    pub fn seqend0_stop(&self) -> SEQEND0_STOP_R {
+        SEQEND0_STOP_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Shortcut between event SEQEND\\[1\\]
+and task STOP"]
+    #[inline(always)]
+    pub fn seqend1_stop(&self) -> SEQEND1_STOP_R {
+        SEQEND1_STOP_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - Shortcut between event LOOPSDONE and task SEQSTART\\[0\\]"]
+    #[inline(always)]
+    pub fn loopsdone_seqstart0(&self) -> LOOPSDONE_SEQSTART0_R {
+        LOOPSDONE_SEQSTART0_R::new(((self.bits >> 2) & 1) != 0)
+    }
+    #[doc = "Bit 3 - Shortcut between event LOOPSDONE and task SEQSTART\\[1\\]"]
+    #[inline(always)]
+    pub fn loopsdone_seqstart1(&self) -> LOOPSDONE_SEQSTART1_R {
+        LOOPSDONE_SEQSTART1_R::new(((self.bits >> 3) & 1) != 0)
+    }
+    #[doc = "Bit 4 - Shortcut between event LOOPSDONE and task STOP"]
+    #[inline(always)]
+    pub fn loopsdone_stop(&self) -> LOOPSDONE_STOP_R {
+        LOOPSDONE_STOP_R::new(((self.bits >> 4) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Shortcut between event SEQEND\\[0\\]
+and task STOP"]
+    #[inline(always)]
+    pub fn seqend0_stop(&mut self) -> SEQEND0_STOP_W<0> {
+        SEQEND0_STOP_W::new(self)
+    }
+    #[doc = "Bit 1 - Shortcut between event SEQEND\\[1\\]
+and task STOP"]
+    #[inline(always)]
+    pub fn seqend1_stop(&mut self) -> SEQEND1_STOP_W<1> {
+        SEQEND1_STOP_W::new(self)
+    }
+    #[doc = "Bit 2 - Shortcut between event LOOPSDONE and task SEQSTART\\[0\\]"]
+    #[inline(always)]
+    pub fn loopsdone_seqstart0(&mut self) -> LOOPSDONE_SEQSTART0_W<2> {
+        LOOPSDONE_SEQSTART0_W::new(self)
+    }
+    #[doc = "Bit 3 - Shortcut between event LOOPSDONE and task SEQSTART\\[1\\]"]
+    #[inline(always)]
+    pub fn loopsdone_seqstart1(&mut self) -> LOOPSDONE_SEQSTART1_W<3> {
+        LOOPSDONE_SEQSTART1_W::new(self)
+    }
+    #[doc = "Bit 4 - Shortcut between event LOOPSDONE and task STOP"]
+    #[inline(always)]
+    pub fn loopsdone_stop(&mut self) -> LOOPSDONE_STOP_W<4> {
+        LOOPSDONE_STOP_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Shortcuts between local events and tasks\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [shorts](index.html) module"]
+pub struct SHORTS_SPEC;
+impl crate::RegisterSpec for SHORTS_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [shorts::R](R) reader structure"]
+impl crate::Readable for SHORTS_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [shorts::W](W) writer structure"]
+impl crate::Writable for SHORTS_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SHORTS to value 0"]
+impl crate::Resettable for SHORTS_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf9160-pac/src/pwm0_ns/subscribe_nextstep.rs

@@ -0,0 +1,141 @@
+#[doc = "Register `SUBSCRIBE_NEXTSTEP` reader"]
+pub struct R(crate::R<SUBSCRIBE_NEXTSTEP_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_NEXTSTEP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_NEXTSTEP_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_NEXTSTEP_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_NEXTSTEP` writer"]
+pub struct W(crate::W<SUBSCRIBE_NEXTSTEP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_NEXTSTEP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_NEXTSTEP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_NEXTSTEP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - Channel that task NEXTSTEP will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - Channel that task NEXTSTEP will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, SUBSCRIBE_NEXTSTEP_SPEC, u8, u8, 4, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_NEXTSTEP_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:3 - Channel that task NEXTSTEP will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0x0f) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:3 - Channel that task NEXTSTEP will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task NEXTSTEP\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_nextstep](index.html) module"]
+pub struct SUBSCRIBE_NEXTSTEP_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_NEXTSTEP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_nextstep::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_NEXTSTEP_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_nextstep::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_NEXTSTEP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_NEXTSTEP to value 0"]
+impl crate::Resettable for SUBSCRIBE_NEXTSTEP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf9160-pac/src/pwm0_ns/subscribe_seqstart.rs

@@ -0,0 +1,146 @@
+#[doc = "Register `SUBSCRIBE_SEQSTART[%s]` reader"]
+pub struct R(crate::R<SUBSCRIBE_SEQSTART_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_SEQSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_SEQSTART_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_SEQSTART_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_SEQSTART[%s]` writer"]
+pub struct W(crate::W<SUBSCRIBE_SEQSTART_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_SEQSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_SEQSTART_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_SEQSTART_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - Channel that task SEQSTART\\[n\\]
+will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - Channel that task SEQSTART\\[n\\]
+will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, SUBSCRIBE_SEQSTART_SPEC, u8, u8, 4, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_SEQSTART_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:3 - Channel that task SEQSTART\\[n\\]
+will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0x0f) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:3 - Channel that task SEQSTART\\[n\\]
+will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description collection: Subscribe configuration for task SEQSTART\\[n\\]\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_seqstart](index.html) module"]
+pub struct SUBSCRIBE_SEQSTART_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_SEQSTART_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_seqstart::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_SEQSTART_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_seqstart::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_SEQSTART_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_SEQSTART[%s]
+to value 0"]
+impl crate::Resettable for SUBSCRIBE_SEQSTART_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf9160-pac/src/pwm0_ns/subscribe_stop.rs

@@ -0,0 +1,140 @@
+#[doc = "Register `SUBSCRIBE_STOP` reader"]
+pub struct R(crate::R<SUBSCRIBE_STOP_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SUBSCRIBE_STOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SUBSCRIBE_STOP_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SUBSCRIBE_STOP_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SUBSCRIBE_STOP` writer"]
+pub struct W(crate::W<SUBSCRIBE_STOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SUBSCRIBE_STOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SUBSCRIBE_STOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SUBSCRIBE_STOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CHIDX` reader - Channel that task STOP will subscribe to"]
+pub type CHIDX_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CHIDX` writer - Channel that task STOP will subscribe to"]
+pub type CHIDX_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SUBSCRIBE_STOP_SPEC, u8, u8, 4, O>;
+#[doc = "Field `EN` reader - "]
+pub type EN_R = crate::BitReader<EN_A>;
+#[doc = "\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum EN_A {
+    #[doc = "0: Disable subscription"]
+    DISABLED = 0,
+    #[doc = "1: Enable subscription"]
+    ENABLED = 1,
+}
+impl From<EN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EN_A {
+        match self.bits {
+            false => EN_A::DISABLED,
+            true => EN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EN_A::ENABLED
+    }
+}
+#[doc = "Field `EN` writer - "]
+pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SUBSCRIBE_STOP_SPEC, EN_A, O>;
+impl<'a, const O: u8> EN_W<'a, O> {
+    #[doc = "Disable subscription"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EN_A::DISABLED)
+    }
+    #[doc = "Enable subscription"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EN_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:3 - Channel that task STOP will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&self) -> CHIDX_R {
+        CHIDX_R::new((self.bits & 0x0f) as u8)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&self) -> EN_R {
+        EN_R::new(((self.bits >> 31) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:3 - Channel that task STOP will subscribe to"]
+    #[inline(always)]
+    pub fn chidx(&mut self) -> CHIDX_W<0> {
+        CHIDX_W::new(self)
+    }
+    #[doc = "Bit 31"]
+    #[inline(always)]
+    pub fn en(&mut self) -> EN_W<31> {
+        EN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Subscribe configuration for task STOP\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [subscribe_stop](index.html) module"]
+pub struct SUBSCRIBE_STOP_SPEC;
+impl crate::RegisterSpec for SUBSCRIBE_STOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [subscribe_stop::R](R) reader structure"]
+impl crate::Readable for SUBSCRIBE_STOP_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [subscribe_stop::W](W) writer structure"]
+impl crate::Writable for SUBSCRIBE_STOP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets SUBSCRIBE_STOP to value 0"]
+impl crate::Resettable for SUBSCRIBE_STOP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf9160-pac/src/pwm0_ns/tasks_nextstep.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_NEXTSTEP` writer"]
+pub struct W(crate::W<TASKS_NEXTSTEP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_NEXTSTEP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_NEXTSTEP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_NEXTSTEP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep. Does not cause PWM generation to start if not running.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_NEXTSTEP_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_NEXTSTEP_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_NEXTSTEP_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_NEXTSTEP` writer - Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep. Does not cause PWM generation to start if not running."]
+pub type TASKS_NEXTSTEP_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_NEXTSTEP_SPEC, TASKS_NEXTSTEP_AW, O>;
+impl<'a, const O: u8> TASKS_NEXTSTEP_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_NEXTSTEP_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep. Does not cause PWM generation to start if not running."]
+    #[inline(always)]
+    pub fn tasks_nextstep(&mut self) -> TASKS_NEXTSTEP_W<0> {
+        TASKS_NEXTSTEP_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep. Does not cause PWM generation to start if not running.\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_nextstep](index.html) module"]
+pub struct TASKS_NEXTSTEP_SPEC;
+impl crate::RegisterSpec for TASKS_NEXTSTEP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_nextstep::W](W) writer structure"]
+impl crate::Writable for TASKS_NEXTSTEP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_NEXTSTEP to value 0"]
+impl crate::Resettable for TASKS_NEXTSTEP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf9160-pac/src/pwm0_ns/tasks_seqstart.rs

@@ -0,0 +1,73 @@
+#[doc = "Register `TASKS_SEQSTART[%s]` writer"]
+pub struct W(crate::W<TASKS_SEQSTART_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_SEQSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_SEQSTART_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_SEQSTART_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Loads the first PWM value on all enabled channels from sequence n, and starts playing that sequence at the rate defined in SEQ\\[n\\]REFRESH and/or DECODER.MODE. Causes PWM generation to start if not running.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_SEQSTART_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_SEQSTART_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_SEQSTART_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_SEQSTART` writer - Loads the first PWM value on all enabled channels from sequence n, and starts playing that sequence at the rate defined in SEQ\\[n\\]REFRESH and/or DECODER.MODE. Causes PWM generation to start if not running."]
+pub type TASKS_SEQSTART_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_SEQSTART_SPEC, TASKS_SEQSTART_AW, O>;
+impl<'a, const O: u8> TASKS_SEQSTART_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_SEQSTART_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Loads the first PWM value on all enabled channels from sequence n, and starts playing that sequence at the rate defined in SEQ\\[n\\]REFRESH and/or DECODER.MODE. Causes PWM generation to start if not running."]
+    #[inline(always)]
+    pub fn tasks_seqstart(&mut self) -> TASKS_SEQSTART_W<0> {
+        TASKS_SEQSTART_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description collection: Loads the first PWM value on all enabled channels from sequence n, and starts playing that sequence at the rate defined in SEQ\\[n\\]REFRESH and/or DECODER.MODE. Causes PWM generation to start if not running.\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_seqstart](index.html) module"]
+pub struct TASKS_SEQSTART_SPEC;
+impl crate::RegisterSpec for TASKS_SEQSTART_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_seqstart::W](W) writer structure"]
+impl crate::Writable for TASKS_SEQSTART_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_SEQSTART[%s]
+to value 0"]
+impl crate::Resettable for TASKS_SEQSTART_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf9160-pac/src/pwm0_ns/tasks_stop.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_STOP` writer"]
+pub struct W(crate::W<TASKS_STOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_STOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_STOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_STOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Stops PWM pulse generation on all channels at the end of current PWM period, and stops sequence playback\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum TASKS_STOP_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_STOP_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_STOP_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_STOP` writer - Stops PWM pulse generation on all channels at the end of current PWM period, and stops sequence playback"]
+pub type TASKS_STOP_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_STOP_SPEC, TASKS_STOP_AW, O>;
+impl<'a, const O: u8> TASKS_STOP_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_STOP_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Stops PWM pulse generation on all channels at the end of current PWM period, and stops sequence playback"]
+    #[inline(always)]
+    pub fn tasks_stop(&mut self) -> TASKS_STOP_W<0> {
+        TASKS_STOP_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Stops PWM pulse generation on all channels at the end of current PWM period, and stops sequence playback\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_stop](index.html) module"]
+pub struct TASKS_STOP_SPEC;
+impl crate::RegisterSpec for TASKS_STOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_stop::W](W) writer structure"]
+impl crate::Writable for TASKS_STOP_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets TASKS_STOP to value 0"]
+impl crate::Resettable for TASKS_STOP_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}