feat: add display UI with splash screen, dashboard, and RSSI sparkline

Implement full SSD1306 OLED display support:
- Splash screen on boot (1.5s) with project name, version, board
- Dashboard showing radio state, config, counters, RSSI/SNR
- RSSI history sparkline (64-sample ring buffer, 2px-wide bars)
- DisplayOn/DisplayOff host commands routed via dedicated channel
- Pure render functions against generic DrawTarget (no hardware coupling)
- Display on/off control bypasses radio task entirely

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>

vendor/nrf9160-pac/src/pwm0_ns/seq/cnt.rs

@@ -0,0 +1,115 @@
+#[doc = "Register `CNT` reader"]
+pub struct R(crate::R<CNT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CNT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CNT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CNT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CNT` writer"]
+pub struct W(crate::W<CNT_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CNT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CNT_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CNT_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CNT` reader - Number of values (duty cycles) in this sequence"]
+pub type CNT_R = crate::FieldReader<u16, CNT_A>;
+#[doc = "Number of values (duty cycles) in this sequence\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u16)]
+pub enum CNT_A {
+    #[doc = "0: Sequence is disabled, and shall not be started as it is empty"]
+    DISABLED = 0,
+}
+impl From<CNT_A> for u16 {
+    #[inline(always)]
+    fn from(variant: CNT_A) -> Self {
+        variant as _
+    }
+}
+impl CNT_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<CNT_A> {
+        match self.bits {
+            0 => Some(CNT_A::DISABLED),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == CNT_A::DISABLED
+    }
+}
+#[doc = "Field `CNT` writer - Number of values (duty cycles) in this sequence"]
+pub type CNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CNT_SPEC, u16, CNT_A, 15, O>;
+impl<'a, const O: u8> CNT_W<'a, O> {
+    #[doc = "Sequence is disabled, and shall not be started as it is empty"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(CNT_A::DISABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:14 - Number of values (duty cycles) in this sequence"]
+    #[inline(always)]
+    pub fn cnt(&self) -> CNT_R {
+        CNT_R::new((self.bits & 0x7fff) as u16)
+    }
+}
+impl W {
+    #[doc = "Bits 0:14 - Number of values (duty cycles) in this sequence"]
+    #[inline(always)]
+    pub fn cnt(&mut self) -> CNT_W<0> {
+        CNT_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description cluster: Number of values (duty cycles) in this sequence\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](index.html) module"]
+pub struct CNT_SPEC;
+impl crate::RegisterSpec for CNT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [cnt::R](R) reader structure"]
+impl crate::Readable for CNT_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [cnt::W](W) writer structure"]
+impl crate::Writable for CNT_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets CNT to value 0"]
+impl crate::Resettable for CNT_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf9160-pac/src/pwm0_ns/seq/enddelay.rs

@@ -0,0 +1,80 @@
+#[doc = "Register `ENDDELAY` reader"]
+pub struct R(crate::R<ENDDELAY_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ENDDELAY_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ENDDELAY_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ENDDELAY_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ENDDELAY` writer"]
+pub struct W(crate::W<ENDDELAY_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ENDDELAY_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ENDDELAY_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ENDDELAY_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CNT` reader - Time added after the sequence in PWM periods"]
+pub type CNT_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `CNT` writer - Time added after the sequence in PWM periods"]
+pub type CNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ENDDELAY_SPEC, u32, u32, 24, O>;
+impl R {
+    #[doc = "Bits 0:23 - Time added after the sequence in PWM periods"]
+    #[inline(always)]
+    pub fn cnt(&self) -> CNT_R {
+        CNT_R::new((self.bits & 0x00ff_ffff) as u32)
+    }
+}
+impl W {
+    #[doc = "Bits 0:23 - Time added after the sequence in PWM periods"]
+    #[inline(always)]
+    pub fn cnt(&mut self) -> CNT_W<0> {
+        CNT_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description cluster: Time added after the sequence\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [enddelay](index.html) module"]
+pub struct ENDDELAY_SPEC;
+impl crate::RegisterSpec for ENDDELAY_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [enddelay::R](R) reader structure"]
+impl crate::Readable for ENDDELAY_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [enddelay::W](W) writer structure"]
+impl crate::Writable for ENDDELAY_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets ENDDELAY to value 0"]
+impl crate::Resettable for ENDDELAY_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf9160-pac/src/pwm0_ns/seq/ptr.rs

@@ -0,0 +1,80 @@
+#[doc = "Register `PTR` reader"]
+pub struct R(crate::R<PTR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PTR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PTR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PTR` writer"]
+pub struct W(crate::W<PTR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PTR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PTR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `PTR` reader - Beginning address in RAM of this sequence"]
+pub type PTR_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `PTR` writer - Beginning address in RAM of this sequence"]
+pub type PTR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PTR_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - Beginning address in RAM of this sequence"]
+    #[inline(always)]
+    pub fn ptr(&self) -> PTR_R {
+        PTR_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Beginning address in RAM of this sequence"]
+    #[inline(always)]
+    pub fn ptr(&mut self) -> PTR_W<0> {
+        PTR_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description cluster: Beginning address in RAM of this sequence\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ptr](index.html) module"]
+pub struct PTR_SPEC;
+impl crate::RegisterSpec for PTR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ptr::R](R) reader structure"]
+impl crate::Readable for PTR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ptr::W](W) writer structure"]
+impl crate::Writable for PTR_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets PTR to value 0"]
+impl crate::Resettable for PTR_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0
+    }
+}

vendor/nrf9160-pac/src/pwm0_ns/seq/refresh.rs

@@ -0,0 +1,115 @@
+#[doc = "Register `REFRESH` reader"]
+pub struct R(crate::R<REFRESH_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<REFRESH_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<REFRESH_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<REFRESH_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `REFRESH` writer"]
+pub struct W(crate::W<REFRESH_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<REFRESH_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<REFRESH_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<REFRESH_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CNT` reader - Number of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods)"]
+pub type CNT_R = crate::FieldReader<u32, CNT_A>;
+#[doc = "Number of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods)\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq)]
+#[repr(u32)]
+pub enum CNT_A {
+    #[doc = "0: Update every PWM period"]
+    CONTINUOUS = 0,
+}
+impl From<CNT_A> for u32 {
+    #[inline(always)]
+    fn from(variant: CNT_A) -> Self {
+        variant as _
+    }
+}
+impl CNT_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<CNT_A> {
+        match self.bits {
+            0 => Some(CNT_A::CONTINUOUS),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `CONTINUOUS`"]
+    #[inline(always)]
+    pub fn is_continuous(&self) -> bool {
+        *self == CNT_A::CONTINUOUS
+    }
+}
+#[doc = "Field `CNT` writer - Number of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods)"]
+pub type CNT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, REFRESH_SPEC, u32, CNT_A, 24, O>;
+impl<'a, const O: u8> CNT_W<'a, O> {
+    #[doc = "Update every PWM period"]
+    #[inline(always)]
+    pub fn continuous(self) -> &'a mut W {
+        self.variant(CNT_A::CONTINUOUS)
+    }
+}
+impl R {
+    #[doc = "Bits 0:23 - Number of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods)"]
+    #[inline(always)]
+    pub fn cnt(&self) -> CNT_R {
+        CNT_R::new((self.bits & 0x00ff_ffff) as u32)
+    }
+}
+impl W {
+    #[doc = "Bits 0:23 - Number of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods)"]
+    #[inline(always)]
+    pub fn cnt(&mut self) -> CNT_W<0> {
+        CNT_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description cluster: Number of additional PWM periods between samples loaded into compare register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [refresh](index.html) module"]
+pub struct REFRESH_SPEC;
+impl crate::RegisterSpec for REFRESH_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [refresh::R](R) reader structure"]
+impl crate::Readable for REFRESH_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [refresh::W](W) writer structure"]
+impl crate::Writable for REFRESH_SPEC {
+    type Writer = W;
+}
+#[doc = "`reset()` method sets REFRESH to value 0x01"]
+impl crate::Resettable for REFRESH_SPEC {
+    #[inline(always)]
+    fn reset_value() -> Self::Ux {
+        0x01
+    }
+}