swaitsandClaude Opus 4.6
3102fc747a
Implement full SSD1306 OLED display support: - Splash screen on boot (1.5s) with project name, version, board - Dashboard showing radio state, config, counters, RSSI/SNR - RSSI history sparkline (64-sample ring buffer, 2px-wide bars) - DisplayOn/DisplayOff host commands routed via dedicated channel - Pure render functions against generic DrawTarget (no hardware coupling) - Display on/off control bypasses radio task entirely Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
93 lines
3.6 KiB
Rust
93 lines
3.6 KiB
Rust
#[doc = "Register `BBPD_CTRL` reader"]
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pub type R = crate::R<BBPD_CTRL_SPEC>;
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#[doc = "Register `BBPD_CTRL` writer"]
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pub type W = crate::W<BBPD_CTRL_SPEC>;
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#[doc = "Field `DC_EST_FORCE_PD` reader - "]
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pub type DC_EST_FORCE_PD_R = crate::BitReader;
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#[doc = "Field `DC_EST_FORCE_PD` writer - "]
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pub type DC_EST_FORCE_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `DC_EST_FORCE_PU` reader - "]
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pub type DC_EST_FORCE_PU_R = crate::BitReader;
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#[doc = "Field `DC_EST_FORCE_PU` writer - "]
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pub type DC_EST_FORCE_PU_W<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `FFT_FORCE_PD` reader - "]
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pub type FFT_FORCE_PD_R = crate::BitReader;
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#[doc = "Field `FFT_FORCE_PD` writer - "]
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pub type FFT_FORCE_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `FFT_FORCE_PU` reader - "]
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pub type FFT_FORCE_PU_R = crate::BitReader;
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#[doc = "Field `FFT_FORCE_PU` writer - "]
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pub type FFT_FORCE_PU_W<'a, REG> = crate::BitWriter<'a, REG>;
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impl R {
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#[doc = "Bit 0"]
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#[inline(always)]
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pub fn dc_est_force_pd(&self) -> DC_EST_FORCE_PD_R {
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DC_EST_FORCE_PD_R::new((self.bits & 1) != 0)
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}
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#[doc = "Bit 1"]
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#[inline(always)]
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pub fn dc_est_force_pu(&self) -> DC_EST_FORCE_PU_R {
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DC_EST_FORCE_PU_R::new(((self.bits >> 1) & 1) != 0)
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}
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#[doc = "Bit 2"]
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#[inline(always)]
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pub fn fft_force_pd(&self) -> FFT_FORCE_PD_R {
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FFT_FORCE_PD_R::new(((self.bits >> 2) & 1) != 0)
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}
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#[doc = "Bit 3"]
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#[inline(always)]
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pub fn fft_force_pu(&self) -> FFT_FORCE_PU_R {
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FFT_FORCE_PU_R::new(((self.bits >> 3) & 1) != 0)
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}
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}
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#[cfg(feature = "impl-register-debug")]
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impl core::fmt::Debug for R {
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fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
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f.debug_struct("BBPD_CTRL")
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.field("dc_est_force_pd", &self.dc_est_force_pd())
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.field("dc_est_force_pu", &self.dc_est_force_pu())
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.field("fft_force_pd", &self.fft_force_pd())
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.field("fft_force_pu", &self.fft_force_pu())
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.finish()
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}
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}
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impl W {
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#[doc = "Bit 0"]
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#[inline(always)]
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pub fn dc_est_force_pd(&mut self) -> DC_EST_FORCE_PD_W<BBPD_CTRL_SPEC> {
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DC_EST_FORCE_PD_W::new(self, 0)
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}
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#[doc = "Bit 1"]
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#[inline(always)]
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pub fn dc_est_force_pu(&mut self) -> DC_EST_FORCE_PU_W<BBPD_CTRL_SPEC> {
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DC_EST_FORCE_PU_W::new(self, 1)
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}
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#[doc = "Bit 2"]
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#[inline(always)]
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pub fn fft_force_pd(&mut self) -> FFT_FORCE_PD_W<BBPD_CTRL_SPEC> {
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FFT_FORCE_PD_W::new(self, 2)
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}
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#[doc = "Bit 3"]
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#[inline(always)]
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pub fn fft_force_pu(&mut self) -> FFT_FORCE_PU_W<BBPD_CTRL_SPEC> {
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FFT_FORCE_PU_W::new(self, 3)
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}
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}
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#[doc = "Baseband control register\n\nYou can [`read`](crate::Reg::read) this register and get [`bbpd_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bbpd_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
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pub struct BBPD_CTRL_SPEC;
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impl crate::RegisterSpec for BBPD_CTRL_SPEC {
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type Ux = u32;
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}
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#[doc = "`read()` method returns [`bbpd_ctrl::R`](R) reader structure"]
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impl crate::Readable for BBPD_CTRL_SPEC {}
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#[doc = "`write(|w| ..)` method takes [`bbpd_ctrl::W`](W) writer structure"]
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impl crate::Writable for BBPD_CTRL_SPEC {
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type Safety = crate::Unsafe;
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const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
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const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
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}
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#[doc = "`reset()` method sets BBPD_CTRL to value 0"]
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impl crate::Resettable for BBPD_CTRL_SPEC {
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const RESET_VALUE: u32 = 0;
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}
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