swaitsandClaude Opus 4.6
3102fc747a
Implement full SSD1306 OLED display support: - Splash screen on boot (1.5s) with project name, version, board - Dashboard showing radio state, config, counters, RSSI/SNR - RSSI history sparkline (64-sample ring buffer, 2px-wide bars) - DisplayOn/DisplayOff host commands routed via dedicated channel - Pure render functions against generic DrawTarget (no hardware coupling) - Display on/off control bypasses radio task entirely Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
155 lines
9.3 KiB
Rust
155 lines
9.3 KiB
Rust
#[doc = "Register `DCACHE_AUTOLOAD_CTRL` reader"]
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pub type R = crate::R<DCACHE_AUTOLOAD_CTRL_SPEC>;
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#[doc = "Register `DCACHE_AUTOLOAD_CTRL` writer"]
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pub type W = crate::W<DCACHE_AUTOLOAD_CTRL_SPEC>;
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#[doc = "Field `DCACHE_AUTOLOAD_SCT0_ENA` reader - The bits are used to enable the first section for autoload operation."]
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pub type DCACHE_AUTOLOAD_SCT0_ENA_R = crate::BitReader;
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#[doc = "Field `DCACHE_AUTOLOAD_SCT0_ENA` writer - The bits are used to enable the first section for autoload operation."]
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pub type DCACHE_AUTOLOAD_SCT0_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `DCACHE_AUTOLOAD_SCT1_ENA` reader - The bits are used to enable the second section for autoload operation."]
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pub type DCACHE_AUTOLOAD_SCT1_ENA_R = crate::BitReader;
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#[doc = "Field `DCACHE_AUTOLOAD_SCT1_ENA` writer - The bits are used to enable the second section for autoload operation."]
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pub type DCACHE_AUTOLOAD_SCT1_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `DCACHE_AUTOLOAD_ENA` reader - The bit is used to enable and disable autoload operation. It is combined with dcache_autoload_done. 1: enable, 0: disable."]
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pub type DCACHE_AUTOLOAD_ENA_R = crate::BitReader;
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#[doc = "Field `DCACHE_AUTOLOAD_ENA` writer - The bit is used to enable and disable autoload operation. It is combined with dcache_autoload_done. 1: enable, 0: disable."]
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pub type DCACHE_AUTOLOAD_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `DCACHE_AUTOLOAD_DONE` reader - The bit is used to indicate autoload operation is finished."]
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pub type DCACHE_AUTOLOAD_DONE_R = crate::BitReader;
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#[doc = "Field `DCACHE_AUTOLOAD_ORDER` reader - The bits are used to configure the direction of autoload. 1: descending, 0: ascending."]
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pub type DCACHE_AUTOLOAD_ORDER_R = crate::BitReader;
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#[doc = "Field `DCACHE_AUTOLOAD_ORDER` writer - The bits are used to configure the direction of autoload. 1: descending, 0: ascending."]
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pub type DCACHE_AUTOLOAD_ORDER_W<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `DCACHE_AUTOLOAD_RQST` reader - The bits are used to configure trigger conditions for autoload. 0/3: cache miss, 1: cache hit, 2: both cache miss and hit."]
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pub type DCACHE_AUTOLOAD_RQST_R = crate::FieldReader;
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#[doc = "Field `DCACHE_AUTOLOAD_RQST` writer - The bits are used to configure trigger conditions for autoload. 0/3: cache miss, 1: cache hit, 2: both cache miss and hit."]
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pub type DCACHE_AUTOLOAD_RQST_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
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#[doc = "Field `DCACHE_AUTOLOAD_SIZE` reader - The bits are used to configure the numbers of the cache block for the issuing autoload operation."]
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pub type DCACHE_AUTOLOAD_SIZE_R = crate::FieldReader;
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#[doc = "Field `DCACHE_AUTOLOAD_SIZE` writer - The bits are used to configure the numbers of the cache block for the issuing autoload operation."]
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pub type DCACHE_AUTOLOAD_SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
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#[doc = "Field `DCACHE_AUTOLOAD_BUFFER_CLEAR` reader - The bit is used to clear autoload buffer in dcache."]
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pub type DCACHE_AUTOLOAD_BUFFER_CLEAR_R = crate::BitReader;
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#[doc = "Field `DCACHE_AUTOLOAD_BUFFER_CLEAR` writer - The bit is used to clear autoload buffer in dcache."]
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pub type DCACHE_AUTOLOAD_BUFFER_CLEAR_W<'a, REG> = crate::BitWriter<'a, REG>;
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impl R {
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#[doc = "Bit 0 - The bits are used to enable the first section for autoload operation."]
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#[inline(always)]
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pub fn dcache_autoload_sct0_ena(&self) -> DCACHE_AUTOLOAD_SCT0_ENA_R {
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DCACHE_AUTOLOAD_SCT0_ENA_R::new((self.bits & 1) != 0)
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}
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#[doc = "Bit 1 - The bits are used to enable the second section for autoload operation."]
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#[inline(always)]
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pub fn dcache_autoload_sct1_ena(&self) -> DCACHE_AUTOLOAD_SCT1_ENA_R {
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DCACHE_AUTOLOAD_SCT1_ENA_R::new(((self.bits >> 1) & 1) != 0)
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}
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#[doc = "Bit 2 - The bit is used to enable and disable autoload operation. It is combined with dcache_autoload_done. 1: enable, 0: disable."]
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#[inline(always)]
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pub fn dcache_autoload_ena(&self) -> DCACHE_AUTOLOAD_ENA_R {
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DCACHE_AUTOLOAD_ENA_R::new(((self.bits >> 2) & 1) != 0)
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}
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#[doc = "Bit 3 - The bit is used to indicate autoload operation is finished."]
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#[inline(always)]
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pub fn dcache_autoload_done(&self) -> DCACHE_AUTOLOAD_DONE_R {
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DCACHE_AUTOLOAD_DONE_R::new(((self.bits >> 3) & 1) != 0)
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}
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#[doc = "Bit 4 - The bits are used to configure the direction of autoload. 1: descending, 0: ascending."]
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#[inline(always)]
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pub fn dcache_autoload_order(&self) -> DCACHE_AUTOLOAD_ORDER_R {
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DCACHE_AUTOLOAD_ORDER_R::new(((self.bits >> 4) & 1) != 0)
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}
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#[doc = "Bits 5:6 - The bits are used to configure trigger conditions for autoload. 0/3: cache miss, 1: cache hit, 2: both cache miss and hit."]
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#[inline(always)]
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pub fn dcache_autoload_rqst(&self) -> DCACHE_AUTOLOAD_RQST_R {
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DCACHE_AUTOLOAD_RQST_R::new(((self.bits >> 5) & 3) as u8)
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}
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#[doc = "Bits 7:8 - The bits are used to configure the numbers of the cache block for the issuing autoload operation."]
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#[inline(always)]
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pub fn dcache_autoload_size(&self) -> DCACHE_AUTOLOAD_SIZE_R {
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DCACHE_AUTOLOAD_SIZE_R::new(((self.bits >> 7) & 3) as u8)
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}
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#[doc = "Bit 9 - The bit is used to clear autoload buffer in dcache."]
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#[inline(always)]
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pub fn dcache_autoload_buffer_clear(&self) -> DCACHE_AUTOLOAD_BUFFER_CLEAR_R {
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DCACHE_AUTOLOAD_BUFFER_CLEAR_R::new(((self.bits >> 9) & 1) != 0)
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}
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}
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#[cfg(feature = "impl-register-debug")]
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impl core::fmt::Debug for R {
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fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
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f.debug_struct("DCACHE_AUTOLOAD_CTRL")
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.field("dcache_autoload_sct0_ena", &self.dcache_autoload_sct0_ena())
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.field("dcache_autoload_sct1_ena", &self.dcache_autoload_sct1_ena())
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.field("dcache_autoload_ena", &self.dcache_autoload_ena())
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.field("dcache_autoload_done", &self.dcache_autoload_done())
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.field("dcache_autoload_order", &self.dcache_autoload_order())
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.field("dcache_autoload_rqst", &self.dcache_autoload_rqst())
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.field("dcache_autoload_size", &self.dcache_autoload_size())
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.field(
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"dcache_autoload_buffer_clear",
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&self.dcache_autoload_buffer_clear(),
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)
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.finish()
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}
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}
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impl W {
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#[doc = "Bit 0 - The bits are used to enable the first section for autoload operation."]
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#[inline(always)]
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pub fn dcache_autoload_sct0_ena(
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&mut self,
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) -> DCACHE_AUTOLOAD_SCT0_ENA_W<DCACHE_AUTOLOAD_CTRL_SPEC> {
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DCACHE_AUTOLOAD_SCT0_ENA_W::new(self, 0)
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}
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#[doc = "Bit 1 - The bits are used to enable the second section for autoload operation."]
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#[inline(always)]
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pub fn dcache_autoload_sct1_ena(
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&mut self,
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) -> DCACHE_AUTOLOAD_SCT1_ENA_W<DCACHE_AUTOLOAD_CTRL_SPEC> {
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DCACHE_AUTOLOAD_SCT1_ENA_W::new(self, 1)
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}
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#[doc = "Bit 2 - The bit is used to enable and disable autoload operation. It is combined with dcache_autoload_done. 1: enable, 0: disable."]
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#[inline(always)]
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pub fn dcache_autoload_ena(&mut self) -> DCACHE_AUTOLOAD_ENA_W<DCACHE_AUTOLOAD_CTRL_SPEC> {
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DCACHE_AUTOLOAD_ENA_W::new(self, 2)
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}
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#[doc = "Bit 4 - The bits are used to configure the direction of autoload. 1: descending, 0: ascending."]
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#[inline(always)]
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pub fn dcache_autoload_order(&mut self) -> DCACHE_AUTOLOAD_ORDER_W<DCACHE_AUTOLOAD_CTRL_SPEC> {
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DCACHE_AUTOLOAD_ORDER_W::new(self, 4)
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}
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#[doc = "Bits 5:6 - The bits are used to configure trigger conditions for autoload. 0/3: cache miss, 1: cache hit, 2: both cache miss and hit."]
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#[inline(always)]
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pub fn dcache_autoload_rqst(&mut self) -> DCACHE_AUTOLOAD_RQST_W<DCACHE_AUTOLOAD_CTRL_SPEC> {
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DCACHE_AUTOLOAD_RQST_W::new(self, 5)
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}
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#[doc = "Bits 7:8 - The bits are used to configure the numbers of the cache block for the issuing autoload operation."]
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#[inline(always)]
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pub fn dcache_autoload_size(&mut self) -> DCACHE_AUTOLOAD_SIZE_W<DCACHE_AUTOLOAD_CTRL_SPEC> {
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DCACHE_AUTOLOAD_SIZE_W::new(self, 7)
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}
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#[doc = "Bit 9 - The bit is used to clear autoload buffer in dcache."]
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#[inline(always)]
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pub fn dcache_autoload_buffer_clear(
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&mut self,
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) -> DCACHE_AUTOLOAD_BUFFER_CLEAR_W<DCACHE_AUTOLOAD_CTRL_SPEC> {
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DCACHE_AUTOLOAD_BUFFER_CLEAR_W::new(self, 9)
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}
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}
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#[doc = "******* Description ***********\n\nYou can [`read`](crate::Reg::read) this register and get [`dcache_autoload_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dcache_autoload_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
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pub struct DCACHE_AUTOLOAD_CTRL_SPEC;
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impl crate::RegisterSpec for DCACHE_AUTOLOAD_CTRL_SPEC {
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type Ux = u32;
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}
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#[doc = "`read()` method returns [`dcache_autoload_ctrl::R`](R) reader structure"]
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impl crate::Readable for DCACHE_AUTOLOAD_CTRL_SPEC {}
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#[doc = "`write(|w| ..)` method takes [`dcache_autoload_ctrl::W`](W) writer structure"]
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impl crate::Writable for DCACHE_AUTOLOAD_CTRL_SPEC {
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type Safety = crate::Unsafe;
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const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
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const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
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}
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#[doc = "`reset()` method sets DCACHE_AUTOLOAD_CTRL to value 0x08"]
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impl crate::Resettable for DCACHE_AUTOLOAD_CTRL_SPEC {
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const RESET_VALUE: u32 = 0x08;
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}
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