swaitsandClaude Opus 4.6
3102fc747a
Implement full SSD1306 OLED display support: - Splash screen on boot (1.5s) with project name, version, board - Dashboard showing radio state, config, counters, RSSI/SNR - RSSI history sparkline (64-sample ring buffer, 2px-wide bars) - DisplayOn/DisplayOff host commands routed via dedicated channel - Pure render functions against generic DrawTarget (no hardware coupling) - Display on/off control bypasses radio task entirely Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
31 lines
1.2 KiB
Rust
31 lines
1.2 KiB
Rust
#[doc = "Register `TIME_LOW0` reader"]
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pub type R = crate::R<TIME_LOW0_SPEC>;
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#[doc = "Field `TIMER_VALUE0_LOW` reader - RTC timer low 32 bits"]
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pub type TIMER_VALUE0_LOW_R = crate::FieldReader<u32>;
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impl R {
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#[doc = "Bits 0:31 - RTC timer low 32 bits"]
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#[inline(always)]
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pub fn timer_value0_low(&self) -> TIMER_VALUE0_LOW_R {
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TIMER_VALUE0_LOW_R::new(self.bits)
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}
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}
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#[cfg(feature = "impl-register-debug")]
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impl core::fmt::Debug for R {
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fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
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f.debug_struct("TIME_LOW0")
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.field("timer_value0_low", &self.timer_value0_low())
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.finish()
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}
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}
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#[doc = "read rtc_main timer low bits\n\nYou can [`read`](crate::Reg::read) this register and get [`time_low0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
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pub struct TIME_LOW0_SPEC;
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impl crate::RegisterSpec for TIME_LOW0_SPEC {
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type Ux = u32;
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}
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#[doc = "`read()` method returns [`time_low0::R`](R) reader structure"]
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impl crate::Readable for TIME_LOW0_SPEC {}
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#[doc = "`reset()` method sets TIME_LOW0 to value 0"]
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impl crate::Resettable for TIME_LOW0_SPEC {
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const RESET_VALUE: u32 = 0;
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}
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