swaitsandClaude Opus 4.6
3102fc747a
Implement full SSD1306 OLED display support: - Splash screen on boot (1.5s) with project name, version, board - Dashboard showing radio state, config, counters, RSSI/SNR - RSSI history sparkline (64-sample ring buffer, 2px-wide bars) - DisplayOn/DisplayOff host commands routed via dedicated channel - Pure render functions against generic DrawTarget (no hardware coupling) - Display on/off control bypasses radio task entirely Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
30 lines
1.2 KiB
Plaintext
30 lines
1.2 KiB
Plaintext
/*
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* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/*
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Address table for SPI driver functions in ESP32 ROM.
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These functions are only linked from ROM when SPI_FLASH_ROM_DRIVER_PATCH is not set in configuration.
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*/
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PROVIDE ( esp_rom_spiflash_write_encrypted = 0x40062e78 );
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PROVIDE ( esp_rom_spiflash_erase_area = 0x400631ac );
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PROVIDE ( esp_rom_spiflash_erase_block = 0x40062c4c );
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PROVIDE ( esp_rom_spiflash_erase_chip = 0x40062c14 );
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PROVIDE ( esp_rom_spiflash_erase_sector = 0x40062ccc );
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PROVIDE ( esp_rom_spiflash_attach = 0x40062a6c );
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PROVIDE ( esp_rom_spiflash_lock = 0x400628f0 );
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PROVIDE ( esp_rom_spiflash_read = 0x40062ed8 );
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PROVIDE ( esp_rom_spiflash_config_readmode = 0x40062b64 ); /* SPIMasterReadModeCnfig */
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PROVIDE ( esp_rom_spiflash_read_status = 0x4006226c );
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PROVIDE ( esp_rom_spiflash_read_statushigh = 0x40062448 );
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PROVIDE ( esp_rom_spiflash_write = 0x40062d50 );
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PROVIDE ( esp_rom_spiflash_enable_write = 0x40062320 );
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PROVIDE ( esp_rom_spiflash_write_status = 0x400622f0 );
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/* always using patched versions of these functions
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PROVIDE ( esp_rom_spiflash_wait_idle = 0x400622c0 );
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PROVIDE ( esp_rom_spiflash_unlock = 0x400????? );
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*/
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