swaitsandClaude Opus 4.6
3102fc747a
Implement full SSD1306 OLED display support: - Splash screen on boot (1.5s) with project name, version, board - Dashboard showing radio state, config, counters, RSSI/SNR - RSSI history sparkline (64-sample ring buffer, 2px-wide bars) - DisplayOn/DisplayOff host commands routed via dedicated channel - Pure render functions against generic DrawTarget (no hardware coupling) - Display on/off control bypasses radio task entirely Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
35 lines
1.5 KiB
Plaintext
35 lines
1.5 KiB
Plaintext
MEMORY
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{
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/*
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https://github.com/espressif/esptool/blob/ed64d20b051d05f3f522bacc6a786098b562d4b8/esptool/targets/esp32c3.py#L78-L90
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MEMORY_MAP = [[0x00000000, 0x00010000, "PADDING"],
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[0x3C000000, 0x3C800000, "DROM"],
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[0x3FC80000, 0x3FCE0000, "DRAM"],
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[0x3FC88000, 0x3FD00000, "BYTE_ACCESSIBLE"],
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[0x3FF00000, 0x3FF20000, "DROM_MASK"],
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[0x40000000, 0x40060000, "IROM_MASK"],
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[0x42000000, 0x42800000, "IROM"],
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[0x4037C000, 0x403E0000, "IRAM"],
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[0x50000000, 0x50002000, "RTC_IRAM"],
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[0x50000000, 0x50002000, "RTC_DRAM"],
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[0x600FE000, 0x60100000, "MEM_INTERNAL2"]]
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ICACHE : ORIGIN = 0x4037C000, LENGTH = 0x4000
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/* Instruction RAM */
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IRAM : ORIGIN = 0x4037C000 + 0x4000, LENGTH = 313K - 0x4000
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/* Data RAM */
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DRAM : ORIGIN = 0x3FC80000, LENGTH = 313K
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/* memory available after the 2nd stage bootloader is finished */
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dram2_seg ( RW ) : ORIGIN = ORIGIN(DRAM) + LENGTH(DRAM), len = 0x3fcde710 - (ORIGIN(DRAM) + LENGTH(DRAM))
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/* External flash */
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/* Instruction ROM */
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IROM : ORIGIN = 0x42000000 + 0x20, LENGTH = 0x400000 - 0x20
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/* Data ROM */
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DROM : ORIGIN = 0x3C000000, LENGTH = 0x400000
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/* RTC fast memory (executable). Persists over deep sleep. */
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RTC_FAST : ORIGIN = 0x50000000, LENGTH = 0x2000 /*- ESP_BOOTLOADER_RESERVE_RTC*/
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}
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