swaitsandClaude Opus 4.6
3102fc747a
Implement full SSD1306 OLED display support: - Splash screen on boot (1.5s) with project name, version, board - Dashboard showing radio state, config, counters, RSSI/SNR - RSSI history sparkline (64-sample ring buffer, 2px-wide bars) - DisplayOn/DisplayOff host commands routed via dedicated channel - Pure render functions against generic DrawTarget (no hardware coupling) - Display on/off control bypasses radio task entirely Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
45 lines
2.7 KiB
Rust
45 lines
2.7 KiB
Rust
#[repr(C)]
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#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
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#[doc = "Register block"]
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pub struct RegisterBlock {
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pin_ctrl: PIN_CTRL,
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gpio: [GPIO; 49],
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_reserved2: [u8; 0x34],
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date: DATE,
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}
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impl RegisterBlock {
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#[doc = "0x00 - Clock Output Configuration Register"]
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#[inline(always)]
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pub const fn pin_ctrl(&self) -> &PIN_CTRL {
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&self.pin_ctrl
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}
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#[doc = "0x04..0xc8 - IO MUX Configure Register for pad GPIO0"]
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#[inline(always)]
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pub const fn gpio(&self, n: usize) -> &GPIO {
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&self.gpio[n]
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}
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#[doc = "Iterator for array of:"]
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#[doc = "0x04..0xc8 - IO MUX Configure Register for pad GPIO0"]
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#[inline(always)]
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pub fn gpio_iter(&self) -> impl Iterator<Item = &GPIO> {
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self.gpio.iter()
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}
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#[doc = "0xfc - IO MUX Version Control Register"]
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#[inline(always)]
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pub const fn date(&self) -> &DATE {
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&self.date
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}
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}
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#[doc = "PIN_CTRL (rw) register accessor: Clock Output Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pin_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pin_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pin_ctrl`] module"]
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pub type PIN_CTRL = crate::Reg<pin_ctrl::PIN_CTRL_SPEC>;
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#[doc = "Clock Output Configuration Register"]
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pub mod pin_ctrl;
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#[doc = "GPIO (rw) register accessor: IO MUX Configure Register for pad GPIO0\n\nYou can [`read`](crate::Reg::read) this register and get [`gpio::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gpio::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio`] module"]
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pub type GPIO = crate::Reg<gpio::GPIO_SPEC>;
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#[doc = "IO MUX Configure Register for pad GPIO0"]
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pub mod gpio;
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#[doc = "DATE (rw) register accessor: IO MUX Version Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`date::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`date::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@date`] module"]
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pub type DATE = crate::Reg<date::DATE_SPEC>;
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#[doc = "IO MUX Version Control Register"]
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pub mod date;
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