swaitsandClaude Opus 4.6
3102fc747a
Implement full SSD1306 OLED display support: - Splash screen on boot (1.5s) with project name, version, board - Dashboard showing radio state, config, counters, RSSI/SNR - RSSI history sparkline (64-sample ring buffer, 2px-wide bars) - DisplayOn/DisplayOff host commands routed via dedicated channel - Pure render functions against generic DrawTarget (no hardware coupling) - Display on/off control bypasses radio task entirely Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
208 lines
6.2 KiB
Rust
208 lines
6.2 KiB
Rust
#[doc = "Register `PRESCALER` reader"]
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pub struct R(crate::R<PRESCALER_SPEC>);
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impl core::ops::Deref for R {
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type Target = crate::R<PRESCALER_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl From<crate::R<PRESCALER_SPEC>> for R {
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#[inline(always)]
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fn from(reader: crate::R<PRESCALER_SPEC>) -> Self {
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R(reader)
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}
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}
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#[doc = "Register `PRESCALER` writer"]
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pub struct W(crate::W<PRESCALER_SPEC>);
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impl core::ops::Deref for W {
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type Target = crate::W<PRESCALER_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl core::ops::DerefMut for W {
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#[inline(always)]
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fn deref_mut(&mut self) -> &mut Self::Target {
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&mut self.0
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}
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}
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impl From<crate::W<PRESCALER_SPEC>> for W {
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#[inline(always)]
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fn from(writer: crate::W<PRESCALER_SPEC>) -> Self {
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W(writer)
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}
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}
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#[doc = "Field `PRESCALER` reader - Prescaler of PWM_CLK"]
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pub type PRESCALER_R = crate::FieldReader<u8, PRESCALER_A>;
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#[doc = "Prescaler of PWM_CLK\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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#[repr(u8)]
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pub enum PRESCALER_A {
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#[doc = "0: Divide by 1 (16 MHz)"]
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DIV_1 = 0,
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#[doc = "1: Divide by 2 (8 MHz)"]
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DIV_2 = 1,
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#[doc = "2: Divide by 4 (4 MHz)"]
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DIV_4 = 2,
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#[doc = "3: Divide by 8 (2 MHz)"]
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DIV_8 = 3,
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#[doc = "4: Divide by 16 (1 MHz)"]
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DIV_16 = 4,
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#[doc = "5: Divide by 32 (500 kHz)"]
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DIV_32 = 5,
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#[doc = "6: Divide by 64 (250 kHz)"]
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DIV_64 = 6,
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#[doc = "7: Divide by 128 (125 kHz)"]
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DIV_128 = 7,
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}
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impl From<PRESCALER_A> for u8 {
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#[inline(always)]
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fn from(variant: PRESCALER_A) -> Self {
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variant as _
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}
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}
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impl PRESCALER_R {
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#[doc = "Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> PRESCALER_A {
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match self.bits {
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0 => PRESCALER_A::DIV_1,
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1 => PRESCALER_A::DIV_2,
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2 => PRESCALER_A::DIV_4,
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3 => PRESCALER_A::DIV_8,
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4 => PRESCALER_A::DIV_16,
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5 => PRESCALER_A::DIV_32,
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6 => PRESCALER_A::DIV_64,
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7 => PRESCALER_A::DIV_128,
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_ => unreachable!(),
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}
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}
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#[doc = "Checks if the value of the field is `DIV_1`"]
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#[inline(always)]
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pub fn is_div_1(&self) -> bool {
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*self == PRESCALER_A::DIV_1
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}
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#[doc = "Checks if the value of the field is `DIV_2`"]
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#[inline(always)]
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pub fn is_div_2(&self) -> bool {
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*self == PRESCALER_A::DIV_2
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}
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#[doc = "Checks if the value of the field is `DIV_4`"]
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#[inline(always)]
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pub fn is_div_4(&self) -> bool {
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*self == PRESCALER_A::DIV_4
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}
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#[doc = "Checks if the value of the field is `DIV_8`"]
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#[inline(always)]
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pub fn is_div_8(&self) -> bool {
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*self == PRESCALER_A::DIV_8
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}
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#[doc = "Checks if the value of the field is `DIV_16`"]
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#[inline(always)]
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pub fn is_div_16(&self) -> bool {
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*self == PRESCALER_A::DIV_16
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}
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#[doc = "Checks if the value of the field is `DIV_32`"]
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#[inline(always)]
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pub fn is_div_32(&self) -> bool {
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*self == PRESCALER_A::DIV_32
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}
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#[doc = "Checks if the value of the field is `DIV_64`"]
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#[inline(always)]
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pub fn is_div_64(&self) -> bool {
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*self == PRESCALER_A::DIV_64
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}
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#[doc = "Checks if the value of the field is `DIV_128`"]
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#[inline(always)]
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pub fn is_div_128(&self) -> bool {
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*self == PRESCALER_A::DIV_128
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}
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}
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#[doc = "Field `PRESCALER` writer - Prescaler of PWM_CLK"]
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pub type PRESCALER_W<'a, const O: u8> =
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crate::FieldWriterSafe<'a, u32, PRESCALER_SPEC, u8, PRESCALER_A, 3, O>;
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impl<'a, const O: u8> PRESCALER_W<'a, O> {
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#[doc = "Divide by 1 (16 MHz)"]
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#[inline(always)]
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pub fn div_1(self) -> &'a mut W {
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self.variant(PRESCALER_A::DIV_1)
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}
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#[doc = "Divide by 2 (8 MHz)"]
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#[inline(always)]
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pub fn div_2(self) -> &'a mut W {
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self.variant(PRESCALER_A::DIV_2)
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}
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#[doc = "Divide by 4 (4 MHz)"]
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#[inline(always)]
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pub fn div_4(self) -> &'a mut W {
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self.variant(PRESCALER_A::DIV_4)
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}
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#[doc = "Divide by 8 (2 MHz)"]
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#[inline(always)]
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pub fn div_8(self) -> &'a mut W {
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self.variant(PRESCALER_A::DIV_8)
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}
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#[doc = "Divide by 16 (1 MHz)"]
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#[inline(always)]
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pub fn div_16(self) -> &'a mut W {
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self.variant(PRESCALER_A::DIV_16)
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}
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#[doc = "Divide by 32 (500 kHz)"]
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#[inline(always)]
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pub fn div_32(self) -> &'a mut W {
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self.variant(PRESCALER_A::DIV_32)
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}
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#[doc = "Divide by 64 (250 kHz)"]
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#[inline(always)]
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pub fn div_64(self) -> &'a mut W {
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self.variant(PRESCALER_A::DIV_64)
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}
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#[doc = "Divide by 128 (125 kHz)"]
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#[inline(always)]
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pub fn div_128(self) -> &'a mut W {
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self.variant(PRESCALER_A::DIV_128)
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}
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}
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impl R {
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#[doc = "Bits 0:2 - Prescaler of PWM_CLK"]
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#[inline(always)]
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pub fn prescaler(&self) -> PRESCALER_R {
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PRESCALER_R::new((self.bits & 7) as u8)
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}
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}
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impl W {
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#[doc = "Bits 0:2 - Prescaler of PWM_CLK"]
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#[inline(always)]
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pub fn prescaler(&mut self) -> PRESCALER_W<0> {
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PRESCALER_W::new(self)
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}
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#[doc = "Writes raw bits to the register."]
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#[inline(always)]
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pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
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self.0.bits(bits);
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self
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}
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}
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#[doc = "Configuration for PWM_CLK\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prescaler](index.html) module"]
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pub struct PRESCALER_SPEC;
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impl crate::RegisterSpec for PRESCALER_SPEC {
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type Ux = u32;
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}
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#[doc = "`read()` method returns [prescaler::R](R) reader structure"]
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impl crate::Readable for PRESCALER_SPEC {
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type Reader = R;
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}
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#[doc = "`write(|w| ..)` method takes [prescaler::W](W) writer structure"]
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impl crate::Writable for PRESCALER_SPEC {
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type Writer = W;
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}
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#[doc = "`reset()` method sets PRESCALER to value 0"]
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impl crate::Resettable for PRESCALER_SPEC {
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#[inline(always)]
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fn reset_value() -> Self::Ux {
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0
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}
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}
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