swaitsandClaude Opus 4.6
3102fc747a
Implement full SSD1306 OLED display support: - Splash screen on boot (1.5s) with project name, version, board - Dashboard showing radio state, config, counters, RSSI/SNR - RSSI history sparkline (64-sample ring buffer, 2px-wide bars) - DisplayOn/DisplayOff host commands routed via dedicated channel - Pure render functions against generic DrawTarget (no hardware coupling) - Display on/off control bypasses radio task entirely Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
255 lines
7.8 KiB
Rust
255 lines
7.8 KiB
Rust
#[doc = "Register `CTIINTACK` writer"]
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pub struct W(crate::W<CTIINTACK_SPEC>);
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impl core::ops::Deref for W {
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type Target = crate::W<CTIINTACK_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl core::ops::DerefMut for W {
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#[inline(always)]
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fn deref_mut(&mut self) -> &mut Self::Target {
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&mut self.0
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}
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}
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impl From<crate::W<CTIINTACK_SPEC>> for W {
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#[inline(always)]
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fn from(writer: crate::W<CTIINTACK_SPEC>) -> Self {
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W(writer)
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}
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}
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#[doc = "Processor debug request\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum DEBUGREQ_AW {
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#[doc = "1: Clears the ctitrigout."]
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ACKNOWLEDGE = 1,
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}
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impl From<DEBUGREQ_AW> for bool {
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#[inline(always)]
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fn from(variant: DEBUGREQ_AW) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Field `DEBUGREQ` writer - Processor debug request"]
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pub type DEBUGREQ_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTIINTACK_SPEC, DEBUGREQ_AW, O>;
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impl<'a, const O: u8> DEBUGREQ_W<'a, O> {
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#[doc = "Clears the ctitrigout."]
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#[inline(always)]
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pub fn acknowledge(self) -> &'a mut W {
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self.variant(DEBUGREQ_AW::ACKNOWLEDGE)
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}
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}
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#[doc = "Processor Restart\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum CPURESTART_AW {
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#[doc = "1: Clears the ctitrigout."]
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ACKNOWLEDGE = 1,
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}
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impl From<CPURESTART_AW> for bool {
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#[inline(always)]
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fn from(variant: CPURESTART_AW) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Field `CPURESTART` writer - Processor Restart"]
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pub type CPURESTART_W<'a, const O: u8> =
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crate::BitWriter<'a, u32, CTIINTACK_SPEC, CPURESTART_AW, O>;
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impl<'a, const O: u8> CPURESTART_W<'a, O> {
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#[doc = "Clears the ctitrigout."]
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#[inline(always)]
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pub fn acknowledge(self) -> &'a mut W {
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self.variant(CPURESTART_AW::ACKNOWLEDGE)
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}
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}
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#[doc = "N/A\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum UNUSED0_AW {
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#[doc = "1: Clears the ctitrigout."]
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ACKNOWLEDGE = 1,
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}
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impl From<UNUSED0_AW> for bool {
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#[inline(always)]
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fn from(variant: UNUSED0_AW) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Field `UNUSED0` writer - N/A"]
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pub type UNUSED0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTIINTACK_SPEC, UNUSED0_AW, O>;
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impl<'a, const O: u8> UNUSED0_W<'a, O> {
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#[doc = "Clears the ctitrigout."]
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#[inline(always)]
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pub fn acknowledge(self) -> &'a mut W {
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self.variant(UNUSED0_AW::ACKNOWLEDGE)
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}
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}
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#[doc = "N/A\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum UNUSED1_AW {
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#[doc = "1: Clears the ctitrigout."]
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ACKNOWLEDGE = 1,
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}
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impl From<UNUSED1_AW> for bool {
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#[inline(always)]
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fn from(variant: UNUSED1_AW) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Field `UNUSED1` writer - N/A"]
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pub type UNUSED1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTIINTACK_SPEC, UNUSED1_AW, O>;
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impl<'a, const O: u8> UNUSED1_W<'a, O> {
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#[doc = "Clears the ctitrigout."]
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#[inline(always)]
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pub fn acknowledge(self) -> &'a mut W {
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self.variant(UNUSED1_AW::ACKNOWLEDGE)
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}
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}
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#[doc = "ETM Event Input 0\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum ETMEVTIN0_AW {
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#[doc = "1: Clears the ctitrigout."]
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ACKNOWLEDGE = 1,
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}
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impl From<ETMEVTIN0_AW> for bool {
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#[inline(always)]
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fn from(variant: ETMEVTIN0_AW) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Field `ETMEVTIN0` writer - ETM Event Input 0"]
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pub type ETMEVTIN0_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTIINTACK_SPEC, ETMEVTIN0_AW, O>;
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impl<'a, const O: u8> ETMEVTIN0_W<'a, O> {
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#[doc = "Clears the ctitrigout."]
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#[inline(always)]
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pub fn acknowledge(self) -> &'a mut W {
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self.variant(ETMEVTIN0_AW::ACKNOWLEDGE)
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}
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}
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#[doc = "ETM Event Input 1\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum ETMEVTIN1_AW {
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#[doc = "1: Clears the ctitrigout."]
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ACKNOWLEDGE = 1,
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}
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impl From<ETMEVTIN1_AW> for bool {
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#[inline(always)]
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fn from(variant: ETMEVTIN1_AW) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Field `ETMEVTIN1` writer - ETM Event Input 1"]
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pub type ETMEVTIN1_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTIINTACK_SPEC, ETMEVTIN1_AW, O>;
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impl<'a, const O: u8> ETMEVTIN1_W<'a, O> {
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#[doc = "Clears the ctitrigout."]
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#[inline(always)]
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pub fn acknowledge(self) -> &'a mut W {
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self.variant(ETMEVTIN1_AW::ACKNOWLEDGE)
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}
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}
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#[doc = "ETM Event Input 2\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum ETMEVTIN2_AW {
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#[doc = "1: Clears the ctitrigout."]
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ACKNOWLEDGE = 1,
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}
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impl From<ETMEVTIN2_AW> for bool {
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#[inline(always)]
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fn from(variant: ETMEVTIN2_AW) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Field `ETMEVTIN2` writer - ETM Event Input 2"]
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pub type ETMEVTIN2_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTIINTACK_SPEC, ETMEVTIN2_AW, O>;
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impl<'a, const O: u8> ETMEVTIN2_W<'a, O> {
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#[doc = "Clears the ctitrigout."]
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#[inline(always)]
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pub fn acknowledge(self) -> &'a mut W {
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self.variant(ETMEVTIN2_AW::ACKNOWLEDGE)
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}
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}
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#[doc = "ETM Event Input 3\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum ETMEVTIN3_AW {
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#[doc = "1: Clears the ctitrigout."]
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ACKNOWLEDGE = 1,
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}
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impl From<ETMEVTIN3_AW> for bool {
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#[inline(always)]
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fn from(variant: ETMEVTIN3_AW) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Field `ETMEVTIN3` writer - ETM Event Input 3"]
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pub type ETMEVTIN3_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTIINTACK_SPEC, ETMEVTIN3_AW, O>;
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impl<'a, const O: u8> ETMEVTIN3_W<'a, O> {
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#[doc = "Clears the ctitrigout."]
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#[inline(always)]
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pub fn acknowledge(self) -> &'a mut W {
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self.variant(ETMEVTIN3_AW::ACKNOWLEDGE)
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}
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}
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impl W {
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#[doc = "Bit 0 - Processor debug request"]
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#[inline(always)]
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pub fn debugreq(&mut self) -> DEBUGREQ_W<0> {
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DEBUGREQ_W::new(self)
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}
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#[doc = "Bit 1 - Processor Restart"]
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#[inline(always)]
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pub fn cpurestart(&mut self) -> CPURESTART_W<1> {
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CPURESTART_W::new(self)
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}
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#[doc = "Bit 2 - N/A"]
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#[inline(always)]
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pub fn unused0(&mut self) -> UNUSED0_W<2> {
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UNUSED0_W::new(self)
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}
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#[doc = "Bit 3 - N/A"]
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#[inline(always)]
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pub fn unused1(&mut self) -> UNUSED1_W<3> {
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UNUSED1_W::new(self)
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}
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#[doc = "Bit 4 - ETM Event Input 0"]
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#[inline(always)]
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pub fn etmevtin0(&mut self) -> ETMEVTIN0_W<4> {
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ETMEVTIN0_W::new(self)
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}
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#[doc = "Bit 5 - ETM Event Input 1"]
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#[inline(always)]
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pub fn etmevtin1(&mut self) -> ETMEVTIN1_W<5> {
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ETMEVTIN1_W::new(self)
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}
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#[doc = "Bit 6 - ETM Event Input 2"]
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#[inline(always)]
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pub fn etmevtin2(&mut self) -> ETMEVTIN2_W<6> {
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ETMEVTIN2_W::new(self)
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}
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#[doc = "Bit 7 - ETM Event Input 3"]
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#[inline(always)]
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pub fn etmevtin3(&mut self) -> ETMEVTIN3_W<7> {
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ETMEVTIN3_W::new(self)
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}
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#[doc = "Writes raw bits to the register."]
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#[inline(always)]
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pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
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self.0.bits(bits);
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self
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}
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}
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#[doc = "CTI Interrupt Acknowledge register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctiintack](index.html) module"]
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pub struct CTIINTACK_SPEC;
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impl crate::RegisterSpec for CTIINTACK_SPEC {
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type Ux = u32;
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}
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#[doc = "`write(|w| ..)` method takes [ctiintack::W](W) writer structure"]
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impl crate::Writable for CTIINTACK_SPEC {
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type Writer = W;
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}
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#[doc = "`reset()` method sets CTIINTACK to value 0"]
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impl crate::Resettable for CTIINTACK_SPEC {
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#[inline(always)]
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fn reset_value() -> Self::Ux {
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0
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}
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}
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