swaits 23ddc15557 fix(radio): consume upstream lora-phy pre-command BUSY check
Pick up the proper fix from our fork at swaits/lora-rs@fix/sx126x-busy-race:
move the ready check from *after* to *before* each SPI op per the
Semtech manuals (SX1261/2 §8.3.1, LR1121 UM §3 / §3.5, LR1110 DS
§1.2.5) and rename InterfaceVariant::wait_on_busy to wait_until_ready.

Firmware side is surgical: since the upstream fix keeps the
GenericSx126xInterfaceVariant::new signature at 5 args (no DelayNs
threading), there is nothing to change in the four nRF / ESP / RP2040
board files beyond a one-line comment rename (wait_on_busy ->
wait_until_ready) in the BUSY-pullup comment on the two nRF boards.

Wire in the [patch.crates-io] override pointing at ../../lora-rs/lora-phy,
bump the dep spec to the pre-release 3.0.2-alpha that matches the fork,
and enable the defmt-03 feature that upstream moved behind a gate
between 3.0.1 and the fix branch.

TODO.md rewritten to track the new approach: PR body template with
verbatim citations from all three Semtech chip manuals (SX1261/2,
LR1121 UM, LR1110 DS) plus the SX1276 pin table confirming the family
has no BUSY line.

No change to firmware behavior beyond picking up the upstream fix,
which takes first-TX-after-boot success from ~50% to 20/20 on the
Seeed Wio Tracker L1 repro board.
2026-04-24 12:44:01 -06:00
2026-04-03 10:28:38 -06:00
2026-04-16 13:25:19 -06:00
2026-04-23 18:25:50 -06:00
2026-04-07 19:52:52 -06:00

DongLoRa Firmware

Embedded Rust firmware for DongLoRa boards. Exposes the LoRa radio over USB CDC-ACM using a COBS-framed binary protocol.

Building

just setup              # one-time toolchain install
just build heltec_v4    # build for a specific board
just flash heltec_v4    # build + flash
just check-all          # compile-check all boards
just clippy heltec_v4   # lint
just test               # host-side protocol unit tests

All commands are run from the firmware/ directory.

Supported Boards

Board Feature MCU Radio USB Target
Heltec V3 heltec_v3 ESP32-S3 SX1262 Native CDC-ACM xtensa-esp32s3-none-elf
Heltec V3 (UART) heltec_v3_uart ESP32-S3 SX1262 CP2102 bridge xtensa-esp32s3-none-elf
Heltec V4 heltec_v4 ESP32-S3 SX1262 Native CDC-ACM xtensa-esp32s3-none-elf
ELECROW ThinkNode-M2 elecrow_thinknode_m2 ESP32-S3 SX1262 CP2102 bridge xtensa-esp32s3-none-elf
LilyGo T-Beam lilygo_tbeam ESP32 SX1276 CP2102 bridge xtensa-esp32-none-elf
LilyGo T-Beam S3 Supreme lilygo_tbeam_supreme ESP32-S3 SX1262 Native CDC-ACM xtensa-esp32s3-none-elf
RAK WisBlock 4631 rak_wisblock_4631 nRF52840 SX1262 Native CDC-ACM thumbv7em-none-eabihf
Waveshare RP2040-LoRa waveshare_rp2040_lora RP2040 SX1262 Native CDC-ACM thumbv6m-none-eabi
Wio Tracker L1 wio_tracker_l1 nRF52840 SX1262 Native CDC-ACM thumbv7em-none-eabihf

Heltec V3 USB Note

The default heltec_v3 build uses native USB CDC-ACM, which requires a hardware modification to your board. Stock Heltec V3 boards route USB through a CP2102 bridge chip to UART — the ESP32-S3's native USB pins (GPIO19/GPIO20) are routed to header pins but not connected to the USB connector.

To enable native USB on a Heltec V3:

  1. Solder 0-ohm (or 22-ohm) resistors at pads R29 (D+) and R3 (D-)
  2. Disconnect the CP2102 from the USB connector's D+/D- lines (cut traces or remove the CP2102 bridge resistors)

After this mod, the board appears as /dev/ttyACM0 with the DongLoRa VID:PID (1209:5741), just like the V4 and nRF boards.

If you have a stock (unmodified) V3, use heltec_v3_uart instead:

just build heltec_v3_uart
just flash heltec_v3_uart

This builds firmware that communicates via the CP2102 bridge (appears as /dev/ttyUSB0).

Adding a Board

See src/board/PORTING.md.

Protocol

See PROTOCOL.md for the complete wire format specification.

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