feat: add display UI with splash screen, dashboard, and RSSI sparkline

Implement full SSD1306 OLED display support:
- Splash screen on boot (1.5s) with project name, version, board
- Dashboard showing radio state, config, counters, RSSI/SNR
- RSSI history sparkline (64-sample ring buffer, 2px-wide bars)
- DisplayOn/DisplayOff host commands routed via dedicated channel
- Pure render functions against generic DrawTarget (no hardware coupling)
- Display on/off control bypasses radio task entirely

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>

vendor/esp32s3/src/usb_device/conf0.rs

@@ -0,0 +1,257 @@
+#[doc = "Register `CONF0` reader"]
+pub type R = crate::R<CONF0_SPEC>;
+#[doc = "Register `CONF0` writer"]
+pub type W = crate::W<CONF0_SPEC>;
+#[doc = "Field `PHY_SEL` reader - Select internal/external PHY"]
+pub type PHY_SEL_R = crate::BitReader;
+#[doc = "Field `PHY_SEL` writer - Select internal/external PHY"]
+pub type PHY_SEL_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `EXCHG_PINS_OVERRIDE` reader - Enable software control USB D+ D- exchange"]
+pub type EXCHG_PINS_OVERRIDE_R = crate::BitReader;
+#[doc = "Field `EXCHG_PINS_OVERRIDE` writer - Enable software control USB D+ D- exchange"]
+pub type EXCHG_PINS_OVERRIDE_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `EXCHG_PINS` reader - USB D+ D- exchange"]
+pub type EXCHG_PINS_R = crate::BitReader;
+#[doc = "Field `EXCHG_PINS` writer - USB D+ D- exchange"]
+pub type EXCHG_PINS_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `VREFH` reader - Control single-end input high threshold,1.76V to 2V, step 80mV"]
+pub type VREFH_R = crate::FieldReader;
+#[doc = "Field `VREFH` writer - Control single-end input high threshold,1.76V to 2V, step 80mV"]
+pub type VREFH_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
+#[doc = "Field `VREFL` reader - Control single-end input low threshold,0.8V to 1.04V, step 80mV"]
+pub type VREFL_R = crate::FieldReader;
+#[doc = "Field `VREFL` writer - Control single-end input low threshold,0.8V to 1.04V, step 80mV"]
+pub type VREFL_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
+#[doc = "Field `VREF_OVERRIDE` reader - Enable software control input threshold"]
+pub type VREF_OVERRIDE_R = crate::BitReader;
+#[doc = "Field `VREF_OVERRIDE` writer - Enable software control input threshold"]
+pub type VREF_OVERRIDE_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `PAD_PULL_OVERRIDE` reader - Enable software control USB D+ D- pullup pulldown"]
+pub type PAD_PULL_OVERRIDE_R = crate::BitReader;
+#[doc = "Field `PAD_PULL_OVERRIDE` writer - Enable software control USB D+ D- pullup pulldown"]
+pub type PAD_PULL_OVERRIDE_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `DP_PULLUP` reader - Control USB D+ pull up."]
+pub type DP_PULLUP_R = crate::BitReader;
+#[doc = "Field `DP_PULLUP` writer - Control USB D+ pull up."]
+pub type DP_PULLUP_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `DP_PULLDOWN` reader - Control USB D+ pull down."]
+pub type DP_PULLDOWN_R = crate::BitReader;
+#[doc = "Field `DP_PULLDOWN` writer - Control USB D+ pull down."]
+pub type DP_PULLDOWN_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `DM_PULLUP` reader - Control USB D- pull up."]
+pub type DM_PULLUP_R = crate::BitReader;
+#[doc = "Field `DM_PULLUP` writer - Control USB D- pull up."]
+pub type DM_PULLUP_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `DM_PULLDOWN` reader - Control USB D- pull down."]
+pub type DM_PULLDOWN_R = crate::BitReader;
+#[doc = "Field `DM_PULLDOWN` writer - Control USB D- pull down."]
+pub type DM_PULLDOWN_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `PULLUP_VALUE` reader - Control pull up value."]
+pub type PULLUP_VALUE_R = crate::BitReader;
+#[doc = "Field `PULLUP_VALUE` writer - Control pull up value."]
+pub type PULLUP_VALUE_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `USB_PAD_ENABLE` reader - Enable USB pad function."]
+pub type USB_PAD_ENABLE_R = crate::BitReader;
+#[doc = "Field `USB_PAD_ENABLE` writer - Enable USB pad function."]
+pub type USB_PAD_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `PHY_TX_EDGE_SEL` reader - 0: TX output at clock negedge. 1: Tx output at clock posedge."]
+pub type PHY_TX_EDGE_SEL_R = crate::BitReader;
+#[doc = "Field `PHY_TX_EDGE_SEL` writer - 0: TX output at clock negedge. 1: Tx output at clock posedge."]
+pub type PHY_TX_EDGE_SEL_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `USB_JTAG_BRIDGE_EN` reader - Set this bit usb_jtag, the connection between usb_jtag and internal JTAG is disconnected, and MTMS, MTDI, MTCK are output through GPIO Matrix, MTDO is input through GPIO Matrix."]
+pub type USB_JTAG_BRIDGE_EN_R = crate::BitReader;
+#[doc = "Field `USB_JTAG_BRIDGE_EN` writer - Set this bit usb_jtag, the connection between usb_jtag and internal JTAG is disconnected, and MTMS, MTDI, MTCK are output through GPIO Matrix, MTDO is input through GPIO Matrix."]
+pub type USB_JTAG_BRIDGE_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
+impl R {
+    #[doc = "Bit 0 - Select internal/external PHY"]
+    #[inline(always)]
+    pub fn phy_sel(&self) -> PHY_SEL_R {
+        PHY_SEL_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Enable software control USB D+ D- exchange"]
+    #[inline(always)]
+    pub fn exchg_pins_override(&self) -> EXCHG_PINS_OVERRIDE_R {
+        EXCHG_PINS_OVERRIDE_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - USB D+ D- exchange"]
+    #[inline(always)]
+    pub fn exchg_pins(&self) -> EXCHG_PINS_R {
+        EXCHG_PINS_R::new(((self.bits >> 2) & 1) != 0)
+    }
+    #[doc = "Bits 3:4 - Control single-end input high threshold,1.76V to 2V, step 80mV"]
+    #[inline(always)]
+    pub fn vrefh(&self) -> VREFH_R {
+        VREFH_R::new(((self.bits >> 3) & 3) as u8)
+    }
+    #[doc = "Bits 5:6 - Control single-end input low threshold,0.8V to 1.04V, step 80mV"]
+    #[inline(always)]
+    pub fn vrefl(&self) -> VREFL_R {
+        VREFL_R::new(((self.bits >> 5) & 3) as u8)
+    }
+    #[doc = "Bit 7 - Enable software control input threshold"]
+    #[inline(always)]
+    pub fn vref_override(&self) -> VREF_OVERRIDE_R {
+        VREF_OVERRIDE_R::new(((self.bits >> 7) & 1) != 0)
+    }
+    #[doc = "Bit 8 - Enable software control USB D+ D- pullup pulldown"]
+    #[inline(always)]
+    pub fn pad_pull_override(&self) -> PAD_PULL_OVERRIDE_R {
+        PAD_PULL_OVERRIDE_R::new(((self.bits >> 8) & 1) != 0)
+    }
+    #[doc = "Bit 9 - Control USB D+ pull up."]
+    #[inline(always)]
+    pub fn dp_pullup(&self) -> DP_PULLUP_R {
+        DP_PULLUP_R::new(((self.bits >> 9) & 1) != 0)
+    }
+    #[doc = "Bit 10 - Control USB D+ pull down."]
+    #[inline(always)]
+    pub fn dp_pulldown(&self) -> DP_PULLDOWN_R {
+        DP_PULLDOWN_R::new(((self.bits >> 10) & 1) != 0)
+    }
+    #[doc = "Bit 11 - Control USB D- pull up."]
+    #[inline(always)]
+    pub fn dm_pullup(&self) -> DM_PULLUP_R {
+        DM_PULLUP_R::new(((self.bits >> 11) & 1) != 0)
+    }
+    #[doc = "Bit 12 - Control USB D- pull down."]
+    #[inline(always)]
+    pub fn dm_pulldown(&self) -> DM_PULLDOWN_R {
+        DM_PULLDOWN_R::new(((self.bits >> 12) & 1) != 0)
+    }
+    #[doc = "Bit 13 - Control pull up value."]
+    #[inline(always)]
+    pub fn pullup_value(&self) -> PULLUP_VALUE_R {
+        PULLUP_VALUE_R::new(((self.bits >> 13) & 1) != 0)
+    }
+    #[doc = "Bit 14 - Enable USB pad function."]
+    #[inline(always)]
+    pub fn usb_pad_enable(&self) -> USB_PAD_ENABLE_R {
+        USB_PAD_ENABLE_R::new(((self.bits >> 14) & 1) != 0)
+    }
+    #[doc = "Bit 15 - 0: TX output at clock negedge. 1: Tx output at clock posedge."]
+    #[inline(always)]
+    pub fn phy_tx_edge_sel(&self) -> PHY_TX_EDGE_SEL_R {
+        PHY_TX_EDGE_SEL_R::new(((self.bits >> 15) & 1) != 0)
+    }
+    #[doc = "Bit 16 - Set this bit usb_jtag, the connection between usb_jtag and internal JTAG is disconnected, and MTMS, MTDI, MTCK are output through GPIO Matrix, MTDO is input through GPIO Matrix."]
+    #[inline(always)]
+    pub fn usb_jtag_bridge_en(&self) -> USB_JTAG_BRIDGE_EN_R {
+        USB_JTAG_BRIDGE_EN_R::new(((self.bits >> 16) & 1) != 0)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("CONF0")
+            .field("phy_sel", &self.phy_sel())
+            .field("exchg_pins_override", &self.exchg_pins_override())
+            .field("exchg_pins", &self.exchg_pins())
+            .field("vrefh", &self.vrefh())
+            .field("vrefl", &self.vrefl())
+            .field("vref_override", &self.vref_override())
+            .field("pad_pull_override", &self.pad_pull_override())
+            .field("dp_pullup", &self.dp_pullup())
+            .field("dp_pulldown", &self.dp_pulldown())
+            .field("dm_pullup", &self.dm_pullup())
+            .field("dm_pulldown", &self.dm_pulldown())
+            .field("pullup_value", &self.pullup_value())
+            .field("usb_pad_enable", &self.usb_pad_enable())
+            .field("phy_tx_edge_sel", &self.phy_tx_edge_sel())
+            .field("usb_jtag_bridge_en", &self.usb_jtag_bridge_en())
+            .finish()
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Select internal/external PHY"]
+    #[inline(always)]
+    pub fn phy_sel(&mut self) -> PHY_SEL_W<CONF0_SPEC> {
+        PHY_SEL_W::new(self, 0)
+    }
+    #[doc = "Bit 1 - Enable software control USB D+ D- exchange"]
+    #[inline(always)]
+    pub fn exchg_pins_override(&mut self) -> EXCHG_PINS_OVERRIDE_W<CONF0_SPEC> {
+        EXCHG_PINS_OVERRIDE_W::new(self, 1)
+    }
+    #[doc = "Bit 2 - USB D+ D- exchange"]
+    #[inline(always)]
+    pub fn exchg_pins(&mut self) -> EXCHG_PINS_W<CONF0_SPEC> {
+        EXCHG_PINS_W::new(self, 2)
+    }
+    #[doc = "Bits 3:4 - Control single-end input high threshold,1.76V to 2V, step 80mV"]
+    #[inline(always)]
+    pub fn vrefh(&mut self) -> VREFH_W<CONF0_SPEC> {
+        VREFH_W::new(self, 3)
+    }
+    #[doc = "Bits 5:6 - Control single-end input low threshold,0.8V to 1.04V, step 80mV"]
+    #[inline(always)]
+    pub fn vrefl(&mut self) -> VREFL_W<CONF0_SPEC> {
+        VREFL_W::new(self, 5)
+    }
+    #[doc = "Bit 7 - Enable software control input threshold"]
+    #[inline(always)]
+    pub fn vref_override(&mut self) -> VREF_OVERRIDE_W<CONF0_SPEC> {
+        VREF_OVERRIDE_W::new(self, 7)
+    }
+    #[doc = "Bit 8 - Enable software control USB D+ D- pullup pulldown"]
+    #[inline(always)]
+    pub fn pad_pull_override(&mut self) -> PAD_PULL_OVERRIDE_W<CONF0_SPEC> {
+        PAD_PULL_OVERRIDE_W::new(self, 8)
+    }
+    #[doc = "Bit 9 - Control USB D+ pull up."]
+    #[inline(always)]
+    pub fn dp_pullup(&mut self) -> DP_PULLUP_W<CONF0_SPEC> {
+        DP_PULLUP_W::new(self, 9)
+    }
+    #[doc = "Bit 10 - Control USB D+ pull down."]
+    #[inline(always)]
+    pub fn dp_pulldown(&mut self) -> DP_PULLDOWN_W<CONF0_SPEC> {
+        DP_PULLDOWN_W::new(self, 10)
+    }
+    #[doc = "Bit 11 - Control USB D- pull up."]
+    #[inline(always)]
+    pub fn dm_pullup(&mut self) -> DM_PULLUP_W<CONF0_SPEC> {
+        DM_PULLUP_W::new(self, 11)
+    }
+    #[doc = "Bit 12 - Control USB D- pull down."]
+    #[inline(always)]
+    pub fn dm_pulldown(&mut self) -> DM_PULLDOWN_W<CONF0_SPEC> {
+        DM_PULLDOWN_W::new(self, 12)
+    }
+    #[doc = "Bit 13 - Control pull up value."]
+    #[inline(always)]
+    pub fn pullup_value(&mut self) -> PULLUP_VALUE_W<CONF0_SPEC> {
+        PULLUP_VALUE_W::new(self, 13)
+    }
+    #[doc = "Bit 14 - Enable USB pad function."]
+    #[inline(always)]
+    pub fn usb_pad_enable(&mut self) -> USB_PAD_ENABLE_W<CONF0_SPEC> {
+        USB_PAD_ENABLE_W::new(self, 14)
+    }
+    #[doc = "Bit 15 - 0: TX output at clock negedge. 1: Tx output at clock posedge."]
+    #[inline(always)]
+    pub fn phy_tx_edge_sel(&mut self) -> PHY_TX_EDGE_SEL_W<CONF0_SPEC> {
+        PHY_TX_EDGE_SEL_W::new(self, 15)
+    }
+    #[doc = "Bit 16 - Set this bit usb_jtag, the connection between usb_jtag and internal JTAG is disconnected, and MTMS, MTDI, MTCK are output through GPIO Matrix, MTDO is input through GPIO Matrix."]
+    #[inline(always)]
+    pub fn usb_jtag_bridge_en(&mut self) -> USB_JTAG_BRIDGE_EN_W<CONF0_SPEC> {
+        USB_JTAG_BRIDGE_EN_W::new(self, 16)
+    }
+}
+#[doc = "Configure 0 register\n\nYou can [`read`](crate::Reg::read) this register and get [`conf0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`conf0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct CONF0_SPEC;
+impl crate::RegisterSpec for CONF0_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`conf0::R`](R) reader structure"]
+impl crate::Readable for CONF0_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`conf0::W`](W) writer structure"]
+impl crate::Writable for CONF0_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets CONF0 to value 0x4200"]
+impl crate::Resettable for CONF0_SPEC {
+    const RESET_VALUE: u32 = 0x4200;
+}

vendor/esp32s3/src/usb_device/date.rs

@@ -0,0 +1,45 @@
+#[doc = "Register `DATE` reader"]
+pub type R = crate::R<DATE_SPEC>;
+#[doc = "Register `DATE` writer"]
+pub type W = crate::W<DATE_SPEC>;
+#[doc = "Field `DATE` reader - register version."]
+pub type DATE_R = crate::FieldReader<u32>;
+#[doc = "Field `DATE` writer - register version."]
+pub type DATE_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
+impl R {
+    #[doc = "Bits 0:31 - register version."]
+    #[inline(always)]
+    pub fn date(&self) -> DATE_R {
+        DATE_R::new(self.bits)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("DATE").field("date", &self.date()).finish()
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - register version."]
+    #[inline(always)]
+    pub fn date(&mut self) -> DATE_W<DATE_SPEC> {
+        DATE_W::new(self, 0)
+    }
+}
+#[doc = "Version control register\n\nYou can [`read`](crate::Reg::read) this register and get [`date::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`date::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct DATE_SPEC;
+impl crate::RegisterSpec for DATE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`date::R`](R) reader structure"]
+impl crate::Readable for DATE_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`date::W`](W) writer structure"]
+impl crate::Writable for DATE_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets DATE to value 0x0210_1200"]
+impl crate::Resettable for DATE_SPEC {
+    const RESET_VALUE: u32 = 0x0210_1200;
+}

vendor/esp32s3/src/usb_device/ep1.rs

@@ -0,0 +1,47 @@
+#[doc = "Register `EP1` reader"]
+pub type R = crate::R<EP1_SPEC>;
+#[doc = "Register `EP1` writer"]
+pub type W = crate::W<EP1_SPEC>;
+#[doc = "Field `RDWR_BYTE` reader - Write and read byte data to/from UART Tx/Rx FIFO through this field. When USB_DEVICE_SERIAL_IN_EMPTY_INT is set, then user can write data (up to 64 bytes) into UART Tx FIFO. When USB_DEVICE_SERIAL_OUT_RECV_PKT_INT is set, user can check USB_DEVICE_OUT_EP1_WR_ADDR USB_DEVICE_OUT_EP0_RD_ADDR to know how many data is received, then read data from UART Rx FIFO."]
+pub type RDWR_BYTE_R = crate::FieldReader;
+#[doc = "Field `RDWR_BYTE` writer - Write and read byte data to/from UART Tx/Rx FIFO through this field. When USB_DEVICE_SERIAL_IN_EMPTY_INT is set, then user can write data (up to 64 bytes) into UART Tx FIFO. When USB_DEVICE_SERIAL_OUT_RECV_PKT_INT is set, user can check USB_DEVICE_OUT_EP1_WR_ADDR USB_DEVICE_OUT_EP0_RD_ADDR to know how many data is received, then read data from UART Rx FIFO."]
+pub type RDWR_BYTE_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
+impl R {
+    #[doc = "Bits 0:7 - Write and read byte data to/from UART Tx/Rx FIFO through this field. When USB_DEVICE_SERIAL_IN_EMPTY_INT is set, then user can write data (up to 64 bytes) into UART Tx FIFO. When USB_DEVICE_SERIAL_OUT_RECV_PKT_INT is set, user can check USB_DEVICE_OUT_EP1_WR_ADDR USB_DEVICE_OUT_EP0_RD_ADDR to know how many data is received, then read data from UART Rx FIFO."]
+    #[inline(always)]
+    pub fn rdwr_byte(&self) -> RDWR_BYTE_R {
+        RDWR_BYTE_R::new((self.bits & 0xff) as u8)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("EP1")
+            .field("rdwr_byte", &self.rdwr_byte())
+            .finish()
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - Write and read byte data to/from UART Tx/Rx FIFO through this field. When USB_DEVICE_SERIAL_IN_EMPTY_INT is set, then user can write data (up to 64 bytes) into UART Tx FIFO. When USB_DEVICE_SERIAL_OUT_RECV_PKT_INT is set, user can check USB_DEVICE_OUT_EP1_WR_ADDR USB_DEVICE_OUT_EP0_RD_ADDR to know how many data is received, then read data from UART Rx FIFO."]
+    #[inline(always)]
+    pub fn rdwr_byte(&mut self) -> RDWR_BYTE_W<EP1_SPEC> {
+        RDWR_BYTE_W::new(self, 0)
+    }
+}
+#[doc = "Endpoint 1 FIFO register\n\nYou can [`read`](crate::Reg::read) this register and get [`ep1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ep1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct EP1_SPEC;
+impl crate::RegisterSpec for EP1_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`ep1::R`](R) reader structure"]
+impl crate::Readable for EP1_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`ep1::W`](W) writer structure"]
+impl crate::Writable for EP1_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets EP1 to value 0"]
+impl crate::Resettable for EP1_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/usb_device/ep1_conf.rs

@@ -0,0 +1,55 @@
+#[doc = "Register `EP1_CONF` reader"]
+pub type R = crate::R<EP1_CONF_SPEC>;
+#[doc = "Register `EP1_CONF` writer"]
+pub type W = crate::W<EP1_CONF_SPEC>;
+#[doc = "Field `WR_DONE` writer - Set this bit to indicate writing byte data to UART Tx FIFO is done."]
+pub type WR_DONE_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `SERIAL_IN_EP_DATA_FREE` reader - 1'b1: Indicate UART Tx FIFO is not full and can write data into in. After writing USB_DEVICE_WR_DONE, this bit would be 0 until data in UART Tx FIFO is read by USB Host."]
+pub type SERIAL_IN_EP_DATA_FREE_R = crate::BitReader;
+#[doc = "Field `SERIAL_OUT_EP_DATA_AVAIL` reader - 1'b1: Indicate there is data in UART Rx FIFO."]
+pub type SERIAL_OUT_EP_DATA_AVAIL_R = crate::BitReader;
+impl R {
+    #[doc = "Bit 1 - 1'b1: Indicate UART Tx FIFO is not full and can write data into in. After writing USB_DEVICE_WR_DONE, this bit would be 0 until data in UART Tx FIFO is read by USB Host."]
+    #[inline(always)]
+    pub fn serial_in_ep_data_free(&self) -> SERIAL_IN_EP_DATA_FREE_R {
+        SERIAL_IN_EP_DATA_FREE_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - 1'b1: Indicate there is data in UART Rx FIFO."]
+    #[inline(always)]
+    pub fn serial_out_ep_data_avail(&self) -> SERIAL_OUT_EP_DATA_AVAIL_R {
+        SERIAL_OUT_EP_DATA_AVAIL_R::new(((self.bits >> 2) & 1) != 0)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("EP1_CONF")
+            .field("serial_in_ep_data_free", &self.serial_in_ep_data_free())
+            .field("serial_out_ep_data_avail", &self.serial_out_ep_data_avail())
+            .finish()
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Set this bit to indicate writing byte data to UART Tx FIFO is done."]
+    #[inline(always)]
+    pub fn wr_done(&mut self) -> WR_DONE_W<EP1_CONF_SPEC> {
+        WR_DONE_W::new(self, 0)
+    }
+}
+#[doc = "Endpoint 1 configure and status register\n\nYou can [`read`](crate::Reg::read) this register and get [`ep1_conf::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ep1_conf::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct EP1_CONF_SPEC;
+impl crate::RegisterSpec for EP1_CONF_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`ep1_conf::R`](R) reader structure"]
+impl crate::Readable for EP1_CONF_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`ep1_conf::W`](W) writer structure"]
+impl crate::Writable for EP1_CONF_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets EP1_CONF to value 0x02"]
+impl crate::Resettable for EP1_CONF_SPEC {
+    const RESET_VALUE: u32 = 0x02;
+}

vendor/esp32s3/src/usb_device/fram_num.rs

@@ -0,0 +1,30 @@
+#[doc = "Register `FRAM_NUM` reader"]
+pub type R = crate::R<FRAM_NUM_SPEC>;
+#[doc = "Field `SOF_FRAME_INDEX` reader - Frame index of received SOF frame."]
+pub type SOF_FRAME_INDEX_R = crate::FieldReader<u16>;
+impl R {
+    #[doc = "Bits 0:10 - Frame index of received SOF frame."]
+    #[inline(always)]
+    pub fn sof_frame_index(&self) -> SOF_FRAME_INDEX_R {
+        SOF_FRAME_INDEX_R::new((self.bits & 0x07ff) as u16)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("FRAM_NUM")
+            .field("sof_frame_index", &self.sof_frame_index())
+            .finish()
+    }
+}
+#[doc = "SOF frame number\n\nYou can [`read`](crate::Reg::read) this register and get [`fram_num::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct FRAM_NUM_SPEC;
+impl crate::RegisterSpec for FRAM_NUM_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`fram_num::R`](R) reader structure"]
+impl crate::Readable for FRAM_NUM_SPEC {}
+#[doc = "`reset()` method sets FRAM_NUM to value 0"]
+impl crate::Resettable for FRAM_NUM_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/usb_device/in_ep0_st.rs

@@ -0,0 +1,46 @@
+#[doc = "Register `IN_EP0_ST` reader"]
+pub type R = crate::R<IN_EP0_ST_SPEC>;
+#[doc = "Field `IN_EP0_STATE` reader - State of IN Endpoint 0."]
+pub type IN_EP0_STATE_R = crate::FieldReader;
+#[doc = "Field `IN_EP0_WR_ADDR` reader - Write data address of IN endpoint 0."]
+pub type IN_EP0_WR_ADDR_R = crate::FieldReader;
+#[doc = "Field `IN_EP0_RD_ADDR` reader - Read data address of IN endpoint 0."]
+pub type IN_EP0_RD_ADDR_R = crate::FieldReader;
+impl R {
+    #[doc = "Bits 0:1 - State of IN Endpoint 0."]
+    #[inline(always)]
+    pub fn in_ep0_state(&self) -> IN_EP0_STATE_R {
+        IN_EP0_STATE_R::new((self.bits & 3) as u8)
+    }
+    #[doc = "Bits 2:8 - Write data address of IN endpoint 0."]
+    #[inline(always)]
+    pub fn in_ep0_wr_addr(&self) -> IN_EP0_WR_ADDR_R {
+        IN_EP0_WR_ADDR_R::new(((self.bits >> 2) & 0x7f) as u8)
+    }
+    #[doc = "Bits 9:15 - Read data address of IN endpoint 0."]
+    #[inline(always)]
+    pub fn in_ep0_rd_addr(&self) -> IN_EP0_RD_ADDR_R {
+        IN_EP0_RD_ADDR_R::new(((self.bits >> 9) & 0x7f) as u8)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("IN_EP0_ST")
+            .field("in_ep0_state", &self.in_ep0_state())
+            .field("in_ep0_wr_addr", &self.in_ep0_wr_addr())
+            .field("in_ep0_rd_addr", &self.in_ep0_rd_addr())
+            .finish()
+    }
+}
+#[doc = "IN Endpoint 0 status\n\nYou can [`read`](crate::Reg::read) this register and get [`in_ep0_st::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct IN_EP0_ST_SPEC;
+impl crate::RegisterSpec for IN_EP0_ST_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`in_ep0_st::R`](R) reader structure"]
+impl crate::Readable for IN_EP0_ST_SPEC {}
+#[doc = "`reset()` method sets IN_EP0_ST to value 0x01"]
+impl crate::Resettable for IN_EP0_ST_SPEC {
+    const RESET_VALUE: u32 = 0x01;
+}

vendor/esp32s3/src/usb_device/in_ep1_st.rs

@@ -0,0 +1,46 @@
+#[doc = "Register `IN_EP1_ST` reader"]
+pub type R = crate::R<IN_EP1_ST_SPEC>;
+#[doc = "Field `IN_EP1_STATE` reader - State of IN Endpoint 1."]
+pub type IN_EP1_STATE_R = crate::FieldReader;
+#[doc = "Field `IN_EP1_WR_ADDR` reader - Write data address of IN endpoint 1."]
+pub type IN_EP1_WR_ADDR_R = crate::FieldReader;
+#[doc = "Field `IN_EP1_RD_ADDR` reader - Read data address of IN endpoint 1."]
+pub type IN_EP1_RD_ADDR_R = crate::FieldReader;
+impl R {
+    #[doc = "Bits 0:1 - State of IN Endpoint 1."]
+    #[inline(always)]
+    pub fn in_ep1_state(&self) -> IN_EP1_STATE_R {
+        IN_EP1_STATE_R::new((self.bits & 3) as u8)
+    }
+    #[doc = "Bits 2:8 - Write data address of IN endpoint 1."]
+    #[inline(always)]
+    pub fn in_ep1_wr_addr(&self) -> IN_EP1_WR_ADDR_R {
+        IN_EP1_WR_ADDR_R::new(((self.bits >> 2) & 0x7f) as u8)
+    }
+    #[doc = "Bits 9:15 - Read data address of IN endpoint 1."]
+    #[inline(always)]
+    pub fn in_ep1_rd_addr(&self) -> IN_EP1_RD_ADDR_R {
+        IN_EP1_RD_ADDR_R::new(((self.bits >> 9) & 0x7f) as u8)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("IN_EP1_ST")
+            .field("in_ep1_state", &self.in_ep1_state())
+            .field("in_ep1_wr_addr", &self.in_ep1_wr_addr())
+            .field("in_ep1_rd_addr", &self.in_ep1_rd_addr())
+            .finish()
+    }
+}
+#[doc = "IN Endpoint 1 status\n\nYou can [`read`](crate::Reg::read) this register and get [`in_ep1_st::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct IN_EP1_ST_SPEC;
+impl crate::RegisterSpec for IN_EP1_ST_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`in_ep1_st::R`](R) reader structure"]
+impl crate::Readable for IN_EP1_ST_SPEC {}
+#[doc = "`reset()` method sets IN_EP1_ST to value 0x01"]
+impl crate::Resettable for IN_EP1_ST_SPEC {
+    const RESET_VALUE: u32 = 0x01;
+}

vendor/esp32s3/src/usb_device/in_ep2_st.rs

@@ -0,0 +1,46 @@
+#[doc = "Register `IN_EP2_ST` reader"]
+pub type R = crate::R<IN_EP2_ST_SPEC>;
+#[doc = "Field `IN_EP2_STATE` reader - State of IN Endpoint 2."]
+pub type IN_EP2_STATE_R = crate::FieldReader;
+#[doc = "Field `IN_EP2_WR_ADDR` reader - Write data address of IN endpoint 2."]
+pub type IN_EP2_WR_ADDR_R = crate::FieldReader;
+#[doc = "Field `IN_EP2_RD_ADDR` reader - Read data address of IN endpoint 2."]
+pub type IN_EP2_RD_ADDR_R = crate::FieldReader;
+impl R {
+    #[doc = "Bits 0:1 - State of IN Endpoint 2."]
+    #[inline(always)]
+    pub fn in_ep2_state(&self) -> IN_EP2_STATE_R {
+        IN_EP2_STATE_R::new((self.bits & 3) as u8)
+    }
+    #[doc = "Bits 2:8 - Write data address of IN endpoint 2."]
+    #[inline(always)]
+    pub fn in_ep2_wr_addr(&self) -> IN_EP2_WR_ADDR_R {
+        IN_EP2_WR_ADDR_R::new(((self.bits >> 2) & 0x7f) as u8)
+    }
+    #[doc = "Bits 9:15 - Read data address of IN endpoint 2."]
+    #[inline(always)]
+    pub fn in_ep2_rd_addr(&self) -> IN_EP2_RD_ADDR_R {
+        IN_EP2_RD_ADDR_R::new(((self.bits >> 9) & 0x7f) as u8)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("IN_EP2_ST")
+            .field("in_ep2_state", &self.in_ep2_state())
+            .field("in_ep2_wr_addr", &self.in_ep2_wr_addr())
+            .field("in_ep2_rd_addr", &self.in_ep2_rd_addr())
+            .finish()
+    }
+}
+#[doc = "IN Endpoint 2 status\n\nYou can [`read`](crate::Reg::read) this register and get [`in_ep2_st::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct IN_EP2_ST_SPEC;
+impl crate::RegisterSpec for IN_EP2_ST_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`in_ep2_st::R`](R) reader structure"]
+impl crate::Readable for IN_EP2_ST_SPEC {}
+#[doc = "`reset()` method sets IN_EP2_ST to value 0x01"]
+impl crate::Resettable for IN_EP2_ST_SPEC {
+    const RESET_VALUE: u32 = 0x01;
+}

vendor/esp32s3/src/usb_device/in_ep3_st.rs

@@ -0,0 +1,46 @@
+#[doc = "Register `IN_EP3_ST` reader"]
+pub type R = crate::R<IN_EP3_ST_SPEC>;
+#[doc = "Field `IN_EP3_STATE` reader - State of IN Endpoint 3."]
+pub type IN_EP3_STATE_R = crate::FieldReader;
+#[doc = "Field `IN_EP3_WR_ADDR` reader - Write data address of IN endpoint 3."]
+pub type IN_EP3_WR_ADDR_R = crate::FieldReader;
+#[doc = "Field `IN_EP3_RD_ADDR` reader - Read data address of IN endpoint 3."]
+pub type IN_EP3_RD_ADDR_R = crate::FieldReader;
+impl R {
+    #[doc = "Bits 0:1 - State of IN Endpoint 3."]
+    #[inline(always)]
+    pub fn in_ep3_state(&self) -> IN_EP3_STATE_R {
+        IN_EP3_STATE_R::new((self.bits & 3) as u8)
+    }
+    #[doc = "Bits 2:8 - Write data address of IN endpoint 3."]
+    #[inline(always)]
+    pub fn in_ep3_wr_addr(&self) -> IN_EP3_WR_ADDR_R {
+        IN_EP3_WR_ADDR_R::new(((self.bits >> 2) & 0x7f) as u8)
+    }
+    #[doc = "Bits 9:15 - Read data address of IN endpoint 3."]
+    #[inline(always)]
+    pub fn in_ep3_rd_addr(&self) -> IN_EP3_RD_ADDR_R {
+        IN_EP3_RD_ADDR_R::new(((self.bits >> 9) & 0x7f) as u8)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("IN_EP3_ST")
+            .field("in_ep3_state", &self.in_ep3_state())
+            .field("in_ep3_wr_addr", &self.in_ep3_wr_addr())
+            .field("in_ep3_rd_addr", &self.in_ep3_rd_addr())
+            .finish()
+    }
+}
+#[doc = "IN Endpoint 3 status\n\nYou can [`read`](crate::Reg::read) this register and get [`in_ep3_st::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct IN_EP3_ST_SPEC;
+impl crate::RegisterSpec for IN_EP3_ST_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`in_ep3_st::R`](R) reader structure"]
+impl crate::Readable for IN_EP3_ST_SPEC {}
+#[doc = "`reset()` method sets IN_EP3_ST to value 0x01"]
+impl crate::Resettable for IN_EP3_ST_SPEC {
+    const RESET_VALUE: u32 = 0x01;
+}

vendor/esp32s3/src/usb_device/int_clr.rs

@@ -0,0 +1,109 @@
+#[doc = "Register `INT_CLR` writer"]
+pub type W = crate::W<INT_CLR_SPEC>;
+#[doc = "Field `JTAG_IN_FLUSH` writer - Set this bit to clear the USB_DEVICE_JTAG_IN_FLUSH_INT interrupt."]
+pub type JTAG_IN_FLUSH_W<'a, REG> = crate::BitWriter1C<'a, REG>;
+#[doc = "Field `SOF` writer - Set this bit to clear the USB_DEVICE_JTAG_SOF_INT interrupt."]
+pub type SOF_W<'a, REG> = crate::BitWriter1C<'a, REG>;
+#[doc = "Field `SERIAL_OUT_RECV_PKT` writer - Set this bit to clear the USB_DEVICE_SERIAL_OUT_RECV_PKT_INT interrupt."]
+pub type SERIAL_OUT_RECV_PKT_W<'a, REG> = crate::BitWriter1C<'a, REG>;
+#[doc = "Field `SERIAL_IN_EMPTY` writer - Set this bit to clear the USB_DEVICE_SERIAL_IN_EMPTY_INT interrupt."]
+pub type SERIAL_IN_EMPTY_W<'a, REG> = crate::BitWriter1C<'a, REG>;
+#[doc = "Field `PID_ERR` writer - Set this bit to clear the USB_DEVICE_PID_ERR_INT interrupt."]
+pub type PID_ERR_W<'a, REG> = crate::BitWriter1C<'a, REG>;
+#[doc = "Field `CRC5_ERR` writer - Set this bit to clear the USB_DEVICE_CRC5_ERR_INT interrupt."]
+pub type CRC5_ERR_W<'a, REG> = crate::BitWriter1C<'a, REG>;
+#[doc = "Field `CRC16_ERR` writer - Set this bit to clear the USB_DEVICE_CRC16_ERR_INT interrupt."]
+pub type CRC16_ERR_W<'a, REG> = crate::BitWriter1C<'a, REG>;
+#[doc = "Field `STUFF_ERR` writer - Set this bit to clear the USB_DEVICE_STUFF_ERR_INT interrupt."]
+pub type STUFF_ERR_W<'a, REG> = crate::BitWriter1C<'a, REG>;
+#[doc = "Field `IN_TOKEN_REC_IN_EP1` writer - Set this bit to clear the USB_DEVICE_IN_TOKEN_IN_EP1_INT interrupt."]
+pub type IN_TOKEN_REC_IN_EP1_W<'a, REG> = crate::BitWriter1C<'a, REG>;
+#[doc = "Field `USB_BUS_RESET` writer - Set this bit to clear the USB_DEVICE_USB_BUS_RESET_INT interrupt."]
+pub type USB_BUS_RESET_W<'a, REG> = crate::BitWriter1C<'a, REG>;
+#[doc = "Field `OUT_EP1_ZERO_PAYLOAD` writer - Set this bit to clear the USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT interrupt."]
+pub type OUT_EP1_ZERO_PAYLOAD_W<'a, REG> = crate::BitWriter1C<'a, REG>;
+#[doc = "Field `OUT_EP2_ZERO_PAYLOAD` writer - Set this bit to clear the USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT interrupt."]
+pub type OUT_EP2_ZERO_PAYLOAD_W<'a, REG> = crate::BitWriter1C<'a, REG>;
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for crate::generic::Reg<INT_CLR_SPEC> {
+    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
+        write!(f, "(not readable)")
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Set this bit to clear the USB_DEVICE_JTAG_IN_FLUSH_INT interrupt."]
+    #[inline(always)]
+    pub fn jtag_in_flush(&mut self) -> JTAG_IN_FLUSH_W<INT_CLR_SPEC> {
+        JTAG_IN_FLUSH_W::new(self, 0)
+    }
+    #[doc = "Bit 1 - Set this bit to clear the USB_DEVICE_JTAG_SOF_INT interrupt."]
+    #[inline(always)]
+    pub fn sof(&mut self) -> SOF_W<INT_CLR_SPEC> {
+        SOF_W::new(self, 1)
+    }
+    #[doc = "Bit 2 - Set this bit to clear the USB_DEVICE_SERIAL_OUT_RECV_PKT_INT interrupt."]
+    #[inline(always)]
+    pub fn serial_out_recv_pkt(&mut self) -> SERIAL_OUT_RECV_PKT_W<INT_CLR_SPEC> {
+        SERIAL_OUT_RECV_PKT_W::new(self, 2)
+    }
+    #[doc = "Bit 3 - Set this bit to clear the USB_DEVICE_SERIAL_IN_EMPTY_INT interrupt."]
+    #[inline(always)]
+    pub fn serial_in_empty(&mut self) -> SERIAL_IN_EMPTY_W<INT_CLR_SPEC> {
+        SERIAL_IN_EMPTY_W::new(self, 3)
+    }
+    #[doc = "Bit 4 - Set this bit to clear the USB_DEVICE_PID_ERR_INT interrupt."]
+    #[inline(always)]
+    pub fn pid_err(&mut self) -> PID_ERR_W<INT_CLR_SPEC> {
+        PID_ERR_W::new(self, 4)
+    }
+    #[doc = "Bit 5 - Set this bit to clear the USB_DEVICE_CRC5_ERR_INT interrupt."]
+    #[inline(always)]
+    pub fn crc5_err(&mut self) -> CRC5_ERR_W<INT_CLR_SPEC> {
+        CRC5_ERR_W::new(self, 5)
+    }
+    #[doc = "Bit 6 - Set this bit to clear the USB_DEVICE_CRC16_ERR_INT interrupt."]
+    #[inline(always)]
+    pub fn crc16_err(&mut self) -> CRC16_ERR_W<INT_CLR_SPEC> {
+        CRC16_ERR_W::new(self, 6)
+    }
+    #[doc = "Bit 7 - Set this bit to clear the USB_DEVICE_STUFF_ERR_INT interrupt."]
+    #[inline(always)]
+    pub fn stuff_err(&mut self) -> STUFF_ERR_W<INT_CLR_SPEC> {
+        STUFF_ERR_W::new(self, 7)
+    }
+    #[doc = "Bit 8 - Set this bit to clear the USB_DEVICE_IN_TOKEN_IN_EP1_INT interrupt."]
+    #[inline(always)]
+    pub fn in_token_rec_in_ep1(&mut self) -> IN_TOKEN_REC_IN_EP1_W<INT_CLR_SPEC> {
+        IN_TOKEN_REC_IN_EP1_W::new(self, 8)
+    }
+    #[doc = "Bit 9 - Set this bit to clear the USB_DEVICE_USB_BUS_RESET_INT interrupt."]
+    #[inline(always)]
+    pub fn usb_bus_reset(&mut self) -> USB_BUS_RESET_W<INT_CLR_SPEC> {
+        USB_BUS_RESET_W::new(self, 9)
+    }
+    #[doc = "Bit 10 - Set this bit to clear the USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT interrupt."]
+    #[inline(always)]
+    pub fn out_ep1_zero_payload(&mut self) -> OUT_EP1_ZERO_PAYLOAD_W<INT_CLR_SPEC> {
+        OUT_EP1_ZERO_PAYLOAD_W::new(self, 10)
+    }
+    #[doc = "Bit 11 - Set this bit to clear the USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT interrupt."]
+    #[inline(always)]
+    pub fn out_ep2_zero_payload(&mut self) -> OUT_EP2_ZERO_PAYLOAD_W<INT_CLR_SPEC> {
+        OUT_EP2_ZERO_PAYLOAD_W::new(self, 11)
+    }
+}
+#[doc = "Interrupt clear bits\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct INT_CLR_SPEC;
+impl crate::RegisterSpec for INT_CLR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [`int_clr::W`](W) writer structure"]
+impl crate::Writable for INT_CLR_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0x0fff;
+}
+#[doc = "`reset()` method sets INT_CLR to value 0"]
+impl crate::Resettable for INT_CLR_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/usb_device/int_ena.rs

@@ -0,0 +1,212 @@
+#[doc = "Register `INT_ENA` reader"]
+pub type R = crate::R<INT_ENA_SPEC>;
+#[doc = "Register `INT_ENA` writer"]
+pub type W = crate::W<INT_ENA_SPEC>;
+#[doc = "Field `JTAG_IN_FLUSH` reader - The interrupt enable bit for the USB_DEVICE_JTAG_IN_FLUSH_INT interrupt."]
+pub type JTAG_IN_FLUSH_R = crate::BitReader;
+#[doc = "Field `JTAG_IN_FLUSH` writer - The interrupt enable bit for the USB_DEVICE_JTAG_IN_FLUSH_INT interrupt."]
+pub type JTAG_IN_FLUSH_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `SOF` reader - The interrupt enable bit for the USB_DEVICE_SOF_INT interrupt."]
+pub type SOF_R = crate::BitReader;
+#[doc = "Field `SOF` writer - The interrupt enable bit for the USB_DEVICE_SOF_INT interrupt."]
+pub type SOF_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `SERIAL_OUT_RECV_PKT` reader - The interrupt enable bit for the USB_DEVICE_SERIAL_OUT_RECV_PKT_INT interrupt."]
+pub type SERIAL_OUT_RECV_PKT_R = crate::BitReader;
+#[doc = "Field `SERIAL_OUT_RECV_PKT` writer - The interrupt enable bit for the USB_DEVICE_SERIAL_OUT_RECV_PKT_INT interrupt."]
+pub type SERIAL_OUT_RECV_PKT_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `SERIAL_IN_EMPTY` reader - The interrupt enable bit for the USB_DEVICE_SERIAL_IN_EMPTY_INT interrupt."]
+pub type SERIAL_IN_EMPTY_R = crate::BitReader;
+#[doc = "Field `SERIAL_IN_EMPTY` writer - The interrupt enable bit for the USB_DEVICE_SERIAL_IN_EMPTY_INT interrupt."]
+pub type SERIAL_IN_EMPTY_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `PID_ERR` reader - The interrupt enable bit for the USB_DEVICE_PID_ERR_INT interrupt."]
+pub type PID_ERR_R = crate::BitReader;
+#[doc = "Field `PID_ERR` writer - The interrupt enable bit for the USB_DEVICE_PID_ERR_INT interrupt."]
+pub type PID_ERR_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `CRC5_ERR` reader - The interrupt enable bit for the USB_DEVICE_CRC5_ERR_INT interrupt."]
+pub type CRC5_ERR_R = crate::BitReader;
+#[doc = "Field `CRC5_ERR` writer - The interrupt enable bit for the USB_DEVICE_CRC5_ERR_INT interrupt."]
+pub type CRC5_ERR_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `CRC16_ERR` reader - The interrupt enable bit for the USB_DEVICE_CRC16_ERR_INT interrupt."]
+pub type CRC16_ERR_R = crate::BitReader;
+#[doc = "Field `CRC16_ERR` writer - The interrupt enable bit for the USB_DEVICE_CRC16_ERR_INT interrupt."]
+pub type CRC16_ERR_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `STUFF_ERR` reader - The interrupt enable bit for the USB_DEVICE_STUFF_ERR_INT interrupt."]
+pub type STUFF_ERR_R = crate::BitReader;
+#[doc = "Field `STUFF_ERR` writer - The interrupt enable bit for the USB_DEVICE_STUFF_ERR_INT interrupt."]
+pub type STUFF_ERR_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `IN_TOKEN_REC_IN_EP1` reader - The interrupt enable bit for the USB_DEVICE_IN_TOKEN_REC_IN_EP1_INT interrupt."]
+pub type IN_TOKEN_REC_IN_EP1_R = crate::BitReader;
+#[doc = "Field `IN_TOKEN_REC_IN_EP1` writer - The interrupt enable bit for the USB_DEVICE_IN_TOKEN_REC_IN_EP1_INT interrupt."]
+pub type IN_TOKEN_REC_IN_EP1_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `USB_BUS_RESET` reader - The interrupt enable bit for the USB_DEVICE_USB_BUS_RESET_INT interrupt."]
+pub type USB_BUS_RESET_R = crate::BitReader;
+#[doc = "Field `USB_BUS_RESET` writer - The interrupt enable bit for the USB_DEVICE_USB_BUS_RESET_INT interrupt."]
+pub type USB_BUS_RESET_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `OUT_EP1_ZERO_PAYLOAD` reader - The interrupt enable bit for the USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT interrupt."]
+pub type OUT_EP1_ZERO_PAYLOAD_R = crate::BitReader;
+#[doc = "Field `OUT_EP1_ZERO_PAYLOAD` writer - The interrupt enable bit for the USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT interrupt."]
+pub type OUT_EP1_ZERO_PAYLOAD_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `OUT_EP2_ZERO_PAYLOAD` reader - The interrupt enable bit for the USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT interrupt."]
+pub type OUT_EP2_ZERO_PAYLOAD_R = crate::BitReader;
+#[doc = "Field `OUT_EP2_ZERO_PAYLOAD` writer - The interrupt enable bit for the USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT interrupt."]
+pub type OUT_EP2_ZERO_PAYLOAD_W<'a, REG> = crate::BitWriter<'a, REG>;
+impl R {
+    #[doc = "Bit 0 - The interrupt enable bit for the USB_DEVICE_JTAG_IN_FLUSH_INT interrupt."]
+    #[inline(always)]
+    pub fn jtag_in_flush(&self) -> JTAG_IN_FLUSH_R {
+        JTAG_IN_FLUSH_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - The interrupt enable bit for the USB_DEVICE_SOF_INT interrupt."]
+    #[inline(always)]
+    pub fn sof(&self) -> SOF_R {
+        SOF_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - The interrupt enable bit for the USB_DEVICE_SERIAL_OUT_RECV_PKT_INT interrupt."]
+    #[inline(always)]
+    pub fn serial_out_recv_pkt(&self) -> SERIAL_OUT_RECV_PKT_R {
+        SERIAL_OUT_RECV_PKT_R::new(((self.bits >> 2) & 1) != 0)
+    }
+    #[doc = "Bit 3 - The interrupt enable bit for the USB_DEVICE_SERIAL_IN_EMPTY_INT interrupt."]
+    #[inline(always)]
+    pub fn serial_in_empty(&self) -> SERIAL_IN_EMPTY_R {
+        SERIAL_IN_EMPTY_R::new(((self.bits >> 3) & 1) != 0)
+    }
+    #[doc = "Bit 4 - The interrupt enable bit for the USB_DEVICE_PID_ERR_INT interrupt."]
+    #[inline(always)]
+    pub fn pid_err(&self) -> PID_ERR_R {
+        PID_ERR_R::new(((self.bits >> 4) & 1) != 0)
+    }
+    #[doc = "Bit 5 - The interrupt enable bit for the USB_DEVICE_CRC5_ERR_INT interrupt."]
+    #[inline(always)]
+    pub fn crc5_err(&self) -> CRC5_ERR_R {
+        CRC5_ERR_R::new(((self.bits >> 5) & 1) != 0)
+    }
+    #[doc = "Bit 6 - The interrupt enable bit for the USB_DEVICE_CRC16_ERR_INT interrupt."]
+    #[inline(always)]
+    pub fn crc16_err(&self) -> CRC16_ERR_R {
+        CRC16_ERR_R::new(((self.bits >> 6) & 1) != 0)
+    }
+    #[doc = "Bit 7 - The interrupt enable bit for the USB_DEVICE_STUFF_ERR_INT interrupt."]
+    #[inline(always)]
+    pub fn stuff_err(&self) -> STUFF_ERR_R {
+        STUFF_ERR_R::new(((self.bits >> 7) & 1) != 0)
+    }
+    #[doc = "Bit 8 - The interrupt enable bit for the USB_DEVICE_IN_TOKEN_REC_IN_EP1_INT interrupt."]
+    #[inline(always)]
+    pub fn in_token_rec_in_ep1(&self) -> IN_TOKEN_REC_IN_EP1_R {
+        IN_TOKEN_REC_IN_EP1_R::new(((self.bits >> 8) & 1) != 0)
+    }
+    #[doc = "Bit 9 - The interrupt enable bit for the USB_DEVICE_USB_BUS_RESET_INT interrupt."]
+    #[inline(always)]
+    pub fn usb_bus_reset(&self) -> USB_BUS_RESET_R {
+        USB_BUS_RESET_R::new(((self.bits >> 9) & 1) != 0)
+    }
+    #[doc = "Bit 10 - The interrupt enable bit for the USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT interrupt."]
+    #[inline(always)]
+    pub fn out_ep1_zero_payload(&self) -> OUT_EP1_ZERO_PAYLOAD_R {
+        OUT_EP1_ZERO_PAYLOAD_R::new(((self.bits >> 10) & 1) != 0)
+    }
+    #[doc = "Bit 11 - The interrupt enable bit for the USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT interrupt."]
+    #[inline(always)]
+    pub fn out_ep2_zero_payload(&self) -> OUT_EP2_ZERO_PAYLOAD_R {
+        OUT_EP2_ZERO_PAYLOAD_R::new(((self.bits >> 11) & 1) != 0)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("INT_ENA")
+            .field("jtag_in_flush", &self.jtag_in_flush())
+            .field("sof", &self.sof())
+            .field("serial_out_recv_pkt", &self.serial_out_recv_pkt())
+            .field("serial_in_empty", &self.serial_in_empty())
+            .field("pid_err", &self.pid_err())
+            .field("crc5_err", &self.crc5_err())
+            .field("crc16_err", &self.crc16_err())
+            .field("stuff_err", &self.stuff_err())
+            .field("in_token_rec_in_ep1", &self.in_token_rec_in_ep1())
+            .field("usb_bus_reset", &self.usb_bus_reset())
+            .field("out_ep1_zero_payload", &self.out_ep1_zero_payload())
+            .field("out_ep2_zero_payload", &self.out_ep2_zero_payload())
+            .finish()
+    }
+}
+impl W {
+    #[doc = "Bit 0 - The interrupt enable bit for the USB_DEVICE_JTAG_IN_FLUSH_INT interrupt."]
+    #[inline(always)]
+    pub fn jtag_in_flush(&mut self) -> JTAG_IN_FLUSH_W<INT_ENA_SPEC> {
+        JTAG_IN_FLUSH_W::new(self, 0)
+    }
+    #[doc = "Bit 1 - The interrupt enable bit for the USB_DEVICE_SOF_INT interrupt."]
+    #[inline(always)]
+    pub fn sof(&mut self) -> SOF_W<INT_ENA_SPEC> {
+        SOF_W::new(self, 1)
+    }
+    #[doc = "Bit 2 - The interrupt enable bit for the USB_DEVICE_SERIAL_OUT_RECV_PKT_INT interrupt."]
+    #[inline(always)]
+    pub fn serial_out_recv_pkt(&mut self) -> SERIAL_OUT_RECV_PKT_W<INT_ENA_SPEC> {
+        SERIAL_OUT_RECV_PKT_W::new(self, 2)
+    }
+    #[doc = "Bit 3 - The interrupt enable bit for the USB_DEVICE_SERIAL_IN_EMPTY_INT interrupt."]
+    #[inline(always)]
+    pub fn serial_in_empty(&mut self) -> SERIAL_IN_EMPTY_W<INT_ENA_SPEC> {
+        SERIAL_IN_EMPTY_W::new(self, 3)
+    }
+    #[doc = "Bit 4 - The interrupt enable bit for the USB_DEVICE_PID_ERR_INT interrupt."]
+    #[inline(always)]
+    pub fn pid_err(&mut self) -> PID_ERR_W<INT_ENA_SPEC> {
+        PID_ERR_W::new(self, 4)
+    }
+    #[doc = "Bit 5 - The interrupt enable bit for the USB_DEVICE_CRC5_ERR_INT interrupt."]
+    #[inline(always)]
+    pub fn crc5_err(&mut self) -> CRC5_ERR_W<INT_ENA_SPEC> {
+        CRC5_ERR_W::new(self, 5)
+    }
+    #[doc = "Bit 6 - The interrupt enable bit for the USB_DEVICE_CRC16_ERR_INT interrupt."]
+    #[inline(always)]
+    pub fn crc16_err(&mut self) -> CRC16_ERR_W<INT_ENA_SPEC> {
+        CRC16_ERR_W::new(self, 6)
+    }
+    #[doc = "Bit 7 - The interrupt enable bit for the USB_DEVICE_STUFF_ERR_INT interrupt."]
+    #[inline(always)]
+    pub fn stuff_err(&mut self) -> STUFF_ERR_W<INT_ENA_SPEC> {
+        STUFF_ERR_W::new(self, 7)
+    }
+    #[doc = "Bit 8 - The interrupt enable bit for the USB_DEVICE_IN_TOKEN_REC_IN_EP1_INT interrupt."]
+    #[inline(always)]
+    pub fn in_token_rec_in_ep1(&mut self) -> IN_TOKEN_REC_IN_EP1_W<INT_ENA_SPEC> {
+        IN_TOKEN_REC_IN_EP1_W::new(self, 8)
+    }
+    #[doc = "Bit 9 - The interrupt enable bit for the USB_DEVICE_USB_BUS_RESET_INT interrupt."]
+    #[inline(always)]
+    pub fn usb_bus_reset(&mut self) -> USB_BUS_RESET_W<INT_ENA_SPEC> {
+        USB_BUS_RESET_W::new(self, 9)
+    }
+    #[doc = "Bit 10 - The interrupt enable bit for the USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT interrupt."]
+    #[inline(always)]
+    pub fn out_ep1_zero_payload(&mut self) -> OUT_EP1_ZERO_PAYLOAD_W<INT_ENA_SPEC> {
+        OUT_EP1_ZERO_PAYLOAD_W::new(self, 10)
+    }
+    #[doc = "Bit 11 - The interrupt enable bit for the USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT interrupt."]
+    #[inline(always)]
+    pub fn out_ep2_zero_payload(&mut self) -> OUT_EP2_ZERO_PAYLOAD_W<INT_ENA_SPEC> {
+        OUT_EP2_ZERO_PAYLOAD_W::new(self, 11)
+    }
+}
+#[doc = "Interrupt enable bits\n\nYou can [`read`](crate::Reg::read) this register and get [`int_ena::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_ena::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct INT_ENA_SPEC;
+impl crate::RegisterSpec for INT_ENA_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`int_ena::R`](R) reader structure"]
+impl crate::Readable for INT_ENA_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`int_ena::W`](W) writer structure"]
+impl crate::Writable for INT_ENA_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets INT_ENA to value 0"]
+impl crate::Resettable for INT_ENA_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/usb_device/int_raw.rs

@@ -0,0 +1,212 @@
+#[doc = "Register `INT_RAW` reader"]
+pub type R = crate::R<INT_RAW_SPEC>;
+#[doc = "Register `INT_RAW` writer"]
+pub type W = crate::W<INT_RAW_SPEC>;
+#[doc = "Field `JTAG_IN_FLUSH` reader - The raw interrupt bit turns to high level when flush cmd is received for IN endpoint 2 of JTAG."]
+pub type JTAG_IN_FLUSH_R = crate::BitReader;
+#[doc = "Field `JTAG_IN_FLUSH` writer - The raw interrupt bit turns to high level when flush cmd is received for IN endpoint 2 of JTAG."]
+pub type JTAG_IN_FLUSH_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `SOF` reader - The raw interrupt bit turns to high level when SOF frame is received."]
+pub type SOF_R = crate::BitReader;
+#[doc = "Field `SOF` writer - The raw interrupt bit turns to high level when SOF frame is received."]
+pub type SOF_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `SERIAL_OUT_RECV_PKT` reader - The raw interrupt bit turns to high level when Serial Port OUT Endpoint received one packet."]
+pub type SERIAL_OUT_RECV_PKT_R = crate::BitReader;
+#[doc = "Field `SERIAL_OUT_RECV_PKT` writer - The raw interrupt bit turns to high level when Serial Port OUT Endpoint received one packet."]
+pub type SERIAL_OUT_RECV_PKT_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `SERIAL_IN_EMPTY` reader - The raw interrupt bit turns to high level when Serial Port IN Endpoint is empty."]
+pub type SERIAL_IN_EMPTY_R = crate::BitReader;
+#[doc = "Field `SERIAL_IN_EMPTY` writer - The raw interrupt bit turns to high level when Serial Port IN Endpoint is empty."]
+pub type SERIAL_IN_EMPTY_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `PID_ERR` reader - The raw interrupt bit turns to high level when pid error is detected."]
+pub type PID_ERR_R = crate::BitReader;
+#[doc = "Field `PID_ERR` writer - The raw interrupt bit turns to high level when pid error is detected."]
+pub type PID_ERR_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `CRC5_ERR` reader - The raw interrupt bit turns to high level when CRC5 error is detected."]
+pub type CRC5_ERR_R = crate::BitReader;
+#[doc = "Field `CRC5_ERR` writer - The raw interrupt bit turns to high level when CRC5 error is detected."]
+pub type CRC5_ERR_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `CRC16_ERR` reader - The raw interrupt bit turns to high level when CRC16 error is detected."]
+pub type CRC16_ERR_R = crate::BitReader;
+#[doc = "Field `CRC16_ERR` writer - The raw interrupt bit turns to high level when CRC16 error is detected."]
+pub type CRC16_ERR_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `STUFF_ERR` reader - The raw interrupt bit turns to high level when stuff error is detected."]
+pub type STUFF_ERR_R = crate::BitReader;
+#[doc = "Field `STUFF_ERR` writer - The raw interrupt bit turns to high level when stuff error is detected."]
+pub type STUFF_ERR_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `IN_TOKEN_REC_IN_EP1` reader - The raw interrupt bit turns to high level when IN token for IN endpoint 1 is received."]
+pub type IN_TOKEN_REC_IN_EP1_R = crate::BitReader;
+#[doc = "Field `IN_TOKEN_REC_IN_EP1` writer - The raw interrupt bit turns to high level when IN token for IN endpoint 1 is received."]
+pub type IN_TOKEN_REC_IN_EP1_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `USB_BUS_RESET` reader - The raw interrupt bit turns to high level when usb bus reset is detected."]
+pub type USB_BUS_RESET_R = crate::BitReader;
+#[doc = "Field `USB_BUS_RESET` writer - The raw interrupt bit turns to high level when usb bus reset is detected."]
+pub type USB_BUS_RESET_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `OUT_EP1_ZERO_PAYLOAD` reader - The raw interrupt bit turns to high level when OUT endpoint 1 received packet with zero palyload."]
+pub type OUT_EP1_ZERO_PAYLOAD_R = crate::BitReader;
+#[doc = "Field `OUT_EP1_ZERO_PAYLOAD` writer - The raw interrupt bit turns to high level when OUT endpoint 1 received packet with zero palyload."]
+pub type OUT_EP1_ZERO_PAYLOAD_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `OUT_EP2_ZERO_PAYLOAD` reader - The raw interrupt bit turns to high level when OUT endpoint 2 received packet with zero palyload."]
+pub type OUT_EP2_ZERO_PAYLOAD_R = crate::BitReader;
+#[doc = "Field `OUT_EP2_ZERO_PAYLOAD` writer - The raw interrupt bit turns to high level when OUT endpoint 2 received packet with zero palyload."]
+pub type OUT_EP2_ZERO_PAYLOAD_W<'a, REG> = crate::BitWriter<'a, REG>;
+impl R {
+    #[doc = "Bit 0 - The raw interrupt bit turns to high level when flush cmd is received for IN endpoint 2 of JTAG."]
+    #[inline(always)]
+    pub fn jtag_in_flush(&self) -> JTAG_IN_FLUSH_R {
+        JTAG_IN_FLUSH_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - The raw interrupt bit turns to high level when SOF frame is received."]
+    #[inline(always)]
+    pub fn sof(&self) -> SOF_R {
+        SOF_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - The raw interrupt bit turns to high level when Serial Port OUT Endpoint received one packet."]
+    #[inline(always)]
+    pub fn serial_out_recv_pkt(&self) -> SERIAL_OUT_RECV_PKT_R {
+        SERIAL_OUT_RECV_PKT_R::new(((self.bits >> 2) & 1) != 0)
+    }
+    #[doc = "Bit 3 - The raw interrupt bit turns to high level when Serial Port IN Endpoint is empty."]
+    #[inline(always)]
+    pub fn serial_in_empty(&self) -> SERIAL_IN_EMPTY_R {
+        SERIAL_IN_EMPTY_R::new(((self.bits >> 3) & 1) != 0)
+    }
+    #[doc = "Bit 4 - The raw interrupt bit turns to high level when pid error is detected."]
+    #[inline(always)]
+    pub fn pid_err(&self) -> PID_ERR_R {
+        PID_ERR_R::new(((self.bits >> 4) & 1) != 0)
+    }
+    #[doc = "Bit 5 - The raw interrupt bit turns to high level when CRC5 error is detected."]
+    #[inline(always)]
+    pub fn crc5_err(&self) -> CRC5_ERR_R {
+        CRC5_ERR_R::new(((self.bits >> 5) & 1) != 0)
+    }
+    #[doc = "Bit 6 - The raw interrupt bit turns to high level when CRC16 error is detected."]
+    #[inline(always)]
+    pub fn crc16_err(&self) -> CRC16_ERR_R {
+        CRC16_ERR_R::new(((self.bits >> 6) & 1) != 0)
+    }
+    #[doc = "Bit 7 - The raw interrupt bit turns to high level when stuff error is detected."]
+    #[inline(always)]
+    pub fn stuff_err(&self) -> STUFF_ERR_R {
+        STUFF_ERR_R::new(((self.bits >> 7) & 1) != 0)
+    }
+    #[doc = "Bit 8 - The raw interrupt bit turns to high level when IN token for IN endpoint 1 is received."]
+    #[inline(always)]
+    pub fn in_token_rec_in_ep1(&self) -> IN_TOKEN_REC_IN_EP1_R {
+        IN_TOKEN_REC_IN_EP1_R::new(((self.bits >> 8) & 1) != 0)
+    }
+    #[doc = "Bit 9 - The raw interrupt bit turns to high level when usb bus reset is detected."]
+    #[inline(always)]
+    pub fn usb_bus_reset(&self) -> USB_BUS_RESET_R {
+        USB_BUS_RESET_R::new(((self.bits >> 9) & 1) != 0)
+    }
+    #[doc = "Bit 10 - The raw interrupt bit turns to high level when OUT endpoint 1 received packet with zero palyload."]
+    #[inline(always)]
+    pub fn out_ep1_zero_payload(&self) -> OUT_EP1_ZERO_PAYLOAD_R {
+        OUT_EP1_ZERO_PAYLOAD_R::new(((self.bits >> 10) & 1) != 0)
+    }
+    #[doc = "Bit 11 - The raw interrupt bit turns to high level when OUT endpoint 2 received packet with zero palyload."]
+    #[inline(always)]
+    pub fn out_ep2_zero_payload(&self) -> OUT_EP2_ZERO_PAYLOAD_R {
+        OUT_EP2_ZERO_PAYLOAD_R::new(((self.bits >> 11) & 1) != 0)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("INT_RAW")
+            .field("jtag_in_flush", &self.jtag_in_flush())
+            .field("sof", &self.sof())
+            .field("serial_out_recv_pkt", &self.serial_out_recv_pkt())
+            .field("serial_in_empty", &self.serial_in_empty())
+            .field("pid_err", &self.pid_err())
+            .field("crc5_err", &self.crc5_err())
+            .field("crc16_err", &self.crc16_err())
+            .field("stuff_err", &self.stuff_err())
+            .field("in_token_rec_in_ep1", &self.in_token_rec_in_ep1())
+            .field("usb_bus_reset", &self.usb_bus_reset())
+            .field("out_ep1_zero_payload", &self.out_ep1_zero_payload())
+            .field("out_ep2_zero_payload", &self.out_ep2_zero_payload())
+            .finish()
+    }
+}
+impl W {
+    #[doc = "Bit 0 - The raw interrupt bit turns to high level when flush cmd is received for IN endpoint 2 of JTAG."]
+    #[inline(always)]
+    pub fn jtag_in_flush(&mut self) -> JTAG_IN_FLUSH_W<INT_RAW_SPEC> {
+        JTAG_IN_FLUSH_W::new(self, 0)
+    }
+    #[doc = "Bit 1 - The raw interrupt bit turns to high level when SOF frame is received."]
+    #[inline(always)]
+    pub fn sof(&mut self) -> SOF_W<INT_RAW_SPEC> {
+        SOF_W::new(self, 1)
+    }
+    #[doc = "Bit 2 - The raw interrupt bit turns to high level when Serial Port OUT Endpoint received one packet."]
+    #[inline(always)]
+    pub fn serial_out_recv_pkt(&mut self) -> SERIAL_OUT_RECV_PKT_W<INT_RAW_SPEC> {
+        SERIAL_OUT_RECV_PKT_W::new(self, 2)
+    }
+    #[doc = "Bit 3 - The raw interrupt bit turns to high level when Serial Port IN Endpoint is empty."]
+    #[inline(always)]
+    pub fn serial_in_empty(&mut self) -> SERIAL_IN_EMPTY_W<INT_RAW_SPEC> {
+        SERIAL_IN_EMPTY_W::new(self, 3)
+    }
+    #[doc = "Bit 4 - The raw interrupt bit turns to high level when pid error is detected."]
+    #[inline(always)]
+    pub fn pid_err(&mut self) -> PID_ERR_W<INT_RAW_SPEC> {
+        PID_ERR_W::new(self, 4)
+    }
+    #[doc = "Bit 5 - The raw interrupt bit turns to high level when CRC5 error is detected."]
+    #[inline(always)]
+    pub fn crc5_err(&mut self) -> CRC5_ERR_W<INT_RAW_SPEC> {
+        CRC5_ERR_W::new(self, 5)
+    }
+    #[doc = "Bit 6 - The raw interrupt bit turns to high level when CRC16 error is detected."]
+    #[inline(always)]
+    pub fn crc16_err(&mut self) -> CRC16_ERR_W<INT_RAW_SPEC> {
+        CRC16_ERR_W::new(self, 6)
+    }
+    #[doc = "Bit 7 - The raw interrupt bit turns to high level when stuff error is detected."]
+    #[inline(always)]
+    pub fn stuff_err(&mut self) -> STUFF_ERR_W<INT_RAW_SPEC> {
+        STUFF_ERR_W::new(self, 7)
+    }
+    #[doc = "Bit 8 - The raw interrupt bit turns to high level when IN token for IN endpoint 1 is received."]
+    #[inline(always)]
+    pub fn in_token_rec_in_ep1(&mut self) -> IN_TOKEN_REC_IN_EP1_W<INT_RAW_SPEC> {
+        IN_TOKEN_REC_IN_EP1_W::new(self, 8)
+    }
+    #[doc = "Bit 9 - The raw interrupt bit turns to high level when usb bus reset is detected."]
+    #[inline(always)]
+    pub fn usb_bus_reset(&mut self) -> USB_BUS_RESET_W<INT_RAW_SPEC> {
+        USB_BUS_RESET_W::new(self, 9)
+    }
+    #[doc = "Bit 10 - The raw interrupt bit turns to high level when OUT endpoint 1 received packet with zero palyload."]
+    #[inline(always)]
+    pub fn out_ep1_zero_payload(&mut self) -> OUT_EP1_ZERO_PAYLOAD_W<INT_RAW_SPEC> {
+        OUT_EP1_ZERO_PAYLOAD_W::new(self, 10)
+    }
+    #[doc = "Bit 11 - The raw interrupt bit turns to high level when OUT endpoint 2 received packet with zero palyload."]
+    #[inline(always)]
+    pub fn out_ep2_zero_payload(&mut self) -> OUT_EP2_ZERO_PAYLOAD_W<INT_RAW_SPEC> {
+        OUT_EP2_ZERO_PAYLOAD_W::new(self, 11)
+    }
+}
+#[doc = "Raw status interrupt\n\nYou can [`read`](crate::Reg::read) this register and get [`int_raw::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_raw::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct INT_RAW_SPEC;
+impl crate::RegisterSpec for INT_RAW_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`int_raw::R`](R) reader structure"]
+impl crate::Readable for INT_RAW_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`int_raw::W`](W) writer structure"]
+impl crate::Writable for INT_RAW_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets INT_RAW to value 0x08"]
+impl crate::Resettable for INT_RAW_SPEC {
+    const RESET_VALUE: u32 = 0x08;
+}

vendor/esp32s3/src/usb_device/int_st.rs

@@ -0,0 +1,118 @@
+#[doc = "Register `INT_ST` reader"]
+pub type R = crate::R<INT_ST_SPEC>;
+#[doc = "Field `JTAG_IN_FLUSH` reader - The raw interrupt status bit for the USB_DEVICE_JTAG_IN_FLUSH_INT interrupt."]
+pub type JTAG_IN_FLUSH_R = crate::BitReader;
+#[doc = "Field `SOF` reader - The raw interrupt status bit for the USB_DEVICE_SOF_INT interrupt."]
+pub type SOF_R = crate::BitReader;
+#[doc = "Field `SERIAL_OUT_RECV_PKT` reader - The raw interrupt status bit for the USB_DEVICE_SERIAL_OUT_RECV_PKT_INT interrupt."]
+pub type SERIAL_OUT_RECV_PKT_R = crate::BitReader;
+#[doc = "Field `SERIAL_IN_EMPTY` reader - The raw interrupt status bit for the USB_DEVICE_SERIAL_IN_EMPTY_INT interrupt."]
+pub type SERIAL_IN_EMPTY_R = crate::BitReader;
+#[doc = "Field `PID_ERR` reader - The raw interrupt status bit for the USB_DEVICE_PID_ERR_INT interrupt."]
+pub type PID_ERR_R = crate::BitReader;
+#[doc = "Field `CRC5_ERR` reader - The raw interrupt status bit for the USB_DEVICE_CRC5_ERR_INT interrupt."]
+pub type CRC5_ERR_R = crate::BitReader;
+#[doc = "Field `CRC16_ERR` reader - The raw interrupt status bit for the USB_DEVICE_CRC16_ERR_INT interrupt."]
+pub type CRC16_ERR_R = crate::BitReader;
+#[doc = "Field `STUFF_ERR` reader - The raw interrupt status bit for the USB_DEVICE_STUFF_ERR_INT interrupt."]
+pub type STUFF_ERR_R = crate::BitReader;
+#[doc = "Field `IN_TOKEN_REC_IN_EP1` reader - The raw interrupt status bit for the USB_DEVICE_IN_TOKEN_REC_IN_EP1_INT interrupt."]
+pub type IN_TOKEN_REC_IN_EP1_R = crate::BitReader;
+#[doc = "Field `USB_BUS_RESET` reader - The raw interrupt status bit for the USB_DEVICE_USB_BUS_RESET_INT interrupt."]
+pub type USB_BUS_RESET_R = crate::BitReader;
+#[doc = "Field `OUT_EP1_ZERO_PAYLOAD` reader - The raw interrupt status bit for the USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT interrupt."]
+pub type OUT_EP1_ZERO_PAYLOAD_R = crate::BitReader;
+#[doc = "Field `OUT_EP2_ZERO_PAYLOAD` reader - The raw interrupt status bit for the USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT interrupt."]
+pub type OUT_EP2_ZERO_PAYLOAD_R = crate::BitReader;
+impl R {
+    #[doc = "Bit 0 - The raw interrupt status bit for the USB_DEVICE_JTAG_IN_FLUSH_INT interrupt."]
+    #[inline(always)]
+    pub fn jtag_in_flush(&self) -> JTAG_IN_FLUSH_R {
+        JTAG_IN_FLUSH_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - The raw interrupt status bit for the USB_DEVICE_SOF_INT interrupt."]
+    #[inline(always)]
+    pub fn sof(&self) -> SOF_R {
+        SOF_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - The raw interrupt status bit for the USB_DEVICE_SERIAL_OUT_RECV_PKT_INT interrupt."]
+    #[inline(always)]
+    pub fn serial_out_recv_pkt(&self) -> SERIAL_OUT_RECV_PKT_R {
+        SERIAL_OUT_RECV_PKT_R::new(((self.bits >> 2) & 1) != 0)
+    }
+    #[doc = "Bit 3 - The raw interrupt status bit for the USB_DEVICE_SERIAL_IN_EMPTY_INT interrupt."]
+    #[inline(always)]
+    pub fn serial_in_empty(&self) -> SERIAL_IN_EMPTY_R {
+        SERIAL_IN_EMPTY_R::new(((self.bits >> 3) & 1) != 0)
+    }
+    #[doc = "Bit 4 - The raw interrupt status bit for the USB_DEVICE_PID_ERR_INT interrupt."]
+    #[inline(always)]
+    pub fn pid_err(&self) -> PID_ERR_R {
+        PID_ERR_R::new(((self.bits >> 4) & 1) != 0)
+    }
+    #[doc = "Bit 5 - The raw interrupt status bit for the USB_DEVICE_CRC5_ERR_INT interrupt."]
+    #[inline(always)]
+    pub fn crc5_err(&self) -> CRC5_ERR_R {
+        CRC5_ERR_R::new(((self.bits >> 5) & 1) != 0)
+    }
+    #[doc = "Bit 6 - The raw interrupt status bit for the USB_DEVICE_CRC16_ERR_INT interrupt."]
+    #[inline(always)]
+    pub fn crc16_err(&self) -> CRC16_ERR_R {
+        CRC16_ERR_R::new(((self.bits >> 6) & 1) != 0)
+    }
+    #[doc = "Bit 7 - The raw interrupt status bit for the USB_DEVICE_STUFF_ERR_INT interrupt."]
+    #[inline(always)]
+    pub fn stuff_err(&self) -> STUFF_ERR_R {
+        STUFF_ERR_R::new(((self.bits >> 7) & 1) != 0)
+    }
+    #[doc = "Bit 8 - The raw interrupt status bit for the USB_DEVICE_IN_TOKEN_REC_IN_EP1_INT interrupt."]
+    #[inline(always)]
+    pub fn in_token_rec_in_ep1(&self) -> IN_TOKEN_REC_IN_EP1_R {
+        IN_TOKEN_REC_IN_EP1_R::new(((self.bits >> 8) & 1) != 0)
+    }
+    #[doc = "Bit 9 - The raw interrupt status bit for the USB_DEVICE_USB_BUS_RESET_INT interrupt."]
+    #[inline(always)]
+    pub fn usb_bus_reset(&self) -> USB_BUS_RESET_R {
+        USB_BUS_RESET_R::new(((self.bits >> 9) & 1) != 0)
+    }
+    #[doc = "Bit 10 - The raw interrupt status bit for the USB_DEVICE_OUT_EP1_ZERO_PAYLOAD_INT interrupt."]
+    #[inline(always)]
+    pub fn out_ep1_zero_payload(&self) -> OUT_EP1_ZERO_PAYLOAD_R {
+        OUT_EP1_ZERO_PAYLOAD_R::new(((self.bits >> 10) & 1) != 0)
+    }
+    #[doc = "Bit 11 - The raw interrupt status bit for the USB_DEVICE_OUT_EP2_ZERO_PAYLOAD_INT interrupt."]
+    #[inline(always)]
+    pub fn out_ep2_zero_payload(&self) -> OUT_EP2_ZERO_PAYLOAD_R {
+        OUT_EP2_ZERO_PAYLOAD_R::new(((self.bits >> 11) & 1) != 0)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("INT_ST")
+            .field("jtag_in_flush", &self.jtag_in_flush())
+            .field("sof", &self.sof())
+            .field("serial_out_recv_pkt", &self.serial_out_recv_pkt())
+            .field("serial_in_empty", &self.serial_in_empty())
+            .field("pid_err", &self.pid_err())
+            .field("crc5_err", &self.crc5_err())
+            .field("crc16_err", &self.crc16_err())
+            .field("stuff_err", &self.stuff_err())
+            .field("in_token_rec_in_ep1", &self.in_token_rec_in_ep1())
+            .field("usb_bus_reset", &self.usb_bus_reset())
+            .field("out_ep1_zero_payload", &self.out_ep1_zero_payload())
+            .field("out_ep2_zero_payload", &self.out_ep2_zero_payload())
+            .finish()
+    }
+}
+#[doc = "Masked interrupt\n\nYou can [`read`](crate::Reg::read) this register and get [`int_st::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct INT_ST_SPEC;
+impl crate::RegisterSpec for INT_ST_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`int_st::R`](R) reader structure"]
+impl crate::Readable for INT_ST_SPEC {}
+#[doc = "`reset()` method sets INT_ST to value 0"]
+impl crate::Resettable for INT_ST_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/usb_device/jfifo_st.rs

@@ -0,0 +1,110 @@
+#[doc = "Register `JFIFO_ST` reader"]
+pub type R = crate::R<JFIFO_ST_SPEC>;
+#[doc = "Register `JFIFO_ST` writer"]
+pub type W = crate::W<JFIFO_ST_SPEC>;
+#[doc = "Field `IN_FIFO_CNT` reader - JTAT in fifo counter."]
+pub type IN_FIFO_CNT_R = crate::FieldReader;
+#[doc = "Field `IN_FIFO_EMPTY` reader - 1: JTAG in fifo is empty."]
+pub type IN_FIFO_EMPTY_R = crate::BitReader;
+#[doc = "Field `IN_FIFO_FULL` reader - 1: JTAG in fifo is full."]
+pub type IN_FIFO_FULL_R = crate::BitReader;
+#[doc = "Field `OUT_FIFO_CNT` reader - JTAT out fifo counter."]
+pub type OUT_FIFO_CNT_R = crate::FieldReader;
+#[doc = "Field `OUT_FIFO_EMPTY` reader - 1: JTAG out fifo is empty."]
+pub type OUT_FIFO_EMPTY_R = crate::BitReader;
+#[doc = "Field `OUT_FIFO_FULL` reader - 1: JTAG out fifo is full."]
+pub type OUT_FIFO_FULL_R = crate::BitReader;
+#[doc = "Field `IN_FIFO_RESET` reader - Write 1 to reset JTAG in fifo."]
+pub type IN_FIFO_RESET_R = crate::BitReader;
+#[doc = "Field `IN_FIFO_RESET` writer - Write 1 to reset JTAG in fifo."]
+pub type IN_FIFO_RESET_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `OUT_FIFO_RESET` reader - Write 1 to reset JTAG out fifo."]
+pub type OUT_FIFO_RESET_R = crate::BitReader;
+#[doc = "Field `OUT_FIFO_RESET` writer - Write 1 to reset JTAG out fifo."]
+pub type OUT_FIFO_RESET_W<'a, REG> = crate::BitWriter<'a, REG>;
+impl R {
+    #[doc = "Bits 0:1 - JTAT in fifo counter."]
+    #[inline(always)]
+    pub fn in_fifo_cnt(&self) -> IN_FIFO_CNT_R {
+        IN_FIFO_CNT_R::new((self.bits & 3) as u8)
+    }
+    #[doc = "Bit 2 - 1: JTAG in fifo is empty."]
+    #[inline(always)]
+    pub fn in_fifo_empty(&self) -> IN_FIFO_EMPTY_R {
+        IN_FIFO_EMPTY_R::new(((self.bits >> 2) & 1) != 0)
+    }
+    #[doc = "Bit 3 - 1: JTAG in fifo is full."]
+    #[inline(always)]
+    pub fn in_fifo_full(&self) -> IN_FIFO_FULL_R {
+        IN_FIFO_FULL_R::new(((self.bits >> 3) & 1) != 0)
+    }
+    #[doc = "Bits 4:5 - JTAT out fifo counter."]
+    #[inline(always)]
+    pub fn out_fifo_cnt(&self) -> OUT_FIFO_CNT_R {
+        OUT_FIFO_CNT_R::new(((self.bits >> 4) & 3) as u8)
+    }
+    #[doc = "Bit 6 - 1: JTAG out fifo is empty."]
+    #[inline(always)]
+    pub fn out_fifo_empty(&self) -> OUT_FIFO_EMPTY_R {
+        OUT_FIFO_EMPTY_R::new(((self.bits >> 6) & 1) != 0)
+    }
+    #[doc = "Bit 7 - 1: JTAG out fifo is full."]
+    #[inline(always)]
+    pub fn out_fifo_full(&self) -> OUT_FIFO_FULL_R {
+        OUT_FIFO_FULL_R::new(((self.bits >> 7) & 1) != 0)
+    }
+    #[doc = "Bit 8 - Write 1 to reset JTAG in fifo."]
+    #[inline(always)]
+    pub fn in_fifo_reset(&self) -> IN_FIFO_RESET_R {
+        IN_FIFO_RESET_R::new(((self.bits >> 8) & 1) != 0)
+    }
+    #[doc = "Bit 9 - Write 1 to reset JTAG out fifo."]
+    #[inline(always)]
+    pub fn out_fifo_reset(&self) -> OUT_FIFO_RESET_R {
+        OUT_FIFO_RESET_R::new(((self.bits >> 9) & 1) != 0)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("JFIFO_ST")
+            .field("in_fifo_cnt", &self.in_fifo_cnt())
+            .field("in_fifo_empty", &self.in_fifo_empty())
+            .field("in_fifo_full", &self.in_fifo_full())
+            .field("out_fifo_cnt", &self.out_fifo_cnt())
+            .field("out_fifo_empty", &self.out_fifo_empty())
+            .field("out_fifo_full", &self.out_fifo_full())
+            .field("in_fifo_reset", &self.in_fifo_reset())
+            .field("out_fifo_reset", &self.out_fifo_reset())
+            .finish()
+    }
+}
+impl W {
+    #[doc = "Bit 8 - Write 1 to reset JTAG in fifo."]
+    #[inline(always)]
+    pub fn in_fifo_reset(&mut self) -> IN_FIFO_RESET_W<JFIFO_ST_SPEC> {
+        IN_FIFO_RESET_W::new(self, 8)
+    }
+    #[doc = "Bit 9 - Write 1 to reset JTAG out fifo."]
+    #[inline(always)]
+    pub fn out_fifo_reset(&mut self) -> OUT_FIFO_RESET_W<JFIFO_ST_SPEC> {
+        OUT_FIFO_RESET_W::new(self, 9)
+    }
+}
+#[doc = "USB-JTAG FIFO status\n\nYou can [`read`](crate::Reg::read) this register and get [`jfifo_st::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`jfifo_st::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct JFIFO_ST_SPEC;
+impl crate::RegisterSpec for JFIFO_ST_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`jfifo_st::R`](R) reader structure"]
+impl crate::Readable for JFIFO_ST_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`jfifo_st::W`](W) writer structure"]
+impl crate::Writable for JFIFO_ST_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets JFIFO_ST to value 0x44"]
+impl crate::Resettable for JFIFO_ST_SPEC {
+    const RESET_VALUE: u32 = 0x44;
+}

vendor/esp32s3/src/usb_device/mem_conf.rs

@@ -0,0 +1,62 @@
+#[doc = "Register `MEM_CONF` reader"]
+pub type R = crate::R<MEM_CONF_SPEC>;
+#[doc = "Register `MEM_CONF` writer"]
+pub type W = crate::W<MEM_CONF_SPEC>;
+#[doc = "Field `USB_MEM_PD` reader - 1: power down usb memory."]
+pub type USB_MEM_PD_R = crate::BitReader;
+#[doc = "Field `USB_MEM_PD` writer - 1: power down usb memory."]
+pub type USB_MEM_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `USB_MEM_CLK_EN` reader - 1: Force clock on for usb memory."]
+pub type USB_MEM_CLK_EN_R = crate::BitReader;
+#[doc = "Field `USB_MEM_CLK_EN` writer - 1: Force clock on for usb memory."]
+pub type USB_MEM_CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
+impl R {
+    #[doc = "Bit 0 - 1: power down usb memory."]
+    #[inline(always)]
+    pub fn usb_mem_pd(&self) -> USB_MEM_PD_R {
+        USB_MEM_PD_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - 1: Force clock on for usb memory."]
+    #[inline(always)]
+    pub fn usb_mem_clk_en(&self) -> USB_MEM_CLK_EN_R {
+        USB_MEM_CLK_EN_R::new(((self.bits >> 1) & 1) != 0)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("MEM_CONF")
+            .field("usb_mem_pd", &self.usb_mem_pd())
+            .field("usb_mem_clk_en", &self.usb_mem_clk_en())
+            .finish()
+    }
+}
+impl W {
+    #[doc = "Bit 0 - 1: power down usb memory."]
+    #[inline(always)]
+    pub fn usb_mem_pd(&mut self) -> USB_MEM_PD_W<MEM_CONF_SPEC> {
+        USB_MEM_PD_W::new(self, 0)
+    }
+    #[doc = "Bit 1 - 1: Force clock on for usb memory."]
+    #[inline(always)]
+    pub fn usb_mem_clk_en(&mut self) -> USB_MEM_CLK_EN_W<MEM_CONF_SPEC> {
+        USB_MEM_CLK_EN_W::new(self, 1)
+    }
+}
+#[doc = "Power control\n\nYou can [`read`](crate::Reg::read) this register and get [`mem_conf::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mem_conf::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct MEM_CONF_SPEC;
+impl crate::RegisterSpec for MEM_CONF_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`mem_conf::R`](R) reader structure"]
+impl crate::Readable for MEM_CONF_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`mem_conf::W`](W) writer structure"]
+impl crate::Writable for MEM_CONF_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets MEM_CONF to value 0x02"]
+impl crate::Resettable for MEM_CONF_SPEC {
+    const RESET_VALUE: u32 = 0x02;
+}

vendor/esp32s3/src/usb_device/misc_conf.rs

@@ -0,0 +1,47 @@
+#[doc = "Register `MISC_CONF` reader"]
+pub type R = crate::R<MISC_CONF_SPEC>;
+#[doc = "Register `MISC_CONF` writer"]
+pub type W = crate::W<MISC_CONF_SPEC>;
+#[doc = "Field `CLK_EN` reader - 1'h1: Force clock on for register. 1'h0: Support clock only when application writes registers."]
+pub type CLK_EN_R = crate::BitReader;
+#[doc = "Field `CLK_EN` writer - 1'h1: Force clock on for register. 1'h0: Support clock only when application writes registers."]
+pub type CLK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
+impl R {
+    #[doc = "Bit 0 - 1'h1: Force clock on for register. 1'h0: Support clock only when application writes registers."]
+    #[inline(always)]
+    pub fn clk_en(&self) -> CLK_EN_R {
+        CLK_EN_R::new((self.bits & 1) != 0)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("MISC_CONF")
+            .field("clk_en", &self.clk_en())
+            .finish()
+    }
+}
+impl W {
+    #[doc = "Bit 0 - 1'h1: Force clock on for register. 1'h0: Support clock only when application writes registers."]
+    #[inline(always)]
+    pub fn clk_en(&mut self) -> CLK_EN_W<MISC_CONF_SPEC> {
+        CLK_EN_W::new(self, 0)
+    }
+}
+#[doc = "MISC register\n\nYou can [`read`](crate::Reg::read) this register and get [`misc_conf::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`misc_conf::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct MISC_CONF_SPEC;
+impl crate::RegisterSpec for MISC_CONF_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`misc_conf::R`](R) reader structure"]
+impl crate::Readable for MISC_CONF_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`misc_conf::W`](W) writer structure"]
+impl crate::Writable for MISC_CONF_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets MISC_CONF to value 0"]
+impl crate::Resettable for MISC_CONF_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/usb_device/out_ep0_st.rs

@@ -0,0 +1,46 @@
+#[doc = "Register `OUT_EP0_ST` reader"]
+pub type R = crate::R<OUT_EP0_ST_SPEC>;
+#[doc = "Field `OUT_EP0_STATE` reader - State of OUT Endpoint 0."]
+pub type OUT_EP0_STATE_R = crate::FieldReader;
+#[doc = "Field `OUT_EP0_WR_ADDR` reader - Write data address of OUT endpoint 0. When USB_DEVICE_SERIAL_OUT_RECV_PKT_INT is detected, there are USB_DEVICE_OUT_EP0_WR_ADDR-2 bytes data in OUT EP0."]
+pub type OUT_EP0_WR_ADDR_R = crate::FieldReader;
+#[doc = "Field `OUT_EP0_RD_ADDR` reader - Read data address of OUT endpoint 0."]
+pub type OUT_EP0_RD_ADDR_R = crate::FieldReader;
+impl R {
+    #[doc = "Bits 0:1 - State of OUT Endpoint 0."]
+    #[inline(always)]
+    pub fn out_ep0_state(&self) -> OUT_EP0_STATE_R {
+        OUT_EP0_STATE_R::new((self.bits & 3) as u8)
+    }
+    #[doc = "Bits 2:8 - Write data address of OUT endpoint 0. When USB_DEVICE_SERIAL_OUT_RECV_PKT_INT is detected, there are USB_DEVICE_OUT_EP0_WR_ADDR-2 bytes data in OUT EP0."]
+    #[inline(always)]
+    pub fn out_ep0_wr_addr(&self) -> OUT_EP0_WR_ADDR_R {
+        OUT_EP0_WR_ADDR_R::new(((self.bits >> 2) & 0x7f) as u8)
+    }
+    #[doc = "Bits 9:15 - Read data address of OUT endpoint 0."]
+    #[inline(always)]
+    pub fn out_ep0_rd_addr(&self) -> OUT_EP0_RD_ADDR_R {
+        OUT_EP0_RD_ADDR_R::new(((self.bits >> 9) & 0x7f) as u8)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("OUT_EP0_ST")
+            .field("out_ep0_state", &self.out_ep0_state())
+            .field("out_ep0_wr_addr", &self.out_ep0_wr_addr())
+            .field("out_ep0_rd_addr", &self.out_ep0_rd_addr())
+            .finish()
+    }
+}
+#[doc = "OUT Endpoint 0 status\n\nYou can [`read`](crate::Reg::read) this register and get [`out_ep0_st::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct OUT_EP0_ST_SPEC;
+impl crate::RegisterSpec for OUT_EP0_ST_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`out_ep0_st::R`](R) reader structure"]
+impl crate::Readable for OUT_EP0_ST_SPEC {}
+#[doc = "`reset()` method sets OUT_EP0_ST to value 0"]
+impl crate::Resettable for OUT_EP0_ST_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/usb_device/out_ep1_st.rs

@@ -0,0 +1,54 @@
+#[doc = "Register `OUT_EP1_ST` reader"]
+pub type R = crate::R<OUT_EP1_ST_SPEC>;
+#[doc = "Field `OUT_EP1_STATE` reader - State of OUT Endpoint 1."]
+pub type OUT_EP1_STATE_R = crate::FieldReader;
+#[doc = "Field `OUT_EP1_WR_ADDR` reader - Write data address of OUT endpoint 1. When USB_DEVICE_SERIAL_OUT_RECV_PKT_INT is detected, there are USB_DEVICE_OUT_EP1_WR_ADDR-2 bytes data in OUT EP1."]
+pub type OUT_EP1_WR_ADDR_R = crate::FieldReader;
+#[doc = "Field `OUT_EP1_RD_ADDR` reader - Read data address of OUT endpoint 1."]
+pub type OUT_EP1_RD_ADDR_R = crate::FieldReader;
+#[doc = "Field `OUT_EP1_REC_DATA_CNT` reader - Data count in OUT endpoint 1 when one packet is received."]
+pub type OUT_EP1_REC_DATA_CNT_R = crate::FieldReader;
+impl R {
+    #[doc = "Bits 0:1 - State of OUT Endpoint 1."]
+    #[inline(always)]
+    pub fn out_ep1_state(&self) -> OUT_EP1_STATE_R {
+        OUT_EP1_STATE_R::new((self.bits & 3) as u8)
+    }
+    #[doc = "Bits 2:8 - Write data address of OUT endpoint 1. When USB_DEVICE_SERIAL_OUT_RECV_PKT_INT is detected, there are USB_DEVICE_OUT_EP1_WR_ADDR-2 bytes data in OUT EP1."]
+    #[inline(always)]
+    pub fn out_ep1_wr_addr(&self) -> OUT_EP1_WR_ADDR_R {
+        OUT_EP1_WR_ADDR_R::new(((self.bits >> 2) & 0x7f) as u8)
+    }
+    #[doc = "Bits 9:15 - Read data address of OUT endpoint 1."]
+    #[inline(always)]
+    pub fn out_ep1_rd_addr(&self) -> OUT_EP1_RD_ADDR_R {
+        OUT_EP1_RD_ADDR_R::new(((self.bits >> 9) & 0x7f) as u8)
+    }
+    #[doc = "Bits 16:22 - Data count in OUT endpoint 1 when one packet is received."]
+    #[inline(always)]
+    pub fn out_ep1_rec_data_cnt(&self) -> OUT_EP1_REC_DATA_CNT_R {
+        OUT_EP1_REC_DATA_CNT_R::new(((self.bits >> 16) & 0x7f) as u8)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("OUT_EP1_ST")
+            .field("out_ep1_state", &self.out_ep1_state())
+            .field("out_ep1_wr_addr", &self.out_ep1_wr_addr())
+            .field("out_ep1_rd_addr", &self.out_ep1_rd_addr())
+            .field("out_ep1_rec_data_cnt", &self.out_ep1_rec_data_cnt())
+            .finish()
+    }
+}
+#[doc = "OUT Endpoint 1 status\n\nYou can [`read`](crate::Reg::read) this register and get [`out_ep1_st::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct OUT_EP1_ST_SPEC;
+impl crate::RegisterSpec for OUT_EP1_ST_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`out_ep1_st::R`](R) reader structure"]
+impl crate::Readable for OUT_EP1_ST_SPEC {}
+#[doc = "`reset()` method sets OUT_EP1_ST to value 0"]
+impl crate::Resettable for OUT_EP1_ST_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/usb_device/out_ep2_st.rs

@@ -0,0 +1,46 @@
+#[doc = "Register `OUT_EP2_ST` reader"]
+pub type R = crate::R<OUT_EP2_ST_SPEC>;
+#[doc = "Field `OUT_EP2_STATE` reader - State of OUT Endpoint 2."]
+pub type OUT_EP2_STATE_R = crate::FieldReader;
+#[doc = "Field `OUT_EP2_WR_ADDR` reader - Write data address of OUT endpoint 2. When USB_DEVICE_SERIAL_OUT_RECV_PKT_INT is detected, there are USB_DEVICE_OUT_EP2_WR_ADDR-2 bytes data in OUT EP2."]
+pub type OUT_EP2_WR_ADDR_R = crate::FieldReader;
+#[doc = "Field `OUT_EP2_RD_ADDR` reader - Read data address of OUT endpoint 2."]
+pub type OUT_EP2_RD_ADDR_R = crate::FieldReader;
+impl R {
+    #[doc = "Bits 0:1 - State of OUT Endpoint 2."]
+    #[inline(always)]
+    pub fn out_ep2_state(&self) -> OUT_EP2_STATE_R {
+        OUT_EP2_STATE_R::new((self.bits & 3) as u8)
+    }
+    #[doc = "Bits 2:8 - Write data address of OUT endpoint 2. When USB_DEVICE_SERIAL_OUT_RECV_PKT_INT is detected, there are USB_DEVICE_OUT_EP2_WR_ADDR-2 bytes data in OUT EP2."]
+    #[inline(always)]
+    pub fn out_ep2_wr_addr(&self) -> OUT_EP2_WR_ADDR_R {
+        OUT_EP2_WR_ADDR_R::new(((self.bits >> 2) & 0x7f) as u8)
+    }
+    #[doc = "Bits 9:15 - Read data address of OUT endpoint 2."]
+    #[inline(always)]
+    pub fn out_ep2_rd_addr(&self) -> OUT_EP2_RD_ADDR_R {
+        OUT_EP2_RD_ADDR_R::new(((self.bits >> 9) & 0x7f) as u8)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("OUT_EP2_ST")
+            .field("out_ep2_state", &self.out_ep2_state())
+            .field("out_ep2_wr_addr", &self.out_ep2_wr_addr())
+            .field("out_ep2_rd_addr", &self.out_ep2_rd_addr())
+            .finish()
+    }
+}
+#[doc = "OUT Endpoint 2 status\n\nYou can [`read`](crate::Reg::read) this register and get [`out_ep2_st::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct OUT_EP2_ST_SPEC;
+impl crate::RegisterSpec for OUT_EP2_ST_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`out_ep2_st::R`](R) reader structure"]
+impl crate::Readable for OUT_EP2_ST_SPEC {}
+#[doc = "`reset()` method sets OUT_EP2_ST to value 0"]
+impl crate::Resettable for OUT_EP2_ST_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

vendor/esp32s3/src/usb_device/test.rs

@@ -0,0 +1,116 @@
+#[doc = "Register `TEST` reader"]
+pub type R = crate::R<TEST_SPEC>;
+#[doc = "Register `TEST` writer"]
+pub type W = crate::W<TEST_SPEC>;
+#[doc = "Field `ENABLE` reader - Enable test of the USB pad"]
+pub type ENABLE_R = crate::BitReader;
+#[doc = "Field `ENABLE` writer - Enable test of the USB pad"]
+pub type ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `USB_OE` reader - USB pad oen in test"]
+pub type USB_OE_R = crate::BitReader;
+#[doc = "Field `USB_OE` writer - USB pad oen in test"]
+pub type USB_OE_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `TX_DP` reader - USB D+ tx value in test"]
+pub type TX_DP_R = crate::BitReader;
+#[doc = "Field `TX_DP` writer - USB D+ tx value in test"]
+pub type TX_DP_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `TX_DM` reader - USB D- tx value in test"]
+pub type TX_DM_R = crate::BitReader;
+#[doc = "Field `TX_DM` writer - USB D- tx value in test"]
+pub type TX_DM_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `RX_RCV` reader - USB differential rx value in test"]
+pub type RX_RCV_R = crate::BitReader;
+#[doc = "Field `RX_DP` reader - USB D+ rx value in test"]
+pub type RX_DP_R = crate::BitReader;
+#[doc = "Field `RX_DM` reader - USB D- rx value in test"]
+pub type RX_DM_R = crate::BitReader;
+impl R {
+    #[doc = "Bit 0 - Enable test of the USB pad"]
+    #[inline(always)]
+    pub fn enable(&self) -> ENABLE_R {
+        ENABLE_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - USB pad oen in test"]
+    #[inline(always)]
+    pub fn usb_oe(&self) -> USB_OE_R {
+        USB_OE_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - USB D+ tx value in test"]
+    #[inline(always)]
+    pub fn tx_dp(&self) -> TX_DP_R {
+        TX_DP_R::new(((self.bits >> 2) & 1) != 0)
+    }
+    #[doc = "Bit 3 - USB D- tx value in test"]
+    #[inline(always)]
+    pub fn tx_dm(&self) -> TX_DM_R {
+        TX_DM_R::new(((self.bits >> 3) & 1) != 0)
+    }
+    #[doc = "Bit 4 - USB differential rx value in test"]
+    #[inline(always)]
+    pub fn rx_rcv(&self) -> RX_RCV_R {
+        RX_RCV_R::new(((self.bits >> 4) & 1) != 0)
+    }
+    #[doc = "Bit 5 - USB D+ rx value in test"]
+    #[inline(always)]
+    pub fn rx_dp(&self) -> RX_DP_R {
+        RX_DP_R::new(((self.bits >> 5) & 1) != 0)
+    }
+    #[doc = "Bit 6 - USB D- rx value in test"]
+    #[inline(always)]
+    pub fn rx_dm(&self) -> RX_DM_R {
+        RX_DM_R::new(((self.bits >> 6) & 1) != 0)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("TEST")
+            .field("enable", &self.enable())
+            .field("usb_oe", &self.usb_oe())
+            .field("tx_dp", &self.tx_dp())
+            .field("tx_dm", &self.tx_dm())
+            .field("rx_rcv", &self.rx_rcv())
+            .field("rx_dp", &self.rx_dp())
+            .field("rx_dm", &self.rx_dm())
+            .finish()
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Enable test of the USB pad"]
+    #[inline(always)]
+    pub fn enable(&mut self) -> ENABLE_W<TEST_SPEC> {
+        ENABLE_W::new(self, 0)
+    }
+    #[doc = "Bit 1 - USB pad oen in test"]
+    #[inline(always)]
+    pub fn usb_oe(&mut self) -> USB_OE_W<TEST_SPEC> {
+        USB_OE_W::new(self, 1)
+    }
+    #[doc = "Bit 2 - USB D+ tx value in test"]
+    #[inline(always)]
+    pub fn tx_dp(&mut self) -> TX_DP_W<TEST_SPEC> {
+        TX_DP_W::new(self, 2)
+    }
+    #[doc = "Bit 3 - USB D- tx value in test"]
+    #[inline(always)]
+    pub fn tx_dm(&mut self) -> TX_DM_W<TEST_SPEC> {
+        TX_DM_W::new(self, 3)
+    }
+}
+#[doc = "USB Internal PHY test register\n\nYou can [`read`](crate::Reg::read) this register and get [`test::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`test::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct TEST_SPEC;
+impl crate::RegisterSpec for TEST_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`test::R`](R) reader structure"]
+impl crate::Readable for TEST_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`test::W`](W) writer structure"]
+impl crate::Writable for TEST_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets TEST to value 0"]
+impl crate::Resettable for TEST_SPEC {
+    const RESET_VALUE: u32 = 0;
+}