swaitsandClaude Opus 4.6
3102fc747a
Implement full SSD1306 OLED display support: - Splash screen on boot (1.5s) with project name, version, board - Dashboard showing radio state, config, counters, RSSI/SNR - RSSI history sparkline (64-sample ring buffer, 2px-wide bars) - DisplayOn/DisplayOff host commands routed via dedicated channel - Pure render functions against generic DrawTarget (no hardware coupling) - Display on/off control bypasses radio task entirely Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
45 lines
2.1 KiB
Markdown
45 lines
2.1 KiB
Markdown
[](https://crates.io/crates/esp-synopsys-usb-otg)
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[](https://crates.io/crates/esp-synopsys-usb-otg)
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# This is a fork of [synopsys-usb-otg](https://crates.io/crates/synopsys-usb-otg) with support for ESP32-Sx added - please use https://github.com/stm32-rs/synopsys-usb-otg when not targeting ESP32-Sx
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# `synopsys-usb-otg`
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> [usb-device](https://github.com/mvirkkunen/usb-device) implementation for Synopsys USB OTG IP cores.
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This project is a successor to the [great work](https://github.com/mvirkkunen/stm32f103xx-usb)
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started by [@mvirkkunen](https://github.com/mvirkkunen).
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## Supported microcontrollers
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* `STM32F429xx` (OTG_FS and OTG_HS in FS mode)
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* `STM32F401xx`
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* `STM32F446xx` (OTG_FS and OTG_HS in FS mode)
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* `STM32F723xx` (OTG_FS and OTG_HS with internal HS PHY)
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* `STM32H7xxxx` (OTG1_HS and OTG2_HS in FS mode, and OTG1_HS with external HS PHY)
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* And others...
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## Usage
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This driver is intended for use through a device hal library.
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Such hal library should implement `UsbPeripheral` for the corresponding USB peripheral object.
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This trait declares all the peripheral properties that may vary from one device family to the other.
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Additionally, hal should pass `fs` of `hs` feature to the `synopsys-usb-otg` library to
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define a peripheral type:
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* `fs` - for FullSpeed peripherals
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* `hs` - for HighSpeed peripherals
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Only one peripheral type can be selected at the moment.
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### ULPI Transciever Delay
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Some ULPI PHYs like the Microchip USB334x series require a delay between the ULPI register write that initiates
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the HS Chirp and the subsequent transmit command, otherwise the HS Chirp does not get executed and the deivce
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enumerates in FS mode. Some USB Link IP like those in the STM32H7 series support adding this delay to work with the
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affected PHYs. Enable the `xcvrdly` feature to add this delay.
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## Examples
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See the [usb-otg-workspace](https://github.com/Disasm/usb-otg-workspace) repo for different device-specific examples.
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