10 Commits
Author SHA1 Message Date
swaits 481712930c chore: release 1.4.0 2026-04-25 20:23:39 -06:00
swaits d262abe853 feat(radio): adaptive LBT — scale CAD retries to current LoRa config
The CAD pre-TX loop previously ran up to 10 retries with a fixed 10 ms
sleep — roughly one max-length packet only at SF7/BW500. At SF10/BW125
the 100 ms total was ~4% of one packet; at SF12/BW125 LBT was a no-op.

Now the per-retry sleep is sized to one time-on-air of an assumed-peer
80-byte packet under the active config, cached on RadioContext and
recomputed on every SET_CONFIG. Retries scale as
clamp(floor(BUDGET/T)+1, 1, 10) with BUDGET=2.5 s, so fast configs
still get up to 10 retries while SF11/12 degrade to single-CAD-and-bail
(logged at config-apply). Sleeps are jittered ±20% per iteration to
decorrelate simultaneously-backing-off contenders.

The ToA math, CR→{1..4} mapping, retry-count derivation, and jitter
helper live in a pure src/lbt.rs module so they're host-testable via
DONGLORA_HOST_TEST=1 cargo test (13 tests).

Validated on-device: 20 iterations of the AI Bot test flow that
previously saw ~2 ChannelBusy errors now see zero at the same SF/BW.
2026-04-25 20:15:44 -06:00
swaits 23ddc15557 fix(radio): consume upstream lora-phy pre-command BUSY check
Pick up the proper fix from our fork at swaits/lora-rs@fix/sx126x-busy-race:
move the ready check from *after* to *before* each SPI op per the
Semtech manuals (SX1261/2 §8.3.1, LR1121 UM §3 / §3.5, LR1110 DS
§1.2.5) and rename InterfaceVariant::wait_on_busy to wait_until_ready.

Firmware side is surgical: since the upstream fix keeps the
GenericSx126xInterfaceVariant::new signature at 5 args (no DelayNs
threading), there is nothing to change in the four nRF / ESP / RP2040
board files beyond a one-line comment rename (wait_on_busy ->
wait_until_ready) in the BUSY-pullup comment on the two nRF boards.

Wire in the [patch.crates-io] override pointing at ../../lora-rs/lora-phy,
bump the dep spec to the pre-release 3.0.2-alpha that matches the fork,
and enable the defmt-03 feature that upstream moved behind a gate
between 3.0.1 and the fix branch.

TODO.md rewritten to track the new approach: PR body template with
verbatim citations from all three Semtech chip manuals (SX1261/2,
LR1121 UM, LR1110 DS) plus the SX1276 pin table confirming the family
has no BUSY line.

No change to firmware behavior beyond picking up the upstream fix,
which takes first-TX-after-boot success from ~50% to 20/20 on the
Seeed Wio Tracker L1 repro board.
2026-04-24 12:44:01 -06:00
swaits 4d723a85ce fix(boards): BUSY pin pull-down → none on nRF SX1262 boards
SX1262's BUSY pin has an internal 20 kΩ pull-up (datasheet page 53).
Our Input::new(..., Pull::Down) on BUSY creates contention with that
internal pull-up, leaving BUSY at an indeterminate voltage. This can
cause wait_on_busy to mis-read the chip's ready state — sometimes
commands land while the chip is still busy (ignored or corrupted),
which manifests as TX_DONE never firing on DIO1 because the SX1262
never actually completed the SetTx it received during BUSY=high.

Fix per lora-rs/lora-rs#260: Pull::Down → Pull::None on BUSY.
Matches the official lora-rs nRF52840 examples.

Applied to both Wio Tracker L1 (reported broken by @swaits today) and
RAK4631 (currently works for us, but was affected by the same class
of bug per the upstream issue — this makes it deterministically
correct rather than 'happens to work').
2026-04-24 01:34:32 -06:00
swaits 6380bcbf6a just(flash): add optional extra_features arg for build/flash/flash-probe
Appends comma-separated extra features to the board feature when
building. Enables iteration workflows like:

    just flash wio_tracker_l1 debug-checkpoint

without having to drop to raw cargo + rust-objcopy + uf2 cp.
2026-04-24 01:34:32 -06:00
swaits 7a045edc1a docs: add TODO.md with esp-hal upgrade task 2026-04-24 00:31:14 -06:00
swaits b53570ce66 chore: update tool specs in mise.toml 2026-04-24 00:25:50 -06:00
swaits 647929ff8d feat(boards): RAK4631 WisBlock bring-up + build-system cleanup
RAK4631 board:
- SX126X_POWER_EN on P1.05 driven HIGH at init (radio is power-gated;
  without this the chip has no power and SPI hangs)
- HFXO + LFXO external crystals in embassy_nrf::Config (USB CDC-ACM
  needs +/- 500 ppm which the internal RC oscillator can't provide)
- SoftwareVbusDetect(true, true) so USB enumerates without needing a
  CLOCK_POWER interrupt handler
- Green LED on P1.03 via SimpleLed (RAK19007 Base LED1, active HIGH)
- driver/mod.rs: open simple_led feature gate for rak_wisblock_4631
- Spim::new pin-order comment on SPI setup (arg order is sck/miso/mosi,
  not sck/mosi/miso — easy to get wrong)

debug-checkpoint instrumentation (feature-gated, zero cost in release):
- radio.rs: debug_blink::set(N) at each TX-phase boundary, filling in
  the long-aspirational blink-map doc
- debug_blink.rs: checkpoint 19 between prepare_for_cad and cad(), so
  future bring-ups can distinguish modem-setup hang from DIO1-wait hang

justfile + mise.toml:
- set shell := ["mise", "exec", "--", "sh", "-c"] so recipes
  always resolve tools through mise, not whatever happens to be on PATH
- replace per-board := vars + long if/elif _info chain with a single
  case statement — one place per board, two lists (names + metadata)
- new flash-dfu recipe using adafruit-nrfutil via uvx, with VID:PID
  (239a:0029) port autodetect for the Adafruit nRF52 bootloader
- mise.toml: rust pins now carry ARM targets + clippy, so 'mise install'
  is sufficient bootstrapping (no extra rustup target add steps)

Verified TX on real hardware (RAK19007 Base + RAK4631 Core + RAK1921
OLED, US915 band): ADVERT round-trip with an external receiver.
2026-04-24 00:15:29 -06:00
swaits 0fbd8412c2 chore: release 1.3.1 2026-04-23 18:25:50 -06:00
swaits ebd576b4e2 fix(boards): invert LilyGo T-Beam (classic) LED polarity via InvertedPin wrapper
The classic T-Beam's red LED on GPIO4 is wired active-low (anode to V+,
cathode to GPIO). Release v1.3.0 drove it as active-high, so the LED sat
lit at idle and dimmed briefly on TX/RX instead of flashing on activity.

Express the polarity where it physically lives — at the pin — via a new
generic InvertedPin<P> wrapper that swaps set_high/set_low. SimpleLed
stays polarity-agnostic and every other board's code path is
byte-for-byte unchanged from v1.3.0.

Empirically verified against hardware on both T-Beam boards: classic red
LED is now dark at idle and flashes on TX/RX; Supreme blue LED behaves
unchanged.
2026-04-23 18:04:20 -06:00
17 changed files with 1017 additions and 118 deletions

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+108
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@@ -7,6 +7,114 @@ and this project adheres to [Semantic Versioning](https://semver.org/).
## [Unreleased]
## [1.4.0] - 2026-04-25
### Added
- **RAK4631 WisBlock board support** (nRF52840 + SX1262, RAK19007 base
+ RAK4631 Core + RAK1921 OLED). The second nRF52840 + SX1262 board
alongside the Wio Tracker L1.
- `SX126X_POWER_EN` (P1.05) driven HIGH at init — the radio is
power-gated on this module; without this the chip has no power
and SPI hangs.
- HFXO + LFXO external crystals selected in `embassy_nrf::Config`.
USB CDC-ACM needs ±500 ppm which the internal RC oscillator
can't provide.
- `SoftwareVbusDetect(true, true)` so USB enumerates without a
`CLOCK_POWER` interrupt handler.
- Green LED on P1.03 (RAK19007 Base LED1, active-HIGH) via
`SimpleLed`.
- Hardware-validated end-to-end: ADVERT round-trip with an external
receiver on US915.
- Added `debug-checkpoint` blink-map coverage at every TX-phase
boundary in `radio.rs`, including a new checkpoint between
`prepare_for_cad` and `cad()` so future bring-ups can distinguish
a modem-setup hang from a DIO1-wait hang.
- **Adaptive listen-before-talk.** The CAD pre-TX retry loop scales to
the active LoRa config instead of running a fixed 10 retries × 10 ms
(which was roughly one max-length packet at SF7/BW500 and a no-op at
SF12/BW125).
- Per-retry sleep is sized to the time-on-air of an assumed-peer
80-byte packet under the current SF/BW/CR — cached on
`RadioContext`, recomputed on every `SET_CONFIG`.
- Retry count = `clamp(floor(BUDGET/T)+1, 1, 10)` with `BUDGET = 2.5
s`. Fast configs still get up to 10 retries; SF11/12 degrade to
single-CAD-and-bail (logged at config-apply).
- Sleeps jittered ±20% per iteration to decorrelate
simultaneously-backing-off contenders.
- ToA math, CR→{1..4} mapping, retry-count derivation, and jitter
helper live in a pure `src/lbt.rs` module — host-testable via
`DONGLORA_HOST_TEST=1 cargo test` (13 tests).
- Validated on-device: 20 iterations of the AI Bot test flow that
previously saw ~2 `ChannelBusy` errors now sees zero at the same
SF/BW.
### Fixed
- **First-TX-after-boot reliability on SX1262 boards.** Picked up the
upstream `lora-phy` fix that moves the BUSY-handshake check from
*after* to *before* each SPI op, per Semtech SX1261/2 §8.3.1, LR1121
UM §3, and LR1110 DS §1.2.5. The existing post-op wait is preserved
as the belt that closes the BUSY-assertion latency window
(T_SW ≤ 600 ns) that a single level-poll can miss. Consumed via
`[patch.crates-io]` against `swaits/lora-rs#fix/sx126x-busy-race`
until the upstream PR merges.
- Hardware-verified on Seeed Wio Tracker L1: 20/20 clean-boot TX
(vs ~50% before).
- Renames `InterfaceVariant::wait_on_busy` → `wait_until_ready` to
match the new semantics.
- **BUSY pin pull-down → none on nRF SX1262 boards.** SX1262's BUSY
pin has an internal 20 kΩ pull-up (datasheet p. 53); our
`Input::new(..., Pull::Down)` was contending with it, leaving BUSY
at an indeterminate voltage and intermittently mis-reading the
chip's ready state. Per `lora-rs/lora-rs#260`, switched to
`Pull::None` on both Wio Tracker L1 and RAK4631. The RAK4631
appeared to work before, but was affected by the same class of bug
per the upstream issue — now deterministically correct rather than
"happens to work".
### Changed
- **Build-system DX.** `just flash`, `just flash-probe`, and
`just build` accept an optional comma-separated `extra_features`
argument that is appended to the board feature, e.g. `just flash
wio_tracker_l1 debug-checkpoint`. No more dropping to raw
`cargo + rust-objcopy + uf2 cp` for iteration loops.
- **`just` recipes now resolve all tools through `mise`** via
`set shell := ["mise", "exec", "--", "sh", "-c"]`. `cargo`,
`espflash`, `rust-objcopy`, `cargo-hex-to-uf2` etc. always pick up
the versions pinned in `mise.toml` regardless of `PATH` ordering.
- **`mise.toml` rust pins now carry ARM targets + clippy**, so a fresh
`mise install` is sufficient bootstrapping — no manual
`rustup target add` for `thumbv6m-none-eabi` /
`thumbv7em-none-eabihf` and no separate clippy install.
- **New `just flash-dfu` recipe** for the Adafruit nRF52 bootloader
(VID:PID `239a:0029`) via `adafruit-nrfutil` under `uvx`, with port
autodetect.
- **Per-board `_info` chain in the justfile** collapsed from a long
per-board `if/elif` ladder + per-board `:=` variables into a single
`case` statement — one place per board, two lists (names +
metadata).
## [1.3.1] - 2026-04-23
### Fixed
- **LilyGo T-Beam (classic) red LED now flashes on TX/RX** instead of
dimming off. The red LED under the OLED is wired active-LOW on this
board (anode to V+, cathode to GPIO4); v1.3.0 drove it as active-HIGH,
so the LED sat lit at idle and briefly dimmed during activity.
- Empirically verified on hardware against both T-Beam variants.
- Introduces `src/driver/inverted_pin.rs::InvertedPin<P>`, a generic
`OutputPin` wrapper that swaps `set_high`/`set_low`. Polarity is
expressed at the pin (where the physical wiring lives), so
`SimpleLed` stays polarity-agnostic and every other board's code
path is byte-for-byte unchanged.
- Classic T-Beam now constructs its LED as
`SimpleLed(InvertedPin(led_pin))` with pin init at `Level::High`
(dark at boot).
## [1.3.0] - 2026-04-23
### Added
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name = "lorawan-macros"
version = "0.1.0"
source = "git+https://github.com/swaits/lora-rs.git?branch=fix%2Fsx126x-busy-race#f9ebb303a7029cbc3f19f0760ae164946000b152"
dependencies = [
"proc-macro2",
"quote",
"syn 2.0.117",
]
[[package]]
name = "matchers"
version = "0.2.0"
@@ -2214,8 +2415,8 @@ source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "e3bf829a2d51ab4a5ddf1352d8470c140cadc8301b2ae1789db023f01cedd6ba"
dependencies = [
"cfg-if",
"cpufeatures",
"digest",
"cpufeatures 0.2.17",
"digest 0.10.7",
]
[[package]]
@@ -2225,8 +2426,8 @@ source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "a7507d819769d01a365ab707794a4084392c824f54a7a6a7862f8c3d0892b283"
dependencies = [
"cfg-if",
"cpufeatures",
"digest",
"cpufeatures 0.2.17",
"digest 0.10.7",
]
[[package]]
@@ -2241,7 +2442,7 @@ version = "0.10.8"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "75872d278a8f37ef87fa0ddbda7802605cb18344497949862c0d4dcb291eba60"
dependencies = [
"digest",
"digest 0.10.7",
"keccak",
]
+5 -2
View File
@@ -3,7 +3,7 @@ members = ["."]
[package]
name = "donglora"
version = "1.3.0"
version = "1.4.0"
edition = "2021"
build = "build.rs"
authors = ["Stephen Waits <steve@waits.net>"]
@@ -32,7 +32,10 @@ ucobs = { version = "0.3", features = ["legacy-msrv"] }
heapless = "0.9"
donglora-protocol = "1"
hsmc = { version = "0.2", default-features = false, features = ["embassy"] }
lora-phy = "3.0"
# Pulled from swaits/lora-rs fork until lora-rs/lora-rs#428 (pre-command
# BUSY check) is merged + released on crates.io. Switch back to a normal
# crates.io version then.
lora-phy = { git = "https://github.com/swaits/lora-rs.git", branch = "fix/sx126x-busy-race", features = ["defmt-03"] }
portable-atomic = { version = "1", optional = true, default-features = false, features = ["critical-section"] }
static_cell = "2.1"
+165 -4
View File
@@ -1,4 +1,165 @@
- LED blinking on TX/RX? colored?
- publish new client, mux, bridge (updates in client for UART crap)
- split out mux and client repos
- move to GH organization
# Firmware TODO List
## `lora-phy` fix: drop fork pin once PR #428 merges + releases
Upstream PR: [lora-rs/lora-rs#428 — *phy: add pre-command BUSY checks
per Semtech datasheets*](https://github.com/lora-rs/lora-rs/pull/428)
(open).
Fork branch we ship from:
[`swaits/lora-rs @ fix/sx126x-busy-race`](https://github.com/swaits/lora-rs/tree/fix/sx126x-busy-race).
Firmware consumes the fix via a direct `git` dependency in
`Cargo.toml`:
```toml
lora-phy = { git = "https://github.com/swaits/lora-rs.git", branch = "fix/sx126x-busy-race", features = ["defmt-03"] }
```
When PR #428 merges and a `lora-phy` release ships on crates.io that
contains it, switch this line back to a normal `lora-phy = "X.Y"`
crates.io version and drop the explanatory comment block above it.
Hardware-verified on Wio Tracker L1: 20/20 clean-boot TX after the fix
(vs ~50% before). The fix adds a pre-command BUSY check before each
`SpiInterface` read/write op, keeping the existing post-command wait
in place — belt-and-suspenders bracketing that closes the
BUSY-assertion latency window (T_SW ≤ 600 ns) a single level-poll can
miss.
---
## Drop `[patch.crates-io]` + upgrade esp-hal / esp-rtos + add `esp_app_desc!()` + bump espflash to v4
Single coordinated change that clears our last remaining dep-graph debt
on the ESP boards. All four pieces are coupled, so they land together.
### Why
Today `Cargo.toml` overrides `esp-hal`, `esp-rtos`, `esp-backtrace`, and
`esp-println` with a git pin to `esp-rs/esp-hal#main`. The note in that
block explains the historical reason:
> REVISIT: esp-rtos 0.2.0 on crates.io pins embassy-executor ^0.9. The
> esp-rs/esp-hal main branch already supports 0.10. Remove these
> patches once esp-rtos publishes a release with embassy-executor 0.10
> support.
**That condition is now met.** `esp-rtos 0.3.0` is published on crates.io
and depends on `embassy-executor ^0.10` and `esp-hal ~1.1.0-rc.0` — exactly
what our patches were pulling unofficially. Keeping the patches is no
longer free: it blocks `espflash` v4, blocks `esp-bootloader-esp-idf`, and
ties reproducible builds to whatever commit happens to be on
`esp-rs/esp-hal#main`.
The immediate trigger is `espflash` v4's required
`esp_bootloader_esp_idf::esp_app_desc!()` check. `save-image` refuses any
ESP binary that lacks the IDF app descriptor. The crate that provides the
macro (`esp-bootloader-esp-idf`) uses the same `esp-rom-sys` native
library as `esp-hal` — two copies of the same `links = "esp_rom_sys"` is
a hard cargo error, so `esp-bootloader-esp-idf` must come from the _same
source_ as `esp-hal`. Easiest way to guarantee that: both from crates.io,
no patches.
### What changes
1. **`Cargo.toml`** — delete the entire `[patch.crates-io]` block and the
preceding `REVISIT:` comment. Bump the four esp-rs deps to published
versions:
- `esp-hal = "1.0"` → `"1.1.0-rc.0"` (pre-release selector — see Gotchas)
- `esp-rtos = "0.2"` → `"0.3"`
- `esp-backtrace = "0.18"` → whatever matches esp-rtos 0.3 (check its deps)
- `esp-println = "0.16"` → same
Add a new optional dep + feature wiring for
`esp-bootloader-esp-idf = "0.5"` with `defmt` feature, plus per-board
chip feature (`esp-bootloader-esp-idf/esp32s3` for the S3 boards,
`esp-bootloader-esp-idf/esp32` for LilyGo T-Beam classic).
2. **`src/main.rs`** — inside the ESP-family branch of the existing
`cfg_if!` block (around line 51), invoke the macro at module scope:
```rust
esp_bootloader_esp_idf::esp_app_desc!();
```
Zero runtime cost. Emits ~256 bytes in `.rodata_desc` with app
metadata (name, version, build date) that the ESP-IDF 2nd-stage
bootloader + `espflash save-image` look for.
3. **`mise.toml`** — `"cargo:espflash" = "3"` → `"4"`. Drop the deferral
comment on that line.
4. **Possible API drift fixes** — esp-hal's pre-release versions
occasionally rename or move items. Most likely touch points:
- `src/board/esp32.rs`, `src/board/esp32s3.rs`
- Any board file in `src/board/heltec_*.rs`, `lilygo_*.rs`,
`elecrow_*.rs` that calls into esp-hal / esp-rtos init
Run `just check-all` after steps 1–3 and patch up whatever surfaces.
Don't guess — read the actual compiler errors.
### How (step by step)
1. `jj new -m "chore(esp): drop esp-hal patches, bump to published versions, add esp_app_desc!()"`
2. Edit `Cargo.toml` — delete `[patch.crates-io]` + `REVISIT:` comment;
bump the four versions; add `esp-bootloader-esp-idf` dep + feature
wiring for each ESP board feature block.
3. Edit `src/main.rs` — add `esp_bootloader_esp_idf::esp_app_desc!();`
to the ESP branch of the top-level `cfg_if!`.
4. Edit `mise.toml` — espflash `"3"` → `"4"`.
5. `mise install` to pull espflash 4.x.
6. `cargo update` to let the resolver pick a consistent tree with the
new requirements.
7. `just check-all` — expect some compilation errors from API drift on
ESP boards. Fix them one at a time; consult the official examples
in `esp-rs/esp-hal` if in doubt.
8. `just build heltec_v3` (or any ESP board you have) — verify
`espflash save-image` now succeeds end-to-end producing a valid
`.bin`.
9. Flash to real hardware if available. **The RAK4631 and Wio Tracker
L1 (nRF52) boards should be untouched.**
### Verification
- `just check-all` clean on all 9 boards.
- `just test` (host-side protocol tests) still green.
- For each ESP board that has been physically validated before
(Heltec V3, LilyGo T-Beam units): flash + confirm radio TX works
end-to-end via ai-bot or a known peer.
- RAK4631 + Wio Tracker L1 unchanged; re-check via `just check` on
both, but no re-flash needed (they don't go through the ESP code
path).
### Gotchas
- **Pre-release version selector**: `esp-hal = "1.1.0-rc.0"` by itself
does NOT match pre-release versions in cargo's default semver rules.
Use an exact pre-release like `"1.1.0-rc.0"`, `"~1.1.0-rc.0"` (only
`1.1.0-rc.0`, `1.1.0-rc.1`, … with any patch), or `">=1.1.0-rc.0"`.
`"1.1"` will NOT resolve to a pre-release.
- **Two copies of `esp-rom-sys`**: the root cause of the first failed
attempt at this task. If cargo errors with _"Only one package in the
dependency graph may specify the same links value"_ for
`esp_rom_sys`, it means `esp-hal` and `esp-bootloader-esp-idf` are
being pulled from different sources (one crates.io, one git). Either
both from crates.io (this task's plan) or both from the same git
commit.
- **`esp-bootloader-esp-idf` chip features**: the crate needs exactly
one of `esp32 / esp32s3 / esp32c3 / esp32c6 / …` to be enabled.
Without it, the build panics at its `build.rs`: _"Expected exactly
one of the following features to be enabled: esp32, esp32c2, ..."_.
Wire per-board the same way we wire `esp-hal/esp32s3` etc.
- **Probe-less repro**: `mise install` after bumping espflash to "4"
only installs mise's copy. If the user's global
`~/.cargo/bin/espflash` is stale/different, it still wins on PATH.
The justfile `set shell := ["mise", "exec", "--", "sh", "-c"]`
prepends mise's paths but does NOT reorder `~/.cargo/bin` ahead of
them. Either `cargo uninstall espflash` globally, or change the
justfile recipes to call `$(mise which espflash)` explicitly.
### Why not now
Tried it alongside the RAK4631 bring-up in April 2026 and bounced off
the `esp-rom-sys` two-copies problem. Backed out the attempt and left
espflash pinned at v3 + the patches in place so the bring-up commit
stayed atomic and shippable. This task is what's needed to unblock v4
properly, but it deserves its own focused session — not as
"while-I'm-here" scope on a board bring-up.
+54 -57
View File
@@ -1,43 +1,29 @@
set shell := ["bash", "-c"]
# Board definitions: feature target chip
# Xtensa targets use the self-contained esp toolchain (espup-installed) with
# `-Zbuild-std=core,alloc`. Using `+esp` rather than `+nightly` keeps the
# compiler and rust-src versions aligned — the public nightly drifts ahead of
# the esp fork and breaks core-stdlib compilation otherwise.
# Tool versions are pinned in mise.toml; run `just setup` to install everything.
heltec_v3 := "heltec_v3 xtensa-esp32s3-none-elf esp32s3"
heltec_v3_uart := "heltec_v3_uart xtensa-esp32s3-none-elf esp32s3"
heltec_v4 := "heltec_v4 xtensa-esp32s3-none-elf esp32s3"
elecrow_thinknode_m2 := "elecrow_thinknode_m2 xtensa-esp32s3-none-elf esp32s3"
lilygo_tbeam := "lilygo_tbeam xtensa-esp32-none-elf esp32"
lilygo_tbeam_supreme := "lilygo_tbeam_supreme xtensa-esp32s3-none-elf esp32s3"
rak_wisblock_4631 := "rak_wisblock_4631 thumbv7em-none-eabihf nRF52840_xxAA"
wio_tracker_l1 := "wio_tracker_l1 thumbv7em-none-eabihf nRF52840_xxAA"
waveshare_rp2040_lora := "waveshare_rp2040_lora thumbv6m-none-eabi rp2040"
# Run every recipe with mise's tool versions active — so `just` invocations
# of cargo, espflash, rust-objcopy, etc. always resolve to the pinned
# versions in mise.toml, even if the user has a different version elsewhere
# on PATH (e.g. a stray `cargo install espflash`).
set shell := ["mise", "exec", "--", "sh", "-c"]
builds_dir := "builds"
version := `sed -n 's/^version = "\(.*\)"/\1/p' Cargo.toml`
# All known boards
# All known boards. ADD A NEW BOARD HERE and in the `_info` case below.
#
# Board metadata ("feature target chip") lives in the `_info` recipe —
# Xtensa targets are built with `+esp` + `-Zbuild-std=core,alloc` (the
# self-contained esp toolchain ships its own rust-src; the public
# nightly drifts ahead and breaks core-stdlib compilation).
boards := "heltec_v3 heltec_v3_uart heltec_v4 elecrow_thinknode_m2 lilygo_tbeam lilygo_tbeam_supreme rak_wisblock_4631 waveshare_rp2040_lora wio_tracker_l1"
# Install all required tools and toolchains
setup:
mise trust --yes
mise install
@# ESP Xtensa toolchain (not managed by mise)
@# ESP Xtensa toolchain (not a rustup component — installed out-of-band by espup)
@if ! rustup toolchain list | grep -q "^esp"; then \
echo "ESP toolchain not found, installing via espup (this may take a while)..."; \
espup install || { echo "error: espup install failed" >&2; exit 1; }; \
fi
@# nightly rust-src for -Zbuild-std
@if ! rustup component list --toolchain nightly --installed 2>/dev/null | grep -q "^rust-src"; then \
rustup component add rust-src --toolchain nightly; \
fi
@# ARM targets
@rustup target list --installed | grep -q "^thumbv6m-none-eabi$" || rustup target add thumbv6m-none-eabi
@rustup target list --installed | grep -q "^thumbv7em-none-eabihf$" || rustup target add thumbv7em-none-eabihf
# Build release firmware for all boards, installing toolchains as needed
build-all:
@@ -67,16 +53,20 @@ check-all:
check board:
@just _cargo {{board}} "clippy --release" "-- -D warnings"
# Build release firmware and copy to builds/ with a readable name
build board profile="release":
@just _cargo {{board}} "build --{{profile}}"
# Build release firmware and copy to builds/ with a readable name.
# `extra_features` (comma-separated) is appended to the board feature,
# e.g. `just build wio_tracker_l1 release debug-checkpoint`.
build board profile="release" extra_features="":
@just _cargo {{board}} "build --{{profile}}" "" "{{extra_features}}"
@just _copy_firmware {{board}} {{profile}}
# Build and flash a board (espflash for Xtensa, UF2 DFU for ARM)
flash board:
# Build and flash a board (espflash for Xtensa, UF2 DFU for ARM).
# `extra_features` is passed through to the build, e.g.
# `just flash wio_tracker_l1 debug-checkpoint`.
flash board extra_features="":
@just _ensure_tools
@just build {{board}} release
@read -r feat target chip <<< "$(just _info {{board}})"; \
@just build {{board}} release "{{extra_features}}"
@set -- $(just _info {{board}}); feat=$1; target=$2; chip=$3; \
case "$target" in \
xtensa-*) \
port=$(just _find_port "303a:1001" "1209:5741" "10c4:ea60" "1a86:7522" "1a86:7523"); \
@@ -90,11 +80,12 @@ flash board:
*) just _flash_uf2 {{board}} ;; \
esac
# Flash ARM board via debug probe (requires J-Link or similar)
flash-probe board:
# Flash ARM board via debug probe (requires J-Link or similar).
# `extra_features` is passed through to the build.
flash-probe board extra_features="":
@just _ensure_tools
@just build {{board}} release
@read -r feat target chip <<< "$(just _info {{board}})"; \
@just build {{board}} release "{{extra_features}}"
@set -- $(just _info {{board}}); feat=$1; target=$2; chip=$3; \
probe-rs run --chip $chip "{{builds_dir}}/donglora-{{board}}-v{{version}}.elf"
# Show binary size for a release build
@@ -116,12 +107,14 @@ outdated:
_ensure_tools:
@mise trust --yes . 2>/dev/null; mise install --quiet
# Run a cargo command for a board.
# Run a cargo command for a board, optionally with extra Cargo features
# (comma-separated, e.g. "debug-checkpoint").
# Xtensa: esp toolchain (cargo + rustc + rust-src together) + -Zbuild-std=core
[private]
_cargo board cmd extra_args="":
_cargo board cmd extra_args="" extra_features="":
@just _ensure_tools
@read -r feat target chip <<< "$(just _info {{board}})"; \
@set -- $(just _info {{board}}); feat=$1; target=$2; chip=$3; \
[ -n "{{extra_features}}" ] && feat="$feat,{{extra_features}}"; \
extra=""; buildstd=""; \
case "$target" in xtensa-*) \
just _require_esp_toolchain; \
@@ -133,7 +126,7 @@ _cargo board cmd extra_args="":
# Ensure a board's toolchain is available, auto-installing if needed
[private]
_can_build board:
@read -r feat target chip <<< "$(just _info {{board}})"; \
@set -- $(just _info {{board}}); feat=$1; target=$2; chip=$3; \
case "$target" in \
xtensa-*) just _require_esp_toolchain ;; \
*) rustup target list --installed | grep -q "^$target$" || rustup target add "$target" ;; \
@@ -169,25 +162,25 @@ _find_port +vid_pids:
[private]
_copy_firmware board profile:
@mkdir -p {{builds_dir}}
@read -r feat target chip <<< "$(just _info {{board}})"; \
@set -- $(just _info {{board}}); feat=$1; target=$2; chip=$3; \
src="target/$target/{{profile}}/donglora"; \
dst="{{builds_dir}}/donglora-{{board}}-v{{version}}"; \
if [ -f "$src" ]; then \
cp "$src" "$dst.elf"; echo "→ $dst.elf"; \
case "$target" in \
xtensa-*) \
mise exec -- espflash save-image --chip "$chip" --merge --skip-padding "$src" "$dst.bin"; \
espflash save-image --chip "$chip" --merge --skip-padding "$src" "$dst.bin"; \
echo "→ $dst.bin"; \
;; \
thumbv6m-*) \
mise exec -- rust-objcopy -O ihex "$src" "$dst.hex"; \
mise exec -- cargo-hex-to-uf2 hex-to-uf2 --input-path "$dst.hex" --output-path "$dst.uf2" --family rp2040; \
rust-objcopy -O ihex "$src" "$dst.hex"; \
cargo-hex-to-uf2 hex-to-uf2 --input-path "$dst.hex" --output-path "$dst.uf2" --family rp2040; \
rm "$dst.hex"; \
echo "→ $dst.uf2"; \
;; \
thumbv7em-*) \
mise exec -- rust-objcopy -O ihex "$src" "$dst.hex"; \
mise exec -- cargo-hex-to-uf2 hex-to-uf2 --input-path "$dst.hex" --output-path "$dst.uf2" --family nrf52840; \
rust-objcopy -O ihex "$src" "$dst.hex"; \
cargo-hex-to-uf2 hex-to-uf2 --input-path "$dst.hex" --output-path "$dst.uf2" --family nrf52840; \
rm "$dst.hex"; \
echo "→ $dst.uf2"; \
;; \
@@ -210,15 +203,19 @@ _flash_uf2 board:
sync; \
echo "Done — board will reboot automatically"
# Single source of truth for per-board metadata: "feature target chip".
# ADD A NEW BOARD HERE and in the `boards` list near the top of this file.
[private]
_info name:
@if [ "{{name}}" == "heltec_v3" ]; then echo "{{heltec_v3}}"; \
elif [ "{{name}}" == "heltec_v3_uart" ]; then echo "{{heltec_v3_uart}}"; \
elif [ "{{name}}" == "heltec_v4" ]; then echo "{{heltec_v4}}"; \
elif [ "{{name}}" == "elecrow_thinknode_m2" ]; then echo "{{elecrow_thinknode_m2}}"; \
elif [ "{{name}}" == "lilygo_tbeam" ]; then echo "{{lilygo_tbeam}}"; \
elif [ "{{name}}" == "lilygo_tbeam_supreme" ]; then echo "{{lilygo_tbeam_supreme}}"; \
elif [ "{{name}}" == "rak_wisblock_4631" ]; then echo "{{rak_wisblock_4631}}"; \
elif [ "{{name}}" == "waveshare_rp2040_lora" ]; then echo "{{waveshare_rp2040_lora}}"; \
elif [ "{{name}}" == "wio_tracker_l1" ]; then echo "{{wio_tracker_l1}}"; \
else echo "Unknown board: {{name}}" >&2; exit 1; fi
@case "{{name}}" in \
heltec_v3) echo "heltec_v3 xtensa-esp32s3-none-elf esp32s3" ;; \
heltec_v3_uart) echo "heltec_v3_uart xtensa-esp32s3-none-elf esp32s3" ;; \
heltec_v4) echo "heltec_v4 xtensa-esp32s3-none-elf esp32s3" ;; \
elecrow_thinknode_m2) echo "elecrow_thinknode_m2 xtensa-esp32s3-none-elf esp32s3" ;; \
lilygo_tbeam) echo "lilygo_tbeam xtensa-esp32-none-elf esp32" ;; \
lilygo_tbeam_supreme) echo "lilygo_tbeam_supreme xtensa-esp32s3-none-elf esp32s3" ;; \
rak_wisblock_4631) echo "rak_wisblock_4631 thumbv7em-none-eabihf nRF52840_xxAA" ;; \
waveshare_rp2040_lora) echo "waveshare_rp2040_lora thumbv6m-none-eabi rp2040" ;; \
wio_tracker_l1) echo "wio_tracker_l1 thumbv7em-none-eabihf nRF52840_xxAA" ;; \
*) echo "Unknown board: {{name}}" >&2; exit 1 ;; \
esac
+21 -6
View File
@@ -1,9 +1,24 @@
[tools]
rust = "1.94"
just = "latest"
"cargo:cargo-binutils" = "latest" # `cargo size`, `cargo objdump`, etc.
"cargo:cargo-hex-to-uf2" = "latest" # ELF → UF2 via Intel HEX for nRF52840 DFU
"cargo:espup" = "0.16"
"cargo:espflash" = "3" # 4.x has broken nix dependency on current stable Rust
"cargo:probe-rs-tools" = "0.31"
# Cargo-installed tooling via mise's `cargo:` backend.
"cargo:cargo-binutils" = "latest" # rust-objcopy, rust-size
"cargo:cargo-hex-to-uf2" = "latest" # ELF → UF2 for nRF52 / RP2040 DFU drives
"cargo:espup" = "latest" # bootstraps the ESP Xtensa toolchain
"cargo:espflash" = "3" # flash + save-image for ESP targets (4.x requires esp_app_desc!() in app — revisit alongside esp-hal 1.1+ / drop-the-patches cleanup)
"cargo:probe-rs-tools" = "latest" # debug-probe flash/run for ARM targets
# Stable Rust + cross-compile targets. Targets land under $RUSTUP_HOME for
# the pinned toolchain, so they're always available under `mise exec` — no
# extra `rustup target add` step at setup time.
#
# Xtensa ESP targets are NOT listed here — they use the self-contained `esp`
# toolchain installed out-of-band by `espup` (see `just setup`). That
# toolchain ships its own rust-src for `-Zbuild-std`.
#
# profile = "minimal" (just rustc, rust-std, cargo), "default" (adds rust-docs, rustfmt, clippy)
#
[tools.rust]
version = "1.94"
profile = "default"
targets = "thumbv6m-none-eabi,thumbv7em-none-eabihf"
+2 -2
View File
@@ -86,8 +86,8 @@ pub fn init_radio(
let reset = Output::new(reset_pin, Level::High, OutputConfig::default());
let dio0 = Input::new(dio0_pin, InputConfig::default().with_pull(Pull::Down));
let iv = GenericSx127xInterfaceVariant::new(reset, dio0, None, None)
.expect("SX1276 interface init");
let iv =
GenericSx127xInterfaceVariant::new(reset, dio0, None, None).expect("SX1276 interface init");
let sx_config = sx127x::Config {
chip: sx127x::Sx1276,
+8 -5
View File
@@ -13,7 +13,8 @@
//! LoRa ctl: RESET=23, DIO0=26 (primary IRQ — SX127x has no BUSY)
//! OLED I²C: SDA=21, SCL=22, SSD1306 @ 0x3C (shared with AXP192 @ 0x34)
//! UART host: TX=1, RX=3 via CP2102 bridge (USB 10c4:ea60)
//! LED: GPIO4 (active HIGH — reuses MeshCore's P_LORA_TX_LED)
//! LED: GPIO4 (active LOW — red LED under the OLED, wrapped in
//! InvertedPin so SimpleLed sees normal polarity)
//!
//! GPS / battery / IMU / PCF8563 RTC are populated on the board but unused
//! by this firmware.
@@ -24,6 +25,7 @@ use esp_hal::i2c::master::{Config as I2cConfig, I2c};
use super::esp32;
use super::traits::{BoardParts, LoRaBoard};
use crate::driver::axp;
use crate::driver::inverted_pin::InvertedPin;
use crate::driver::simple_led::SimpleLed;
use crate::hal::esp32 as mcu;
use crate::protocol::RadioChipId;
@@ -33,7 +35,7 @@ pub use super::esp32::{create_display, DisplayDriver, DisplayParts, RadioDriver,
// ── Concrete peripheral types ───────────────────────────────────────
pub type UartDriver = esp_hal::uart::Uart<'static, esp_hal::Async>;
pub type LedDriver = SimpleLed<Output<'static>>;
pub type LedDriver = SimpleLed<InvertedPin<Output<'static>>>;
// ── Peripheral bundles ──────────────────────────────────────────────
@@ -122,9 +124,10 @@ impl LoRaBoard for Board {
i2c: i2c_blocking.into_async(),
});
// TX activity LED on GPIO4 (active HIGH).
let led_pin = Output::new(p.GPIO4, Level::Low, OutputConfig::default());
let led = SimpleLed(led_pin);
// TX activity LED on GPIO4 (active LOW — pin idles HIGH = LED off).
// InvertedPin flips set_high/set_low so SimpleLed stays polarity-agnostic.
let led_pin = Output::new(p.GPIO4, Level::High, OutputConfig::default());
let led = SimpleLed(InvertedPin(led_pin));
BoardParts {
radio,
+27 -7
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@@ -20,7 +20,7 @@ type RadioSpiDevice = SpiDevice<'static, NoopRawMutex, mcu::SpiBus, Nss>;
pub type RadioDriver = Sx126x<RadioSpiDevice, Iv, Sx1262>;
pub type UsbDriver = mcu::UsbNrfDriver;
pub type DisplayI2c = mcu::I2cBus;
pub type LedDriver = ();
pub type LedDriver = crate::driver::simple_led::SimpleLed<Output<'static>>;
pub type DisplayDriver = ssd1306::Ssd1306Async<
ssd1306::prelude::I2CInterface<DisplayI2c>,
@@ -78,10 +78,14 @@ impl LoRaBoard for Board {
type CommParts = UsbParts;
type DisplayParts = DisplayParts;
type DisplayDriver = DisplayDriver;
type LedDriver = ();
type LedDriver = LedDriver;
fn init() -> Self {
let p = embassy_nrf::init(Default::default());
// USB requires the 32 MHz HFXO (±50 ppm); the RC oscillator is out of spec.
let mut config = embassy_nrf::config::Config::default();
config.hfclk_source = embassy_nrf::config::HfclkSource::ExternalXtal;
config.lfclk_source = embassy_nrf::config::LfclkSource::ExternalXtal;
let p = embassy_nrf::init(config);
Self { p }
}
@@ -89,12 +93,18 @@ impl LoRaBoard for Board {
mcu::mac_address()
}
fn into_parts(self) -> BoardParts<RadioParts, UsbParts, DisplayParts, ()> {
fn into_parts(self) -> BoardParts<RadioParts, UsbParts, DisplayParts, LedDriver> {
let p = self.p;
// SX1262 is power-gated on P1.05 — must be HIGH before any SPI access.
let sx_power_en = Output::new(p.P1_05, Level::High, OutputDrive::Standard);
core::mem::forget(sx_power_en);
// ── SPI bus for SX1262 ──────────────────────────────────
let mut spi_cfg = spim::Config::default();
spi_cfg.frequency = spim::Frequency::M1;
// embassy_nrf::spim::Spim::new args: (spim, irq, sck, miso, mosi, config).
// Per RAK4631 BSP: SCK=P1.11, MISO=P1.13, MOSI=P1.12.
let spi = Spim::new(p.SPI3, mcu::Irqs, p.P1_11, p.P1_13, p.P1_12, spi_cfg);
let spi_bus = mcu::share_spi_bus(spi);
@@ -103,7 +113,11 @@ impl LoRaBoard for Board {
let reset = Output::new(p.P1_06, Level::High, OutputDrive::Standard);
let dio1 = Input::new(p.P1_15, Pull::Down);
let busy = Input::new(p.P1_14, Pull::Down);
// BUSY has an internal 20 kΩ pull-up on the SX1262 die (datasheet
// p. 53); an MCU-side Pull::Down fights it and leaves the line at
// an indeterminate voltage, making wait_on_busy unreliable. See
// lora-rs/lora-rs#260.
let busy = Input::new(p.P1_14, Pull::None);
let iv = GenericSx126xInterfaceVariant::new(reset, dio1, busy, None, None)
.expect("SX1262 interface init");
@@ -121,7 +135,9 @@ impl LoRaBoard for Board {
};
// ── USB ─────────────────────────────────────────────────
let vbus = mcu::alloc_vbus_detect(true, false);
// SoftwareVbusDetect(vbus_detected, power_ready). Mark both true so the
// driver doesn't block waiting for a power-ready signal we never raise.
let vbus = mcu::alloc_vbus_detect(true, true);
let host = UsbParts {
driver: Driver::new(p.USBD, mcu::Irqs, vbus),
};
@@ -138,11 +154,15 @@ impl LoRaBoard for Board {
);
let display = Some(DisplayParts { i2c });
// Green LED on P1.03 (RAK19007 Base, active HIGH).
let led_pin = Output::new(p.P1_03, Level::Low, OutputDrive::Standard);
let led = crate::driver::simple_led::SimpleLed(led_pin);
BoardParts {
radio,
host,
display,
led: (),
led,
mac: Self::mac_address(),
}
}
+5 -1
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@@ -96,7 +96,11 @@ impl LoRaBoard for Board {
let reset = Output::new(p.P1_07, Level::High, OutputDrive::Standard);
let dio1 = Input::new(p.P0_07, Pull::Down);
let busy = Input::new(p.P1_10, Pull::Down);
// BUSY has an internal 20 kΩ pull-up on the SX1262 die (datasheet
// p. 53); an MCU-side Pull::Down fights it and leaves the line at
// an indeterminate voltage, making wait_on_busy unreliable. See
// lora-rs/lora-rs#260.
let busy = Input::new(p.P1_10, Pull::None);
// RF switch: RXEN on P1.08 (GPIO, toggled by lora_phy), TX via DIO2 (SX1262 internal).
let rx_enable = Output::new(p.P1_08, Level::Low, OutputDrive::Standard);
+10 -9
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@@ -138,15 +138,16 @@ fn phase_depth(n: u8) -> u8 {
match n {
18 => 1, // pre-TX: CmdTransmit just read from commands channel
6 => 2, // perform_tx entered
7 => 3, // in CAD
8 => 4, // in prepare_for_tx
9 => 5, // in tx().await
10 => 6, // do_tx returned Ok
11 => 7, // respond_tx_done entered
12 => 8, // respond_tx_done: responses.send returned
13 => 9, // host_task received response from channel
14 => 10, // host_task wrote response to UART (terminal success)
15 => 11, // TX errored (terminal error)
7 => 3, // in CAD (before prepare_for_cad)
19 => 4, // after prepare_for_cad (awaiting lora.cad IRQ)
8 => 5, // in prepare_for_tx
9 => 6, // in tx().await
10 => 7, // do_tx returned Ok
11 => 8, // respond_tx_done entered
12 => 9, // respond_tx_done: responses.send returned
13 => 10, // host_task received response from channel
14 => 11, // host_task wrote response to UART (terminal success)
15 => 12, // TX errored (terminal error)
_ => 0, // not a TX phase
}
}
+1 -1
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@@ -37,8 +37,8 @@ use embassy_time::Timer;
use hsmc::statechart;
use crate::board::{self, Board, DisplayDriver, DisplayParts, LedDriver, LoRaBoard, RgbLed};
use crate::driver::DisplayBrightness;
use crate::channel::{DisplayCommand, DisplayCommandChannel, RadioEvent, RadioEventChannel};
use crate::driver::DisplayBrightness;
use crate::protocol::LoRaConfig;
use render::{BoardInfo, RSSI_HISTORY_LEN};
+30
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@@ -0,0 +1,30 @@
//! Generic `OutputPin` wrapper that inverts logic levels.
//!
//! When a peripheral is wired active-low (LED anode to V+, cathode to GPIO;
//! reset line idle-high, etc.) the physical polarity is a property of the
//! board, not of the driver. Wrapping the pin in `InvertedPin` lets drivers
//! keep "set_high = assert" semantics while the board file expresses the
//! wiring reality at construction time.
//!
//! ```ignore
//! let pin = Output::new(p.GPIO4, Level::High, OutputConfig::default()); // off
//! let led = SimpleLed(InvertedPin(pin)); // driver sees normal polarity
//! ```
use embedded_hal::digital::{ErrorType, OutputPin};
pub struct InvertedPin<P>(pub P);
impl<P: ErrorType> ErrorType for InvertedPin<P> {
type Error = P::Error;
}
impl<P: OutputPin> OutputPin for InvertedPin<P> {
fn set_low(&mut self) -> Result<(), Self::Error> {
self.0.set_high()
}
fn set_high(&mut self) -> Result<(), Self::Error> {
self.0.set_low()
}
}
+4
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@@ -8,6 +8,9 @@ pub mod sh1106;
#[cfg(any(feature = "lilygo_tbeam_supreme", feature = "lilygo_tbeam"))]
pub mod axp;
#[cfg(feature = "lilygo_tbeam")]
pub mod inverted_pin;
#[cfg(any(
feature = "heltec_v3",
feature = "heltec_v3_uart",
@@ -15,6 +18,7 @@ pub mod axp;
feature = "elecrow_thinknode_m2",
feature = "lilygo_tbeam_supreme",
feature = "lilygo_tbeam",
feature = "rak_wisblock_4631",
feature = "wio_tracker_l1",
feature = "waveshare_rp2040_lora"
))]
+285
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@@ -0,0 +1,285 @@
//! Pure-math helpers for Listen-Before-Talk (CAD) retry timing.
//!
//! The CAD retry loop in `radio::do_tx` scales its backoff to the active
//! LoRa configuration: per-retry sleep is one time-on-air of an assumed
//! peer packet, total retry budget is capped at `CAD_BUDGET_US`. This
//! module owns the ToA math (Semtech AN1200.13) and the retry-count
//! derivation, split out so it can be unit-tested host-side without the
//! radio module's hardware dependencies.
use crate::protocol::{LoRaCodingRate, LoRaConfig, LoRaHeaderMode};
/// Total LBT budget: the maximum time the CAD retry loop is allowed to
/// tie up the radio before returning `ChannelBusy`.
pub const CAD_BUDGET_US: u32 = 2_500_000;
/// Upper bound on retries, independent of budget — caps the work on
/// very fast configs (SF7/BW500 would otherwise get 60+ retries).
pub const CAD_HARD_CAP: u8 = 10;
/// Assumed peer-packet payload (bytes) used to size the per-retry sleep.
/// 80 is a representative median for typical mesh traffic. Peers sending
/// larger packets may be partially under-waited (accepted trade-off —
/// host-level retry handles collisions).
#[allow(dead_code)] // consumed by `radio.rs`, which is gated out of test builds
pub const CAD_ASSUMED_PEER_PAYLOAD_B: u16 = 80;
/// Jitter applied to each sleep, in tenths of a percent (±20 % = 200).
pub const CAD_JITTER_TENTHS_PCT: u32 = 200;
/// ToA formula expects CR ∈ {1..4} for 4/5..4/8 (each coded symbol carries
/// `CR+4` bits). The protocol enum starts at 0, so map explicitly — using
/// `as u32` alone would underestimate airtime by one code bit everywhere.
pub fn cr_numeric(cr: LoRaCodingRate) -> u32 {
match cr {
LoRaCodingRate::Cr4_5 => 1,
LoRaCodingRate::Cr4_6 => 2,
LoRaCodingRate::Cr4_7 => 3,
LoRaCodingRate::Cr4_8 => 4,
}
}
/// Worst-case LoRa time-on-air in microseconds (Semtech AN1200.13).
///
/// Uses `N_preamble + 4.25` quarter-symbols for preamble duration; SX126x
/// uses 6.25 at SF5/SF6, so the result is low by 2·T_sym at those SFs
/// (sub-millisecond — negligible at the LBT-budget scale).
pub fn toa_us(cfg: &LoRaConfig, payload_len: u16) -> u32 {
let sf = cfg.sf as u64;
let bw_hz = cfg.bw.as_hz() as u64;
// Symbol time in µs: (2^SF / BW_Hz) * 1e6. u64 avoids overflow at
// SF12/BW7 where T_sym ≈ 524 ms.
let t_sym_us = (1u64 << sf) * 1_000_000 / bw_hz.max(1);
let de: i64 = if t_sym_us > 16_000 { 1 } else { 0 };
let crc: i64 = if cfg.payload_crc { 1 } else { 0 };
let h: i64 = if matches!(cfg.header_mode, LoRaHeaderMode::Implicit) {
1
} else {
0
};
let pl = payload_len as i64;
let sf_i = sf as i64;
// Payload symbol count (signed intermediates — `num` goes negative
// for small PL at SF12 with H=1, CRC=0).
let num = 8 * pl - 4 * sf_i + 28 + 16 * crc - 20 * h;
let den = 4 * (sf_i - 2 * de);
let payload_sym_ceil = if num <= 0 || den <= 0 {
0i64
} else {
(num + den - 1) / den
};
let cr_num = cr_numeric(cfg.cr) as i64;
let n_payload = 8 + (payload_sym_ceil * (cr_num + 4)).max(0);
let t_payload_us = n_payload as u64 * t_sym_us;
// Preamble duration: (N + 4.25) * T_sym = (4·N + 17) * T_sym / 4.
let t_preamble_us = (cfg.preamble_len as u64 * 4 + 17) * t_sym_us / 4;
(t_preamble_us + t_payload_us).min(u32::MAX as u64) as u32
}
/// Derive the CAD retry count and per-retry sleep from the cached
/// `cad_retry_delay_us`. Retries form: N CADs separated by N-1 sleeps.
/// When one assumed-packet wait exceeds the total budget, `retries = 1`
/// — a single CAD, bail on busy, no sleep.
pub fn cad_retries(cad_retry_delay_us: u32) -> (u8, u32) {
if cad_retry_delay_us == 0 {
// Unconfigured should never reach this path; fall back to a
// single CAD with no sleep rather than divide-by-zero.
return (1, 0);
}
let n_sleeps = CAD_BUDGET_US / cad_retry_delay_us;
let retries = (n_sleeps + 1).clamp(1, CAD_HARD_CAP as u32) as u8;
(retries, cad_retry_delay_us)
}
/// Apply ±`CAD_JITTER_TENTHS_PCT`/10 % jitter around `base_us`.
/// `entropy` is a raw 32-bit source; caller provides it so this stays
/// pure (radio task passes `Instant::now().as_ticks() as u32`).
pub fn jittered_sleep_us(base_us: u32, entropy: u32) -> u32 {
let mixed = entropy.wrapping_mul(0x9E37_79B9);
let span = 2 * CAD_JITTER_TENTHS_PCT + 1; // e.g. 401 for ±20 %
let r = mixed % span; // 0..=2·CAD_JITTER_TENTHS_PCT
// factor_thousandths ∈ [1000 − CAD_JITTER_TENTHS_PCT, 1000 + CAD_JITTER_TENTHS_PCT]
let factor_thousandths = 1000 - CAD_JITTER_TENTHS_PCT + r;
((base_us as u64 * factor_thousandths as u64) / 1000) as u32
}
#[cfg(test)]
mod tests {
use super::*;
use crate::protocol::{LoRaBandwidth, LoRaCodingRate, LoRaConfig, LoRaHeaderMode};
fn cfg(sf: u8, bw: LoRaBandwidth, cr: LoRaCodingRate, preamble: u16, implicit: bool, crc: bool) -> LoRaConfig {
LoRaConfig {
freq_hz: 915_000_000,
sf,
bw,
cr,
preamble_len: preamble,
sync_word: 0x1424,
tx_power_dbm: 0,
header_mode: if implicit {
LoRaHeaderMode::Implicit
} else {
LoRaHeaderMode::Explicit
},
payload_crc: crc,
iq_invert: false,
}
}
/// Helper: assert `actual` is within `tolerance_pct`% of `expected_us`.
fn approx(actual_us: u32, expected_us: u32, tolerance_pct: u32) {
let diff = actual_us.abs_diff(expected_us);
let tol = expected_us * tolerance_pct / 100;
assert!(
diff <= tol,
"actual {} us not within {}% of expected {} us (diff {}, tol {})",
actual_us,
tolerance_pct,
expected_us,
diff,
tol
);
}
// Reference values sanity-checked against Semtech's LoRa calculator
// and AN1200.13.
#[test]
fn toa_sf7_bw125_cr45_pl10_explicit_crc() {
let c = cfg(7, LoRaBandwidth::Khz125, LoRaCodingRate::Cr4_5, 8, false, true);
// Hand-computed reference from AN1200.13:
// T_sym = 128/125 kHz = 1.024 ms
// T_preamble = (8 + 4.25) · 1.024 = 12.544 ms
// n_payload = 8 + ceil((80 − 28 + 28 + 16) / 28) · 5 = 8 + 4·5 = 28
// T_payload = 28 · 1.024 = 28.672 ms
// Total ≈ 41.22 ms
approx(toa_us(&c, 10), 41_216, 2);
}
#[test]
fn toa_sf12_bw125_cr45_pl10_explicit_crc() {
let c = cfg(12, LoRaBandwidth::Khz125, LoRaCodingRate::Cr4_5, 8, false, true);
// Reference: ~991 ms for PL=10 at SF12/BW125/CR4/5 (LDRO on).
approx(toa_us(&c, 10), 991_000, 2);
}
#[test]
fn toa_sf10_bw125_cr45_pl255_max() {
let c = cfg(10, LoRaBandwidth::Khz125, LoRaCodingRate::Cr4_5, 8, false, true);
// Reference: ~2.34 s for PL=255 at SF10/BW125/CR4/5.
approx(toa_us(&c, 255), 2_335_000, 2);
}
#[test]
fn toa_ldro_activates_at_sf11_and_sf12_bw125() {
// T_sym > 16 ms → DE=1. SF11/BW125: T_sym = 16.384 ms. SF10/BW125: 8.192 ms.
let sf10 = cfg(10, LoRaBandwidth::Khz125, LoRaCodingRate::Cr4_5, 8, false, true);
let sf11 = cfg(11, LoRaBandwidth::Khz125, LoRaCodingRate::Cr4_5, 8, false, true);
let sf12 = cfg(12, LoRaBandwidth::Khz125, LoRaCodingRate::Cr4_5, 8, false, true);
// Crude check: each step roughly doubles airtime (LDRO doesn't
// break the doubling trend — it just shifts constants).
let t10 = toa_us(&sf10, 80);
let t11 = toa_us(&sf11, 80);
let t12 = toa_us(&sf12, 80);
assert!(t11 > t10 * 15 / 10, "SF11 should be > 1.5x SF10, got {} vs {}", t11, t10);
assert!(t12 > t11 * 15 / 10, "SF12 should be > 1.5x SF11, got {} vs {}", t12, t11);
}
#[test]
fn toa_assumed_peer_80b_matches_plan_table() {
let mk = |sf, bw| cfg(sf, bw, LoRaCodingRate::Cr4_5, 8, false, true);
// Plan table values (approximate, within 5%).
approx(toa_us(&mk(7, LoRaBandwidth::Khz500), 80), 36_000, 5);
approx(toa_us(&mk(7, LoRaBandwidth::Khz250), 80), 72_000, 5);
approx(toa_us(&mk(7, LoRaBandwidth::Khz125), 80), 144_000, 5);
approx(toa_us(&mk(8, LoRaBandwidth::Khz125), 80), 257_000, 5);
approx(toa_us(&mk(9, LoRaBandwidth::Khz125), 80), 452_000, 5);
approx(toa_us(&mk(10, LoRaBandwidth::Khz125), 80), 862_000, 5);
approx(toa_us(&mk(11, LoRaBandwidth::Khz125), 80), 1_806_000, 5);
approx(toa_us(&mk(12, LoRaBandwidth::Khz125), 80), 3_285_000, 5);
}
#[test]
fn toa_no_underflow_at_small_pl_sf12_implicit_no_crc() {
// num = 8·PL − 4·SF + 28 + 16·CRC − 20·H goes negative here; the
// i64 + max(0) guard must kick in without panicking or wrapping.
let c = cfg(12, LoRaBandwidth::Khz125, LoRaCodingRate::Cr4_5, 8, true, false);
let t = toa_us(&c, 1);
// Only 8 payload symbols survive (the formula floors to 0 extra);
// should be preamble + 8·T_sym ≈ 401 + 262 = 663 ms roughly.
approx(t, 663_000, 5);
}
// Retry-count derivation table from the plan.
#[test]
fn retries_sf7_bw500_hits_hard_cap() {
let (n, s) = cad_retries(36_000);
assert_eq!(n, 10);
assert_eq!(s, 36_000);
}
#[test]
fn retries_sf10_bw125() {
// T_assumed ≈ 862 ms; budget 2.5 s ⇒ 2 sleeps ⇒ 3 retries.
let (n, _) = cad_retries(862_000);
assert_eq!(n, 3);
}
#[test]
fn retries_sf11_bw125() {
// T_assumed ≈ 1.81 s; budget 2.5 s ⇒ 1 sleep ⇒ 2 retries.
let (n, _) = cad_retries(1_806_000);
assert_eq!(n, 2);
}
#[test]
fn retries_sf12_bw125_degraded() {
// T_assumed ≈ 3.29 s > 2.5 s budget ⇒ 0 sleeps ⇒ 1 retry (bail on busy).
let (n, _) = cad_retries(3_285_000);
assert_eq!(n, 1);
}
#[test]
fn retries_zero_delay_falls_back_to_single_cad() {
// Unconfigured safety: avoid divide-by-zero.
let (n, s) = cad_retries(0);
assert_eq!(n, 1);
assert_eq!(s, 0);
}
// Jitter sanity.
#[test]
fn jitter_stays_within_pm_20_pct() {
let base = 1_000_000u32;
// Exhaustive over the low byte — enough to cover the `% span` range.
let mut saw_low = false;
let mut saw_high = false;
for e in 0u32..=u16::MAX as u32 {
let j = jittered_sleep_us(base, e);
// ±20% ⇒ [800_000, 1_200_000].
assert!(
(800_000..=1_200_000).contains(&j),
"jitter {} us out of ±20% bounds for entropy {}",
j,
e
);
if j <= 850_000 {
saw_low = true;
}
if j >= 1_150_000 {
saw_high = true;
}
}
assert!(saw_low && saw_high, "jitter didn't span the expected range");
}
#[test]
fn jitter_zero_base_is_zero() {
for e in [0u32, 1, 42, 0xDEAD_BEEF] {
assert_eq!(jittered_sleep_us(0, e), 0);
}
}
}
+1
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@@ -29,6 +29,7 @@ mod driver;
mod hal;
#[cfg(not(test))]
mod host;
mod lbt;
mod protocol;
#[cfg(not(test))]
mod radio;
+75 -9
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@@ -47,7 +47,11 @@ use crate::protocol::{
SetConfigResultCode, TxDonePayload, TxResult, MAX_OTA_PAYLOAD,
};
const CAD_MAX_RETRIES: u8 = 10;
// LBT retry timing lives in `crate::lbt` — the math is pure and
// host-testable, so it's split out of this (HW-gated) module.
use crate::lbt::{
cad_retries, jittered_sleep_us, toa_us, CAD_ASSUMED_PEER_PAYLOAD_B, CAD_BUDGET_US,
};
type LoRaDriver = LoRa<RadioDriver, Delay>;
@@ -152,6 +156,11 @@ pub struct RadioContext {
/// `ResumingRx`. Reset on any `StartRxOk`. See `MAX_RESUME_RETRIES`
/// for the limit before falling through to `Idle`.
pub resume_retries: u8,
/// Per-CAD-retry sleep in microseconds: time-on-air for a
/// `CAD_ASSUMED_PEER_PAYLOAD_B`-byte packet under the current
/// config. Recomputed on every successful `SET_CONFIG`; `0` while
/// `Unconfigured` (the CAD path is unreachable without a config).
pub cad_retry_delay_us: u32,
}
impl RadioContext {
@@ -259,7 +268,7 @@ statechart! {
default(TransmittingFromIdle);
state TransmittingFromIdle {
during: perform_tx(lora, pending_tx);
during: perform_tx(lora, pending_tx, cad_retry_delay_us);
on(TransmitDone { airtime_us: u32 }) => respond_tx_done;
on(TransmitDone) => Idle;
on(ChannelBusy) => respond_tx_channel_busy, Idle;
@@ -267,7 +276,7 @@ statechart! {
}
state TransmittingFromRx {
during: perform_tx(lora, pending_tx);
during: perform_tx(lora, pending_tx, cad_retry_delay_us);
on(TransmitDone { airtime_us: u32 }) => respond_tx_done;
on(TransmitDone) => ResumingRx;
// Even on failure, we were receiving before the TX —
@@ -368,17 +377,32 @@ async fn next_packet(
}
}
async fn perform_tx(lora: &mut LoRaDriver, pending: &mut Option<PendingTx>) -> RadioInput {
async fn perform_tx(
lora: &mut LoRaDriver,
pending: &mut Option<PendingTx>,
cad_retry_delay_us: &mut u32,
) -> RadioInput {
#[cfg(feature = "debug-checkpoint")]
crate::debug_blink::set(6);
let Some(tx) = pending.take() else {
return RadioInput::TransmitFailed;
};
// Scale CAD retry count to the cached per-retry sleep: fewer retries
// when each one-full-packet wait is expensive (slow SFs). When the
// one-packet wait exceeds the total budget, the helper returns
// `retries = 1` — a single CAD, bail on busy, no sleep.
let (retries, sleep_us) = cad_retries(*cad_retry_delay_us);
let start = Instant::now();
match do_tx(lora, &tx).await {
match do_tx(lora, &tx, retries, sleep_us).await {
Ok(TxOutcome::Transmitted) => RadioInput::TransmitDone {
airtime_us: Instant::now().duration_since(start).as_micros() as u32,
},
Ok(TxOutcome::ChannelBusy) => RadioInput::ChannelBusy,
Err(_) => RadioInput::TransmitFailed,
Err(_) => {
#[cfg(feature = "debug-checkpoint")]
crate::debug_blink::set(15);
RadioInput::TransmitFailed
}
}
}
@@ -421,11 +445,20 @@ impl RadioActions for RadioActionContext<'_> {
if let Err(_e) = reconfigure_radio(&mut self.lora, &cfg).await {
// Hardware failure: drop to Unconfigured (spec §6.3).
self.config = None;
self.cad_retry_delay_us = 0;
self.send(tag, DeviceMessage::Err(ErrorCode::ERadio)).await;
let _ = self.emit(RadioInput::ConfigFailedRadio);
return;
}
self.config = Some(cfg);
self.cad_retry_delay_us = toa_us(&cfg, CAD_ASSUMED_PEER_PAYLOAD_B);
if self.cad_retry_delay_us > CAD_BUDGET_US {
defmt::debug!(
"LBT degraded: assumed-packet ToA {=u32} us > budget {=u32} us; single-CAD-and-bail",
self.cad_retry_delay_us,
CAD_BUDGET_US
);
}
self.packets_dropped = 0;
self.announce(RadioEvent::ConfigChanged(cfg));
let result = SetConfigResult {
@@ -701,19 +734,39 @@ async fn reconfigure_radio(lora: &mut LoRaDriver, cfg: &LoRaConfig) -> Result<()
Ok(())
}
async fn do_tx(lora: &mut LoRaDriver, tx: &PendingTx) -> Result<TxOutcome, RadioError> {
async fn do_tx(
lora: &mut LoRaDriver,
tx: &PendingTx,
retries: u8,
sleep_us: u32,
) -> Result<TxOutcome, RadioError> {
let mdltn = to_lora_mod_params(lora, &tx.config)?;
if !tx.skip_cad {
#[cfg(feature = "debug-checkpoint")]
crate::debug_blink::set(7);
lora.prepare_for_cad(&mdltn).await?;
// Reaches here → prepare_for_cad (SPI setup) completed.
// Hang past here means lora.cad() is waiting on DIO1.
#[cfg(feature = "debug-checkpoint")]
crate::debug_blink::set(19);
let mut saw_activity = false;
for _ in 0..CAD_MAX_RETRIES {
for i in 0..retries {
if !lora.cad(&mdltn).await? {
saw_activity = false;
break;
}
saw_activity = true;
embassy_time::Timer::after_millis(10).await;
// Skip the trailing sleep: if the last CAD was busy, we're
// about to return ChannelBusy, so sleeping + re-preparing
// is wasted work.
if i + 1 == retries {
break;
}
let entropy = embassy_time::Instant::now().as_ticks() as u32;
let jittered_us = jittered_sleep_us(sleep_us, entropy);
embassy_time::Timer::after(embassy_time::Duration::from_micros(jittered_us as u64))
.await;
lora.prepare_for_cad(&mdltn).await?;
}
if saw_activity {
@@ -728,9 +781,15 @@ async fn do_tx(lora: &mut LoRaDriver, tx: &PendingTx) -> Result<TxOutcome, Radio
tx.config.iq_invert,
&mdltn,
)?;
#[cfg(feature = "debug-checkpoint")]
crate::debug_blink::set(8);
lora.prepare_for_tx(&mdltn, &mut tx_pkt, tx.config.tx_power_dbm as i32, &tx.data)
.await?;
#[cfg(feature = "debug-checkpoint")]
crate::debug_blink::set(9);
lora.tx().await?;
#[cfg(feature = "debug-checkpoint")]
crate::debug_blink::set(10);
Ok(TxOutcome::Transmitted)
}
@@ -781,13 +840,19 @@ pub async fn radio_task(
events: &'static RadioEventChannel,
info: &'static Info,
) {
#[cfg(feature = "debug-checkpoint")]
crate::debug_blink::set(1);
let lora = match LoRa::new(parts.driver, false, parts.delay).await {
Ok(l) => {
info!("radio initialized");
#[cfg(feature = "debug-checkpoint")]
crate::debug_blink::set(2);
l
}
Err(e) => {
error!("radio init failed: {}", e);
#[cfg(feature = "debug-checkpoint")]
crate::debug_blink::set(16);
return;
}
};
@@ -806,6 +871,7 @@ pub async fn radio_task(
last_tx_tag: None,
pending_rx_start_tag: None,
resume_retries: 0,
cad_retry_delay_us: 0,
};
static RADIO_INTERNAL_CH: embassy_sync::channel::Channel<